/ 11111

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Fork of nRF51822 by Nordic Semiconductor

nordic-sdk/components/drivers_nrf/hal/nrf_gpio.h@362:6fa0d4d555f6, 2015-07-02 (annotated)

Committer:
rgrover1
Date:
Thu Jul 02 09:08:44 2015 +0100
Revision:
362:6fa0d4d555f6
Parent:
361:d2405f5a4853
Child:
370:295f76db798e
Synchronized with git rev 2716309c

Author: Rohit Grover

Release 0.4.0

=============



This is a major release which introduces the GATT Client functionality. It

aligns with release 0.4.0 of BLE_API.



Enhancements

~~~~~~~~~~~~



* Introduce GattClient. This includes functionality for service-discovery,

  connections, and attribute-reads and writes. You'll find a demo program for

  LEDBlinker on the mbed.org Bluetooth team page to use the new APIs. Some of

  the GATT client functionality hasn't been implemented yet, but the APIs have

  been added.



* We've added an implementation for the abstract base class for

  SecurityManager. All security related APIs have been moved into that.



* There has been a major cleanup of APIs under BLE. APIs have now been

  categorized as belonging to Gap, GattServer, GattClient, or SecurityManager.

  There are accessors to get references for Gap, GattServer, GattClient, and

  SecurityManager. A former call to ble.setAddress(...) is now expected to be

  achieved with ble.gap().setAddress(...).



* We've cleaned up our APIs, and this has resulted in dropping some APIs like

  BLE::reset().



* We've also dropped GattServer::initializeGattDatabase(). THis was added at

  some point to support controllers where a commit point was needed to

  indicate when the application had finished constructing the GATT database.

  This API would get called internally before Gap::startAdvertising(). We now

  expect the underlying port to do the equivalent of initializeGattDatabase()

  implicitly upon Gap::startAdvertising().



* We've added a version of Gap::disconnect() which takes a connection handle.

  The previous API (which did not take a connection handle) has been

  deprecated; it will still work for situations where there's only a single

  active connection. We hold on to that API to allow existing code to migrate

  to the new API.



Bugfixes

~~~~~~~~



* None.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rgrover1 362:6fa0d4d555f6 1 /*
rgrover1 362:6fa0d4d555f6 2 * Copyright (c) Nordic Semiconductor ASA
rgrover1 362:6fa0d4d555f6 3 * All rights reserved.
rgrover1 362:6fa0d4d555f6 4 *
rgrover1 362:6fa0d4d555f6 5 * Redistribution and use in source and binary forms, with or without modification,
rgrover1 362:6fa0d4d555f6 6 * are permitted provided that the following conditions are met:
rgrover1 362:6fa0d4d555f6 7 *
rgrover1 362:6fa0d4d555f6 8 * 1. Redistributions of source code must retain the above copyright notice, this
rgrover1 362:6fa0d4d555f6 9 * list of conditions and the following disclaimer.
rgrover1 362:6fa0d4d555f6 10 *
rgrover1 362:6fa0d4d555f6 11 * 2. Redistributions in binary form must reproduce the above copyright notice, this
rgrover1 362:6fa0d4d555f6 12 * list of conditions and the following disclaimer in the documentation and/or
rgrover1 362:6fa0d4d555f6 13 * other materials provided with the distribution.
rgrover1 362:6fa0d4d555f6 14 *
rgrover1 362:6fa0d4d555f6 15 * 3. Neither the name of Nordic Semiconductor ASA nor the names of other
rgrover1 362:6fa0d4d555f6 16 * contributors to this software may be used to endorse or promote products
rgrover1 362:6fa0d4d555f6 17 * derived from this software without specific prior written permission.
rgrover1 362:6fa0d4d555f6 18 *
rgrover1 362:6fa0d4d555f6 19 *
rgrover1 362:6fa0d4d555f6 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
rgrover1 362:6fa0d4d555f6 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
rgrover1 362:6fa0d4d555f6 22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
rgrover1 362:6fa0d4d555f6 23 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
rgrover1 362:6fa0d4d555f6 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
rgrover1 362:6fa0d4d555f6 25 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
rgrover1 362:6fa0d4d555f6 26 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
rgrover1 362:6fa0d4d555f6 27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
rgrover1 362:6fa0d4d555f6 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
rgrover1 362:6fa0d4d555f6 29 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
rgrover1 362:6fa0d4d555f6 30 *
rgrover1 362:6fa0d4d555f6 31 */
rgrover1 362:6fa0d4d555f6 32
rgrover1 362:6fa0d4d555f6 33 #ifndef NRF_GPIO_H__
rgrover1 362:6fa0d4d555f6 34 #define NRF_GPIO_H__
rgrover1 362:6fa0d4d555f6 35
rgrover1 362:6fa0d4d555f6 36 #include "nrf51.h"
rgrover1 362:6fa0d4d555f6 37 #include "nrf51_bitfields.h"
rgrover1 362:6fa0d4d555f6 38
rgrover1 362:6fa0d4d555f6 39 /**
rgrover1 362:6fa0d4d555f6 40 * @defgroup nrf_gpio GPIO abstraction
rgrover1 362:6fa0d4d555f6 41 * @{
rgrover1 362:6fa0d4d555f6 42 * @ingroup nrf_drivers
rgrover1 362:6fa0d4d555f6 43 * @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports.
rgrover1 362:6fa0d4d555f6 44 *
rgrover1 362:6fa0d4d555f6 45 * Here, the GPIO ports are defined as follows:
rgrover1 362:6fa0d4d555f6 46 * - Port 0 -> pin 0-7
rgrover1 362:6fa0d4d555f6 47 * - Port 1 -> pin 8-15
rgrover1 362:6fa0d4d555f6 48 * - Port 2 -> pin 16-23
rgrover1 362:6fa0d4d555f6 49 * - Port 3 -> pin 24-31
rgrover1 362:6fa0d4d555f6 50 */
rgrover1 362:6fa0d4d555f6 51
rgrover1 362:6fa0d4d555f6 52 /**
rgrover1 362:6fa0d4d555f6 53 * @enum nrf_gpio_port_dir_t
rgrover1 362:6fa0d4d555f6 54 * @brief Enumerator used for setting the direction of a GPIO port.
rgrover1 362:6fa0d4d555f6 55 */
rgrover1 362:6fa0d4d555f6 56 typedef enum
rgrover1 362:6fa0d4d555f6 57 {
rgrover1 362:6fa0d4d555f6 58 NRF_GPIO_PORT_DIR_OUTPUT, ///< Output
rgrover1 362:6fa0d4d555f6 59 NRF_GPIO_PORT_DIR_INPUT ///< Input
rgrover1 362:6fa0d4d555f6 60 } nrf_gpio_port_dir_t;
rgrover1 362:6fa0d4d555f6 61
rgrover1 362:6fa0d4d555f6 62 /**
rgrover1 362:6fa0d4d555f6 63 * @enum nrf_gpio_pin_dir_t
rgrover1 362:6fa0d4d555f6 64 * Pin direction definitions.
rgrover1 362:6fa0d4d555f6 65 */
rgrover1 362:6fa0d4d555f6 66 typedef enum
rgrover1 362:6fa0d4d555f6 67 {
rgrover1 362:6fa0d4d555f6 68 NRF_GPIO_PIN_DIR_INPUT, ///< Input
rgrover1 362:6fa0d4d555f6 69 NRF_GPIO_PIN_DIR_OUTPUT ///< Output
rgrover1 362:6fa0d4d555f6 70 } nrf_gpio_pin_dir_t;
rgrover1 362:6fa0d4d555f6 71
rgrover1 362:6fa0d4d555f6 72 /**
rgrover1 362:6fa0d4d555f6 73 * @enum nrf_gpio_port_select_t
rgrover1 362:6fa0d4d555f6 74 * @brief Enumerator used for selecting between port 0 - 3.
rgrover1 362:6fa0d4d555f6 75 */
rgrover1 362:6fa0d4d555f6 76 typedef enum
rgrover1 362:6fa0d4d555f6 77 {
rgrover1 362:6fa0d4d555f6 78 NRF_GPIO_PORT_SELECT_PORT0 = 0, ///< Port 0 (GPIO pin 0-7)
rgrover1 362:6fa0d4d555f6 79 NRF_GPIO_PORT_SELECT_PORT1, ///< Port 1 (GPIO pin 8-15)
rgrover1 362:6fa0d4d555f6 80 NRF_GPIO_PORT_SELECT_PORT2, ///< Port 2 (GPIO pin 16-23)
rgrover1 362:6fa0d4d555f6 81 NRF_GPIO_PORT_SELECT_PORT3, ///< Port 3 (GPIO pin 24-31)
rgrover1 362:6fa0d4d555f6 82 } nrf_gpio_port_select_t;
rgrover1 362:6fa0d4d555f6 83
rgrover1 362:6fa0d4d555f6 84 /**
rgrover1 362:6fa0d4d555f6 85 * @enum nrf_gpio_pin_pull_t
rgrover1 362:6fa0d4d555f6 86 * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration
rgrover1 362:6fa0d4d555f6 87 */
rgrover1 362:6fa0d4d555f6 88 typedef enum
rgrover1 362:6fa0d4d555f6 89 {
rgrover1 362:6fa0d4d555f6 90 NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pullup resistor disabled
rgrover1 362:6fa0d4d555f6 91 NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pulldown resistor enabled
rgrover1 362:6fa0d4d555f6 92 NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pullup resistor enabled
rgrover1 362:6fa0d4d555f6 93 } nrf_gpio_pin_pull_t;
rgrover1 362:6fa0d4d555f6 94
rgrover1 362:6fa0d4d555f6 95 /**
rgrover1 362:6fa0d4d555f6 96 * @enum nrf_gpio_pin_sense_t
rgrover1 362:6fa0d4d555f6 97 * @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
rgrover1 362:6fa0d4d555f6 98 */
rgrover1 362:6fa0d4d555f6 99 typedef enum
rgrover1 362:6fa0d4d555f6 100 {
rgrover1 362:6fa0d4d555f6 101 NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled.
rgrover1 362:6fa0d4d555f6 102 NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level.
rgrover1 362:6fa0d4d555f6 103 NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level.
rgrover1 362:6fa0d4d555f6 104 } nrf_gpio_pin_sense_t;
rgrover1 362:6fa0d4d555f6 105
rgrover1 362:6fa0d4d555f6 106 /**
rgrover1 362:6fa0d4d555f6 107 * @brief Function for configuring the GPIO pin range as outputs with normal drive strength.
rgrover1 362:6fa0d4d555f6 108 * This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 362:6fa0d4d555f6 109 *
rgrover1 362:6fa0d4d555f6 110 * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 362:6fa0d4d555f6 111 *
rgrover1 362:6fa0d4d555f6 112 * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 362:6fa0d4d555f6 113 *
rgrover1 362:6fa0d4d555f6 114 * @note For configuring only one pin as output use @ref nrf_gpio_cfg_output
rgrover1 362:6fa0d4d555f6 115 * Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
rgrover1 362:6fa0d4d555f6 116 */
rgrover1 362:6fa0d4d555f6 117 static __INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end)
rgrover1 362:6fa0d4d555f6 118 {
rgrover1 362:6fa0d4d555f6 119 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 362:6fa0d4d555f6 120 for (; pin_range_start <= pin_range_end; pin_range_start++)
rgrover1 362:6fa0d4d555f6 121 {
rgrover1 362:6fa0d4d555f6 122 NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 362:6fa0d4d555f6 123 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 362:6fa0d4d555f6 124 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 362:6fa0d4d555f6 125 | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 362:6fa0d4d555f6 126 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
rgrover1 362:6fa0d4d555f6 127 }
rgrover1 362:6fa0d4d555f6 128 }
rgrover1 362:6fa0d4d555f6 129
rgrover1 362:6fa0d4d555f6 130 /**
rgrover1 362:6fa0d4d555f6 131 * @brief Function for configuring the GPIO pin range as inputs with given initial value set, hiding inner details.
rgrover1 362:6fa0d4d555f6 132 * This function can be used to configure pin range as simple input.
rgrover1 362:6fa0d4d555f6 133 *
rgrover1 362:6fa0d4d555f6 134 * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 362:6fa0d4d555f6 135 *
rgrover1 362:6fa0d4d555f6 136 * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 362:6fa0d4d555f6 137 *
rgrover1 362:6fa0d4d555f6 138 * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
rgrover1 362:6fa0d4d555f6 139 *
rgrover1 362:6fa0d4d555f6 140 * @note For configuring only one pin as input use @ref nrf_gpio_cfg_input
rgrover1 362:6fa0d4d555f6 141 * Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
rgrover1 362:6fa0d4d555f6 142 */
rgrover1 362:6fa0d4d555f6 143 static __INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config)
rgrover1 362:6fa0d4d555f6 144 {
rgrover1 362:6fa0d4d555f6 145 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 362:6fa0d4d555f6 146 for (; pin_range_start <= pin_range_end; pin_range_start++)
rgrover1 362:6fa0d4d555f6 147 {
rgrover1 362:6fa0d4d555f6 148 NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 362:6fa0d4d555f6 149 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 362:6fa0d4d555f6 150 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 362:6fa0d4d555f6 151 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 362:6fa0d4d555f6 152 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 362:6fa0d4d555f6 153 }
rgrover1 362:6fa0d4d555f6 154 }
rgrover1 362:6fa0d4d555f6 155
rgrover1 362:6fa0d4d555f6 156 /**
rgrover1 362:6fa0d4d555f6 157 * @brief Function for configuring the given GPIO pin number as output with given initial value set, hiding inner details.
rgrover1 362:6fa0d4d555f6 158 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 362:6fa0d4d555f6 159 *
rgrover1 362:6fa0d4d555f6 160 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
rgrover1 362:6fa0d4d555f6 161 *
rgrover1 362:6fa0d4d555f6 162 * @note Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
rgrover1 362:6fa0d4d555f6 163 */
rgrover1 362:6fa0d4d555f6 164 static __INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
rgrover1 362:6fa0d4d555f6 165 {
rgrover1 362:6fa0d4d555f6 166 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 362:6fa0d4d555f6 167 NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 362:6fa0d4d555f6 168 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 362:6fa0d4d555f6 169 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 362:6fa0d4d555f6 170 | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 362:6fa0d4d555f6 171 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
rgrover1 362:6fa0d4d555f6 172 }
rgrover1 362:6fa0d4d555f6 173
rgrover1 362:6fa0d4d555f6 174 /**
rgrover1 362:6fa0d4d555f6 175 * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
rgrover1 362:6fa0d4d555f6 176 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 362:6fa0d4d555f6 177 *
rgrover1 362:6fa0d4d555f6 178 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
rgrover1 362:6fa0d4d555f6 179 *
rgrover1 362:6fa0d4d555f6 180 * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
rgrover1 362:6fa0d4d555f6 181 *
rgrover1 362:6fa0d4d555f6 182 * @note Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
rgrover1 362:6fa0d4d555f6 183 */
rgrover1 362:6fa0d4d555f6 184 static __INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
rgrover1 362:6fa0d4d555f6 185 {
rgrover1 362:6fa0d4d555f6 186 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 362:6fa0d4d555f6 187 NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 362:6fa0d4d555f6 188 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 362:6fa0d4d555f6 189 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 362:6fa0d4d555f6 190 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 362:6fa0d4d555f6 191 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 362:6fa0d4d555f6 192 }
rgrover1 362:6fa0d4d555f6 193
rgrover1 362:6fa0d4d555f6 194 /**
rgrover1 362:6fa0d4d555f6 195 * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
rgrover1 362:6fa0d4d555f6 196 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 362:6fa0d4d555f6 197 * Sense capability on the pin is configurable, and input is connected to buffer so that the GPIO->IN register is readable.
rgrover1 362:6fa0d4d555f6 198 *
rgrover1 362:6fa0d4d555f6 199 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30).
rgrover1 362:6fa0d4d555f6 200 *
rgrover1 362:6fa0d4d555f6 201 * @param pull_config state of the pin pull resistor (no pull, pulled down or pulled high).
rgrover1 362:6fa0d4d555f6 202 *
rgrover1 362:6fa0d4d555f6 203 * @param sense_config sense level of the pin (no sense, sense low or sense high).
rgrover1 362:6fa0d4d555f6 204 */
rgrover1 362:6fa0d4d555f6 205 static __INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config)
rgrover1 362:6fa0d4d555f6 206 {
rgrover1 362:6fa0d4d555f6 207 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 362:6fa0d4d555f6 208 NRF_GPIO->PIN_CNF[pin_number] = (sense_config << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 362:6fa0d4d555f6 209 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 362:6fa0d4d555f6 210 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 362:6fa0d4d555f6 211 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 362:6fa0d4d555f6 212 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 362:6fa0d4d555f6 213 }
rgrover1 362:6fa0d4d555f6 214
rgrover1 362:6fa0d4d555f6 215 /**
rgrover1 362:6fa0d4d555f6 216 * @brief Function for setting the direction for a GPIO pin.
rgrover1 362:6fa0d4d555f6 217 *
rgrover1 362:6fa0d4d555f6 218 * @param pin_number specifies the pin number [0:31] for which to
rgrover1 362:6fa0d4d555f6 219 * set the direction.
rgrover1 362:6fa0d4d555f6 220 *
rgrover1 362:6fa0d4d555f6 221 * @param direction specifies the direction
rgrover1 362:6fa0d4d555f6 222 */
rgrover1 362:6fa0d4d555f6 223 static __INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction)
rgrover1 362:6fa0d4d555f6 224 {
rgrover1 362:6fa0d4d555f6 225 if(direction == NRF_GPIO_PIN_DIR_INPUT)
rgrover1 362:6fa0d4d555f6 226 {
rgrover1 362:6fa0d4d555f6 227 NRF_GPIO->PIN_CNF[pin_number] =
rgrover1 362:6fa0d4d555f6 228 (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 362:6fa0d4d555f6 229 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 362:6fa0d4d555f6 230 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 362:6fa0d4d555f6 231 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 362:6fa0d4d555f6 232 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 362:6fa0d4d555f6 233 }
rgrover1 362:6fa0d4d555f6 234 else
rgrover1 362:6fa0d4d555f6 235 {
rgrover1 362:6fa0d4d555f6 236 NRF_GPIO->DIRSET = (1UL << pin_number);
rgrover1 362:6fa0d4d555f6 237 }
rgrover1 362:6fa0d4d555f6 238 }
rgrover1 362:6fa0d4d555f6 239
rgrover1 362:6fa0d4d555f6 240 /**
rgrover1 362:6fa0d4d555f6 241 * @brief Function for setting a GPIO pin.
rgrover1 362:6fa0d4d555f6 242 *
rgrover1 362:6fa0d4d555f6 243 * Note that the pin must be configured as an output for this
rgrover1 362:6fa0d4d555f6 244 * function to have any effect.
rgrover1 362:6fa0d4d555f6 245 *
rgrover1 362:6fa0d4d555f6 246 * @param pin_number specifies the pin number [0:31] to
rgrover1 362:6fa0d4d555f6 247 * set.
rgrover1 362:6fa0d4d555f6 248 */
rgrover1 362:6fa0d4d555f6 249 static __INLINE void nrf_gpio_pin_set(uint32_t pin_number)
rgrover1 362:6fa0d4d555f6 250 {
rgrover1 362:6fa0d4d555f6 251 NRF_GPIO->OUTSET = (1UL << pin_number);
rgrover1 362:6fa0d4d555f6 252 }
rgrover1 362:6fa0d4d555f6 253
rgrover1 362:6fa0d4d555f6 254 /**
rgrover1 362:6fa0d4d555f6 255 * @brief Function for clearing a GPIO pin.
rgrover1 362:6fa0d4d555f6 256 *
rgrover1 362:6fa0d4d555f6 257 * Note that the pin must be configured as an output for this
rgrover1 362:6fa0d4d555f6 258 * function to have any effect.
rgrover1 362:6fa0d4d555f6 259 *
rgrover1 362:6fa0d4d555f6 260 * @param pin_number specifies the pin number [0:31] to
rgrover1 362:6fa0d4d555f6 261 * clear.
rgrover1 362:6fa0d4d555f6 262 */
rgrover1 362:6fa0d4d555f6 263 static __INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
rgrover1 362:6fa0d4d555f6 264 {
rgrover1 362:6fa0d4d555f6 265 NRF_GPIO->OUTCLR = (1UL << pin_number);
rgrover1 362:6fa0d4d555f6 266 }
rgrover1 362:6fa0d4d555f6 267
rgrover1 362:6fa0d4d555f6 268 /**
rgrover1 362:6fa0d4d555f6 269 * @brief Function for toggling a GPIO pin.
rgrover1 362:6fa0d4d555f6 270 *
rgrover1 362:6fa0d4d555f6 271 * Note that the pin must be configured as an output for this
rgrover1 362:6fa0d4d555f6 272 * function to have any effect.
rgrover1 362:6fa0d4d555f6 273 *
rgrover1 362:6fa0d4d555f6 274 * @param pin_number specifies the pin number [0:31] to
rgrover1 362:6fa0d4d555f6 275 * toggle.
rgrover1 362:6fa0d4d555f6 276 */
rgrover1 362:6fa0d4d555f6 277 static __INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
rgrover1 362:6fa0d4d555f6 278 {
rgrover1 362:6fa0d4d555f6 279 const uint32_t pin_bit = 1UL << pin_number;
rgrover1 362:6fa0d4d555f6 280 const uint32_t pin_state = ((NRF_GPIO->OUT >> pin_number) & 1UL);
rgrover1 362:6fa0d4d555f6 281
rgrover1 362:6fa0d4d555f6 282 if (pin_state == 0)
rgrover1 362:6fa0d4d555f6 283 {
rgrover1 362:6fa0d4d555f6 284 // Current state low, set high.
rgrover1 362:6fa0d4d555f6 285 NRF_GPIO->OUTSET = pin_bit;
rgrover1 362:6fa0d4d555f6 286 }
rgrover1 362:6fa0d4d555f6 287 else
rgrover1 362:6fa0d4d555f6 288 {
rgrover1 362:6fa0d4d555f6 289 // Current state high, set low.
rgrover1 362:6fa0d4d555f6 290 NRF_GPIO->OUTCLR = pin_bit;
rgrover1 362:6fa0d4d555f6 291 }
rgrover1 362:6fa0d4d555f6 292 }
rgrover1 362:6fa0d4d555f6 293
rgrover1 362:6fa0d4d555f6 294 /**
rgrover1 362:6fa0d4d555f6 295 * @brief Function for writing a value to a GPIO pin.
rgrover1 362:6fa0d4d555f6 296 *
rgrover1 362:6fa0d4d555f6 297 * Note that the pin must be configured as an output for this
rgrover1 362:6fa0d4d555f6 298 * function to have any effect.
rgrover1 362:6fa0d4d555f6 299 *
rgrover1 362:6fa0d4d555f6 300 * @param pin_number specifies the pin number [0:31] to
rgrover1 362:6fa0d4d555f6 301 * write.
rgrover1 362:6fa0d4d555f6 302 *
rgrover1 362:6fa0d4d555f6 303 * @param value specifies the value to be written to the pin.
rgrover1 362:6fa0d4d555f6 304 * @arg 0 clears the pin
rgrover1 362:6fa0d4d555f6 305 * @arg >=1 sets the pin.
rgrover1 362:6fa0d4d555f6 306 */
rgrover1 362:6fa0d4d555f6 307 static __INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
rgrover1 362:6fa0d4d555f6 308 {
rgrover1 362:6fa0d4d555f6 309 if (value == 0)
rgrover1 362:6fa0d4d555f6 310 {
rgrover1 362:6fa0d4d555f6 311 nrf_gpio_pin_clear(pin_number);
rgrover1 362:6fa0d4d555f6 312 }
rgrover1 362:6fa0d4d555f6 313 else
rgrover1 362:6fa0d4d555f6 314 {
rgrover1 362:6fa0d4d555f6 315 nrf_gpio_pin_set(pin_number);
rgrover1 362:6fa0d4d555f6 316 }
rgrover1 362:6fa0d4d555f6 317 }
rgrover1 362:6fa0d4d555f6 318
rgrover1 362:6fa0d4d555f6 319 /**
rgrover1 362:6fa0d4d555f6 320 * @brief Function for reading the input level of a GPIO pin.
rgrover1 362:6fa0d4d555f6 321 *
rgrover1 362:6fa0d4d555f6 322 * Note that the pin must have input connected for the value
rgrover1 362:6fa0d4d555f6 323 * returned from this function to be valid.
rgrover1 362:6fa0d4d555f6 324 *
rgrover1 362:6fa0d4d555f6 325 * @param pin_number specifies the pin number [0:31] to
rgrover1 362:6fa0d4d555f6 326 * read.
rgrover1 362:6fa0d4d555f6 327 *
rgrover1 362:6fa0d4d555f6 328 * @return
rgrover1 362:6fa0d4d555f6 329 * @retval 0 if the pin input level is low.
rgrover1 362:6fa0d4d555f6 330 * @retval 1 if the pin input level is high.
rgrover1 362:6fa0d4d555f6 331 * @retval > 1 should never occur.
rgrover1 362:6fa0d4d555f6 332 */
rgrover1 362:6fa0d4d555f6 333 static __INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number)
rgrover1 362:6fa0d4d555f6 334 {
rgrover1 362:6fa0d4d555f6 335 return ((NRF_GPIO->IN >> pin_number) & 1UL);
rgrover1 362:6fa0d4d555f6 336 }
rgrover1 362:6fa0d4d555f6 337
rgrover1 362:6fa0d4d555f6 338 /**
rgrover1 362:6fa0d4d555f6 339 * @brief Generic function for writing a single byte of a 32 bit word at a given
rgrover1 362:6fa0d4d555f6 340 * address.
rgrover1 362:6fa0d4d555f6 341 *
rgrover1 362:6fa0d4d555f6 342 * This function should not be called from outside the nrf_gpio
rgrover1 362:6fa0d4d555f6 343 * abstraction layer.
rgrover1 362:6fa0d4d555f6 344 *
rgrover1 362:6fa0d4d555f6 345 * @param word_address is the address of the word to be written.
rgrover1 362:6fa0d4d555f6 346 *
rgrover1 362:6fa0d4d555f6 347 * @param byte_no is the the word byte number (0-3) to be written.
rgrover1 362:6fa0d4d555f6 348 *
rgrover1 362:6fa0d4d555f6 349 * @param value is the value to be written to byte "byte_no" of word
rgrover1 362:6fa0d4d555f6 350 * at address "word_address"
rgrover1 362:6fa0d4d555f6 351 */
rgrover1 362:6fa0d4d555f6 352 static __INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value)
rgrover1 362:6fa0d4d555f6 353 {
rgrover1 362:6fa0d4d555f6 354 *((volatile uint8_t*)(word_address) + byte_no) = value;
rgrover1 362:6fa0d4d555f6 355 }
rgrover1 362:6fa0d4d555f6 356
rgrover1 362:6fa0d4d555f6 357 /**
rgrover1 362:6fa0d4d555f6 358 * @brief Generic function for reading a single byte of a 32 bit word at a given
rgrover1 362:6fa0d4d555f6 359 * address.
rgrover1 362:6fa0d4d555f6 360 *
rgrover1 362:6fa0d4d555f6 361 * This function should not be called from outside the nrf_gpio
rgrover1 362:6fa0d4d555f6 362 * abstraction layer.
rgrover1 362:6fa0d4d555f6 363 *
rgrover1 362:6fa0d4d555f6 364 * @param word_address is the address of the word to be read.
rgrover1 362:6fa0d4d555f6 365 *
rgrover1 362:6fa0d4d555f6 366 * @param byte_no is the the byte number (0-3) of the word to be read.
rgrover1 362:6fa0d4d555f6 367 *
rgrover1 362:6fa0d4d555f6 368 * @return byte "byte_no" of word at address "word_address".
rgrover1 362:6fa0d4d555f6 369 */
rgrover1 362:6fa0d4d555f6 370 static __INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no)
rgrover1 362:6fa0d4d555f6 371 {
rgrover1 362:6fa0d4d555f6 372 return (*((const volatile uint8_t*)(word_address) + byte_no));
rgrover1 362:6fa0d4d555f6 373 }
rgrover1 362:6fa0d4d555f6 374
rgrover1 362:6fa0d4d555f6 375 /**
rgrover1 362:6fa0d4d555f6 376 * @brief Function for setting the direction of a port.
rgrover1 362:6fa0d4d555f6 377 *
rgrover1 362:6fa0d4d555f6 378 * @param port is the port for which to set the direction.
rgrover1 362:6fa0d4d555f6 379 *
rgrover1 362:6fa0d4d555f6 380 * @param dir direction to be set for this port.
rgrover1 362:6fa0d4d555f6 381 */
rgrover1 362:6fa0d4d555f6 382 static __INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir)
rgrover1 362:6fa0d4d555f6 383 {
rgrover1 362:6fa0d4d555f6 384 if (dir == NRF_GPIO_PORT_DIR_OUTPUT)
rgrover1 362:6fa0d4d555f6 385 {
rgrover1 362:6fa0d4d555f6 386 nrf_gpio_word_byte_write(&NRF_GPIO->DIRSET, port, 0xFF);
rgrover1 362:6fa0d4d555f6 387 }
rgrover1 362:6fa0d4d555f6 388 else
rgrover1 362:6fa0d4d555f6 389 {
rgrover1 362:6fa0d4d555f6 390 nrf_gpio_range_cfg_input(port*8, (port+1)*8-1, NRF_GPIO_PIN_NOPULL);
rgrover1 362:6fa0d4d555f6 391 }
rgrover1 362:6fa0d4d555f6 392 }
rgrover1 362:6fa0d4d555f6 393
rgrover1 362:6fa0d4d555f6 394 /**
rgrover1 362:6fa0d4d555f6 395 * @brief Function for reading a GPIO port.
rgrover1 362:6fa0d4d555f6 396 *
rgrover1 362:6fa0d4d555f6 397 * @param port is the port to read.
rgrover1 362:6fa0d4d555f6 398 *
rgrover1 362:6fa0d4d555f6 399 * @return the input value on this port.
rgrover1 362:6fa0d4d555f6 400 */
rgrover1 362:6fa0d4d555f6 401 static __INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port)
rgrover1 362:6fa0d4d555f6 402 {
rgrover1 362:6fa0d4d555f6 403 return nrf_gpio_word_byte_read(&NRF_GPIO->IN, port);
rgrover1 362:6fa0d4d555f6 404 }
rgrover1 362:6fa0d4d555f6 405
rgrover1 362:6fa0d4d555f6 406 /**
rgrover1 362:6fa0d4d555f6 407 * @brief Function for writing to a GPIO port.
rgrover1 362:6fa0d4d555f6 408 *
rgrover1 362:6fa0d4d555f6 409 * @param port is the port to write.
rgrover1 362:6fa0d4d555f6 410 *
rgrover1 362:6fa0d4d555f6 411 * @param value is the value to write to this port.
rgrover1 362:6fa0d4d555f6 412 *
rgrover1 362:6fa0d4d555f6 413 * @sa nrf_gpio_port_dir_set()
rgrover1 362:6fa0d4d555f6 414 */
rgrover1 362:6fa0d4d555f6 415 static __INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value)
rgrover1 362:6fa0d4d555f6 416 {
rgrover1 362:6fa0d4d555f6 417 nrf_gpio_word_byte_write(&NRF_GPIO->OUT, port, value);
rgrover1 362:6fa0d4d555f6 418 }
rgrover1 362:6fa0d4d555f6 419
rgrover1 362:6fa0d4d555f6 420 /**
rgrover1 362:6fa0d4d555f6 421 * @brief Function for setting individual pins on GPIO port.
rgrover1 362:6fa0d4d555f6 422 *
rgrover1 362:6fa0d4d555f6 423 * @param port is the port for which to set the pins.
rgrover1 362:6fa0d4d555f6 424 *
rgrover1 362:6fa0d4d555f6 425 * @param set_mask is a mask specifying which pins to set. A bit
rgrover1 362:6fa0d4d555f6 426 * set to 1 indicates that the corresponding port pin shall be
rgrover1 362:6fa0d4d555f6 427 * set.
rgrover1 362:6fa0d4d555f6 428 *
rgrover1 362:6fa0d4d555f6 429 * @sa nrf_gpio_port_dir_set()
rgrover1 362:6fa0d4d555f6 430 */
rgrover1 362:6fa0d4d555f6 431 static __INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask)
rgrover1 362:6fa0d4d555f6 432 {
rgrover1 362:6fa0d4d555f6 433 nrf_gpio_word_byte_write(&NRF_GPIO->OUTSET, port, set_mask);
rgrover1 362:6fa0d4d555f6 434 }
rgrover1 362:6fa0d4d555f6 435
rgrover1 362:6fa0d4d555f6 436 /**
rgrover1 362:6fa0d4d555f6 437 * @brief Function for clearing individual pins on GPIO port.
rgrover1 362:6fa0d4d555f6 438 *
rgrover1 362:6fa0d4d555f6 439 * @param port is the port for which to clear the pins.
rgrover1 362:6fa0d4d555f6 440 *
rgrover1 362:6fa0d4d555f6 441 * @param clr_mask is a mask specifying which pins to clear. A bit
rgrover1 362:6fa0d4d555f6 442 * set to 1 indicates that the corresponding port pin shall be
rgrover1 362:6fa0d4d555f6 443 * cleared.
rgrover1 362:6fa0d4d555f6 444 *
rgrover1 362:6fa0d4d555f6 445 * @sa nrf_gpio_port_dir_set()
rgrover1 362:6fa0d4d555f6 446 */
rgrover1 362:6fa0d4d555f6 447 static __INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask)
rgrover1 362:6fa0d4d555f6 448 {
rgrover1 362:6fa0d4d555f6 449 nrf_gpio_word_byte_write(&NRF_GPIO->OUTCLR, port, clr_mask);
rgrover1 362:6fa0d4d555f6 450 }
rgrover1 362:6fa0d4d555f6 451
rgrover1 362:6fa0d4d555f6 452 /** @} */
rgrover1 362:6fa0d4d555f6 453
rgrover1 362:6fa0d4d555f6 454 #endif