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Fork of nRF51822 by Nordic Semiconductor

nordic-sdk/components/drivers_nrf/hal/nrf_gpio.h@346:14b090482fd2, 2015-06-19 (annotated)

Committer:
rgrover1
Date:
Fri Jun 19 15:55:35 2015 +0100
Revision:
346:14b090482fd2
Parent:
345:dfde56236c36
Child:
361:d2405f5a4853
Child:
429:9c91c46c004c
Synchronized with git rev bb88aaad

Author: Rohit Grover

renamed BLEDevice to BLE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rgrover1 346:14b090482fd2 1 /*
rgrover1 346:14b090482fd2 2 * Copyright (c) Nordic Semiconductor ASA
rgrover1 346:14b090482fd2 3 * All rights reserved.
rgrover1 346:14b090482fd2 4 *
rgrover1 346:14b090482fd2 5 * Redistribution and use in source and binary forms, with or without modification,
rgrover1 346:14b090482fd2 6 * are permitted provided that the following conditions are met:
rgrover1 346:14b090482fd2 7 *
rgrover1 346:14b090482fd2 8 * 1. Redistributions of source code must retain the above copyright notice, this
rgrover1 346:14b090482fd2 9 * list of conditions and the following disclaimer.
rgrover1 346:14b090482fd2 10 *
rgrover1 346:14b090482fd2 11 * 2. Redistributions in binary form must reproduce the above copyright notice, this
rgrover1 346:14b090482fd2 12 * list of conditions and the following disclaimer in the documentation and/or
rgrover1 346:14b090482fd2 13 * other materials provided with the distribution.
rgrover1 346:14b090482fd2 14 *
rgrover1 346:14b090482fd2 15 * 3. Neither the name of Nordic Semiconductor ASA nor the names of other
rgrover1 346:14b090482fd2 16 * contributors to this software may be used to endorse or promote products
rgrover1 346:14b090482fd2 17 * derived from this software without specific prior written permission.
rgrover1 346:14b090482fd2 18 *
rgrover1 346:14b090482fd2 19 *
rgrover1 346:14b090482fd2 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
rgrover1 346:14b090482fd2 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
rgrover1 346:14b090482fd2 22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
rgrover1 346:14b090482fd2 23 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
rgrover1 346:14b090482fd2 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
rgrover1 346:14b090482fd2 25 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
rgrover1 346:14b090482fd2 26 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
rgrover1 346:14b090482fd2 27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
rgrover1 346:14b090482fd2 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
rgrover1 346:14b090482fd2 29 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
rgrover1 346:14b090482fd2 30 *
rgrover1 346:14b090482fd2 31 */
rgrover1 346:14b090482fd2 32
rgrover1 346:14b090482fd2 33 #ifndef NRF_GPIO_H__
rgrover1 346:14b090482fd2 34 #define NRF_GPIO_H__
rgrover1 346:14b090482fd2 35
rgrover1 346:14b090482fd2 36 #include "nrf51.h"
rgrover1 346:14b090482fd2 37 #include "nrf51_bitfields.h"
rgrover1 346:14b090482fd2 38
rgrover1 346:14b090482fd2 39 /**
rgrover1 346:14b090482fd2 40 * @defgroup nrf_gpio GPIO abstraction
rgrover1 346:14b090482fd2 41 * @{
rgrover1 346:14b090482fd2 42 * @ingroup nrf_drivers
rgrover1 346:14b090482fd2 43 * @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports.
rgrover1 346:14b090482fd2 44 *
rgrover1 346:14b090482fd2 45 * Here, the GPIO ports are defined as follows:
rgrover1 346:14b090482fd2 46 * - Port 0 -> pin 0-7
rgrover1 346:14b090482fd2 47 * - Port 1 -> pin 8-15
rgrover1 346:14b090482fd2 48 * - Port 2 -> pin 16-23
rgrover1 346:14b090482fd2 49 * - Port 3 -> pin 24-31
rgrover1 346:14b090482fd2 50 */
rgrover1 346:14b090482fd2 51
rgrover1 346:14b090482fd2 52 /**
rgrover1 346:14b090482fd2 53 * @enum nrf_gpio_port_dir_t
rgrover1 346:14b090482fd2 54 * @brief Enumerator used for setting the direction of a GPIO port.
rgrover1 346:14b090482fd2 55 */
rgrover1 346:14b090482fd2 56 typedef enum
rgrover1 346:14b090482fd2 57 {
rgrover1 346:14b090482fd2 58 NRF_GPIO_PORT_DIR_OUTPUT, ///< Output
rgrover1 346:14b090482fd2 59 NRF_GPIO_PORT_DIR_INPUT ///< Input
rgrover1 346:14b090482fd2 60 } nrf_gpio_port_dir_t;
rgrover1 346:14b090482fd2 61
rgrover1 346:14b090482fd2 62 /**
rgrover1 346:14b090482fd2 63 * @enum nrf_gpio_pin_dir_t
rgrover1 346:14b090482fd2 64 * Pin direction definitions.
rgrover1 346:14b090482fd2 65 */
rgrover1 346:14b090482fd2 66 typedef enum
rgrover1 346:14b090482fd2 67 {
rgrover1 346:14b090482fd2 68 NRF_GPIO_PIN_DIR_INPUT, ///< Input
rgrover1 346:14b090482fd2 69 NRF_GPIO_PIN_DIR_OUTPUT ///< Output
rgrover1 346:14b090482fd2 70 } nrf_gpio_pin_dir_t;
rgrover1 346:14b090482fd2 71
rgrover1 346:14b090482fd2 72 /**
rgrover1 346:14b090482fd2 73 * @enum nrf_gpio_port_select_t
rgrover1 346:14b090482fd2 74 * @brief Enumerator used for selecting between port 0 - 3.
rgrover1 346:14b090482fd2 75 */
rgrover1 346:14b090482fd2 76 typedef enum
rgrover1 346:14b090482fd2 77 {
rgrover1 346:14b090482fd2 78 NRF_GPIO_PORT_SELECT_PORT0 = 0, ///< Port 0 (GPIO pin 0-7)
rgrover1 346:14b090482fd2 79 NRF_GPIO_PORT_SELECT_PORT1, ///< Port 1 (GPIO pin 8-15)
rgrover1 346:14b090482fd2 80 NRF_GPIO_PORT_SELECT_PORT2, ///< Port 2 (GPIO pin 16-23)
rgrover1 346:14b090482fd2 81 NRF_GPIO_PORT_SELECT_PORT3, ///< Port 3 (GPIO pin 24-31)
rgrover1 346:14b090482fd2 82 } nrf_gpio_port_select_t;
rgrover1 346:14b090482fd2 83
rgrover1 346:14b090482fd2 84 /**
rgrover1 346:14b090482fd2 85 * @enum nrf_gpio_pin_pull_t
rgrover1 346:14b090482fd2 86 * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration
rgrover1 346:14b090482fd2 87 */
rgrover1 346:14b090482fd2 88 typedef enum
rgrover1 346:14b090482fd2 89 {
rgrover1 346:14b090482fd2 90 NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pullup resistor disabled
rgrover1 346:14b090482fd2 91 NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pulldown resistor enabled
rgrover1 346:14b090482fd2 92 NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pullup resistor enabled
rgrover1 346:14b090482fd2 93 } nrf_gpio_pin_pull_t;
rgrover1 346:14b090482fd2 94
rgrover1 346:14b090482fd2 95 /**
rgrover1 346:14b090482fd2 96 * @enum nrf_gpio_pin_sense_t
rgrover1 346:14b090482fd2 97 * @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
rgrover1 346:14b090482fd2 98 */
rgrover1 346:14b090482fd2 99 typedef enum
rgrover1 346:14b090482fd2 100 {
rgrover1 346:14b090482fd2 101 NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled.
rgrover1 346:14b090482fd2 102 NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level.
rgrover1 346:14b090482fd2 103 NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level.
rgrover1 346:14b090482fd2 104 } nrf_gpio_pin_sense_t;
rgrover1 346:14b090482fd2 105
rgrover1 346:14b090482fd2 106 /**
rgrover1 346:14b090482fd2 107 * @brief Function for configuring the GPIO pin range as outputs with normal drive strength.
rgrover1 346:14b090482fd2 108 * This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 346:14b090482fd2 109 *
rgrover1 346:14b090482fd2 110 * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 346:14b090482fd2 111 *
rgrover1 346:14b090482fd2 112 * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 346:14b090482fd2 113 *
rgrover1 346:14b090482fd2 114 * @note For configuring only one pin as output use @ref nrf_gpio_cfg_output
rgrover1 346:14b090482fd2 115 * Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
rgrover1 346:14b090482fd2 116 */
rgrover1 346:14b090482fd2 117 static __INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end)
rgrover1 346:14b090482fd2 118 {
rgrover1 346:14b090482fd2 119 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 346:14b090482fd2 120 for (; pin_range_start <= pin_range_end; pin_range_start++)
rgrover1 346:14b090482fd2 121 {
rgrover1 346:14b090482fd2 122 NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 346:14b090482fd2 123 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 346:14b090482fd2 124 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 346:14b090482fd2 125 | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 346:14b090482fd2 126 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
rgrover1 346:14b090482fd2 127 }
rgrover1 346:14b090482fd2 128 }
rgrover1 346:14b090482fd2 129
rgrover1 346:14b090482fd2 130 /**
rgrover1 346:14b090482fd2 131 * @brief Function for configuring the GPIO pin range as inputs with given initial value set, hiding inner details.
rgrover1 346:14b090482fd2 132 * This function can be used to configure pin range as simple input.
rgrover1 346:14b090482fd2 133 *
rgrover1 346:14b090482fd2 134 * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 346:14b090482fd2 135 *
rgrover1 346:14b090482fd2 136 * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 346:14b090482fd2 137 *
rgrover1 346:14b090482fd2 138 * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
rgrover1 346:14b090482fd2 139 *
rgrover1 346:14b090482fd2 140 * @note For configuring only one pin as input use @ref nrf_gpio_cfg_input
rgrover1 346:14b090482fd2 141 * Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
rgrover1 346:14b090482fd2 142 */
rgrover1 346:14b090482fd2 143 static __INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config)
rgrover1 346:14b090482fd2 144 {
rgrover1 346:14b090482fd2 145 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 346:14b090482fd2 146 for (; pin_range_start <= pin_range_end; pin_range_start++)
rgrover1 346:14b090482fd2 147 {
rgrover1 346:14b090482fd2 148 NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 346:14b090482fd2 149 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 346:14b090482fd2 150 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 346:14b090482fd2 151 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 346:14b090482fd2 152 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 346:14b090482fd2 153 }
rgrover1 346:14b090482fd2 154 }
rgrover1 346:14b090482fd2 155
rgrover1 346:14b090482fd2 156 /**
rgrover1 346:14b090482fd2 157 * @brief Function for configuring the given GPIO pin number as output with given initial value set, hiding inner details.
rgrover1 346:14b090482fd2 158 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 346:14b090482fd2 159 *
rgrover1 346:14b090482fd2 160 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
rgrover1 346:14b090482fd2 161 *
rgrover1 346:14b090482fd2 162 * @note Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
rgrover1 346:14b090482fd2 163 */
rgrover1 346:14b090482fd2 164 static __INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
rgrover1 346:14b090482fd2 165 {
rgrover1 346:14b090482fd2 166 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 346:14b090482fd2 167 NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 346:14b090482fd2 168 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 346:14b090482fd2 169 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 346:14b090482fd2 170 | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 346:14b090482fd2 171 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
rgrover1 346:14b090482fd2 172 }
rgrover1 346:14b090482fd2 173
rgrover1 346:14b090482fd2 174 /**
rgrover1 346:14b090482fd2 175 * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
rgrover1 346:14b090482fd2 176 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 346:14b090482fd2 177 *
rgrover1 346:14b090482fd2 178 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
rgrover1 346:14b090482fd2 179 *
rgrover1 346:14b090482fd2 180 * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
rgrover1 346:14b090482fd2 181 *
rgrover1 346:14b090482fd2 182 * @note Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
rgrover1 346:14b090482fd2 183 */
rgrover1 346:14b090482fd2 184 static __INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
rgrover1 346:14b090482fd2 185 {
rgrover1 346:14b090482fd2 186 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 346:14b090482fd2 187 NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 346:14b090482fd2 188 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 346:14b090482fd2 189 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 346:14b090482fd2 190 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 346:14b090482fd2 191 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 346:14b090482fd2 192 }
rgrover1 346:14b090482fd2 193
rgrover1 346:14b090482fd2 194 /**
rgrover1 346:14b090482fd2 195 * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
rgrover1 346:14b090482fd2 196 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 346:14b090482fd2 197 * Sense capability on the pin is configurable, and input is connected to buffer so that the GPIO->IN register is readable.
rgrover1 346:14b090482fd2 198 *
rgrover1 346:14b090482fd2 199 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30).
rgrover1 346:14b090482fd2 200 *
rgrover1 346:14b090482fd2 201 * @param pull_config state of the pin pull resistor (no pull, pulled down or pulled high).
rgrover1 346:14b090482fd2 202 *
rgrover1 346:14b090482fd2 203 * @param sense_config sense level of the pin (no sense, sense low or sense high).
rgrover1 346:14b090482fd2 204 */
rgrover1 346:14b090482fd2 205 static __INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config)
rgrover1 346:14b090482fd2 206 {
rgrover1 346:14b090482fd2 207 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 346:14b090482fd2 208 NRF_GPIO->PIN_CNF[pin_number] = (sense_config << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 346:14b090482fd2 209 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 346:14b090482fd2 210 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 346:14b090482fd2 211 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 346:14b090482fd2 212 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 346:14b090482fd2 213 }
rgrover1 346:14b090482fd2 214
rgrover1 346:14b090482fd2 215 /**
rgrover1 346:14b090482fd2 216 * @brief Function for setting the direction for a GPIO pin.
rgrover1 346:14b090482fd2 217 *
rgrover1 346:14b090482fd2 218 * @param pin_number specifies the pin number [0:31] for which to
rgrover1 346:14b090482fd2 219 * set the direction.
rgrover1 346:14b090482fd2 220 *
rgrover1 346:14b090482fd2 221 * @param direction specifies the direction
rgrover1 346:14b090482fd2 222 */
rgrover1 346:14b090482fd2 223 static __INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction)
rgrover1 346:14b090482fd2 224 {
rgrover1 346:14b090482fd2 225 if(direction == NRF_GPIO_PIN_DIR_INPUT)
rgrover1 346:14b090482fd2 226 {
rgrover1 346:14b090482fd2 227 NRF_GPIO->PIN_CNF[pin_number] =
rgrover1 346:14b090482fd2 228 (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 346:14b090482fd2 229 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 346:14b090482fd2 230 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 346:14b090482fd2 231 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 346:14b090482fd2 232 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 346:14b090482fd2 233 }
rgrover1 346:14b090482fd2 234 else
rgrover1 346:14b090482fd2 235 {
rgrover1 346:14b090482fd2 236 NRF_GPIO->DIRSET = (1UL << pin_number);
rgrover1 346:14b090482fd2 237 }
rgrover1 346:14b090482fd2 238 }
rgrover1 346:14b090482fd2 239
rgrover1 346:14b090482fd2 240 /**
rgrover1 346:14b090482fd2 241 * @brief Function for setting a GPIO pin.
rgrover1 346:14b090482fd2 242 *
rgrover1 346:14b090482fd2 243 * Note that the pin must be configured as an output for this
rgrover1 346:14b090482fd2 244 * function to have any effect.
rgrover1 346:14b090482fd2 245 *
rgrover1 346:14b090482fd2 246 * @param pin_number specifies the pin number [0:31] to
rgrover1 346:14b090482fd2 247 * set.
rgrover1 346:14b090482fd2 248 */
rgrover1 346:14b090482fd2 249 static __INLINE void nrf_gpio_pin_set(uint32_t pin_number)
rgrover1 346:14b090482fd2 250 {
rgrover1 346:14b090482fd2 251 NRF_GPIO->OUTSET = (1UL << pin_number);
rgrover1 346:14b090482fd2 252 }
rgrover1 346:14b090482fd2 253
rgrover1 346:14b090482fd2 254 /**
rgrover1 346:14b090482fd2 255 * @brief Function for clearing a GPIO pin.
rgrover1 346:14b090482fd2 256 *
rgrover1 346:14b090482fd2 257 * Note that the pin must be configured as an output for this
rgrover1 346:14b090482fd2 258 * function to have any effect.
rgrover1 346:14b090482fd2 259 *
rgrover1 346:14b090482fd2 260 * @param pin_number specifies the pin number [0:31] to
rgrover1 346:14b090482fd2 261 * clear.
rgrover1 346:14b090482fd2 262 */
rgrover1 346:14b090482fd2 263 static __INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
rgrover1 346:14b090482fd2 264 {
rgrover1 346:14b090482fd2 265 NRF_GPIO->OUTCLR = (1UL << pin_number);
rgrover1 346:14b090482fd2 266 }
rgrover1 346:14b090482fd2 267
rgrover1 346:14b090482fd2 268 /**
rgrover1 346:14b090482fd2 269 * @brief Function for toggling a GPIO pin.
rgrover1 346:14b090482fd2 270 *
rgrover1 346:14b090482fd2 271 * Note that the pin must be configured as an output for this
rgrover1 346:14b090482fd2 272 * function to have any effect.
rgrover1 346:14b090482fd2 273 *
rgrover1 346:14b090482fd2 274 * @param pin_number specifies the pin number [0:31] to
rgrover1 346:14b090482fd2 275 * toggle.
rgrover1 346:14b090482fd2 276 */
rgrover1 346:14b090482fd2 277 static __INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
rgrover1 346:14b090482fd2 278 {
rgrover1 346:14b090482fd2 279 const uint32_t pin_bit = 1UL << pin_number;
rgrover1 346:14b090482fd2 280 const uint32_t pin_state = ((NRF_GPIO->OUT >> pin_number) & 1UL);
rgrover1 346:14b090482fd2 281
rgrover1 346:14b090482fd2 282 if (pin_state == 0)
rgrover1 346:14b090482fd2 283 {
rgrover1 346:14b090482fd2 284 // Current state low, set high.
rgrover1 346:14b090482fd2 285 NRF_GPIO->OUTSET = pin_bit;
rgrover1 346:14b090482fd2 286 }
rgrover1 346:14b090482fd2 287 else
rgrover1 346:14b090482fd2 288 {
rgrover1 346:14b090482fd2 289 // Current state high, set low.
rgrover1 346:14b090482fd2 290 NRF_GPIO->OUTCLR = pin_bit;
rgrover1 346:14b090482fd2 291 }
rgrover1 346:14b090482fd2 292 }
rgrover1 346:14b090482fd2 293
rgrover1 346:14b090482fd2 294 /**
rgrover1 346:14b090482fd2 295 * @brief Function for writing a value to a GPIO pin.
rgrover1 346:14b090482fd2 296 *
rgrover1 346:14b090482fd2 297 * Note that the pin must be configured as an output for this
rgrover1 346:14b090482fd2 298 * function to have any effect.
rgrover1 346:14b090482fd2 299 *
rgrover1 346:14b090482fd2 300 * @param pin_number specifies the pin number [0:31] to
rgrover1 346:14b090482fd2 301 * write.
rgrover1 346:14b090482fd2 302 *
rgrover1 346:14b090482fd2 303 * @param value specifies the value to be written to the pin.
rgrover1 346:14b090482fd2 304 * @arg 0 clears the pin
rgrover1 346:14b090482fd2 305 * @arg >=1 sets the pin.
rgrover1 346:14b090482fd2 306 */
rgrover1 346:14b090482fd2 307 static __INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
rgrover1 346:14b090482fd2 308 {
rgrover1 346:14b090482fd2 309 if (value == 0)
rgrover1 346:14b090482fd2 310 {
rgrover1 346:14b090482fd2 311 nrf_gpio_pin_clear(pin_number);
rgrover1 346:14b090482fd2 312 }
rgrover1 346:14b090482fd2 313 else
rgrover1 346:14b090482fd2 314 {
rgrover1 346:14b090482fd2 315 nrf_gpio_pin_set(pin_number);
rgrover1 346:14b090482fd2 316 }
rgrover1 346:14b090482fd2 317 }
rgrover1 346:14b090482fd2 318
rgrover1 346:14b090482fd2 319 /**
rgrover1 346:14b090482fd2 320 * @brief Function for reading the input level of a GPIO pin.
rgrover1 346:14b090482fd2 321 *
rgrover1 346:14b090482fd2 322 * Note that the pin must have input connected for the value
rgrover1 346:14b090482fd2 323 * returned from this function to be valid.
rgrover1 346:14b090482fd2 324 *
rgrover1 346:14b090482fd2 325 * @param pin_number specifies the pin number [0:31] to
rgrover1 346:14b090482fd2 326 * read.
rgrover1 346:14b090482fd2 327 *
rgrover1 346:14b090482fd2 328 * @return
rgrover1 346:14b090482fd2 329 * @retval 0 if the pin input level is low.
rgrover1 346:14b090482fd2 330 * @retval 1 if the pin input level is high.
rgrover1 346:14b090482fd2 331 * @retval > 1 should never occur.
rgrover1 346:14b090482fd2 332 */
rgrover1 346:14b090482fd2 333 static __INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number)
rgrover1 346:14b090482fd2 334 {
rgrover1 346:14b090482fd2 335 return ((NRF_GPIO->IN >> pin_number) & 1UL);
rgrover1 346:14b090482fd2 336 }
rgrover1 346:14b090482fd2 337
rgrover1 346:14b090482fd2 338 /**
rgrover1 346:14b090482fd2 339 * @brief Generic function for writing a single byte of a 32 bit word at a given
rgrover1 346:14b090482fd2 340 * address.
rgrover1 346:14b090482fd2 341 *
rgrover1 346:14b090482fd2 342 * This function should not be called from outside the nrf_gpio
rgrover1 346:14b090482fd2 343 * abstraction layer.
rgrover1 346:14b090482fd2 344 *
rgrover1 346:14b090482fd2 345 * @param word_address is the address of the word to be written.
rgrover1 346:14b090482fd2 346 *
rgrover1 346:14b090482fd2 347 * @param byte_no is the the word byte number (0-3) to be written.
rgrover1 346:14b090482fd2 348 *
rgrover1 346:14b090482fd2 349 * @param value is the value to be written to byte "byte_no" of word
rgrover1 346:14b090482fd2 350 * at address "word_address"
rgrover1 346:14b090482fd2 351 */
rgrover1 346:14b090482fd2 352 static __INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value)
rgrover1 346:14b090482fd2 353 {
rgrover1 346:14b090482fd2 354 *((volatile uint8_t*)(word_address) + byte_no) = value;
rgrover1 346:14b090482fd2 355 }
rgrover1 346:14b090482fd2 356
rgrover1 346:14b090482fd2 357 /**
rgrover1 346:14b090482fd2 358 * @brief Generic function for reading a single byte of a 32 bit word at a given
rgrover1 346:14b090482fd2 359 * address.
rgrover1 346:14b090482fd2 360 *
rgrover1 346:14b090482fd2 361 * This function should not be called from outside the nrf_gpio
rgrover1 346:14b090482fd2 362 * abstraction layer.
rgrover1 346:14b090482fd2 363 *
rgrover1 346:14b090482fd2 364 * @param word_address is the address of the word to be read.
rgrover1 346:14b090482fd2 365 *
rgrover1 346:14b090482fd2 366 * @param byte_no is the the byte number (0-3) of the word to be read.
rgrover1 346:14b090482fd2 367 *
rgrover1 346:14b090482fd2 368 * @return byte "byte_no" of word at address "word_address".
rgrover1 346:14b090482fd2 369 */
rgrover1 346:14b090482fd2 370 static __INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no)
rgrover1 346:14b090482fd2 371 {
rgrover1 346:14b090482fd2 372 return (*((const volatile uint8_t*)(word_address) + byte_no));
rgrover1 346:14b090482fd2 373 }
rgrover1 346:14b090482fd2 374
rgrover1 346:14b090482fd2 375 /**
rgrover1 346:14b090482fd2 376 * @brief Function for setting the direction of a port.
rgrover1 346:14b090482fd2 377 *
rgrover1 346:14b090482fd2 378 * @param port is the port for which to set the direction.
rgrover1 346:14b090482fd2 379 *
rgrover1 346:14b090482fd2 380 * @param dir direction to be set for this port.
rgrover1 346:14b090482fd2 381 */
rgrover1 346:14b090482fd2 382 static __INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir)
rgrover1 346:14b090482fd2 383 {
rgrover1 346:14b090482fd2 384 if (dir == NRF_GPIO_PORT_DIR_OUTPUT)
rgrover1 346:14b090482fd2 385 {
rgrover1 346:14b090482fd2 386 nrf_gpio_word_byte_write(&NRF_GPIO->DIRSET, port, 0xFF);
rgrover1 346:14b090482fd2 387 }
rgrover1 346:14b090482fd2 388 else
rgrover1 346:14b090482fd2 389 {
rgrover1 346:14b090482fd2 390 nrf_gpio_range_cfg_input(port*8, (port+1)*8-1, NRF_GPIO_PIN_NOPULL);
rgrover1 346:14b090482fd2 391 }
rgrover1 346:14b090482fd2 392 }
rgrover1 346:14b090482fd2 393
rgrover1 346:14b090482fd2 394 /**
rgrover1 346:14b090482fd2 395 * @brief Function for reading a GPIO port.
rgrover1 346:14b090482fd2 396 *
rgrover1 346:14b090482fd2 397 * @param port is the port to read.
rgrover1 346:14b090482fd2 398 *
rgrover1 346:14b090482fd2 399 * @return the input value on this port.
rgrover1 346:14b090482fd2 400 */
rgrover1 346:14b090482fd2 401 static __INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port)
rgrover1 346:14b090482fd2 402 {
rgrover1 346:14b090482fd2 403 return nrf_gpio_word_byte_read(&NRF_GPIO->IN, port);
rgrover1 346:14b090482fd2 404 }
rgrover1 346:14b090482fd2 405
rgrover1 346:14b090482fd2 406 /**
rgrover1 346:14b090482fd2 407 * @brief Function for writing to a GPIO port.
rgrover1 346:14b090482fd2 408 *
rgrover1 346:14b090482fd2 409 * @param port is the port to write.
rgrover1 346:14b090482fd2 410 *
rgrover1 346:14b090482fd2 411 * @param value is the value to write to this port.
rgrover1 346:14b090482fd2 412 *
rgrover1 346:14b090482fd2 413 * @sa nrf_gpio_port_dir_set()
rgrover1 346:14b090482fd2 414 */
rgrover1 346:14b090482fd2 415 static __INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value)
rgrover1 346:14b090482fd2 416 {
rgrover1 346:14b090482fd2 417 nrf_gpio_word_byte_write(&NRF_GPIO->OUT, port, value);
rgrover1 346:14b090482fd2 418 }
rgrover1 346:14b090482fd2 419
rgrover1 346:14b090482fd2 420 /**
rgrover1 346:14b090482fd2 421 * @brief Function for setting individual pins on GPIO port.
rgrover1 346:14b090482fd2 422 *
rgrover1 346:14b090482fd2 423 * @param port is the port for which to set the pins.
rgrover1 346:14b090482fd2 424 *
rgrover1 346:14b090482fd2 425 * @param set_mask is a mask specifying which pins to set. A bit
rgrover1 346:14b090482fd2 426 * set to 1 indicates that the corresponding port pin shall be
rgrover1 346:14b090482fd2 427 * set.
rgrover1 346:14b090482fd2 428 *
rgrover1 346:14b090482fd2 429 * @sa nrf_gpio_port_dir_set()
rgrover1 346:14b090482fd2 430 */
rgrover1 346:14b090482fd2 431 static __INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask)
rgrover1 346:14b090482fd2 432 {
rgrover1 346:14b090482fd2 433 nrf_gpio_word_byte_write(&NRF_GPIO->OUTSET, port, set_mask);
rgrover1 346:14b090482fd2 434 }
rgrover1 346:14b090482fd2 435
rgrover1 346:14b090482fd2 436 /**
rgrover1 346:14b090482fd2 437 * @brief Function for clearing individual pins on GPIO port.
rgrover1 346:14b090482fd2 438 *
rgrover1 346:14b090482fd2 439 * @param port is the port for which to clear the pins.
rgrover1 346:14b090482fd2 440 *
rgrover1 346:14b090482fd2 441 * @param clr_mask is a mask specifying which pins to clear. A bit
rgrover1 346:14b090482fd2 442 * set to 1 indicates that the corresponding port pin shall be
rgrover1 346:14b090482fd2 443 * cleared.
rgrover1 346:14b090482fd2 444 *
rgrover1 346:14b090482fd2 445 * @sa nrf_gpio_port_dir_set()
rgrover1 346:14b090482fd2 446 */
rgrover1 346:14b090482fd2 447 static __INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask)
rgrover1 346:14b090482fd2 448 {
rgrover1 346:14b090482fd2 449 nrf_gpio_word_byte_write(&NRF_GPIO->OUTCLR, port, clr_mask);
rgrover1 346:14b090482fd2 450 }
rgrover1 346:14b090482fd2 451
rgrover1 346:14b090482fd2 452 /** @} */
rgrover1 346:14b090482fd2 453
rgrover1 346:14b090482fd2 454 #endif