SPI library used to communicate with an altera development board attached to four zigbee-header pins.

Committer:
gatedClock
Date:
Tue Aug 20 14:02:56 2013 +0000
Revision:
21:e90dd0f8aaa1
Parent:
18:4a29cad91540
Child:
22:7524dee5c753
remove obsolete code.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gatedClock 2:bebcf53b72dc 1 #ifndef mmSPI_H // include guard.
gatedClock 2:bebcf53b72dc 2 #define mmSPI_H // include guard.
gatedClock 0:fb42c5acf810 3 /*----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 4 student : m-moore
gatedClock 0:fb42c5acf810 5 class : external SPI interface
gatedClock 0:fb42c5acf810 6 directory : mmSPI
gatedClock 0:fb42c5acf810 7 file : mmSPI.h
gatedClock 1:15706d15d123 8 ----description---------------------------------//------------------------------
gatedClock 1:15706d15d123 9 ----notes---------------------------------------//------------------------------
gatedClock 1:15706d15d123 10 1. the SPI interface pins are routed to the zigbee header.
gatedClock 0:fb42c5acf810 11 ------------------------------------------------//----------------------------*/
gatedClock 0:fb42c5acf810 12 #include "mbed.h" // standard mbed.org class.
gatedClock 15:d6cc57c4e23d 13 #include "C12832_lcd.h" // LCD.
gatedClock 1:15706d15d123 14 //---defines------------------------------------//------------------------------
gatedClock 8:e2d8bbc3e659 15 #define mmSPI_MOSI p29 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 16 #define mmSPI_MISO p30 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 17 #define mmSPI_SCLK p9 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 18 #define mmCPU_CLK p10 // soft CPU system clock.
gatedClock 15:d6cc57c4e23d 19
gatedClock 15:d6cc57c4e23d 20
gatedClock 0:fb42c5acf810 21 /*----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 22 ------------------------------------------------//----------------------------*/
gatedClock 2:bebcf53b72dc 23
gatedClock 0:fb42c5acf810 24 //==============================================//==============================
gatedClock 0:fb42c5acf810 25 class mmSPI
gatedClock 0:fb42c5acf810 26 {
gatedClock 0:fb42c5acf810 27 public:
gatedClock 0:fb42c5acf810 28 mmSPI(); // constructor.
gatedClock 0:fb42c5acf810 29 ~mmSPI(); // destructor.
gatedClock 3:de99451ab3c0 30 void allocations(); // object allocations.
gatedClock 4:aa1fe8707bef 31 void setSPIfrequency(float); // set SPI clock frequency.
gatedClock 6:b480fc4e87e5 32
gatedClock 6:b480fc4e87e5 33 // byte transceive.
gatedClock 21:e90dd0f8aaa1 34
gatedClock 9:0551307e3b15 35
gatedClock 16:0e422fd263c6 36 void transceive_vector2(char *cReceive, char *cSend, int cNumBytes);
gatedClock 16:0e422fd263c6 37
gatedClock 21:e90dd0f8aaa1 38
gatedClock 16:0e422fd263c6 39
gatedClock 16:0e422fd263c6 40 void write_register(char, char, char *, char *);
gatedClock 17:b81c0c1f312f 41 char read_register(char, char *, char *);
gatedClock 21:e90dd0f8aaa1 42
gatedClock 18:4a29cad91540 43 void write_memory(char, char, char, char *, char *);
gatedClock 18:4a29cad91540 44 unsigned int read_memory(char, char *, char *);
gatedClock 15:d6cc57c4e23d 45
gatedClock 0:fb42c5acf810 46 private:
gatedClock 2:bebcf53b72dc 47
gatedClock 3:de99451ab3c0 48 DigitalOut * pMOSI; // SPI pin.
gatedClock 3:de99451ab3c0 49 DigitalOut * pMISO; // SPI pin.
gatedClock 3:de99451ab3c0 50 DigitalOut * pSCLK; // SPI pin.
gatedClock 8:e2d8bbc3e659 51 DigitalOut * pCPUclk; // soft cpu clock.
gatedClock 4:aa1fe8707bef 52 float fSPIfreq; // SPI clock frequency.
gatedClock 4:aa1fe8707bef 53 float fSPIquarterP; // SPI quarter period.
gatedClock 12:a1b7ce9c1d64 54 int dLoop01; // loop index.
gatedClock 12:a1b7ce9c1d64 55 int dLoop02; // loop index.
gatedClock 3:de99451ab3c0 56
gatedClock 2:bebcf53b72dc 57
gatedClock 2:bebcf53b72dc 58
gatedClock 0:fb42c5acf810 59 };
gatedClock 2:bebcf53b72dc 60 //----------------------------------------------//------------------------------
gatedClock 2:bebcf53b72dc 61 #endif // include guard.