Mike Moore / mmSPI

SPI library used to communicate with an altera development board attached to four zigbee-header pins.

mmSPI.h@18:4a29cad91540, 2013-08-19 (annotated)

Committer:
gatedClock
Date:
Mon Aug 19 20:45:29 2013 +0000
Revision:
18:4a29cad91540
Parent:
17:b81c0c1f312f
Child:
21:e90dd0f8aaa1
latest write_register.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gatedClock 2:bebcf53b72dc 1 #ifndef mmSPI_H // include guard.
gatedClock 2:bebcf53b72dc 2 #define mmSPI_H // include guard.
gatedClock 0:fb42c5acf810 3 /*----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 4 student : m-moore
gatedClock 0:fb42c5acf810 5 class : external SPI interface
gatedClock 0:fb42c5acf810 6 directory : mmSPI
gatedClock 0:fb42c5acf810 7 file : mmSPI.h
gatedClock 1:15706d15d123 8 ----description---------------------------------//------------------------------
gatedClock 1:15706d15d123 9 ----notes---------------------------------------//------------------------------
gatedClock 1:15706d15d123 10 1. the SPI interface pins are routed to the zigbee header.
gatedClock 0:fb42c5acf810 11 ------------------------------------------------//----------------------------*/
gatedClock 0:fb42c5acf810 12 #include "mbed.h" // standard mbed.org class.
gatedClock 15:d6cc57c4e23d 13 #include "C12832_lcd.h" // LCD.
gatedClock 1:15706d15d123 14 //---defines------------------------------------//------------------------------
gatedClock 8:e2d8bbc3e659 15 #define mmSPI_MOSI p29 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 16 #define mmSPI_MISO p30 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 17 #define mmSPI_SCLK p9 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 18 #define mmCPU_CLK p10 // soft CPU system clock.
gatedClock 15:d6cc57c4e23d 19
gatedClock 15:d6cc57c4e23d 20
gatedClock 0:fb42c5acf810 21 /*----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 22 ------------------------------------------------//----------------------------*/
gatedClock 2:bebcf53b72dc 23
gatedClock 0:fb42c5acf810 24 //==============================================//==============================
gatedClock 0:fb42c5acf810 25 class mmSPI
gatedClock 0:fb42c5acf810 26 {
gatedClock 0:fb42c5acf810 27 public:
gatedClock 0:fb42c5acf810 28 mmSPI(); // constructor.
gatedClock 0:fb42c5acf810 29 ~mmSPI(); // destructor.
gatedClock 3:de99451ab3c0 30 void allocations(); // object allocations.
gatedClock 4:aa1fe8707bef 31 void setSPIfrequency(float); // set SPI clock frequency.
gatedClock 6:b480fc4e87e5 32
gatedClock 6:b480fc4e87e5 33 // byte transceive.
gatedClock 6:b480fc4e87e5 34 void transceive_byte(char *cReceive, char *cSend);
gatedClock 7:b3e8b537d5c2 35
gatedClock 7:b3e8b537d5c2 36 // byte-array transceive.
gatedClock 7:b3e8b537d5c2 37 void transceive_vector(char *cReceive, char *cSend, char cNumBytes);
gatedClock 9:0551307e3b15 38
gatedClock 16:0e422fd263c6 39 void transceive_vector2(char *cReceive, char *cSend, int cNumBytes);
gatedClock 16:0e422fd263c6 40
gatedClock 9:0551307e3b15 41 void test_toggle_cpu_clock(); // cpu clock toggle test.
gatedClock 15:d6cc57c4e23d 42
gatedClock 15:d6cc57c4e23d 43 void force_write(char, char, char); // force write. act as IR.
gatedClock 15:d6cc57c4e23d 44 void force_read(char);
gatedClock 16:0e422fd263c6 45
gatedClock 16:0e422fd263c6 46 void write_register(char, char, char *, char *);
gatedClock 17:b81c0c1f312f 47 char read_register(char, char *, char *);
gatedClock 17:b81c0c1f312f 48 void write_pulse(char *, char *);
gatedClock 18:4a29cad91540 49 void write_memory(char, char, char, char *, char *);
gatedClock 18:4a29cad91540 50 unsigned int read_memory(char, char *, char *);
gatedClock 15:d6cc57c4e23d 51
gatedClock 0:fb42c5acf810 52 private:
gatedClock 2:bebcf53b72dc 53
gatedClock 3:de99451ab3c0 54 DigitalOut * pMOSI; // SPI pin.
gatedClock 3:de99451ab3c0 55 DigitalOut * pMISO; // SPI pin.
gatedClock 3:de99451ab3c0 56 DigitalOut * pSCLK; // SPI pin.
gatedClock 8:e2d8bbc3e659 57 DigitalOut * pCPUclk; // soft cpu clock.
gatedClock 4:aa1fe8707bef 58 float fSPIfreq; // SPI clock frequency.
gatedClock 4:aa1fe8707bef 59 float fSPIquarterP; // SPI quarter period.
gatedClock 12:a1b7ce9c1d64 60 int dLoop01; // loop index.
gatedClock 12:a1b7ce9c1d64 61 int dLoop02; // loop index.
gatedClock 3:de99451ab3c0 62
gatedClock 2:bebcf53b72dc 63
gatedClock 2:bebcf53b72dc 64
gatedClock 0:fb42c5acf810 65 };
gatedClock 2:bebcf53b72dc 66 //----------------------------------------------//------------------------------
gatedClock 2:bebcf53b72dc 67 #endif // include guard.