SPI library used to communicate with an altera development board attached to four zigbee-header pins.
mmSPI.h@8:e2d8bbc3e659, 2013-08-17 (annotated)
- Committer:
- gatedClock
- Date:
- Sat Aug 17 18:43:02 2013 +0000
- Revision:
- 8:e2d8bbc3e659
- Parent:
- 7:b3e8b537d5c2
- Child:
- 9:0551307e3b15
added cpu clock.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
gatedClock | 2:bebcf53b72dc | 1 | #ifndef mmSPI_H // include guard. |
gatedClock | 2:bebcf53b72dc | 2 | #define mmSPI_H // include guard. |
gatedClock | 0:fb42c5acf810 | 3 | /*----------------------------------------------//------------------------------ |
gatedClock | 0:fb42c5acf810 | 4 | student : m-moore |
gatedClock | 0:fb42c5acf810 | 5 | class : external SPI interface |
gatedClock | 0:fb42c5acf810 | 6 | directory : mmSPI |
gatedClock | 0:fb42c5acf810 | 7 | file : mmSPI.h |
gatedClock | 1:15706d15d123 | 8 | ----description---------------------------------//------------------------------ |
gatedClock | 1:15706d15d123 | 9 | ----notes---------------------------------------//------------------------------ |
gatedClock | 1:15706d15d123 | 10 | 1. the SPI interface pins are routed to the zigbee header. |
gatedClock | 0:fb42c5acf810 | 11 | ------------------------------------------------//----------------------------*/ |
gatedClock | 0:fb42c5acf810 | 12 | #include "mbed.h" // standard mbed.org class. |
gatedClock | 1:15706d15d123 | 13 | //---defines------------------------------------//------------------------------ |
gatedClock | 8:e2d8bbc3e659 | 14 | #define mmSPI_MOSI p29 // SPI interface pin. |
gatedClock | 8:e2d8bbc3e659 | 15 | #define mmSPI_MISO p30 // SPI interface pin. |
gatedClock | 8:e2d8bbc3e659 | 16 | #define mmSPI_SCLK p9 // SPI interface pin. |
gatedClock | 8:e2d8bbc3e659 | 17 | #define mmCPU_CLK p10 // soft CPU system clock. |
gatedClock | 0:fb42c5acf810 | 18 | /*----------------------------------------------//------------------------------ |
gatedClock | 0:fb42c5acf810 | 19 | ------------------------------------------------//----------------------------*/ |
gatedClock | 2:bebcf53b72dc | 20 | |
gatedClock | 0:fb42c5acf810 | 21 | //==============================================//============================== |
gatedClock | 0:fb42c5acf810 | 22 | class mmSPI |
gatedClock | 0:fb42c5acf810 | 23 | { |
gatedClock | 0:fb42c5acf810 | 24 | public: |
gatedClock | 0:fb42c5acf810 | 25 | mmSPI(); // constructor. |
gatedClock | 0:fb42c5acf810 | 26 | ~mmSPI(); // destructor. |
gatedClock | 3:de99451ab3c0 | 27 | void allocations(); // object allocations. |
gatedClock | 4:aa1fe8707bef | 28 | void setSPIfrequency(float); // set SPI clock frequency. |
gatedClock | 6:b480fc4e87e5 | 29 | |
gatedClock | 6:b480fc4e87e5 | 30 | // byte transceive. |
gatedClock | 6:b480fc4e87e5 | 31 | void transceive_byte(char *cReceive, char *cSend); |
gatedClock | 7:b3e8b537d5c2 | 32 | |
gatedClock | 7:b3e8b537d5c2 | 33 | // byte-array transceive. |
gatedClock | 7:b3e8b537d5c2 | 34 | void transceive_vector(char *cReceive, char *cSend, char cNumBytes); |
gatedClock | 0:fb42c5acf810 | 35 | private: |
gatedClock | 2:bebcf53b72dc | 36 | |
gatedClock | 3:de99451ab3c0 | 37 | DigitalOut * pMOSI; // SPI pin. |
gatedClock | 3:de99451ab3c0 | 38 | DigitalOut * pMISO; // SPI pin. |
gatedClock | 3:de99451ab3c0 | 39 | DigitalOut * pSCLK; // SPI pin. |
gatedClock | 8:e2d8bbc3e659 | 40 | DigitalOut * pCPUclk; // soft cpu clock. |
gatedClock | 4:aa1fe8707bef | 41 | float fSPIfreq; // SPI clock frequency. |
gatedClock | 4:aa1fe8707bef | 42 | float fSPIquarterP; // SPI quarter period. |
gatedClock | 5:b14dcaae260e | 43 | char cLoop01; // loop index. |
gatedClock | 7:b3e8b537d5c2 | 44 | char cLoop02; // loop index. |
gatedClock | 3:de99451ab3c0 | 45 | |
gatedClock | 2:bebcf53b72dc | 46 | |
gatedClock | 2:bebcf53b72dc | 47 | |
gatedClock | 0:fb42c5acf810 | 48 | }; |
gatedClock | 2:bebcf53b72dc | 49 | //----------------------------------------------//------------------------------ |
gatedClock | 2:bebcf53b72dc | 50 | #endif // include guard. |