Mike Moore / mmSPI-2

This is an involuntary fork, created because the repository would not update mmSPI. SPI library used to communicate with an altera development board attached to four zigbee-header pins.

Dependents:   Embedded_RTOS_Project

Fork of mmSPI by Mike Moore

mmSPI.cpp@20:2d5cd38047ca, 2013-08-19 (annotated)

Committer:
gatedClock
Date:
Mon Aug 19 23:14:36 2013 +0000
Revision:
20:2d5cd38047ca
Parent:
19:c2b753533b93
Child:
21:e90dd0f8aaa1
first read_memory, write_memory confirmed.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gatedClock 0:fb42c5acf810 1 /*----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 2 student : m-moore
gatedClock 0:fb42c5acf810 3 class : external SPI interface
gatedClock 0:fb42c5acf810 4 directory : mmSPI
gatedClock 0:fb42c5acf810 5 file : mmSPI.cpp
gatedClock 0:fb42c5acf810 6 ------------------------------------------------//----------------------------*/
gatedClock 0:fb42c5acf810 7 #include "mmSPI.h"
gatedClock 0:fb42c5acf810 8 /*----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 9 ------------------------------------------------//----------------------------*/
gatedClock 0:fb42c5acf810 10 //==============================================//==============================
gatedClock 15:d6cc57c4e23d 11 // consider resetting the fpga around here, because
gatedClock 15:d6cc57c4e23d 12 // the micro may be wiggling these signals before here.
gatedClock 0:fb42c5acf810 13 mmSPI::mmSPI() // constructor.
gatedClock 0:fb42c5acf810 14 {
gatedClock 3:de99451ab3c0 15 allocations(); // object allocations.
gatedClock 15:d6cc57c4e23d 16
gatedClock 15:d6cc57c4e23d 17 *pSCLK = 0; // initialize.
gatedClock 15:d6cc57c4e23d 18 *pCPUclk = 0; // initialize.
gatedClock 0:fb42c5acf810 19 }
gatedClock 0:fb42c5acf810 20 //----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 21 mmSPI::~mmSPI() // destructor.
gatedClock 0:fb42c5acf810 22 {
gatedClock 8:e2d8bbc3e659 23 // deallocations.
gatedClock 8:e2d8bbc3e659 24 if (pMOSI) {delete pMOSI; pMOSI = NULL;}
gatedClock 8:e2d8bbc3e659 25 if (pMISO) {delete pMISO; pMISO = NULL;}
gatedClock 8:e2d8bbc3e659 26 if (pSCLK) {delete pSCLK; pSCLK = NULL;}
gatedClock 8:e2d8bbc3e659 27 if (pCPUclk) {delete pCPUclk; pCPUclk = NULL;}
gatedClock 3:de99451ab3c0 28 }
gatedClock 3:de99451ab3c0 29 //----------------------------------------------//------------------------------
gatedClock 3:de99451ab3c0 30 void mmSPI::allocations(void) // object allocations.
gatedClock 3:de99451ab3c0 31 {
gatedClock 8:e2d8bbc3e659 32 pMOSI = new DigitalOut(mmSPI_MOSI); // SPI MOSI pin object.
gatedClock 3:de99451ab3c0 33 if (!pMOSI) error("\n\r mmSPI::allocations : FATAL malloc error for pMOSI. \n\r");
gatedClock 3:de99451ab3c0 34
gatedClock 8:e2d8bbc3e659 35 pMISO = new DigitalOut(mmSPI_MISO); // SPI MISO pin object.
gatedClock 3:de99451ab3c0 36 if (!pMISO) error("\n\r mmSPI::allocations : FATAL malloc error for pMISO. \n\r");
gatedClock 3:de99451ab3c0 37
gatedClock 8:e2d8bbc3e659 38 pSCLK = new DigitalOut(mmSPI_SCLK); // SPI SCLK pin object.
gatedClock 3:de99451ab3c0 39 if (!pSCLK) error("\n\r mmSPI::allocations : FATAL malloc error for pSCLK. \n\r");
gatedClock 8:e2d8bbc3e659 40
gatedClock 8:e2d8bbc3e659 41 pCPUclk = new DigitalOut(mmCPU_CLK); // SPI SCLK pin object.
gatedClock 8:e2d8bbc3e659 42 if (!pCPUclk) error("\n\r mmSPI::allocations : FATAL malloc error for pCPUclk. \n\r");
gatedClock 3:de99451ab3c0 43 }
gatedClock 4:aa1fe8707bef 44 //----------------------------------------------//------------------------------
gatedClock 4:aa1fe8707bef 45 void mmSPI::setSPIfrequency(float fFreq) // set SPI clock frequency.
gatedClock 4:aa1fe8707bef 46 {
gatedClock 4:aa1fe8707bef 47 fSPIfreq = fFreq; // promote to object scope.
gatedClock 4:aa1fe8707bef 48 if (fSPIfreq < .05) // don't get near divide-by-zero.
gatedClock 4:aa1fe8707bef 49 error("\n\r mmSPI::setSPIfrequency : FATAL SPI frequency set too low. \n\r");
gatedClock 4:aa1fe8707bef 50 fSPIquarterP = (1 / fSPIfreq) / 4; // figure quarter-cycle period.
gatedClock 4:aa1fe8707bef 51 }
gatedClock 0:fb42c5acf810 52 //----------------------------------------------//------------------------------
gatedClock 5:b14dcaae260e 53 // we're not going for speed, so lets go for good setup / hold.
gatedClock 6:b480fc4e87e5 54
gatedClock 6:b480fc4e87e5 55 // send/receive a byte over SPI.
gatedClock 7:b3e8b537d5c2 56 // MSB out/in first.
gatedClock 6:b480fc4e87e5 57 void mmSPI::transceive_byte(char *cReceive, char *cSend)
gatedClock 1:15706d15d123 58 {
gatedClock 6:b480fc4e87e5 59 *cReceive = 0; // clear receive byte.
gatedClock 12:a1b7ce9c1d64 60 for (dLoop01 = 7; dLoop01 >= 0; dLoop01--)// loop for 8 bits in the byte.
gatedClock 5:b14dcaae260e 61 {
gatedClock 5:b14dcaae260e 62 *pSCLK = 0; // SPI clock negedge.
gatedClock 5:b14dcaae260e 63 wait(fSPIquarterP); // until middle of clock low.
gatedClock 12:a1b7ce9c1d64 64 *pMOSI = (*cSend >> dLoop01) & 1; // assert MOSI.
gatedClock 15:d6cc57c4e23d 65 // capture MISO.
gatedClock 15:d6cc57c4e23d 66 *cReceive = *cReceive | (*pMISO << dLoop01);
gatedClock 15:d6cc57c4e23d 67 wait(fSPIquarterP); // finish-out cycle.
gatedClock 5:b14dcaae260e 68 *pSCLK = 1; // SPI clock posedge.
gatedClock 15:d6cc57c4e23d 69 wait(fSPIquarterP); // finish-out cycle.
gatedClock 5:b14dcaae260e 70 wait(fSPIquarterP); // finish-out cycle.
gatedClock 5:b14dcaae260e 71 }
gatedClock 1:15706d15d123 72 }
gatedClock 5:b14dcaae260e 73 //----------------------------------------------//------------------------------
gatedClock 7:b3e8b537d5c2 74 // transceive a character array.
gatedClock 7:b3e8b537d5c2 75 // limit is 256 characters.
gatedClock 7:b3e8b537d5c2 76 // MSB out/in first.
gatedClock 7:b3e8b537d5c2 77 void mmSPI::transceive_vector(char *cReceive, char *cSend, char cNumBytes)
gatedClock 13:3e6886a96aea 78 {
gatedClock 16:0e422fd263c6 79
gatedClock 16:0e422fd263c6 80
gatedClock 13:3e6886a96aea 81
gatedClock 12:a1b7ce9c1d64 82 for (dLoop02 = (cNumBytes - 1); dLoop02 >= 0; dLoop02--)
gatedClock 12:a1b7ce9c1d64 83 transceive_byte(&(cReceive[dLoop02]), &(cSend[dLoop02]));
gatedClock 13:3e6886a96aea 84
gatedClock 15:d6cc57c4e23d 85
gatedClock 13:3e6886a96aea 86
gatedClock 13:3e6886a96aea 87 *pCPUclk = 1; // pulse the CPU clock.
gatedClock 13:3e6886a96aea 88 wait(fSPIquarterP);
gatedClock 13:3e6886a96aea 89 wait(fSPIquarterP);
gatedClock 13:3e6886a96aea 90 *pCPUclk = 0;
gatedClock 13:3e6886a96aea 91 wait(fSPIquarterP);
gatedClock 13:3e6886a96aea 92 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 93
gatedClock 16:0e422fd263c6 94
gatedClock 16:0e422fd263c6 95
gatedClock 16:0e422fd263c6 96 if (0)
gatedClock 16:0e422fd263c6 97 {
gatedClock 16:0e422fd263c6 98 *pSCLK = 1;
gatedClock 16:0e422fd263c6 99 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 100 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 101 *pSCLK = 0;
gatedClock 16:0e422fd263c6 102 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 103 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 104 }
gatedClock 16:0e422fd263c6 105 }
gatedClock 16:0e422fd263c6 106 //----------------------------------------------//------------------------------
gatedClock 16:0e422fd263c6 107 // transceive a character array.
gatedClock 16:0e422fd263c6 108 // limit is 256 characters.
gatedClock 16:0e422fd263c6 109 // MSB out/in first.
gatedClock 16:0e422fd263c6 110 void mmSPI::transceive_vector2(char *pcReceive, char *pcSend, int dNumBytes)
gatedClock 16:0e422fd263c6 111 {
gatedClock 16:0e422fd263c6 112 int dClear;
gatedClock 16:0e422fd263c6 113 int dIndex;
gatedClock 16:0e422fd263c6 114 int dMosiByteIndex;
gatedClock 16:0e422fd263c6 115 int dMosiBitIndex;
gatedClock 16:0e422fd263c6 116 int dMisoByteIndex;
gatedClock 16:0e422fd263c6 117 int dMisoBitIndex;
gatedClock 16:0e422fd263c6 118
gatedClock 16:0e422fd263c6 119 dIndex = (dNumBytes * 8) - 1;
gatedClock 16:0e422fd263c6 120 dMosiByteIndex = dIndex / 8;
gatedClock 16:0e422fd263c6 121 dMosiBitIndex = dIndex % 8;
gatedClock 16:0e422fd263c6 122
gatedClock 16:0e422fd263c6 123 for (dClear = 0; dClear < dNumBytes; dClear++) pcReceive[dClear] = 0;
gatedClock 16:0e422fd263c6 124
gatedClock 16:0e422fd263c6 125
gatedClock 16:0e422fd263c6 126 *pCPUclk = 1; // pulse the CPU clock.
gatedClock 16:0e422fd263c6 127 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 128 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 129 *pCPUclk = 0;
gatedClock 16:0e422fd263c6 130 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 131 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 132
gatedClock 16:0e422fd263c6 133 *pSCLK = 1; // pulse the SPI clock for parallel load.
gatedClock 16:0e422fd263c6 134 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 135 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 136 *pSCLK = 0;
gatedClock 16:0e422fd263c6 137 // pre-assert MOSI.
gatedClock 16:0e422fd263c6 138 *pMOSI = ((pcSend[dMosiByteIndex]) >> dMosiBitIndex) & 1;
gatedClock 16:0e422fd263c6 139 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 140 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 141
gatedClock 16:0e422fd263c6 142
gatedClock 16:0e422fd263c6 143 for (dIndex = (dNumBytes * 8) - 1; dIndex >= 0; dIndex--)
gatedClock 16:0e422fd263c6 144 {
gatedClock 16:0e422fd263c6 145 dMisoByteIndex = dIndex / 8;
gatedClock 16:0e422fd263c6 146 dMisoBitIndex = dIndex % 8;
gatedClock 18:4a29cad91540 147 pcReceive[dMisoByteIndex] = pcReceive[dMisoByteIndex] | (*pMISO << dMisoBitIndex);
gatedClock 16:0e422fd263c6 148 *pSCLK = 1;
gatedClock 16:0e422fd263c6 149 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 150 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 151 *pSCLK = 0;
gatedClock 16:0e422fd263c6 152
gatedClock 16:0e422fd263c6 153 if (dIndex < 0) dIndex = 0;
gatedClock 16:0e422fd263c6 154 dMosiByteIndex = (dIndex - 1) / 8;
gatedClock 16:0e422fd263c6 155 dMosiBitIndex = (dIndex - 1) % 8;
gatedClock 16:0e422fd263c6 156 *pMOSI = ((pcSend[dMosiByteIndex]) >> dMosiBitIndex) & 1;
gatedClock 16:0e422fd263c6 157 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 158 wait(fSPIquarterP);
gatedClock 16:0e422fd263c6 159 }
gatedClock 7:b3e8b537d5c2 160 }
gatedClock 7:b3e8b537d5c2 161 //----------------------------------------------//------------------------------
gatedClock 9:0551307e3b15 162 // transceive a character array.
gatedClock 9:0551307e3b15 163 // limit is 256 characters.
gatedClock 9:0551307e3b15 164 // MSB out/in first.
gatedClock 9:0551307e3b15 165 void mmSPI::test_toggle_cpu_clock(void)
gatedClock 9:0551307e3b15 166 {
gatedClock 11:17207edac925 167 DigitalOut led0(LED4);
gatedClock 9:0551307e3b15 168 while (1)
gatedClock 9:0551307e3b15 169 {
gatedClock 11:17207edac925 170 *pCPUclk = 1; led0 = 1;
gatedClock 9:0551307e3b15 171 wait(1.0);
gatedClock 11:17207edac925 172 *pCPUclk = 0; led0 = 0;
gatedClock 9:0551307e3b15 173 wait(1.0);
gatedClock 9:0551307e3b15 174 }
gatedClock 9:0551307e3b15 175 }
gatedClock 9:0551307e3b15 176 //----------------------------------------------//------------------------------
gatedClock 15:d6cc57c4e23d 177 void mmSPI::force_write(char cDataHIgh, char cDataLow, char cAddress)
gatedClock 15:d6cc57c4e23d 178 {
gatedClock 15:d6cc57c4e23d 179 char pcReceive[8];
gatedClock 15:d6cc57c4e23d 180 char pcSend [8];
gatedClock 15:d6cc57c4e23d 181 int dLoop;
gatedClock 15:d6cc57c4e23d 182
gatedClock 15:d6cc57c4e23d 183 for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0;
gatedClock 15:d6cc57c4e23d 184
gatedClock 15:d6cc57c4e23d 185
gatedClock 15:d6cc57c4e23d 186 // high data to R2.
gatedClock 15:d6cc57c4e23d 187 pcSend[7] = 0x02; pcSend[1] = 0xA8; pcSend[0] = cDataHIgh;
gatedClock 15:d6cc57c4e23d 188 transceive_vector(pcReceive, pcSend, 8);
gatedClock 5:b14dcaae260e 189
gatedClock 5:b14dcaae260e 190
gatedClock 15:d6cc57c4e23d 191 // low data to R1.
gatedClock 15:d6cc57c4e23d 192 pcSend[7] = 0x02; pcSend[1] = 0xA4; pcSend[0] = cDataLow;
gatedClock 15:d6cc57c4e23d 193 transceive_vector(pcReceive, pcSend, 8);
gatedClock 15:d6cc57c4e23d 194
gatedClock 15:d6cc57c4e23d 195
gatedClock 15:d6cc57c4e23d 196 // address to R3.
gatedClock 15:d6cc57c4e23d 197 pcSend[7] = 0x02; pcSend[1] = 0xAC; pcSend[0] = cAddress;
gatedClock 15:d6cc57c4e23d 198 transceive_vector(pcReceive, pcSend, 8);
gatedClock 15:d6cc57c4e23d 199
gatedClock 15:d6cc57c4e23d 200
gatedClock 15:d6cc57c4e23d 201
gatedClock 15:d6cc57c4e23d 202 pcSend[7] = 0x02; pcSend[1] = 0x02; pcSend[0] = 0; // WE high.
gatedClock 15:d6cc57c4e23d 203 transceive_vector(pcReceive, pcSend, 8);
gatedClock 15:d6cc57c4e23d 204
gatedClock 15:d6cc57c4e23d 205 pcSend[7] = 0x02; pcSend[1] = 0x00; pcSend[0] = 0; // WE low.
gatedClock 15:d6cc57c4e23d 206 transceive_vector(pcReceive, pcSend, 8);
gatedClock 15:d6cc57c4e23d 207
gatedClock 15:d6cc57c4e23d 208 }
gatedClock 15:d6cc57c4e23d 209 //----------------------------------------------//------------------------------
gatedClock 14:35717622a4fb 210
gatedClock 15:d6cc57c4e23d 211 void mmSPI::force_read(char cAddress)
gatedClock 15:d6cc57c4e23d 212 {
gatedClock 15:d6cc57c4e23d 213 char pcReceive[8];
gatedClock 15:d6cc57c4e23d 214 char pcSend [8];
gatedClock 15:d6cc57c4e23d 215 int dLoop;
gatedClock 15:d6cc57c4e23d 216
gatedClock 15:d6cc57c4e23d 217 for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0;
gatedClock 15:d6cc57c4e23d 218
gatedClock 15:d6cc57c4e23d 219
gatedClock 15:d6cc57c4e23d 220
gatedClock 15:d6cc57c4e23d 221
gatedClock 15:d6cc57c4e23d 222 // address to R3.
gatedClock 15:d6cc57c4e23d 223 pcSend[7] = 0x02; pcSend[1] = 0xAC; pcSend[0] = cAddress;
gatedClock 15:d6cc57c4e23d 224 transceive_vector(pcReceive, pcSend, 8);
gatedClock 15:d6cc57c4e23d 225
gatedClock 15:d6cc57c4e23d 226 // R2 gets data-H from memory.
gatedClock 15:d6cc57c4e23d 227 pcSend[7] = 0x02; pcSend[1] = 0xC8; pcSend[0] = cAddress;
gatedClock 15:d6cc57c4e23d 228 transceive_vector(pcReceive, pcSend, 8);
gatedClock 15:d6cc57c4e23d 229
gatedClock 15:d6cc57c4e23d 230 // R1 gets data-L from memory.
gatedClock 15:d6cc57c4e23d 231 pcSend[7] = 0x02; pcSend[1] = 0xC4; pcSend[0] = cAddress;
gatedClock 15:d6cc57c4e23d 232 transceive_vector(pcReceive, pcSend, 8);
gatedClock 15:d6cc57c4e23d 233
gatedClock 15:d6cc57c4e23d 234
gatedClock 15:d6cc57c4e23d 235
gatedClock 15:d6cc57c4e23d 236
gatedClock 15:d6cc57c4e23d 237 // pcSend[7] = 0x02; // force IR.
gatedClock 15:d6cc57c4e23d 238 // pcSend[1] = 0xA4; // R1 <- immediate.
gatedClock 15:d6cc57c4e23d 239 // pcSend[0] = 0xEE; // immediate value.
gatedClock 15:d6cc57c4e23d 240 /// transceive_vector(pcReceive, pcSend, 8);
gatedClock 15:d6cc57c4e23d 241
gatedClock 15:d6cc57c4e23d 242
gatedClock 15:d6cc57c4e23d 243
gatedClock 15:d6cc57c4e23d 244 // no-op scan.
gatedClock 15:d6cc57c4e23d 245 pcSend[7] = 0x02; pcSend[1] = 0x0; pcSend[0] = 0;
gatedClock 15:d6cc57c4e23d 246 transceive_vector(pcReceive, pcSend, 8);
gatedClock 15:d6cc57c4e23d 247
gatedClock 15:d6cc57c4e23d 248 }
gatedClock 14:35717622a4fb 249 //----------------------------------------------//------------------------------
gatedClock 16:0e422fd263c6 250 void mmSPI::write_register(char cRegister, char cValue, char * pcReceive, char * pcSend)
gatedClock 16:0e422fd263c6 251 {
gatedClock 18:4a29cad91540 252 int dLoop; // loop index.
gatedClock 18:4a29cad91540 253
gatedClock 18:4a29cad91540 254 // clear transmit vector.
gatedClock 18:4a29cad91540 255 for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0x00;
gatedClock 18:4a29cad91540 256
gatedClock 18:4a29cad91540 257 pcSend[7] = 0x02; // mbed sends a command.
gatedClock 18:4a29cad91540 258
gatedClock 18:4a29cad91540 259 // align into instruction word.
gatedClock 16:0e422fd263c6 260 pcSend[1] = ((cRegister & 0x07) << 2) | 0xA0;
gatedClock 18:4a29cad91540 261 pcSend[0] = cValue & 0xFF; // immediate value to i.w.
gatedClock 17:b81c0c1f312f 262
gatedClock 18:4a29cad91540 263 transceive_vector2(pcReceive, pcSend, 8); // transmit command.
gatedClock 18:4a29cad91540 264
gatedClock 18:4a29cad91540 265 // clear transmit vector.
gatedClock 18:4a29cad91540 266 for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0x00;
gatedClock 17:b81c0c1f312f 267 }
gatedClock 17:b81c0c1f312f 268 //----------------------------------------------//------------------------------
gatedClock 17:b81c0c1f312f 269 // returns the content of
gatedClock 17:b81c0c1f312f 270 // a CPU register.
gatedClock 17:b81c0c1f312f 271 char mmSPI::read_register(char cRegister, char * pcReceive, char * pcSend)
gatedClock 17:b81c0c1f312f 272 {
gatedClock 19:c2b753533b93 273 int dLoop;
gatedClock 19:c2b753533b93 274 // int dComplement;
gatedClock 19:c2b753533b93 275
gatedClock 19:c2b753533b93 276 // dComplement = 7 - (int) cRegister;
gatedClock 19:c2b753533b93 277
gatedClock 19:c2b753533b93 278 // send all 0.
gatedClock 18:4a29cad91540 279 for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0x00;
gatedClock 18:4a29cad91540 280
gatedClock 17:b81c0c1f312f 281 transceive_vector2(pcReceive, pcSend, 8); // snap & scan-out reg contents.
gatedClock 17:b81c0c1f312f 282
gatedClock 19:c2b753533b93 283 return (pcReceive[6 - cRegister]); // return the particular reg value.
gatedClock 17:b81c0c1f312f 284 }
gatedClock 17:b81c0c1f312f 285 //----------------------------------------------//------------------------------
gatedClock 18:4a29cad91540 286 void mmSPI::write_memory(char cHData, char cLdata, char cAddress, char * pcReceive, char * pcSend)
gatedClock 18:4a29cad91540 287 {
gatedClock 18:4a29cad91540 288 int dLoop; // loop index.
gatedClock 18:4a29cad91540 289
gatedClock 18:4a29cad91540 290 // clear transmit vector.
gatedClock 18:4a29cad91540 291 for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0x00;
gatedClock 19:c2b753533b93 292
gatedClock 19:c2b753533b93 293 /*
gatedClock 19:c2b753533b93 294 CTRL = 7
gatedClock 19:c2b753533b93 295 R0 = 6
gatedClock 19:c2b753533b93 296 R1 = 5
gatedClock 19:c2b753533b93 297 R2 = 4
gatedClock 19:c2b753533b93 298 R3 = 3
gatedClock 19:c2b753533b93 299 PC = 2
gatedClock 19:c2b753533b93 300 IR-H = 1
gatedClock 19:c2b753533b93 301 IR-L = 0
gatedClock 19:c2b753533b93 302 */
gatedClock 19:c2b753533b93 303
gatedClock 18:4a29cad91540 304
gatedClock 18:4a29cad91540 305 // R3 <- address.
gatedClock 18:4a29cad91540 306 // R2 <- high-data.
gatedClock 18:4a29cad91540 307 // R1 <- low-data.
gatedClock 18:4a29cad91540 308 write_register(0x03,cAddress, pcReceive, pcSend);
gatedClock 20:2d5cd38047ca 309 write_register(0x02,cHData, pcReceive, pcSend);
gatedClock 20:2d5cd38047ca 310 write_register(0x01,cLdata, pcReceive, pcSend);
gatedClock 18:4a29cad91540 311
gatedClock 20:2d5cd38047ca 312 pcSend[7] = 0x00; // write-enable high.
gatedClock 20:2d5cd38047ca 313 pcSend[1] = 0x02;
gatedClock 20:2d5cd38047ca 314 pcSend[0] = 0x00;
gatedClock 20:2d5cd38047ca 315 transceive_vector2(pcReceive, pcSend, 8);
gatedClock 18:4a29cad91540 316
gatedClock 20:2d5cd38047ca 317 pcSend[7] = 0x00; // write-enable low.
gatedClock 20:2d5cd38047ca 318 pcSend[1] = 0x00;
gatedClock 20:2d5cd38047ca 319 pcSend[0] = 0x00;
gatedClock 20:2d5cd38047ca 320 transceive_vector2(pcReceive, pcSend, 8);
gatedClock 18:4a29cad91540 321
gatedClock 18:4a29cad91540 322 // clear transmit vector.
gatedClock 18:4a29cad91540 323 for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0x00;
gatedClock 19:c2b753533b93 324
gatedClock 18:4a29cad91540 325 }
gatedClock 18:4a29cad91540 326 //----------------------------------------------//------------------------------
gatedClock 18:4a29cad91540 327 // fetch a word from main memory.
gatedClock 18:4a29cad91540 328 unsigned int mmSPI::read_memory(char cAddress, char * pcReceive, char * pcSend)
gatedClock 18:4a29cad91540 329 {
gatedClock 18:4a29cad91540 330 int dLoop; // loop index.
gatedClock 18:4a29cad91540 331 unsigned int udMemoryContent; // return variable.
gatedClock 18:4a29cad91540 332 char cHData; // returned data-high.
gatedClock 18:4a29cad91540 333 char cLData; // returned data-low.
gatedClock 18:4a29cad91540 334
gatedClock 18:4a29cad91540 335 // clear transmit vector.
gatedClock 18:4a29cad91540 336 for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0x00;
gatedClock 18:4a29cad91540 337
gatedClock 19:c2b753533b93 338 /*
gatedClock 19:c2b753533b93 339 CTRL = 7
gatedClock 19:c2b753533b93 340 R0 = 6
gatedClock 19:c2b753533b93 341 R1 = 5
gatedClock 19:c2b753533b93 342 R2 = 4
gatedClock 19:c2b753533b93 343 R3 = 3
gatedClock 19:c2b753533b93 344 PC = 2
gatedClock 19:c2b753533b93 345 IR-H = 1
gatedClock 19:c2b753533b93 346 IR-L = 0
gatedClock 19:c2b753533b93 347 */
gatedClock 19:c2b753533b93 348
gatedClock 19:c2b753533b93 349
gatedClock 19:c2b753533b93 350
gatedClock 18:4a29cad91540 351 // R3 <- address.
gatedClock 18:4a29cad91540 352 write_register(0x03,cAddress, pcReceive, pcSend);
gatedClock 18:4a29cad91540 353
gatedClock 18:4a29cad91540 354 pcSend[7] = 0x02; // mbed sends command.
gatedClock 20:2d5cd38047ca 355 pcSend[1] = 0xC8; // R2 <- MM[R3]
gatedClock 18:4a29cad91540 356 pcSend[0] = 0x00;
gatedClock 18:4a29cad91540 357 transceive_vector2(pcReceive, pcSend, 8); // send command.
gatedClock 18:4a29cad91540 358
gatedClock 18:4a29cad91540 359 pcSend[7] = 0x02; // mbed sends command.
gatedClock 20:2d5cd38047ca 360 pcSend[1] = 0xC4; // R1 <- MM[R3]
gatedClock 18:4a29cad91540 361 pcSend[0] = 0x00;
gatedClock 18:4a29cad91540 362 transceive_vector2(pcReceive, pcSend, 8); // send command.
gatedClock 18:4a29cad91540 363
gatedClock 18:4a29cad91540 364 // obtain MM content.
gatedClock 20:2d5cd38047ca 365 cHData = read_register(0x02, pcReceive, pcSend);
gatedClock 20:2d5cd38047ca 366 cLData = read_register(0x01, pcReceive, pcSend);
gatedClock 18:4a29cad91540 367
gatedClock 18:4a29cad91540 368
gatedClock 18:4a29cad91540 369 udMemoryContent = (cHData << 8) + cLData; // build the memory word.
gatedClock 18:4a29cad91540 370
gatedClock 18:4a29cad91540 371 // clear transmit vector.
gatedClock 18:4a29cad91540 372 for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0x00;
gatedClock 18:4a29cad91540 373
gatedClock 18:4a29cad91540 374 return udMemoryContent; // return the memory word.
gatedClock 18:4a29cad91540 375 }
gatedClock 18:4a29cad91540 376 //----------------------------------------------//------------------------------
gatedClock 17:b81c0c1f312f 377
gatedClock 17:b81c0c1f312f 378
gatedClock 17:b81c0c1f312f 379 void mmSPI::write_pulse(char * pcReceive, char * pcSend)
gatedClock 17:b81c0c1f312f 380 {
gatedClock 17:b81c0c1f312f 381 pcSend[7] = 0x02; // write-enable high.
gatedClock 17:b81c0c1f312f 382 pcSend[1] = 0x02;
gatedClock 17:b81c0c1f312f 383 pcSend[0] = 0x00;
gatedClock 17:b81c0c1f312f 384 transceive_vector2(pcReceive, pcSend, 8);
gatedClock 17:b81c0c1f312f 385
gatedClock 17:b81c0c1f312f 386 pcSend[7] = 0x02; // write-enable low.
gatedClock 17:b81c0c1f312f 387 pcSend[1] = 0x00;
gatedClock 17:b81c0c1f312f 388 pcSend[0] = 0x00;
gatedClock 17:b81c0c1f312f 389 transceive_vector2(pcReceive, pcSend, 8);
gatedClock 17:b81c0c1f312f 390
gatedClock 17:b81c0c1f312f 391 pcSend[7] = 0x00;
gatedClock 17:b81c0c1f312f 392 pcSend[6] = 0x00;
gatedClock 17:b81c0c1f312f 393 pcSend[5] = 0x00;
gatedClock 17:b81c0c1f312f 394 pcSend[4] = 0x00;
gatedClock 17:b81c0c1f312f 395 pcSend[3] = 0x00;
gatedClock 17:b81c0c1f312f 396 pcSend[2] = 0x00;
gatedClock 17:b81c0c1f312f 397 pcSend[1] = 0x00;
gatedClock 17:b81c0c1f312f 398 pcSend[0] = 0x00;
gatedClock 16:0e422fd263c6 399 }
gatedClock 16:0e422fd263c6 400 //----------------------------------------------//------------------------------
gatedClock 5:b14dcaae260e 401
gatedClock 5:b14dcaae260e 402
gatedClock 5:b14dcaae260e 403
gatedClock 5:b14dcaae260e 404
gatedClock 5:b14dcaae260e 405
gatedClock 5:b14dcaae260e 406
gatedClock 5:b14dcaae260e 407
gatedClock 7:b3e8b537d5c2 408
gatedClock 7:b3e8b537d5c2 409
gatedClock 7:b3e8b537d5c2 410
gatedClock 7:b3e8b537d5c2 411
gatedClock 7:b3e8b537d5c2 412
gatedClock 15:d6cc57c4e23d 413
gatedClock 15:d6cc57c4e23d 414