mbed libraries for KL25Z
KL25Z/core_cmInstr.h@9:663789d7729f, 2013-02-18 (annotated)
- Committer:
- emilmont
- Date:
- Mon Feb 18 09:41:56 2013 +0000
- Revision:
- 9:663789d7729f
- Parent:
- 2:e9a661555b58
Update mbed-KL25Z to latest build
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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emilmont | 2:e9a661555b58 | 1 | /**************************************************************************//** |
emilmont | 2:e9a661555b58 | 2 | * @file core_cmInstr.h |
emilmont | 2:e9a661555b58 | 3 | * @brief CMSIS Cortex-M Core Instruction Access Header File |
emilmont | 9:663789d7729f | 4 | * @version V3.03 |
emilmont | 9:663789d7729f | 5 | * @date 29. August 2012 |
emilmont | 2:e9a661555b58 | 6 | * |
emilmont | 2:e9a661555b58 | 7 | * @note |
emilmont | 2:e9a661555b58 | 8 | * Copyright (C) 2009-2012 ARM Limited. All rights reserved. |
emilmont | 2:e9a661555b58 | 9 | * |
emilmont | 2:e9a661555b58 | 10 | * @par |
emilmont | 2:e9a661555b58 | 11 | * ARM Limited (ARM) is supplying this software for use with Cortex-M |
emilmont | 2:e9a661555b58 | 12 | * processor based microcontrollers. This file can be freely distributed |
emilmont | 2:e9a661555b58 | 13 | * within development tools that are supporting such ARM based processors. |
emilmont | 2:e9a661555b58 | 14 | * |
emilmont | 2:e9a661555b58 | 15 | * @par |
emilmont | 2:e9a661555b58 | 16 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
emilmont | 2:e9a661555b58 | 17 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
emilmont | 2:e9a661555b58 | 18 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
emilmont | 2:e9a661555b58 | 19 | * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR |
emilmont | 2:e9a661555b58 | 20 | * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
emilmont | 2:e9a661555b58 | 21 | * |
emilmont | 2:e9a661555b58 | 22 | ******************************************************************************/ |
emilmont | 2:e9a661555b58 | 23 | |
emilmont | 2:e9a661555b58 | 24 | #ifndef __CORE_CMINSTR_H |
emilmont | 2:e9a661555b58 | 25 | #define __CORE_CMINSTR_H |
emilmont | 2:e9a661555b58 | 26 | |
emilmont | 2:e9a661555b58 | 27 | |
emilmont | 2:e9a661555b58 | 28 | /* ########################## Core Instruction Access ######################### */ |
emilmont | 2:e9a661555b58 | 29 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface |
emilmont | 2:e9a661555b58 | 30 | Access to dedicated instructions |
emilmont | 2:e9a661555b58 | 31 | @{ |
emilmont | 2:e9a661555b58 | 32 | */ |
emilmont | 2:e9a661555b58 | 33 | |
emilmont | 2:e9a661555b58 | 34 | #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ |
emilmont | 2:e9a661555b58 | 35 | /* ARM armcc specific functions */ |
emilmont | 2:e9a661555b58 | 36 | |
emilmont | 2:e9a661555b58 | 37 | #if (__ARMCC_VERSION < 400677) |
emilmont | 2:e9a661555b58 | 38 | #error "Please use ARM Compiler Toolchain V4.0.677 or later!" |
emilmont | 2:e9a661555b58 | 39 | #endif |
emilmont | 2:e9a661555b58 | 40 | |
emilmont | 2:e9a661555b58 | 41 | |
emilmont | 2:e9a661555b58 | 42 | /** \brief No Operation |
emilmont | 2:e9a661555b58 | 43 | |
emilmont | 2:e9a661555b58 | 44 | No Operation does nothing. This instruction can be used for code alignment purposes. |
emilmont | 2:e9a661555b58 | 45 | */ |
emilmont | 2:e9a661555b58 | 46 | #define __NOP __nop |
emilmont | 2:e9a661555b58 | 47 | |
emilmont | 2:e9a661555b58 | 48 | |
emilmont | 2:e9a661555b58 | 49 | /** \brief Wait For Interrupt |
emilmont | 2:e9a661555b58 | 50 | |
emilmont | 2:e9a661555b58 | 51 | Wait For Interrupt is a hint instruction that suspends execution |
emilmont | 2:e9a661555b58 | 52 | until one of a number of events occurs. |
emilmont | 2:e9a661555b58 | 53 | */ |
emilmont | 2:e9a661555b58 | 54 | #define __WFI __wfi |
emilmont | 2:e9a661555b58 | 55 | |
emilmont | 2:e9a661555b58 | 56 | |
emilmont | 2:e9a661555b58 | 57 | /** \brief Wait For Event |
emilmont | 2:e9a661555b58 | 58 | |
emilmont | 2:e9a661555b58 | 59 | Wait For Event is a hint instruction that permits the processor to enter |
emilmont | 2:e9a661555b58 | 60 | a low-power state until one of a number of events occurs. |
emilmont | 2:e9a661555b58 | 61 | */ |
emilmont | 2:e9a661555b58 | 62 | #define __WFE __wfe |
emilmont | 2:e9a661555b58 | 63 | |
emilmont | 2:e9a661555b58 | 64 | |
emilmont | 2:e9a661555b58 | 65 | /** \brief Send Event |
emilmont | 2:e9a661555b58 | 66 | |
emilmont | 2:e9a661555b58 | 67 | Send Event is a hint instruction. It causes an event to be signaled to the CPU. |
emilmont | 2:e9a661555b58 | 68 | */ |
emilmont | 2:e9a661555b58 | 69 | #define __SEV __sev |
emilmont | 2:e9a661555b58 | 70 | |
emilmont | 2:e9a661555b58 | 71 | |
emilmont | 2:e9a661555b58 | 72 | /** \brief Instruction Synchronization Barrier |
emilmont | 2:e9a661555b58 | 73 | |
emilmont | 2:e9a661555b58 | 74 | Instruction Synchronization Barrier flushes the pipeline in the processor, |
emilmont | 2:e9a661555b58 | 75 | so that all instructions following the ISB are fetched from cache or |
emilmont | 2:e9a661555b58 | 76 | memory, after the instruction has been completed. |
emilmont | 2:e9a661555b58 | 77 | */ |
emilmont | 2:e9a661555b58 | 78 | #define __ISB() __isb(0xF) |
emilmont | 2:e9a661555b58 | 79 | |
emilmont | 2:e9a661555b58 | 80 | |
emilmont | 2:e9a661555b58 | 81 | /** \brief Data Synchronization Barrier |
emilmont | 2:e9a661555b58 | 82 | |
emilmont | 2:e9a661555b58 | 83 | This function acts as a special kind of Data Memory Barrier. |
emilmont | 2:e9a661555b58 | 84 | It completes when all explicit memory accesses before this instruction complete. |
emilmont | 2:e9a661555b58 | 85 | */ |
emilmont | 2:e9a661555b58 | 86 | #define __DSB() __dsb(0xF) |
emilmont | 2:e9a661555b58 | 87 | |
emilmont | 2:e9a661555b58 | 88 | |
emilmont | 2:e9a661555b58 | 89 | /** \brief Data Memory Barrier |
emilmont | 2:e9a661555b58 | 90 | |
emilmont | 2:e9a661555b58 | 91 | This function ensures the apparent order of the explicit memory operations before |
emilmont | 2:e9a661555b58 | 92 | and after the instruction, without ensuring their completion. |
emilmont | 2:e9a661555b58 | 93 | */ |
emilmont | 2:e9a661555b58 | 94 | #define __DMB() __dmb(0xF) |
emilmont | 2:e9a661555b58 | 95 | |
emilmont | 2:e9a661555b58 | 96 | |
emilmont | 2:e9a661555b58 | 97 | /** \brief Reverse byte order (32 bit) |
emilmont | 2:e9a661555b58 | 98 | |
emilmont | 2:e9a661555b58 | 99 | This function reverses the byte order in integer value. |
emilmont | 2:e9a661555b58 | 100 | |
emilmont | 2:e9a661555b58 | 101 | \param [in] value Value to reverse |
emilmont | 2:e9a661555b58 | 102 | \return Reversed value |
emilmont | 2:e9a661555b58 | 103 | */ |
emilmont | 2:e9a661555b58 | 104 | #define __REV __rev |
emilmont | 2:e9a661555b58 | 105 | |
emilmont | 2:e9a661555b58 | 106 | |
emilmont | 2:e9a661555b58 | 107 | /** \brief Reverse byte order (16 bit) |
emilmont | 2:e9a661555b58 | 108 | |
emilmont | 2:e9a661555b58 | 109 | This function reverses the byte order in two unsigned short values. |
emilmont | 2:e9a661555b58 | 110 | |
emilmont | 2:e9a661555b58 | 111 | \param [in] value Value to reverse |
emilmont | 2:e9a661555b58 | 112 | \return Reversed value |
emilmont | 2:e9a661555b58 | 113 | */ |
emilmont | 2:e9a661555b58 | 114 | #ifndef __NO_EMBEDDED_ASM |
emilmont | 2:e9a661555b58 | 115 | __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) |
emilmont | 2:e9a661555b58 | 116 | { |
emilmont | 2:e9a661555b58 | 117 | rev16 r0, r0 |
emilmont | 2:e9a661555b58 | 118 | bx lr |
emilmont | 2:e9a661555b58 | 119 | } |
emilmont | 2:e9a661555b58 | 120 | #endif |
emilmont | 2:e9a661555b58 | 121 | |
emilmont | 2:e9a661555b58 | 122 | /** \brief Reverse byte order in signed short value |
emilmont | 2:e9a661555b58 | 123 | |
emilmont | 2:e9a661555b58 | 124 | This function reverses the byte order in a signed short value with sign extension to integer. |
emilmont | 2:e9a661555b58 | 125 | |
emilmont | 2:e9a661555b58 | 126 | \param [in] value Value to reverse |
emilmont | 2:e9a661555b58 | 127 | \return Reversed value |
emilmont | 2:e9a661555b58 | 128 | */ |
emilmont | 2:e9a661555b58 | 129 | #ifndef __NO_EMBEDDED_ASM |
emilmont | 2:e9a661555b58 | 130 | __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value) |
emilmont | 2:e9a661555b58 | 131 | { |
emilmont | 2:e9a661555b58 | 132 | revsh r0, r0 |
emilmont | 2:e9a661555b58 | 133 | bx lr |
emilmont | 2:e9a661555b58 | 134 | } |
emilmont | 2:e9a661555b58 | 135 | #endif |
emilmont | 2:e9a661555b58 | 136 | |
emilmont | 2:e9a661555b58 | 137 | |
emilmont | 2:e9a661555b58 | 138 | /** \brief Rotate Right in unsigned value (32 bit) |
emilmont | 2:e9a661555b58 | 139 | |
emilmont | 2:e9a661555b58 | 140 | This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. |
emilmont | 2:e9a661555b58 | 141 | |
emilmont | 2:e9a661555b58 | 142 | \param [in] value Value to rotate |
emilmont | 2:e9a661555b58 | 143 | \param [in] value Number of Bits to rotate |
emilmont | 2:e9a661555b58 | 144 | \return Rotated value |
emilmont | 2:e9a661555b58 | 145 | */ |
emilmont | 2:e9a661555b58 | 146 | #define __ROR __ror |
emilmont | 2:e9a661555b58 | 147 | |
emilmont | 2:e9a661555b58 | 148 | |
emilmont | 9:663789d7729f | 149 | /** \brief Breakpoint |
emilmont | 9:663789d7729f | 150 | |
emilmont | 9:663789d7729f | 151 | This function causes the processor to enter Debug state. |
emilmont | 9:663789d7729f | 152 | Debug tools can use this to investigate system state when the instruction at a particular address is reached. |
emilmont | 9:663789d7729f | 153 | |
emilmont | 9:663789d7729f | 154 | \param [in] value is ignored by the processor. |
emilmont | 9:663789d7729f | 155 | If required, a debugger can use it to store additional information about the breakpoint. |
emilmont | 9:663789d7729f | 156 | */ |
emilmont | 9:663789d7729f | 157 | #define __BKPT(value) __breakpoint(value) |
emilmont | 9:663789d7729f | 158 | |
emilmont | 9:663789d7729f | 159 | |
emilmont | 2:e9a661555b58 | 160 | #if (__CORTEX_M >= 0x03) |
emilmont | 2:e9a661555b58 | 161 | |
emilmont | 2:e9a661555b58 | 162 | /** \brief Reverse bit order of value |
emilmont | 2:e9a661555b58 | 163 | |
emilmont | 2:e9a661555b58 | 164 | This function reverses the bit order of the given value. |
emilmont | 2:e9a661555b58 | 165 | |
emilmont | 2:e9a661555b58 | 166 | \param [in] value Value to reverse |
emilmont | 2:e9a661555b58 | 167 | \return Reversed value |
emilmont | 2:e9a661555b58 | 168 | */ |
emilmont | 2:e9a661555b58 | 169 | #define __RBIT __rbit |
emilmont | 2:e9a661555b58 | 170 | |
emilmont | 2:e9a661555b58 | 171 | |
emilmont | 2:e9a661555b58 | 172 | /** \brief LDR Exclusive (8 bit) |
emilmont | 2:e9a661555b58 | 173 | |
emilmont | 2:e9a661555b58 | 174 | This function performs a exclusive LDR command for 8 bit value. |
emilmont | 2:e9a661555b58 | 175 | |
emilmont | 2:e9a661555b58 | 176 | \param [in] ptr Pointer to data |
emilmont | 2:e9a661555b58 | 177 | \return value of type uint8_t at (*ptr) |
emilmont | 2:e9a661555b58 | 178 | */ |
emilmont | 2:e9a661555b58 | 179 | #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) |
emilmont | 2:e9a661555b58 | 180 | |
emilmont | 2:e9a661555b58 | 181 | |
emilmont | 2:e9a661555b58 | 182 | /** \brief LDR Exclusive (16 bit) |
emilmont | 2:e9a661555b58 | 183 | |
emilmont | 2:e9a661555b58 | 184 | This function performs a exclusive LDR command for 16 bit values. |
emilmont | 2:e9a661555b58 | 185 | |
emilmont | 2:e9a661555b58 | 186 | \param [in] ptr Pointer to data |
emilmont | 2:e9a661555b58 | 187 | \return value of type uint16_t at (*ptr) |
emilmont | 2:e9a661555b58 | 188 | */ |
emilmont | 2:e9a661555b58 | 189 | #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) |
emilmont | 2:e9a661555b58 | 190 | |
emilmont | 2:e9a661555b58 | 191 | |
emilmont | 2:e9a661555b58 | 192 | /** \brief LDR Exclusive (32 bit) |
emilmont | 2:e9a661555b58 | 193 | |
emilmont | 2:e9a661555b58 | 194 | This function performs a exclusive LDR command for 32 bit values. |
emilmont | 2:e9a661555b58 | 195 | |
emilmont | 2:e9a661555b58 | 196 | \param [in] ptr Pointer to data |
emilmont | 2:e9a661555b58 | 197 | \return value of type uint32_t at (*ptr) |
emilmont | 2:e9a661555b58 | 198 | */ |
emilmont | 2:e9a661555b58 | 199 | #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) |
emilmont | 2:e9a661555b58 | 200 | |
emilmont | 2:e9a661555b58 | 201 | |
emilmont | 2:e9a661555b58 | 202 | /** \brief STR Exclusive (8 bit) |
emilmont | 2:e9a661555b58 | 203 | |
emilmont | 2:e9a661555b58 | 204 | This function performs a exclusive STR command for 8 bit values. |
emilmont | 2:e9a661555b58 | 205 | |
emilmont | 2:e9a661555b58 | 206 | \param [in] value Value to store |
emilmont | 2:e9a661555b58 | 207 | \param [in] ptr Pointer to location |
emilmont | 2:e9a661555b58 | 208 | \return 0 Function succeeded |
emilmont | 2:e9a661555b58 | 209 | \return 1 Function failed |
emilmont | 2:e9a661555b58 | 210 | */ |
emilmont | 2:e9a661555b58 | 211 | #define __STREXB(value, ptr) __strex(value, ptr) |
emilmont | 2:e9a661555b58 | 212 | |
emilmont | 2:e9a661555b58 | 213 | |
emilmont | 2:e9a661555b58 | 214 | /** \brief STR Exclusive (16 bit) |
emilmont | 2:e9a661555b58 | 215 | |
emilmont | 2:e9a661555b58 | 216 | This function performs a exclusive STR command for 16 bit values. |
emilmont | 2:e9a661555b58 | 217 | |
emilmont | 2:e9a661555b58 | 218 | \param [in] value Value to store |
emilmont | 2:e9a661555b58 | 219 | \param [in] ptr Pointer to location |
emilmont | 2:e9a661555b58 | 220 | \return 0 Function succeeded |
emilmont | 2:e9a661555b58 | 221 | \return 1 Function failed |
emilmont | 2:e9a661555b58 | 222 | */ |
emilmont | 2:e9a661555b58 | 223 | #define __STREXH(value, ptr) __strex(value, ptr) |
emilmont | 2:e9a661555b58 | 224 | |
emilmont | 2:e9a661555b58 | 225 | |
emilmont | 2:e9a661555b58 | 226 | /** \brief STR Exclusive (32 bit) |
emilmont | 2:e9a661555b58 | 227 | |
emilmont | 2:e9a661555b58 | 228 | This function performs a exclusive STR command for 32 bit values. |
emilmont | 2:e9a661555b58 | 229 | |
emilmont | 2:e9a661555b58 | 230 | \param [in] value Value to store |
emilmont | 2:e9a661555b58 | 231 | \param [in] ptr Pointer to location |
emilmont | 2:e9a661555b58 | 232 | \return 0 Function succeeded |
emilmont | 2:e9a661555b58 | 233 | \return 1 Function failed |
emilmont | 2:e9a661555b58 | 234 | */ |
emilmont | 2:e9a661555b58 | 235 | #define __STREXW(value, ptr) __strex(value, ptr) |
emilmont | 2:e9a661555b58 | 236 | |
emilmont | 2:e9a661555b58 | 237 | |
emilmont | 2:e9a661555b58 | 238 | /** \brief Remove the exclusive lock |
emilmont | 2:e9a661555b58 | 239 | |
emilmont | 2:e9a661555b58 | 240 | This function removes the exclusive lock which is created by LDREX. |
emilmont | 2:e9a661555b58 | 241 | |
emilmont | 2:e9a661555b58 | 242 | */ |
emilmont | 2:e9a661555b58 | 243 | #define __CLREX __clrex |
emilmont | 2:e9a661555b58 | 244 | |
emilmont | 2:e9a661555b58 | 245 | |
emilmont | 2:e9a661555b58 | 246 | /** \brief Signed Saturate |
emilmont | 2:e9a661555b58 | 247 | |
emilmont | 2:e9a661555b58 | 248 | This function saturates a signed value. |
emilmont | 2:e9a661555b58 | 249 | |
emilmont | 2:e9a661555b58 | 250 | \param [in] value Value to be saturated |
emilmont | 2:e9a661555b58 | 251 | \param [in] sat Bit position to saturate to (1..32) |
emilmont | 2:e9a661555b58 | 252 | \return Saturated value |
emilmont | 2:e9a661555b58 | 253 | */ |
emilmont | 2:e9a661555b58 | 254 | #define __SSAT __ssat |
emilmont | 2:e9a661555b58 | 255 | |
emilmont | 2:e9a661555b58 | 256 | |
emilmont | 2:e9a661555b58 | 257 | /** \brief Unsigned Saturate |
emilmont | 2:e9a661555b58 | 258 | |
emilmont | 2:e9a661555b58 | 259 | This function saturates an unsigned value. |
emilmont | 2:e9a661555b58 | 260 | |
emilmont | 2:e9a661555b58 | 261 | \param [in] value Value to be saturated |
emilmont | 2:e9a661555b58 | 262 | \param [in] sat Bit position to saturate to (0..31) |
emilmont | 2:e9a661555b58 | 263 | \return Saturated value |
emilmont | 2:e9a661555b58 | 264 | */ |
emilmont | 2:e9a661555b58 | 265 | #define __USAT __usat |
emilmont | 2:e9a661555b58 | 266 | |
emilmont | 2:e9a661555b58 | 267 | |
emilmont | 2:e9a661555b58 | 268 | /** \brief Count leading zeros |
emilmont | 2:e9a661555b58 | 269 | |
emilmont | 2:e9a661555b58 | 270 | This function counts the number of leading zeros of a data value. |
emilmont | 2:e9a661555b58 | 271 | |
emilmont | 2:e9a661555b58 | 272 | \param [in] value Value to count the leading zeros |
emilmont | 2:e9a661555b58 | 273 | \return number of leading zeros in value |
emilmont | 2:e9a661555b58 | 274 | */ |
emilmont | 2:e9a661555b58 | 275 | #define __CLZ __clz |
emilmont | 2:e9a661555b58 | 276 | |
emilmont | 2:e9a661555b58 | 277 | #endif /* (__CORTEX_M >= 0x03) */ |
emilmont | 2:e9a661555b58 | 278 | |
emilmont | 2:e9a661555b58 | 279 | |
emilmont | 2:e9a661555b58 | 280 | |
emilmont | 2:e9a661555b58 | 281 | #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/ |
emilmont | 2:e9a661555b58 | 282 | /* IAR iccarm specific functions */ |
emilmont | 2:e9a661555b58 | 283 | |
emilmont | 2:e9a661555b58 | 284 | #include <cmsis_iar.h> |
emilmont | 2:e9a661555b58 | 285 | |
emilmont | 2:e9a661555b58 | 286 | |
emilmont | 2:e9a661555b58 | 287 | #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/ |
emilmont | 2:e9a661555b58 | 288 | /* TI CCS specific functions */ |
emilmont | 2:e9a661555b58 | 289 | |
emilmont | 2:e9a661555b58 | 290 | #include <cmsis_ccs.h> |
emilmont | 2:e9a661555b58 | 291 | |
emilmont | 2:e9a661555b58 | 292 | |
emilmont | 2:e9a661555b58 | 293 | #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/ |
emilmont | 2:e9a661555b58 | 294 | /* GNU gcc specific functions */ |
emilmont | 2:e9a661555b58 | 295 | |
emilmont | 2:e9a661555b58 | 296 | /** \brief No Operation |
emilmont | 2:e9a661555b58 | 297 | |
emilmont | 2:e9a661555b58 | 298 | No Operation does nothing. This instruction can be used for code alignment purposes. |
emilmont | 2:e9a661555b58 | 299 | */ |
emilmont | 2:e9a661555b58 | 300 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void) |
emilmont | 2:e9a661555b58 | 301 | { |
emilmont | 2:e9a661555b58 | 302 | __ASM volatile ("nop"); |
emilmont | 2:e9a661555b58 | 303 | } |
emilmont | 2:e9a661555b58 | 304 | |
emilmont | 2:e9a661555b58 | 305 | |
emilmont | 2:e9a661555b58 | 306 | /** \brief Wait For Interrupt |
emilmont | 2:e9a661555b58 | 307 | |
emilmont | 2:e9a661555b58 | 308 | Wait For Interrupt is a hint instruction that suspends execution |
emilmont | 2:e9a661555b58 | 309 | until one of a number of events occurs. |
emilmont | 2:e9a661555b58 | 310 | */ |
emilmont | 2:e9a661555b58 | 311 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void) |
emilmont | 2:e9a661555b58 | 312 | { |
emilmont | 2:e9a661555b58 | 313 | __ASM volatile ("wfi"); |
emilmont | 2:e9a661555b58 | 314 | } |
emilmont | 2:e9a661555b58 | 315 | |
emilmont | 2:e9a661555b58 | 316 | |
emilmont | 2:e9a661555b58 | 317 | /** \brief Wait For Event |
emilmont | 2:e9a661555b58 | 318 | |
emilmont | 2:e9a661555b58 | 319 | Wait For Event is a hint instruction that permits the processor to enter |
emilmont | 2:e9a661555b58 | 320 | a low-power state until one of a number of events occurs. |
emilmont | 2:e9a661555b58 | 321 | */ |
emilmont | 2:e9a661555b58 | 322 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void) |
emilmont | 2:e9a661555b58 | 323 | { |
emilmont | 2:e9a661555b58 | 324 | __ASM volatile ("wfe"); |
emilmont | 2:e9a661555b58 | 325 | } |
emilmont | 2:e9a661555b58 | 326 | |
emilmont | 2:e9a661555b58 | 327 | |
emilmont | 2:e9a661555b58 | 328 | /** \brief Send Event |
emilmont | 2:e9a661555b58 | 329 | |
emilmont | 2:e9a661555b58 | 330 | Send Event is a hint instruction. It causes an event to be signaled to the CPU. |
emilmont | 2:e9a661555b58 | 331 | */ |
emilmont | 2:e9a661555b58 | 332 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void) |
emilmont | 2:e9a661555b58 | 333 | { |
emilmont | 2:e9a661555b58 | 334 | __ASM volatile ("sev"); |
emilmont | 2:e9a661555b58 | 335 | } |
emilmont | 2:e9a661555b58 | 336 | |
emilmont | 2:e9a661555b58 | 337 | |
emilmont | 2:e9a661555b58 | 338 | /** \brief Instruction Synchronization Barrier |
emilmont | 2:e9a661555b58 | 339 | |
emilmont | 2:e9a661555b58 | 340 | Instruction Synchronization Barrier flushes the pipeline in the processor, |
emilmont | 2:e9a661555b58 | 341 | so that all instructions following the ISB are fetched from cache or |
emilmont | 2:e9a661555b58 | 342 | memory, after the instruction has been completed. |
emilmont | 2:e9a661555b58 | 343 | */ |
emilmont | 2:e9a661555b58 | 344 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void) |
emilmont | 2:e9a661555b58 | 345 | { |
emilmont | 2:e9a661555b58 | 346 | __ASM volatile ("isb"); |
emilmont | 2:e9a661555b58 | 347 | } |
emilmont | 2:e9a661555b58 | 348 | |
emilmont | 2:e9a661555b58 | 349 | |
emilmont | 2:e9a661555b58 | 350 | /** \brief Data Synchronization Barrier |
emilmont | 2:e9a661555b58 | 351 | |
emilmont | 2:e9a661555b58 | 352 | This function acts as a special kind of Data Memory Barrier. |
emilmont | 2:e9a661555b58 | 353 | It completes when all explicit memory accesses before this instruction complete. |
emilmont | 2:e9a661555b58 | 354 | */ |
emilmont | 2:e9a661555b58 | 355 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void) |
emilmont | 2:e9a661555b58 | 356 | { |
emilmont | 2:e9a661555b58 | 357 | __ASM volatile ("dsb"); |
emilmont | 2:e9a661555b58 | 358 | } |
emilmont | 2:e9a661555b58 | 359 | |
emilmont | 2:e9a661555b58 | 360 | |
emilmont | 2:e9a661555b58 | 361 | /** \brief Data Memory Barrier |
emilmont | 2:e9a661555b58 | 362 | |
emilmont | 2:e9a661555b58 | 363 | This function ensures the apparent order of the explicit memory operations before |
emilmont | 2:e9a661555b58 | 364 | and after the instruction, without ensuring their completion. |
emilmont | 2:e9a661555b58 | 365 | */ |
emilmont | 2:e9a661555b58 | 366 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void) |
emilmont | 2:e9a661555b58 | 367 | { |
emilmont | 2:e9a661555b58 | 368 | __ASM volatile ("dmb"); |
emilmont | 2:e9a661555b58 | 369 | } |
emilmont | 2:e9a661555b58 | 370 | |
emilmont | 2:e9a661555b58 | 371 | |
emilmont | 2:e9a661555b58 | 372 | /** \brief Reverse byte order (32 bit) |
emilmont | 2:e9a661555b58 | 373 | |
emilmont | 2:e9a661555b58 | 374 | This function reverses the byte order in integer value. |
emilmont | 2:e9a661555b58 | 375 | |
emilmont | 2:e9a661555b58 | 376 | \param [in] value Value to reverse |
emilmont | 2:e9a661555b58 | 377 | \return Reversed value |
emilmont | 2:e9a661555b58 | 378 | */ |
emilmont | 2:e9a661555b58 | 379 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value) |
emilmont | 2:e9a661555b58 | 380 | { |
emilmont | 2:e9a661555b58 | 381 | uint32_t result; |
emilmont | 2:e9a661555b58 | 382 | |
emilmont | 2:e9a661555b58 | 383 | __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); |
emilmont | 2:e9a661555b58 | 384 | return(result); |
emilmont | 2:e9a661555b58 | 385 | } |
emilmont | 2:e9a661555b58 | 386 | |
emilmont | 2:e9a661555b58 | 387 | |
emilmont | 2:e9a661555b58 | 388 | /** \brief Reverse byte order (16 bit) |
emilmont | 2:e9a661555b58 | 389 | |
emilmont | 2:e9a661555b58 | 390 | This function reverses the byte order in two unsigned short values. |
emilmont | 2:e9a661555b58 | 391 | |
emilmont | 2:e9a661555b58 | 392 | \param [in] value Value to reverse |
emilmont | 2:e9a661555b58 | 393 | \return Reversed value |
emilmont | 2:e9a661555b58 | 394 | */ |
emilmont | 2:e9a661555b58 | 395 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value) |
emilmont | 2:e9a661555b58 | 396 | { |
emilmont | 2:e9a661555b58 | 397 | uint32_t result; |
emilmont | 2:e9a661555b58 | 398 | |
emilmont | 2:e9a661555b58 | 399 | __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); |
emilmont | 2:e9a661555b58 | 400 | return(result); |
emilmont | 2:e9a661555b58 | 401 | } |
emilmont | 2:e9a661555b58 | 402 | |
emilmont | 2:e9a661555b58 | 403 | |
emilmont | 2:e9a661555b58 | 404 | /** \brief Reverse byte order in signed short value |
emilmont | 2:e9a661555b58 | 405 | |
emilmont | 2:e9a661555b58 | 406 | This function reverses the byte order in a signed short value with sign extension to integer. |
emilmont | 2:e9a661555b58 | 407 | |
emilmont | 2:e9a661555b58 | 408 | \param [in] value Value to reverse |
emilmont | 2:e9a661555b58 | 409 | \return Reversed value |
emilmont | 2:e9a661555b58 | 410 | */ |
emilmont | 2:e9a661555b58 | 411 | __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value) |
emilmont | 2:e9a661555b58 | 412 | { |
emilmont | 2:e9a661555b58 | 413 | uint32_t result; |
emilmont | 2:e9a661555b58 | 414 | |
emilmont | 2:e9a661555b58 | 415 | __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); |
emilmont | 2:e9a661555b58 | 416 | return(result); |
emilmont | 2:e9a661555b58 | 417 | } |
emilmont | 2:e9a661555b58 | 418 | |
emilmont | 2:e9a661555b58 | 419 | |
emilmont | 2:e9a661555b58 | 420 | /** \brief Rotate Right in unsigned value (32 bit) |
emilmont | 2:e9a661555b58 | 421 | |
emilmont | 2:e9a661555b58 | 422 | This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. |
emilmont | 2:e9a661555b58 | 423 | |
emilmont | 2:e9a661555b58 | 424 | \param [in] value Value to rotate |
emilmont | 2:e9a661555b58 | 425 | \param [in] value Number of Bits to rotate |
emilmont | 2:e9a661555b58 | 426 | \return Rotated value |
emilmont | 2:e9a661555b58 | 427 | */ |
emilmont | 2:e9a661555b58 | 428 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) |
emilmont | 2:e9a661555b58 | 429 | { |
emilmont | 2:e9a661555b58 | 430 | |
emilmont | 2:e9a661555b58 | 431 | __ASM volatile ("ror %0, %0, %1" : "+r" (op1) : "r" (op2) ); |
emilmont | 2:e9a661555b58 | 432 | return(op1); |
emilmont | 2:e9a661555b58 | 433 | } |
emilmont | 2:e9a661555b58 | 434 | |
emilmont | 2:e9a661555b58 | 435 | |
emilmont | 9:663789d7729f | 436 | /** \brief Breakpoint |
emilmont | 9:663789d7729f | 437 | |
emilmont | 9:663789d7729f | 438 | This function causes the processor to enter Debug state. |
emilmont | 9:663789d7729f | 439 | Debug tools can use this to investigate system state when the instruction at a particular address is reached. |
emilmont | 9:663789d7729f | 440 | |
emilmont | 9:663789d7729f | 441 | \param [in] value is ignored by the processor. |
emilmont | 9:663789d7729f | 442 | If required, a debugger can use it to store additional information about the breakpoint. |
emilmont | 9:663789d7729f | 443 | */ |
emilmont | 9:663789d7729f | 444 | #define __BKPT(value) __ASM volatile ("bkpt "#value) |
emilmont | 9:663789d7729f | 445 | |
emilmont | 9:663789d7729f | 446 | |
emilmont | 2:e9a661555b58 | 447 | #if (__CORTEX_M >= 0x03) |
emilmont | 2:e9a661555b58 | 448 | |
emilmont | 2:e9a661555b58 | 449 | /** \brief Reverse bit order of value |
emilmont | 2:e9a661555b58 | 450 | |
emilmont | 2:e9a661555b58 | 451 | This function reverses the bit order of the given value. |
emilmont | 2:e9a661555b58 | 452 | |
emilmont | 2:e9a661555b58 | 453 | \param [in] value Value to reverse |
emilmont | 2:e9a661555b58 | 454 | \return Reversed value |
emilmont | 2:e9a661555b58 | 455 | */ |
emilmont | 2:e9a661555b58 | 456 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value) |
emilmont | 2:e9a661555b58 | 457 | { |
emilmont | 2:e9a661555b58 | 458 | uint32_t result; |
emilmont | 2:e9a661555b58 | 459 | |
emilmont | 2:e9a661555b58 | 460 | __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); |
emilmont | 2:e9a661555b58 | 461 | return(result); |
emilmont | 2:e9a661555b58 | 462 | } |
emilmont | 2:e9a661555b58 | 463 | |
emilmont | 2:e9a661555b58 | 464 | |
emilmont | 2:e9a661555b58 | 465 | /** \brief LDR Exclusive (8 bit) |
emilmont | 2:e9a661555b58 | 466 | |
emilmont | 2:e9a661555b58 | 467 | This function performs a exclusive LDR command for 8 bit value. |
emilmont | 2:e9a661555b58 | 468 | |
emilmont | 2:e9a661555b58 | 469 | \param [in] ptr Pointer to data |
emilmont | 2:e9a661555b58 | 470 | \return value of type uint8_t at (*ptr) |
emilmont | 2:e9a661555b58 | 471 | */ |
emilmont | 2:e9a661555b58 | 472 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr) |
emilmont | 2:e9a661555b58 | 473 | { |
emilmont | 2:e9a661555b58 | 474 | uint8_t result; |
emilmont | 2:e9a661555b58 | 475 | |
emilmont | 2:e9a661555b58 | 476 | __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); |
emilmont | 2:e9a661555b58 | 477 | return(result); |
emilmont | 2:e9a661555b58 | 478 | } |
emilmont | 2:e9a661555b58 | 479 | |
emilmont | 2:e9a661555b58 | 480 | |
emilmont | 2:e9a661555b58 | 481 | /** \brief LDR Exclusive (16 bit) |
emilmont | 2:e9a661555b58 | 482 | |
emilmont | 2:e9a661555b58 | 483 | This function performs a exclusive LDR command for 16 bit values. |
emilmont | 2:e9a661555b58 | 484 | |
emilmont | 2:e9a661555b58 | 485 | \param [in] ptr Pointer to data |
emilmont | 2:e9a661555b58 | 486 | \return value of type uint16_t at (*ptr) |
emilmont | 2:e9a661555b58 | 487 | */ |
emilmont | 2:e9a661555b58 | 488 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr) |
emilmont | 2:e9a661555b58 | 489 | { |
emilmont | 2:e9a661555b58 | 490 | uint16_t result; |
emilmont | 2:e9a661555b58 | 491 | |
emilmont | 2:e9a661555b58 | 492 | __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); |
emilmont | 2:e9a661555b58 | 493 | return(result); |
emilmont | 2:e9a661555b58 | 494 | } |
emilmont | 2:e9a661555b58 | 495 | |
emilmont | 2:e9a661555b58 | 496 | |
emilmont | 2:e9a661555b58 | 497 | /** \brief LDR Exclusive (32 bit) |
emilmont | 2:e9a661555b58 | 498 | |
emilmont | 2:e9a661555b58 | 499 | This function performs a exclusive LDR command for 32 bit values. |
emilmont | 2:e9a661555b58 | 500 | |
emilmont | 2:e9a661555b58 | 501 | \param [in] ptr Pointer to data |
emilmont | 2:e9a661555b58 | 502 | \return value of type uint32_t at (*ptr) |
emilmont | 2:e9a661555b58 | 503 | */ |
emilmont | 2:e9a661555b58 | 504 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr) |
emilmont | 2:e9a661555b58 | 505 | { |
emilmont | 2:e9a661555b58 | 506 | uint32_t result; |
emilmont | 2:e9a661555b58 | 507 | |
emilmont | 2:e9a661555b58 | 508 | __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); |
emilmont | 2:e9a661555b58 | 509 | return(result); |
emilmont | 2:e9a661555b58 | 510 | } |
emilmont | 2:e9a661555b58 | 511 | |
emilmont | 2:e9a661555b58 | 512 | |
emilmont | 2:e9a661555b58 | 513 | /** \brief STR Exclusive (8 bit) |
emilmont | 2:e9a661555b58 | 514 | |
emilmont | 2:e9a661555b58 | 515 | This function performs a exclusive STR command for 8 bit values. |
emilmont | 2:e9a661555b58 | 516 | |
emilmont | 2:e9a661555b58 | 517 | \param [in] value Value to store |
emilmont | 2:e9a661555b58 | 518 | \param [in] ptr Pointer to location |
emilmont | 2:e9a661555b58 | 519 | \return 0 Function succeeded |
emilmont | 2:e9a661555b58 | 520 | \return 1 Function failed |
emilmont | 2:e9a661555b58 | 521 | */ |
emilmont | 2:e9a661555b58 | 522 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) |
emilmont | 2:e9a661555b58 | 523 | { |
emilmont | 2:e9a661555b58 | 524 | uint32_t result; |
emilmont | 2:e9a661555b58 | 525 | |
emilmont | 2:e9a661555b58 | 526 | __ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) ); |
emilmont | 2:e9a661555b58 | 527 | return(result); |
emilmont | 2:e9a661555b58 | 528 | } |
emilmont | 2:e9a661555b58 | 529 | |
emilmont | 2:e9a661555b58 | 530 | |
emilmont | 2:e9a661555b58 | 531 | /** \brief STR Exclusive (16 bit) |
emilmont | 2:e9a661555b58 | 532 | |
emilmont | 2:e9a661555b58 | 533 | This function performs a exclusive STR command for 16 bit values. |
emilmont | 2:e9a661555b58 | 534 | |
emilmont | 2:e9a661555b58 | 535 | \param [in] value Value to store |
emilmont | 2:e9a661555b58 | 536 | \param [in] ptr Pointer to location |
emilmont | 2:e9a661555b58 | 537 | \return 0 Function succeeded |
emilmont | 2:e9a661555b58 | 538 | \return 1 Function failed |
emilmont | 2:e9a661555b58 | 539 | */ |
emilmont | 2:e9a661555b58 | 540 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) |
emilmont | 2:e9a661555b58 | 541 | { |
emilmont | 2:e9a661555b58 | 542 | uint32_t result; |
emilmont | 2:e9a661555b58 | 543 | |
emilmont | 2:e9a661555b58 | 544 | __ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) ); |
emilmont | 2:e9a661555b58 | 545 | return(result); |
emilmont | 2:e9a661555b58 | 546 | } |
emilmont | 2:e9a661555b58 | 547 | |
emilmont | 2:e9a661555b58 | 548 | |
emilmont | 2:e9a661555b58 | 549 | /** \brief STR Exclusive (32 bit) |
emilmont | 2:e9a661555b58 | 550 | |
emilmont | 2:e9a661555b58 | 551 | This function performs a exclusive STR command for 32 bit values. |
emilmont | 2:e9a661555b58 | 552 | |
emilmont | 2:e9a661555b58 | 553 | \param [in] value Value to store |
emilmont | 2:e9a661555b58 | 554 | \param [in] ptr Pointer to location |
emilmont | 2:e9a661555b58 | 555 | \return 0 Function succeeded |
emilmont | 2:e9a661555b58 | 556 | \return 1 Function failed |
emilmont | 2:e9a661555b58 | 557 | */ |
emilmont | 2:e9a661555b58 | 558 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) |
emilmont | 2:e9a661555b58 | 559 | { |
emilmont | 2:e9a661555b58 | 560 | uint32_t result; |
emilmont | 2:e9a661555b58 | 561 | |
emilmont | 2:e9a661555b58 | 562 | __ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) ); |
emilmont | 2:e9a661555b58 | 563 | return(result); |
emilmont | 2:e9a661555b58 | 564 | } |
emilmont | 2:e9a661555b58 | 565 | |
emilmont | 2:e9a661555b58 | 566 | |
emilmont | 2:e9a661555b58 | 567 | /** \brief Remove the exclusive lock |
emilmont | 2:e9a661555b58 | 568 | |
emilmont | 2:e9a661555b58 | 569 | This function removes the exclusive lock which is created by LDREX. |
emilmont | 2:e9a661555b58 | 570 | |
emilmont | 2:e9a661555b58 | 571 | */ |
emilmont | 2:e9a661555b58 | 572 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void) |
emilmont | 2:e9a661555b58 | 573 | { |
emilmont | 2:e9a661555b58 | 574 | __ASM volatile ("clrex"); |
emilmont | 2:e9a661555b58 | 575 | } |
emilmont | 2:e9a661555b58 | 576 | |
emilmont | 2:e9a661555b58 | 577 | |
emilmont | 2:e9a661555b58 | 578 | /** \brief Signed Saturate |
emilmont | 2:e9a661555b58 | 579 | |
emilmont | 2:e9a661555b58 | 580 | This function saturates a signed value. |
emilmont | 2:e9a661555b58 | 581 | |
emilmont | 2:e9a661555b58 | 582 | \param [in] value Value to be saturated |
emilmont | 2:e9a661555b58 | 583 | \param [in] sat Bit position to saturate to (1..32) |
emilmont | 2:e9a661555b58 | 584 | \return Saturated value |
emilmont | 2:e9a661555b58 | 585 | */ |
emilmont | 2:e9a661555b58 | 586 | #define __SSAT(ARG1,ARG2) \ |
emilmont | 2:e9a661555b58 | 587 | ({ \ |
emilmont | 2:e9a661555b58 | 588 | uint32_t __RES, __ARG1 = (ARG1); \ |
emilmont | 2:e9a661555b58 | 589 | __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ |
emilmont | 2:e9a661555b58 | 590 | __RES; \ |
emilmont | 2:e9a661555b58 | 591 | }) |
emilmont | 2:e9a661555b58 | 592 | |
emilmont | 2:e9a661555b58 | 593 | |
emilmont | 2:e9a661555b58 | 594 | /** \brief Unsigned Saturate |
emilmont | 2:e9a661555b58 | 595 | |
emilmont | 2:e9a661555b58 | 596 | This function saturates an unsigned value. |
emilmont | 2:e9a661555b58 | 597 | |
emilmont | 2:e9a661555b58 | 598 | \param [in] value Value to be saturated |
emilmont | 2:e9a661555b58 | 599 | \param [in] sat Bit position to saturate to (0..31) |
emilmont | 2:e9a661555b58 | 600 | \return Saturated value |
emilmont | 2:e9a661555b58 | 601 | */ |
emilmont | 2:e9a661555b58 | 602 | #define __USAT(ARG1,ARG2) \ |
emilmont | 2:e9a661555b58 | 603 | ({ \ |
emilmont | 2:e9a661555b58 | 604 | uint32_t __RES, __ARG1 = (ARG1); \ |
emilmont | 2:e9a661555b58 | 605 | __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ |
emilmont | 2:e9a661555b58 | 606 | __RES; \ |
emilmont | 2:e9a661555b58 | 607 | }) |
emilmont | 2:e9a661555b58 | 608 | |
emilmont | 2:e9a661555b58 | 609 | |
emilmont | 2:e9a661555b58 | 610 | /** \brief Count leading zeros |
emilmont | 2:e9a661555b58 | 611 | |
emilmont | 2:e9a661555b58 | 612 | This function counts the number of leading zeros of a data value. |
emilmont | 2:e9a661555b58 | 613 | |
emilmont | 2:e9a661555b58 | 614 | \param [in] value Value to count the leading zeros |
emilmont | 2:e9a661555b58 | 615 | \return number of leading zeros in value |
emilmont | 2:e9a661555b58 | 616 | */ |
emilmont | 2:e9a661555b58 | 617 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value) |
emilmont | 2:e9a661555b58 | 618 | { |
emilmont | 2:e9a661555b58 | 619 | uint8_t result; |
emilmont | 2:e9a661555b58 | 620 | |
emilmont | 2:e9a661555b58 | 621 | __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) ); |
emilmont | 2:e9a661555b58 | 622 | return(result); |
emilmont | 2:e9a661555b58 | 623 | } |
emilmont | 2:e9a661555b58 | 624 | |
emilmont | 2:e9a661555b58 | 625 | #endif /* (__CORTEX_M >= 0x03) */ |
emilmont | 2:e9a661555b58 | 626 | |
emilmont | 2:e9a661555b58 | 627 | |
emilmont | 2:e9a661555b58 | 628 | |
emilmont | 2:e9a661555b58 | 629 | |
emilmont | 2:e9a661555b58 | 630 | #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/ |
emilmont | 2:e9a661555b58 | 631 | /* TASKING carm specific functions */ |
emilmont | 2:e9a661555b58 | 632 | |
emilmont | 2:e9a661555b58 | 633 | /* |
emilmont | 2:e9a661555b58 | 634 | * The CMSIS functions have been implemented as intrinsics in the compiler. |
emilmont | 2:e9a661555b58 | 635 | * Please use "carm -?i" to get an up to date list of all intrinsics, |
emilmont | 2:e9a661555b58 | 636 | * Including the CMSIS ones. |
emilmont | 2:e9a661555b58 | 637 | */ |
emilmont | 2:e9a661555b58 | 638 | |
emilmont | 2:e9a661555b58 | 639 | #endif |
emilmont | 2:e9a661555b58 | 640 | |
emilmont | 2:e9a661555b58 | 641 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ |
emilmont | 2:e9a661555b58 | 642 | |
emilmont | 2:e9a661555b58 | 643 | #endif /* __CORE_CMINSTR_H */ |