Dan Julio / swspi

A very simple software SPI library for the MAX32630FTHR board. It was designed to support the max31865 and RadioHead libraries I ported for my Rocket mbed project.

Dependents:   Rocket

swspi.h@0:8a4db0f083fc, 2017-06-11 (annotated)

Committer:
danjulio
Date:
Sun Jun 11 04:04:19 2017 +0000
Revision:
0:8a4db0f083fc
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
danjulio 0:8a4db0f083fc 1 // Software (bit-banged) SPI Module supporting two CPHA modes and two
danjulio 0:8a4db0f083fc 2 // chip select signals. Yields to allow use by different threads.
danjulio 0:8a4db0f083fc 3 //
danjulio 0:8a4db0f083fc 4
danjulio 0:8a4db0f083fc 5 #ifndef sw_spi_h
danjulio 0:8a4db0f083fc 6 #define sw_spi_h
danjulio 0:8a4db0f083fc 7
danjulio 0:8a4db0f083fc 8 #include "mbed.h"
danjulio 0:8a4db0f083fc 9 #include <stdint.h>
danjulio 0:8a4db0f083fc 10
danjulio 0:8a4db0f083fc 11 // This is the bit in the SPI address that marks it as a write
danjulio 0:8a4db0f083fc 12 #define SPI_WRITE_MASK 0x80
danjulio 0:8a4db0f083fc 13
danjulio 0:8a4db0f083fc 14
danjulio 0:8a4db0f083fc 15 /////////////////////////////////////////////////////////////////////
danjulio 0:8a4db0f083fc 16 /// \class swspi swspi.h <swspi.h>
danjulio 0:8a4db0f083fc 17 /// \brief bit-banged SPI
danjulio 0:8a4db0f083fc 18
danjulio 0:8a4db0f083fc 19 class swspi
danjulio 0:8a4db0f083fc 20 {
danjulio 0:8a4db0f083fc 21 public:
danjulio 0:8a4db0f083fc 22 /// Constructor
danjulio 0:8a4db0f083fc 23 /// \param[in] mosiPin pin number for MOSI
danjulio 0:8a4db0f083fc 24 /// \param[in] misoPin pin number for MISO
danjulio 0:8a4db0f083fc 25 /// \param[in] sckPin pin number for SCK
danjulio 0:8a4db0f083fc 26 /// \param[in] ss1Pin pin number for Slave Select 1
danjulio 0:8a4db0f083fc 27 /// \param[in] ss2Pin pin number for Slave Select 2
danjulio 0:8a4db0f083fc 28 swspi(PinName mosiPin, PinName misoPin, PinName sckPin, PinName ss1Pin, PinName ss2Pin);
danjulio 0:8a4db0f083fc 29
danjulio 0:8a4db0f083fc 30 /// Initialise the Driver transport hardware and software.
danjulio 0:8a4db0f083fc 31 /// Make sure the Driver is properly configured before calling init().
danjulio 0:8a4db0f083fc 32 void init();
danjulio 0:8a4db0f083fc 33
danjulio 0:8a4db0f083fc 34 /// Reads a single register from the SPI device
danjulio 0:8a4db0f083fc 35 /// \param[in] reg Register number
danjulio 0:8a4db0f083fc 36 /// \return The value of the register
danjulio 0:8a4db0f083fc 37 uint8_t spiRead(uint8_t reg, int cpha, int ss);
danjulio 0:8a4db0f083fc 38
danjulio 0:8a4db0f083fc 39 /// Writes a single byte to the SPI device
danjulio 0:8a4db0f083fc 40 /// \param[in] reg Register number
danjulio 0:8a4db0f083fc 41 /// \param[in] val The value to write
danjulio 0:8a4db0f083fc 42 /// \return Some devices return a status byte during the first data transfer. This byte is returned.
danjulio 0:8a4db0f083fc 43 /// it may or may not be meaningfule depending on the the type of device being accessed.
danjulio 0:8a4db0f083fc 44 uint8_t spiWrite(uint8_t reg, uint8_t val, int cpha, int ss);
danjulio 0:8a4db0f083fc 45
danjulio 0:8a4db0f083fc 46 /// Reads a number of consecutive registers from the SPI device using burst read mode
danjulio 0:8a4db0f083fc 47 /// \param[in] reg Register number of the first register
danjulio 0:8a4db0f083fc 48 /// \param[in] dest Array to write the register values to. Must be at least len bytes
danjulio 0:8a4db0f083fc 49 /// \param[in] len Number of bytes to read
danjulio 0:8a4db0f083fc 50 /// \return Some devices return a status byte during the first data transfer. This byte is returned.
danjulio 0:8a4db0f083fc 51 /// it may or may not be meaningfule depending on the the type of device being accessed.
danjulio 0:8a4db0f083fc 52 uint8_t spiBurstRead(uint8_t reg, uint8_t* dest, uint8_t len, int cpha, int ss);
danjulio 0:8a4db0f083fc 53
danjulio 0:8a4db0f083fc 54 /// Write a number of consecutive registers using burst write mode
danjulio 0:8a4db0f083fc 55 /// \param[in] reg Register number of the first register
danjulio 0:8a4db0f083fc 56 /// \param[in] src Array of new register values to write. Must be at least len bytes
danjulio 0:8a4db0f083fc 57 /// \param[in] len Number of bytes to write
danjulio 0:8a4db0f083fc 58 /// \return Some devices return a status byte during the first data transfer. This byte is returned.
danjulio 0:8a4db0f083fc 59 /// it may or may not be meaningfule depending on the the type of device being accessed.
danjulio 0:8a4db0f083fc 60 uint8_t spiBurstWrite(uint8_t reg, const uint8_t* src, uint8_t len, int cpha, int ss);
danjulio 0:8a4db0f083fc 61
danjulio 0:8a4db0f083fc 62 protected:
danjulio 0:8a4db0f083fc 63
danjulio 0:8a4db0f083fc 64 void _setSlaveSelect(int v);
danjulio 0:8a4db0f083fc 65 uint8_t _transfer(uint8_t v);
danjulio 0:8a4db0f083fc 66
danjulio 0:8a4db0f083fc 67 /// Pins
danjulio 0:8a4db0f083fc 68 DigitalOut* mosiP;
danjulio 0:8a4db0f083fc 69 DigitalIn* misoP;
danjulio 0:8a4db0f083fc 70 DigitalOut* sckP;
danjulio 0:8a4db0f083fc 71 DigitalOut* ss1P;
danjulio 0:8a4db0f083fc 72 DigitalOut* ss2P;
danjulio 0:8a4db0f083fc 73
danjulio 0:8a4db0f083fc 74 /// The current transfer data phase
danjulio 0:8a4db0f083fc 75 int _cpha;
danjulio 0:8a4db0f083fc 76
danjulio 0:8a4db0f083fc 77 /// The current transfer slave select
danjulio 0:8a4db0f083fc 78 uint8_t _ss;
danjulio 0:8a4db0f083fc 79
danjulio 0:8a4db0f083fc 80 // Access control
danjulio 0:8a4db0f083fc 81 Mutex _spi_mutex;
danjulio 0:8a4db0f083fc 82 };
danjulio 0:8a4db0f083fc 83
danjulio 0:8a4db0f083fc 84 #endif