A version of the USBMSD_SD library that doesn't try to connect in the constructor. I made this change to support an operation mode where USB MSD can be enabled later in program operation without hanging.

Dependents:   Rocket

Fork of USBMSD_SD by Greg Steiert

Committer:
switches
Date:
Wed Nov 16 18:24:52 2016 +0000
Revision:
3:cce1e689c548
Parent:
2:055119ccf5a7
Child:
4:46888c9d5cd7
Added block count to read and write functions

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samux 2:055119ccf5a7 1 /* mbed Microcontroller Library
samux 2:055119ccf5a7 2 * Copyright (c) 2006-2012 ARM Limited
samux 0:de50a209c5a9 3 *
samux 0:de50a209c5a9 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
samux 0:de50a209c5a9 5 * of this software and associated documentation files (the "Software"), to deal
samux 0:de50a209c5a9 6 * in the Software without restriction, including without limitation the rights
samux 0:de50a209c5a9 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
samux 0:de50a209c5a9 8 * copies of the Software, and to permit persons to whom the Software is
samux 0:de50a209c5a9 9 * furnished to do so, subject to the following conditions:
samux 0:de50a209c5a9 10 *
samux 0:de50a209c5a9 11 * The above copyright notice and this permission notice shall be included in
samux 0:de50a209c5a9 12 * all copies or substantial portions of the Software.
samux 0:de50a209c5a9 13 *
samux 0:de50a209c5a9 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
samux 0:de50a209c5a9 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
samux 0:de50a209c5a9 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
samux 0:de50a209c5a9 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
samux 0:de50a209c5a9 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 2:055119ccf5a7 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
samux 2:055119ccf5a7 20 * SOFTWARE.
samux 0:de50a209c5a9 21 */
samux 0:de50a209c5a9 22 /* Introduction
samux 0:de50a209c5a9 23 * ------------
samux 0:de50a209c5a9 24 * SD and MMC cards support a number of interfaces, but common to them all
samux 0:de50a209c5a9 25 * is one based on SPI. This is the one I'm implmenting because it means
samux 2:055119ccf5a7 26 * it is much more portable even though not so performant, and we already
samux 0:de50a209c5a9 27 * have the mbed SPI Interface!
samux 0:de50a209c5a9 28 *
samux 2:055119ccf5a7 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
samux 0:de50a209c5a9 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
samux 0:de50a209c5a9 31 *
samux 0:de50a209c5a9 32 * SPI Startup
samux 0:de50a209c5a9 33 * -----------
samux 0:de50a209c5a9 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
samux 2:055119ccf5a7 35 * asserting CS low and sending the reset command (CMD0). The card will
samux 0:de50a209c5a9 36 * respond with a (R1) response.
samux 0:de50a209c5a9 37 *
samux 2:055119ccf5a7 38 * CMD8 is optionally sent to determine the voltage range supported, and
samux 2:055119ccf5a7 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
samux 0:de50a209c5a9 40 * version 2.x. I'll just ignore this for now.
samux 0:de50a209c5a9 41 *
samux 0:de50a209c5a9 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
samux 0:de50a209c5a9 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
samux 0:de50a209c5a9 44 *
samux 0:de50a209c5a9 45 * You should also indicate whether the host supports High Capicity cards,
samux 0:de50a209c5a9 46 * and check whether the card is high capacity - i'll also ignore this
samux 0:de50a209c5a9 47 *
samux 0:de50a209c5a9 48 * SPI Protocol
samux 0:de50a209c5a9 49 * ------------
samux 0:de50a209c5a9 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
samux 0:de50a209c5a9 51 * the host starting every bus transaction by asserting the CS signal low. The
samux 0:de50a209c5a9 52 * card always responds to commands, data blocks and errors.
samux 2:055119ccf5a7 53 *
samux 2:055119ccf5a7 54 * The protocol supports a CRC, but by default it is off (except for the
samux 0:de50a209c5a9 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
samux 2:055119ccf5a7 56 * I'll leave the CRC off I think!
samux 2:055119ccf5a7 57 *
samux 2:055119ccf5a7 58 * Standard capacity cards have variable data block sizes, whereas High
samux 0:de50a209c5a9 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
samux 0:de50a209c5a9 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
samux 0:de50a209c5a9 61 * This is set with CMD16.
samux 0:de50a209c5a9 62 *
samux 2:055119ccf5a7 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
samux 0:de50a209c5a9 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
samux 2:055119ccf5a7 65 * the card gets a read command, it responds with a response token, and then
samux 0:de50a209c5a9 66 * a data token or an error.
samux 2:055119ccf5a7 67 *
samux 0:de50a209c5a9 68 * SPI Command Format
samux 0:de50a209c5a9 69 * ------------------
samux 0:de50a209c5a9 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
samux 0:de50a209c5a9 71 *
samux 0:de50a209c5a9 72 * +---------------+------------+------------+-----------+----------+--------------+
samux 0:de50a209c5a9 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
samux 0:de50a209c5a9 74 * +---------------+------------+------------+-----------+----------+--------------+
samux 0:de50a209c5a9 75 *
samux 0:de50a209c5a9 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
samux 0:de50a209c5a9 77 *
samux 0:de50a209c5a9 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
samux 0:de50a209c5a9 79 *
samux 0:de50a209c5a9 80 * SPI Response Format
samux 0:de50a209c5a9 81 * -------------------
samux 0:de50a209c5a9 82 * The main response format (R1) is a status byte (normally zero). Key flags:
samux 2:055119ccf5a7 83 * idle - 1 if the card is in an idle state/initialising
samux 0:de50a209c5a9 84 * cmd - 1 if an illegal command code was detected
samux 0:de50a209c5a9 85 *
samux 0:de50a209c5a9 86 * +-------------------------------------------------+
samux 0:de50a209c5a9 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
samux 0:de50a209c5a9 88 * +-------------------------------------------------+
samux 0:de50a209c5a9 89 *
samux 0:de50a209c5a9 90 * R1b is the same, except it is followed by a busy signal (zeros) until
samux 0:de50a209c5a9 91 * the first non-zero byte when it is ready again.
samux 0:de50a209c5a9 92 *
samux 0:de50a209c5a9 93 * Data Response Token
samux 0:de50a209c5a9 94 * -------------------
samux 2:055119ccf5a7 95 * Every data block written to the card is acknowledged by a byte
samux 0:de50a209c5a9 96 * response token
samux 0:de50a209c5a9 97 *
samux 0:de50a209c5a9 98 * +----------------------+
samux 0:de50a209c5a9 99 * | xxx | 0 | status | 1 |
samux 0:de50a209c5a9 100 * +----------------------+
samux 0:de50a209c5a9 101 * 010 - OK!
samux 0:de50a209c5a9 102 * 101 - CRC Error
samux 0:de50a209c5a9 103 * 110 - Write Error
samux 0:de50a209c5a9 104 *
samux 0:de50a209c5a9 105 * Single Block Read and Write
samux 0:de50a209c5a9 106 * ---------------------------
samux 0:de50a209c5a9 107 *
samux 0:de50a209c5a9 108 * Block transfers have a byte header, followed by the data, followed
samux 0:de50a209c5a9 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
samux 2:055119ccf5a7 110 *
samux 0:de50a209c5a9 111 * +------+---------+---------+- - - -+---------+-----------+----------+
samux 2:055119ccf5a7 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
samux 0:de50a209c5a9 113 * +------+---------+---------+- - - -+---------+-----------+----------+
samux 0:de50a209c5a9 114 */
samux 0:de50a209c5a9 115 #include "USBMSD_SD.h"
samux 2:055119ccf5a7 116 #include "mbed_debug.h"
samux 0:de50a209c5a9 117
samux 0:de50a209c5a9 118 #define SD_COMMAND_TIMEOUT 5000
samux 0:de50a209c5a9 119
samux 2:055119ccf5a7 120 #define SD_DBG 0
samux 2:055119ccf5a7 121
samux 0:de50a209c5a9 122 USBMSD_SD::USBMSD_SD(PinName mosi, PinName miso, PinName sclk, PinName cs) :
samux 2:055119ccf5a7 123 _spi(mosi, miso, sclk), _cs(cs) {
samux 2:055119ccf5a7 124 _cs = 1;
samux 2:055119ccf5a7 125
samux 2:055119ccf5a7 126 //no init
samux 2:055119ccf5a7 127 _status = 0x01;
samux 2:055119ccf5a7 128
samux 2:055119ccf5a7 129 connect();
samux 0:de50a209c5a9 130 }
samux 0:de50a209c5a9 131
samux 0:de50a209c5a9 132 #define R1_IDLE_STATE (1 << 0)
samux 0:de50a209c5a9 133 #define R1_ERASE_RESET (1 << 1)
samux 0:de50a209c5a9 134 #define R1_ILLEGAL_COMMAND (1 << 2)
samux 0:de50a209c5a9 135 #define R1_COM_CRC_ERROR (1 << 3)
samux 0:de50a209c5a9 136 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
samux 0:de50a209c5a9 137 #define R1_ADDRESS_ERROR (1 << 5)
samux 0:de50a209c5a9 138 #define R1_PARAMETER_ERROR (1 << 6)
samux 0:de50a209c5a9 139
samux 0:de50a209c5a9 140 // Types
samux 0:de50a209c5a9 141 // - v1.x Standard Capacity
samux 0:de50a209c5a9 142 // - v2.x Standard Capacity
samux 0:de50a209c5a9 143 // - v2.x High Capacity
samux 0:de50a209c5a9 144 // - Not recognised as an SD Card
samux 0:de50a209c5a9 145 #define SDCARD_FAIL 0
samux 0:de50a209c5a9 146 #define SDCARD_V1 1
samux 0:de50a209c5a9 147 #define SDCARD_V2 2
samux 0:de50a209c5a9 148 #define SDCARD_V2HC 3
samux 0:de50a209c5a9 149
samux 0:de50a209c5a9 150 int USBMSD_SD::initialise_card() {
samux 0:de50a209c5a9 151 // Set to 100kHz for initialisation, and clock card with cs = 1
samux 2:055119ccf5a7 152 _spi.frequency(100000);
samux 0:de50a209c5a9 153 _cs = 1;
samux 2:055119ccf5a7 154 for (int i = 0; i < 16; i++) {
samux 0:de50a209c5a9 155 _spi.write(0xFF);
samux 0:de50a209c5a9 156 }
samux 0:de50a209c5a9 157 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
samux 2:055119ccf5a7 158 if (_cmd(0, 0) != R1_IDLE_STATE) {
samux 2:055119ccf5a7 159 debug("No disk, or could not put SD card in to SPI idle state\n");
samux 0:de50a209c5a9 160 return SDCARD_FAIL;
samux 0:de50a209c5a9 161 }
samux 2:055119ccf5a7 162
samux 0:de50a209c5a9 163 // send CMD8 to determine whther it is ver 2.x
samux 0:de50a209c5a9 164 int r = _cmd8();
samux 2:055119ccf5a7 165 if (r == R1_IDLE_STATE) {
samux 0:de50a209c5a9 166 return initialise_card_v2();
samux 2:055119ccf5a7 167 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
samux 0:de50a209c5a9 168 return initialise_card_v1();
samux 0:de50a209c5a9 169 } else {
samux 2:055119ccf5a7 170 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
samux 0:de50a209c5a9 171 return SDCARD_FAIL;
samux 0:de50a209c5a9 172 }
samux 0:de50a209c5a9 173 }
samux 0:de50a209c5a9 174
samux 0:de50a209c5a9 175 int USBMSD_SD::initialise_card_v1() {
samux 2:055119ccf5a7 176 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
samux 2:055119ccf5a7 177 _cmd(55, 0);
samux 2:055119ccf5a7 178 if (_cmd(41, 0) == 0) {
samux 2:055119ccf5a7 179 cdv = 512;
samux 2:055119ccf5a7 180 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
samux 0:de50a209c5a9 181 return SDCARD_V1;
samux 0:de50a209c5a9 182 }
samux 0:de50a209c5a9 183 }
samux 2:055119ccf5a7 184
samux 2:055119ccf5a7 185 debug("Timeout waiting for v1.x card\n");
samux 0:de50a209c5a9 186 return SDCARD_FAIL;
samux 0:de50a209c5a9 187 }
samux 0:de50a209c5a9 188
samux 0:de50a209c5a9 189 int USBMSD_SD::initialise_card_v2() {
samux 2:055119ccf5a7 190 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
samux 2:055119ccf5a7 191 wait_ms(50);
samux 2:055119ccf5a7 192 _cmd58();
samux 2:055119ccf5a7 193 _cmd(55, 0);
samux 2:055119ccf5a7 194 if (_cmd(41, 0x40000000) == 0) {
samux 0:de50a209c5a9 195 _cmd58();
samux 2:055119ccf5a7 196 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
samux 2:055119ccf5a7 197 cdv = 1;
samux 0:de50a209c5a9 198 return SDCARD_V2;
samux 0:de50a209c5a9 199 }
samux 0:de50a209c5a9 200 }
samux 2:055119ccf5a7 201
samux 2:055119ccf5a7 202 debug("Timeout waiting for v2.x card\n");
samux 0:de50a209c5a9 203 return SDCARD_FAIL;
samux 0:de50a209c5a9 204 }
samux 0:de50a209c5a9 205
samux 0:de50a209c5a9 206 int USBMSD_SD::disk_initialize() {
samux 0:de50a209c5a9 207 int i = initialise_card();
samux 2:055119ccf5a7 208 debug_if(SD_DBG, "init card = %d\n", i);
samux 0:de50a209c5a9 209 _sectors = _sd_sectors();
samux 2:055119ccf5a7 210
samux 0:de50a209c5a9 211 // Set block length to 512 (CMD16)
samux 2:055119ccf5a7 212 if (_cmd(16, 512) != 0) {
samux 2:055119ccf5a7 213 debug("Set 512-byte block timed out\n");
samux 0:de50a209c5a9 214 return 1;
samux 0:de50a209c5a9 215 }
samux 2:055119ccf5a7 216
samux 0:de50a209c5a9 217 _spi.frequency(5000000); // Set to 5MHz for data transfer
samux 2:055119ccf5a7 218
samux 1:923991b026e7 219 // OK
samux 1:923991b026e7 220 _status = 0x00;
samux 2:055119ccf5a7 221
samux 0:de50a209c5a9 222 return 0;
samux 0:de50a209c5a9 223 }
samux 0:de50a209c5a9 224
switches 3:cce1e689c548 225 int USBMSD_SD::disk_write(const uint8_t* buffer, uint64_t block_number, uint8_t count) {
switches 3:cce1e689c548 226 for (uint64_t b = block_number; b < block_number + count; b++) {
switches 3:cce1e689c548 227 // set write address for single block (CMD24)
switches 3:cce1e689c548 228 if (_cmd(24, b * cdv) != 0) {
switches 3:cce1e689c548 229 return 1;
switches 3:cce1e689c548 230 }
switches 3:cce1e689c548 231
switches 3:cce1e689c548 232 // send the data block
switches 3:cce1e689c548 233 _write(buffer, 512);
switches 3:cce1e689c548 234 buffer += 512;
samux 0:de50a209c5a9 235 }
samux 2:055119ccf5a7 236
samux 2:055119ccf5a7 237 return 0;
samux 0:de50a209c5a9 238 }
samux 0:de50a209c5a9 239
switches 3:cce1e689c548 240 int USBMSD_SD::disk_read(uint8_t* buffer, uint64_t block_number, uint8_t count) {
switches 3:cce1e689c548 241 for (uint64_t b = block_number; b < block_number + count; b++) {
switches 3:cce1e689c548 242 // set read address for single block (CMD17)
switches 3:cce1e689c548 243 if (_cmd(17, b * cdv) != 0) {
switches 3:cce1e689c548 244 return 1;
switches 3:cce1e689c548 245 }
switches 3:cce1e689c548 246
switches 3:cce1e689c548 247 // receive the data
switches 3:cce1e689c548 248 _read(buffer, 512);
switches 3:cce1e689c548 249 buffer += 512;
samux 0:de50a209c5a9 250 }
switches 3:cce1e689c548 251
samux 0:de50a209c5a9 252 return 0;
samux 0:de50a209c5a9 253 }
samux 0:de50a209c5a9 254
samux 1:923991b026e7 255 int USBMSD_SD::disk_status() { return _status; }
samux 0:de50a209c5a9 256 int USBMSD_SD::disk_sync() { return 0; }
samux 2:055119ccf5a7 257 uint64_t USBMSD_SD::disk_sectors() { return _sectors; }
samux 2:055119ccf5a7 258
samux 0:de50a209c5a9 259
samux 0:de50a209c5a9 260 // PRIVATE FUNCTIONS
samux 0:de50a209c5a9 261 int USBMSD_SD::_cmd(int cmd, int arg) {
samux 2:055119ccf5a7 262 _cs = 0;
samux 2:055119ccf5a7 263
samux 0:de50a209c5a9 264 // send a command
samux 0:de50a209c5a9 265 _spi.write(0x40 | cmd);
samux 0:de50a209c5a9 266 _spi.write(arg >> 24);
samux 0:de50a209c5a9 267 _spi.write(arg >> 16);
samux 0:de50a209c5a9 268 _spi.write(arg >> 8);
samux 0:de50a209c5a9 269 _spi.write(arg >> 0);
samux 0:de50a209c5a9 270 _spi.write(0x95);
samux 2:055119ccf5a7 271
samux 0:de50a209c5a9 272 // wait for the repsonse (response[7] == 0)
samux 2:055119ccf5a7 273 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
samux 0:de50a209c5a9 274 int response = _spi.write(0xFF);
samux 2:055119ccf5a7 275 if (!(response & 0x80)) {
samux 0:de50a209c5a9 276 _cs = 1;
samux 0:de50a209c5a9 277 _spi.write(0xFF);
samux 0:de50a209c5a9 278 return response;
samux 0:de50a209c5a9 279 }
samux 0:de50a209c5a9 280 }
samux 0:de50a209c5a9 281 _cs = 1;
samux 0:de50a209c5a9 282 _spi.write(0xFF);
samux 0:de50a209c5a9 283 return -1; // timeout
samux 0:de50a209c5a9 284 }
samux 0:de50a209c5a9 285 int USBMSD_SD::_cmdx(int cmd, int arg) {
samux 2:055119ccf5a7 286 _cs = 0;
samux 2:055119ccf5a7 287
samux 0:de50a209c5a9 288 // send a command
samux 0:de50a209c5a9 289 _spi.write(0x40 | cmd);
samux 0:de50a209c5a9 290 _spi.write(arg >> 24);
samux 0:de50a209c5a9 291 _spi.write(arg >> 16);
samux 0:de50a209c5a9 292 _spi.write(arg >> 8);
samux 0:de50a209c5a9 293 _spi.write(arg >> 0);
samux 0:de50a209c5a9 294 _spi.write(0x95);
samux 2:055119ccf5a7 295
samux 0:de50a209c5a9 296 // wait for the repsonse (response[7] == 0)
samux 2:055119ccf5a7 297 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
samux 0:de50a209c5a9 298 int response = _spi.write(0xFF);
samux 2:055119ccf5a7 299 if (!(response & 0x80)) {
samux 0:de50a209c5a9 300 return response;
samux 0:de50a209c5a9 301 }
samux 0:de50a209c5a9 302 }
samux 0:de50a209c5a9 303 _cs = 1;
samux 0:de50a209c5a9 304 _spi.write(0xFF);
samux 0:de50a209c5a9 305 return -1; // timeout
samux 0:de50a209c5a9 306 }
samux 0:de50a209c5a9 307
samux 0:de50a209c5a9 308
samux 0:de50a209c5a9 309 int USBMSD_SD::_cmd58() {
samux 2:055119ccf5a7 310 _cs = 0;
samux 0:de50a209c5a9 311 int arg = 0;
samux 0:de50a209c5a9 312
samux 0:de50a209c5a9 313 // send a command
samux 0:de50a209c5a9 314 _spi.write(0x40 | 58);
samux 0:de50a209c5a9 315 _spi.write(arg >> 24);
samux 0:de50a209c5a9 316 _spi.write(arg >> 16);
samux 0:de50a209c5a9 317 _spi.write(arg >> 8);
samux 0:de50a209c5a9 318 _spi.write(arg >> 0);
samux 0:de50a209c5a9 319 _spi.write(0x95);
samux 2:055119ccf5a7 320
samux 0:de50a209c5a9 321 // wait for the repsonse (response[7] == 0)
samux 2:055119ccf5a7 322 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
samux 0:de50a209c5a9 323 int response = _spi.write(0xFF);
samux 2:055119ccf5a7 324 if (!(response & 0x80)) {
samux 0:de50a209c5a9 325 int ocr = _spi.write(0xFF) << 24;
samux 0:de50a209c5a9 326 ocr |= _spi.write(0xFF) << 16;
samux 0:de50a209c5a9 327 ocr |= _spi.write(0xFF) << 8;
samux 0:de50a209c5a9 328 ocr |= _spi.write(0xFF) << 0;
samux 0:de50a209c5a9 329 _cs = 1;
samux 0:de50a209c5a9 330 _spi.write(0xFF);
samux 0:de50a209c5a9 331 return response;
samux 0:de50a209c5a9 332 }
samux 0:de50a209c5a9 333 }
samux 0:de50a209c5a9 334 _cs = 1;
samux 0:de50a209c5a9 335 _spi.write(0xFF);
samux 0:de50a209c5a9 336 return -1; // timeout
samux 0:de50a209c5a9 337 }
samux 0:de50a209c5a9 338
samux 0:de50a209c5a9 339 int USBMSD_SD::_cmd8() {
samux 2:055119ccf5a7 340 _cs = 0;
samux 0:de50a209c5a9 341
samux 0:de50a209c5a9 342 // send a command
samux 0:de50a209c5a9 343 _spi.write(0x40 | 8); // CMD8
samux 0:de50a209c5a9 344 _spi.write(0x00); // reserved
samux 0:de50a209c5a9 345 _spi.write(0x00); // reserved
samux 0:de50a209c5a9 346 _spi.write(0x01); // 3.3v
samux 0:de50a209c5a9 347 _spi.write(0xAA); // check pattern
samux 0:de50a209c5a9 348 _spi.write(0x87); // crc
samux 2:055119ccf5a7 349
samux 0:de50a209c5a9 350 // wait for the repsonse (response[7] == 0)
samux 2:055119ccf5a7 351 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
samux 0:de50a209c5a9 352 char response[5];
samux 0:de50a209c5a9 353 response[0] = _spi.write(0xFF);
samux 2:055119ccf5a7 354 if (!(response[0] & 0x80)) {
samux 2:055119ccf5a7 355 for (int j = 1; j < 5; j++) {
samux 2:055119ccf5a7 356 response[i] = _spi.write(0xFF);
samux 2:055119ccf5a7 357 }
samux 2:055119ccf5a7 358 _cs = 1;
samux 2:055119ccf5a7 359 _spi.write(0xFF);
samux 2:055119ccf5a7 360 return response[0];
samux 0:de50a209c5a9 361 }
samux 0:de50a209c5a9 362 }
samux 0:de50a209c5a9 363 _cs = 1;
samux 0:de50a209c5a9 364 _spi.write(0xFF);
samux 0:de50a209c5a9 365 return -1; // timeout
samux 0:de50a209c5a9 366 }
samux 0:de50a209c5a9 367
samux 2:055119ccf5a7 368 int USBMSD_SD::_read(uint8_t *buffer, uint32_t length) {
samux 0:de50a209c5a9 369 _cs = 0;
samux 2:055119ccf5a7 370
samux 0:de50a209c5a9 371 // read until start byte (0xFF)
samux 2:055119ccf5a7 372 while (_spi.write(0xFF) != 0xFE);
samux 2:055119ccf5a7 373
samux 0:de50a209c5a9 374 // read data
samux 2:055119ccf5a7 375 for (int i = 0; i < length; i++) {
samux 0:de50a209c5a9 376 buffer[i] = _spi.write(0xFF);
samux 0:de50a209c5a9 377 }
samux 0:de50a209c5a9 378 _spi.write(0xFF); // checksum
samux 0:de50a209c5a9 379 _spi.write(0xFF);
samux 2:055119ccf5a7 380
samux 2:055119ccf5a7 381 _cs = 1;
samux 0:de50a209c5a9 382 _spi.write(0xFF);
samux 0:de50a209c5a9 383 return 0;
samux 0:de50a209c5a9 384 }
samux 0:de50a209c5a9 385
samux 2:055119ccf5a7 386 int USBMSD_SD::_write(const uint8_t*buffer, uint32_t length) {
samux 0:de50a209c5a9 387 _cs = 0;
samux 0:de50a209c5a9 388
samux 0:de50a209c5a9 389 // indicate start of block
samux 0:de50a209c5a9 390 _spi.write(0xFE);
samux 0:de50a209c5a9 391
samux 0:de50a209c5a9 392 // write the data
samux 2:055119ccf5a7 393 for (int i = 0; i < length; i++) {
samux 0:de50a209c5a9 394 _spi.write(buffer[i]);
samux 0:de50a209c5a9 395 }
samux 0:de50a209c5a9 396
samux 0:de50a209c5a9 397 // write the checksum
samux 2:055119ccf5a7 398 _spi.write(0xFF);
samux 0:de50a209c5a9 399 _spi.write(0xFF);
samux 2:055119ccf5a7 400
samux 2:055119ccf5a7 401 // check the response token
samux 2:055119ccf5a7 402 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
samux 0:de50a209c5a9 403 _cs = 1;
samux 2:055119ccf5a7 404 _spi.write(0xFF);
samux 0:de50a209c5a9 405 return 1;
samux 0:de50a209c5a9 406 }
samux 2:055119ccf5a7 407
samux 0:de50a209c5a9 408 // wait for write to finish
samux 2:055119ccf5a7 409 while (_spi.write(0xFF) == 0);
samux 2:055119ccf5a7 410
samux 2:055119ccf5a7 411 _cs = 1;
samux 0:de50a209c5a9 412 _spi.write(0xFF);
samux 0:de50a209c5a9 413 return 0;
samux 0:de50a209c5a9 414 }
samux 0:de50a209c5a9 415
samux 2:055119ccf5a7 416 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
samux 2:055119ccf5a7 417 uint32_t bits = 0;
samux 2:055119ccf5a7 418 uint32_t size = 1 + msb - lsb;
samux 2:055119ccf5a7 419 for (int i = 0; i < size; i++) {
samux 2:055119ccf5a7 420 uint32_t position = lsb + i;
samux 2:055119ccf5a7 421 uint32_t byte = 15 - (position >> 3);
samux 2:055119ccf5a7 422 uint32_t bit = position & 0x7;
samux 2:055119ccf5a7 423 uint32_t value = (data[byte] >> bit) & 1;
samux 0:de50a209c5a9 424 bits |= value << i;
samux 0:de50a209c5a9 425 }
samux 0:de50a209c5a9 426 return bits;
samux 0:de50a209c5a9 427 }
samux 0:de50a209c5a9 428
samux 2:055119ccf5a7 429 uint64_t USBMSD_SD::_sd_sectors() {
samux 2:055119ccf5a7 430 uint32_t c_size, c_size_mult, read_bl_len;
samux 2:055119ccf5a7 431 uint32_t block_len, mult, blocknr, capacity;
samux 2:055119ccf5a7 432 uint32_t hc_c_size;
samux 2:055119ccf5a7 433 uint64_t blocks;
samux 2:055119ccf5a7 434
samux 0:de50a209c5a9 435 // CMD9, Response R2 (R1 byte + 16-byte block read)
samux 2:055119ccf5a7 436 if (_cmdx(9, 0) != 0) {
samux 2:055119ccf5a7 437 debug("Didn't get a response from the disk\n");
samux 0:de50a209c5a9 438 return 0;
samux 0:de50a209c5a9 439 }
samux 0:de50a209c5a9 440
samux 2:055119ccf5a7 441 uint8_t csd[16];
samux 2:055119ccf5a7 442 if (_read(csd, 16) != 0) {
samux 2:055119ccf5a7 443 debug("Couldn't read csd response from disk\n");
samux 0:de50a209c5a9 444 return 0;
samux 0:de50a209c5a9 445 }
samux 2:055119ccf5a7 446
samux 0:de50a209c5a9 447 // csd_structure : csd[127:126]
samux 0:de50a209c5a9 448 // c_size : csd[73:62]
samux 0:de50a209c5a9 449 // c_size_mult : csd[49:47]
samux 0:de50a209c5a9 450 // read_bl_len : csd[83:80] - the *maximum* read block length
samux 2:055119ccf5a7 451
samux 0:de50a209c5a9 452 int csd_structure = ext_bits(csd, 127, 126);
samux 0:de50a209c5a9 453
samux 2:055119ccf5a7 454 switch (csd_structure) {
samux 2:055119ccf5a7 455 case 0:
samux 2:055119ccf5a7 456 cdv = 512;
samux 2:055119ccf5a7 457 c_size = ext_bits(csd, 73, 62);
samux 2:055119ccf5a7 458 c_size_mult = ext_bits(csd, 49, 47);
samux 2:055119ccf5a7 459 read_bl_len = ext_bits(csd, 83, 80);
samux 2:055119ccf5a7 460
samux 2:055119ccf5a7 461 block_len = 1 << read_bl_len;
samux 2:055119ccf5a7 462 mult = 1 << (c_size_mult + 2);
samux 2:055119ccf5a7 463 blocknr = (c_size + 1) * mult;
samux 2:055119ccf5a7 464 capacity = blocknr * block_len;
samux 2:055119ccf5a7 465 blocks = capacity / 512;
samux 2:055119ccf5a7 466 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
samux 2:055119ccf5a7 467 break;
samux 0:de50a209c5a9 468
samux 2:055119ccf5a7 469 case 1:
samux 2:055119ccf5a7 470 cdv = 1;
samux 2:055119ccf5a7 471 hc_c_size = ext_bits(csd, 63, 48);
samux 2:055119ccf5a7 472 blocks = (hc_c_size+1)*1024;
samux 2:055119ccf5a7 473 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
samux 2:055119ccf5a7 474 break;
samux 2:055119ccf5a7 475
samux 2:055119ccf5a7 476 default:
samux 2:055119ccf5a7 477 debug("CSD struct unsupported\r\n");
samux 2:055119ccf5a7 478 return 0;
samux 2:055119ccf5a7 479 };
samux 0:de50a209c5a9 480 return blocks;
samux 0:de50a209c5a9 481 }