UniGraphic-Fork for ST7920-LCD-controller and SH1106. Tested with 128x64 LCD with SPI and 128x64-OLED with IIC
Dependents: UniGraphic-St7920-Test AfficheurUTILECO
Fork of UniGraphic by
Fork of the UniGraphic-Library for monochrome LCDs with ST7920 controller and 128x64-IIC-OLED-Display with SH1106-Controller
Had to adapt LCD for following reasons:
- Give access to screenbuffer buffer[] to parent class
- pixel() and pixel_read() as they are hardware-dependent
- added reset-pin to IIC-Interface
GraphicDisplay:: sends buffer to LCD when auto_update is set to true.
Testprogram for ST7920 can be found here:
https://developer.mbed.org/users/charly/code/UniGraphic-St7920-Test/
Protocols/I2C_bus.h@38:1b6f9fc49a03, 2018-10-30 (annotated)
- Committer:
- charly
- Date:
- Tue Oct 30 20:00:29 2018 +0000
- Revision:
- 38:1b6f9fc49a03
- Parent:
- 36:668396f861d2
some modifications.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
dreschpe | 33:f87f06292637 | 1 | #ifndef I2C_bus_H |
dreschpe | 33:f87f06292637 | 2 | #define I2C_bus_H |
dreschpe | 33:f87f06292637 | 3 | |
dreschpe | 33:f87f06292637 | 4 | #include "mbed.h" |
dreschpe | 33:f87f06292637 | 5 | #include "Protocols.h" |
dreschpe | 33:f87f06292637 | 6 | |
dreschpe | 33:f87f06292637 | 7 | /** I2C interface |
dreschpe | 33:f87f06292637 | 8 | */ |
dreschpe | 33:f87f06292637 | 9 | class I2C_bus : public Protocols |
dreschpe | 33:f87f06292637 | 10 | { |
dreschpe | 33:f87f06292637 | 11 | public: |
dreschpe | 33:f87f06292637 | 12 | |
dreschpe | 33:f87f06292637 | 13 | /** Create an I2C display interface |
dreschpe | 33:f87f06292637 | 14 | * |
dreschpe | 33:f87f06292637 | 15 | * @param I2C frquency |
dreschpe | 33:f87f06292637 | 16 | * @param I2C address |
dreschpe | 33:f87f06292637 | 17 | * @param I2C pin sda |
dreschpe | 33:f87f06292637 | 18 | * @param I2C pin scl |
charly | 36:668396f861d2 | 19 | * @param reset pin connected to RESET of display |
dreschpe | 33:f87f06292637 | 20 | */ |
charly | 36:668396f861d2 | 21 | I2C_bus(int Hz, int address,PinName sda, PinName scl, PinName reset=NC); |
dreschpe | 33:f87f06292637 | 22 | |
dreschpe | 33:f87f06292637 | 23 | protected: |
dreschpe | 33:f87f06292637 | 24 | |
dreschpe | 33:f87f06292637 | 25 | /** Send 8bit command to display controller |
dreschpe | 33:f87f06292637 | 26 | * |
dreschpe | 33:f87f06292637 | 27 | * @param cmd: byte to send |
dreschpe | 33:f87f06292637 | 28 | * |
dreschpe | 33:f87f06292637 | 29 | */ |
dreschpe | 33:f87f06292637 | 30 | virtual void wr_cmd8(unsigned char cmd); |
dreschpe | 33:f87f06292637 | 31 | |
dreschpe | 33:f87f06292637 | 32 | /** Send 8bit data to display controller |
dreschpe | 33:f87f06292637 | 33 | * |
dreschpe | 33:f87f06292637 | 34 | * @param data: byte to send |
dreschpe | 33:f87f06292637 | 35 | * |
dreschpe | 33:f87f06292637 | 36 | */ |
dreschpe | 33:f87f06292637 | 37 | virtual void wr_data8(unsigned char data); |
dreschpe | 33:f87f06292637 | 38 | |
dreschpe | 33:f87f06292637 | 39 | /** Send 2x8bit command to display controller |
dreschpe | 33:f87f06292637 | 40 | * |
dreschpe | 33:f87f06292637 | 41 | * @param cmd: halfword to send |
dreschpe | 33:f87f06292637 | 42 | * @note in SPI_16 mode a single 16bit transfer will be done |
dreschpe | 33:f87f06292637 | 43 | */ |
dreschpe | 33:f87f06292637 | 44 | virtual void wr_cmd16(unsigned short cmd); |
dreschpe | 33:f87f06292637 | 45 | |
dreschpe | 33:f87f06292637 | 46 | /** Send 2x8bit data to display controller |
dreschpe | 33:f87f06292637 | 47 | * |
dreschpe | 33:f87f06292637 | 48 | * @param data: halfword to send |
dreschpe | 33:f87f06292637 | 49 | * @note in SPI_16 mode a single 16bit transfer will be done |
dreschpe | 33:f87f06292637 | 50 | */ |
dreschpe | 33:f87f06292637 | 51 | virtual void wr_data16(unsigned short data); |
dreschpe | 33:f87f06292637 | 52 | |
dreschpe | 33:f87f06292637 | 53 | /** Send 16bit pixeldata to display controller |
dreschpe | 33:f87f06292637 | 54 | * |
dreschpe | 33:f87f06292637 | 55 | * @param data: halfword to send |
dreschpe | 33:f87f06292637 | 56 | * |
dreschpe | 33:f87f06292637 | 57 | */ |
dreschpe | 33:f87f06292637 | 58 | virtual void wr_gram(unsigned short data); |
dreschpe | 33:f87f06292637 | 59 | |
dreschpe | 33:f87f06292637 | 60 | /** Send same 16bit pixeldata to display controller multiple times |
dreschpe | 33:f87f06292637 | 61 | * |
dreschpe | 33:f87f06292637 | 62 | * @param data: halfword to send |
dreschpe | 33:f87f06292637 | 63 | * @param count: how many |
dreschpe | 33:f87f06292637 | 64 | * |
dreschpe | 33:f87f06292637 | 65 | */ |
dreschpe | 33:f87f06292637 | 66 | virtual void wr_gram(unsigned short data, unsigned int count); |
dreschpe | 33:f87f06292637 | 67 | |
dreschpe | 33:f87f06292637 | 68 | /** Send array of pixeldata shorts to display controller |
dreschpe | 33:f87f06292637 | 69 | * |
dreschpe | 33:f87f06292637 | 70 | * @param data: unsigned short pixeldata array |
dreschpe | 33:f87f06292637 | 71 | * @param lenght: lenght (in shorts) |
dreschpe | 33:f87f06292637 | 72 | * |
dreschpe | 33:f87f06292637 | 73 | */ |
dreschpe | 33:f87f06292637 | 74 | virtual void wr_grambuf(unsigned short* data, unsigned int lenght); |
dreschpe | 33:f87f06292637 | 75 | |
dreschpe | 33:f87f06292637 | 76 | /** Read 16bit pixeldata from display controller (with dummy cycle) |
dreschpe | 33:f87f06292637 | 77 | * |
dreschpe | 33:f87f06292637 | 78 | * @param convert true/false. Convert 18bit to 16bit, some controllers returns 18bit |
dreschpe | 33:f87f06292637 | 79 | * @returns 16bit color |
dreschpe | 33:f87f06292637 | 80 | */ |
dreschpe | 33:f87f06292637 | 81 | virtual unsigned short rd_gram(bool convert); |
dreschpe | 33:f87f06292637 | 82 | |
dreschpe | 33:f87f06292637 | 83 | /** Read 4x8bit register data ( |
dreschpe | 33:f87f06292637 | 84 | * reading from display ia I2C is not implemented in most controllers ! |
dreschpe | 33:f87f06292637 | 85 | * |
dreschpe | 33:f87f06292637 | 86 | */ |
dreschpe | 33:f87f06292637 | 87 | virtual unsigned int rd_reg_data32(unsigned char reg); |
dreschpe | 33:f87f06292637 | 88 | |
dreschpe | 33:f87f06292637 | 89 | /** Read 3x8bit ExtendedCommands register data |
dreschpe | 33:f87f06292637 | 90 | * reading from display ia I2C is not implemented in most controllers ! |
dreschpe | 33:f87f06292637 | 91 | */ |
dreschpe | 33:f87f06292637 | 92 | virtual unsigned int rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd); |
dreschpe | 33:f87f06292637 | 93 | |
dreschpe | 33:f87f06292637 | 94 | /** ILI932x specific, does a dummy read cycle, number of bits is protocol dependent |
dreschpe | 33:f87f06292637 | 95 | * reading from display ia I2C is not implemented in most controllers ! |
dreschpe | 33:f87f06292637 | 96 | */ |
dreschpe | 33:f87f06292637 | 97 | virtual void dummyread (); |
dreschpe | 33:f87f06292637 | 98 | |
dreschpe | 33:f87f06292637 | 99 | /** ILI932x specific, select register for a successive write or read |
dreschpe | 33:f87f06292637 | 100 | * |
dreschpe | 33:f87f06292637 | 101 | * reading from display ia I2C is not implemented in most controllers ! |
dreschpe | 33:f87f06292637 | 102 | */ |
dreschpe | 33:f87f06292637 | 103 | virtual void reg_select(unsigned char reg, bool forread =false); |
dreschpe | 33:f87f06292637 | 104 | |
dreschpe | 33:f87f06292637 | 105 | /** ILI932x specific, write register with data |
dreschpe | 33:f87f06292637 | 106 | * |
dreschpe | 33:f87f06292637 | 107 | * @param reg register to write |
dreschpe | 33:f87f06292637 | 108 | * @param data 16bit data |
dreschpe | 33:f87f06292637 | 109 | * not implemented for I2C ! |
dreschpe | 33:f87f06292637 | 110 | */ |
dreschpe | 33:f87f06292637 | 111 | virtual void reg_write(unsigned char reg, unsigned short data); |
dreschpe | 33:f87f06292637 | 112 | |
dreschpe | 33:f87f06292637 | 113 | /** ILI932x specific, read register |
dreschpe | 33:f87f06292637 | 114 | * |
dreschpe | 33:f87f06292637 | 115 | * @param reg register to be read |
dreschpe | 33:f87f06292637 | 116 | * @returns 16bit register value |
dreschpe | 33:f87f06292637 | 117 | * not implemented for I2C ! |
dreschpe | 33:f87f06292637 | 118 | */ |
dreschpe | 33:f87f06292637 | 119 | virtual unsigned short reg_read(unsigned char reg); |
dreschpe | 33:f87f06292637 | 120 | |
dreschpe | 33:f87f06292637 | 121 | /** HW reset sequence (without display init commands) |
dreschpe | 33:f87f06292637 | 122 | * most I2C displays have no reset signal ! |
dreschpe | 33:f87f06292637 | 123 | */ |
dreschpe | 33:f87f06292637 | 124 | virtual void hw_reset(); |
dreschpe | 33:f87f06292637 | 125 | |
dreschpe | 33:f87f06292637 | 126 | /** Set ChipSelect high or low |
dreschpe | 33:f87f06292637 | 127 | * @param enable 0/1 |
dreschpe | 33:f87f06292637 | 128 | * not implemented for I2C ! |
dreschpe | 33:f87f06292637 | 129 | */ |
dreschpe | 33:f87f06292637 | 130 | virtual void BusEnable(bool enable); |
dreschpe | 33:f87f06292637 | 131 | |
dreschpe | 33:f87f06292637 | 132 | private: |
dreschpe | 33:f87f06292637 | 133 | |
dreschpe | 33:f87f06292637 | 134 | I2C _i2c; |
dreschpe | 33:f87f06292637 | 135 | int _address; |
charly | 36:668396f861d2 | 136 | DigitalOut _reset; |
dreschpe | 33:f87f06292637 | 137 | |
dreschpe | 33:f87f06292637 | 138 | }; |
dreschpe | 33:f87f06292637 | 139 | |
dreschpe | 33:f87f06292637 | 140 | |
dreschpe | 33:f87f06292637 | 141 | #endif |