cassyarduino cassyarduino / UIPEthernet

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utility/Enc28J60Network.cpp@36:689bcc358067, 2017-02-22 (annotated)

Committer:
cassyarduino
Date:
Wed Feb 22 14:35:30 2017 +0100
Revision:
36:689bcc358067
Parent:
33:7ba5d53df0f2
Child:
39:deeb00b81cc9
Changes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cassyarduino 0:e3fb1267e3c3 1 /*
cassyarduino 0:e3fb1267e3c3 2 Enc28J60NetworkClass.h
cassyarduino 0:e3fb1267e3c3 3 UIPEthernet network driver for Microchip ENC28J60 Ethernet Interface.
cassyarduino 0:e3fb1267e3c3 4
cassyarduino 0:e3fb1267e3c3 5 Copyright (c) 2013 Norbert Truchsess <norbert.truchsess@t-online.de>
cassyarduino 0:e3fb1267e3c3 6 All rights reserved.
cassyarduino 0:e3fb1267e3c3 7
cassyarduino 0:e3fb1267e3c3 8 based on enc28j60.c file from the AVRlib library by Pascal Stang.
cassyarduino 0:e3fb1267e3c3 9 For AVRlib See http://www.procyonengineering.com/
cassyarduino 0:e3fb1267e3c3 10
cassyarduino 0:e3fb1267e3c3 11 This program is free software: you can redistribute it and/or modify
cassyarduino 0:e3fb1267e3c3 12 it under the terms of the GNU General Public License as published by
cassyarduino 0:e3fb1267e3c3 13 the Free Software Foundation, either version 3 of the License, or
cassyarduino 0:e3fb1267e3c3 14 (at your option) any later version.
cassyarduino 0:e3fb1267e3c3 15
cassyarduino 0:e3fb1267e3c3 16 This program is distributed in the hope that it will be useful,
cassyarduino 0:e3fb1267e3c3 17 but WITHOUT ANY WARRANTY; without even the implied warranty of
cassyarduino 0:e3fb1267e3c3 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
cassyarduino 0:e3fb1267e3c3 19 GNU General Public License for more details.
cassyarduino 0:e3fb1267e3c3 20
cassyarduino 0:e3fb1267e3c3 21 You should have received a copy of the GNU General Public License
cassyarduino 0:e3fb1267e3c3 22 along with this program. If not, see <http://www.gnu.org/licenses/>.
cassyarduino 0:e3fb1267e3c3 23 */
cassyarduino 0:e3fb1267e3c3 24
cassyarduino 0:e3fb1267e3c3 25 #include "Enc28J60Network.h"
cassyarduino 0:e3fb1267e3c3 26 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 27 #include "Arduino.h"
cassyarduino 0:e3fb1267e3c3 28 #endif
cassyarduino 0:e3fb1267e3c3 29 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 30 #include <mbed.h>
cassyarduino 20:fe5026169ec6 31 #include "mbed/millis.h"
cassyarduino 0:e3fb1267e3c3 32 #define delay(x) wait_ms(x)
cassyarduino 0:e3fb1267e3c3 33 #endif
cassyarduino 0:e3fb1267e3c3 34 #include "logging.h"
cassyarduino 0:e3fb1267e3c3 35
cassyarduino 0:e3fb1267e3c3 36 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 37 #if defined(ARDUINO)
cassyarduino 25:ef941d560208 38 #if !defined(STM32F3) && !defined(__STM32F4__)
cassyarduino 19:e416943f7119 39 #include <SPI.h>
cassyarduino 19:e416943f7119 40 extern SPIClass SPI;
cassyarduino 36:689bcc358067 41 //#elif defined(ARDUINO_ARCH_AMEBA)
cassyarduino 36:689bcc358067 42 //SPIClass SPI((void *)(&spi_obj), 11, 12, 13, 10);
cassyarduino 36:689bcc358067 43 //SPI _spi(SPI_MOSI,SPI_MISO,SPI_SCK,ENC28J60_CONTROL_CS);
cassyarduino 19:e416943f7119 44 #else
cassyarduino 19:e416943f7119 45 #include "HardwareSPI.h"
cassyarduino 19:e416943f7119 46 extern HardwareSPI SPI(1);
cassyarduino 19:e416943f7119 47 #endif
cassyarduino 0:e3fb1267e3c3 48 #endif
cassyarduino 0:e3fb1267e3c3 49 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 50 SPI _spi(SPI_MOSI,SPI_MISO,SPI_SCK);
cassyarduino 0:e3fb1267e3c3 51 DigitalOut _cs(ENC28J60_CONTROL_CS);
cassyarduino 0:e3fb1267e3c3 52 Serial LogObject(SERIAL_TX,SERIAL_RX);
cassyarduino 0:e3fb1267e3c3 53 #endif
cassyarduino 0:e3fb1267e3c3 54 #endif
cassyarduino 0:e3fb1267e3c3 55
cassyarduino 0:e3fb1267e3c3 56 extern "C" {
cassyarduino 0:e3fb1267e3c3 57 #if defined(ARDUINO_ARCH_AVR)
cassyarduino 0:e3fb1267e3c3 58 // AVR-specific code
cassyarduino 0:e3fb1267e3c3 59 #include <avr/io.h>
cassyarduino 0:e3fb1267e3c3 60 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 61 // SAM-specific code
cassyarduino 0:e3fb1267e3c3 62 #else
cassyarduino 0:e3fb1267e3c3 63 // generic, non-platform specific code
cassyarduino 0:e3fb1267e3c3 64 #endif
cassyarduino 0:e3fb1267e3c3 65 #include "enc28j60.h"
cassyarduino 0:e3fb1267e3c3 66 #include "uip.h"
cassyarduino 0:e3fb1267e3c3 67 }
cassyarduino 0:e3fb1267e3c3 68
cassyarduino 0:e3fb1267e3c3 69 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 70 // set CS to 0 = active
cassyarduino 0:e3fb1267e3c3 71 #define CSACTIVE digitalWrite(ENC28J60_CONTROL_CS, LOW)
cassyarduino 0:e3fb1267e3c3 72 // set CS to 1 = passive
cassyarduino 0:e3fb1267e3c3 73 #define CSPASSIVE digitalWrite(ENC28J60_CONTROL_CS, HIGH)
cassyarduino 0:e3fb1267e3c3 74 #endif
cassyarduino 0:e3fb1267e3c3 75 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 76 // set CS to 0 = active
cassyarduino 0:e3fb1267e3c3 77 #define CSACTIVE _cs=0
cassyarduino 0:e3fb1267e3c3 78 // set CS to 1 = passive
cassyarduino 0:e3fb1267e3c3 79 #define CSPASSIVE _cs=1
cassyarduino 0:e3fb1267e3c3 80 #endif
cassyarduino 0:e3fb1267e3c3 81
cassyarduino 0:e3fb1267e3c3 82 //
cassyarduino 0:e3fb1267e3c3 83 #if defined(ARDUINO_ARCH_AVR)
cassyarduino 0:e3fb1267e3c3 84 #define waitspi() while(!(SPSR&(1<<SPIF)))
cassyarduino 0:e3fb1267e3c3 85 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 86 #if ENC28J60_CONTROL_CS==BOARD_SPI_SS0 or ENC28J60_CONTROL_CS==BOARD_SPI_SS1 or ENC28J60_CONTROL_CS==BOARD_SPI_SS2 or ENC28J60_CONTROL_CS==BOARD_SPI_SS3
cassyarduino 0:e3fb1267e3c3 87 #define ENC28J60_USE_SPILIB_EXT 1
cassyarduino 0:e3fb1267e3c3 88 #endif
cassyarduino 0:e3fb1267e3c3 89 #endif
cassyarduino 0:e3fb1267e3c3 90
cassyarduino 0:e3fb1267e3c3 91 uint16_t Enc28J60Network::nextPacketPtr;
cassyarduino 0:e3fb1267e3c3 92 uint8_t Enc28J60Network::bank=0xff;
cassyarduino 0:e3fb1267e3c3 93 uint8_t Enc28J60Network::erevid=0;
cassyarduino 0:e3fb1267e3c3 94
cassyarduino 0:e3fb1267e3c3 95 struct memblock Enc28J60Network::receivePkt;
cassyarduino 0:e3fb1267e3c3 96
cassyarduino 0:e3fb1267e3c3 97 bool Enc28J60Network::broadcast_enabled = false;
cassyarduino 0:e3fb1267e3c3 98
cassyarduino 0:e3fb1267e3c3 99
cassyarduino 0:e3fb1267e3c3 100 void Enc28J60Network::init(uint8_t* macaddr)
cassyarduino 0:e3fb1267e3c3 101 {
cassyarduino 0:e3fb1267e3c3 102 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 103 LogObject.uart_send_strln(F("Enc28J60Network::init(uint8_t* macaddr) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 104 #endif
cassyarduino 0:e3fb1267e3c3 105 receivePkt.begin = 0;
cassyarduino 0:e3fb1267e3c3 106 receivePkt.size = 0;
cassyarduino 0:e3fb1267e3c3 107
cassyarduino 0:e3fb1267e3c3 108 unsigned int timeout = 15;
cassyarduino 0:e3fb1267e3c3 109 MemoryPool::init(); // 1 byte in between RX_STOP_INIT and pool to allow prepending of controlbyte
cassyarduino 0:e3fb1267e3c3 110 // initialize I/O
cassyarduino 0:e3fb1267e3c3 111 // ss as output:
cassyarduino 0:e3fb1267e3c3 112 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 113 pinMode(ENC28J60_CONTROL_CS, OUTPUT);
cassyarduino 0:e3fb1267e3c3 114 #endif
cassyarduino 20:fe5026169ec6 115 #if defined(__MBED__)
cassyarduino 20:fe5026169ec6 116 millis_start();
cassyarduino 20:fe5026169ec6 117 #endif
cassyarduino 0:e3fb1267e3c3 118 CSPASSIVE; // ss=0
cassyarduino 0:e3fb1267e3c3 119 //
cassyarduino 0:e3fb1267e3c3 120
cassyarduino 0:e3fb1267e3c3 121 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 122 LogObject.uart_send_str(F("ENC28J60::init DEBUG:csPin = "));
cassyarduino 0:e3fb1267e3c3 123 LogObject.uart_send_decln(ENC28J60_CONTROL_CS);
cassyarduino 0:e3fb1267e3c3 124 LogObject.uart_send_str(F("ENC28J60::init DEBUG:miso = "));
cassyarduino 0:e3fb1267e3c3 125 LogObject.uart_send_decln(SPI_MISO);
cassyarduino 0:e3fb1267e3c3 126 LogObject.uart_send_str(F("ENC28J60::init DEBUG:mosi = "));
cassyarduino 0:e3fb1267e3c3 127 LogObject.uart_send_decln(SPI_MOSI);
cassyarduino 0:e3fb1267e3c3 128 LogObject.uart_send_str(F("ENC28J60::init DEBUG:sck = "));
cassyarduino 0:e3fb1267e3c3 129 LogObject.uart_send_decln(SPI_SCK);
cassyarduino 0:e3fb1267e3c3 130 #endif
cassyarduino 0:e3fb1267e3c3 131 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 132 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 133 LogObject.uart_send_strln(F("ENC28J60::init DEBUG:Use SPI lib SPI.begin()"));
cassyarduino 0:e3fb1267e3c3 134 #endif
cassyarduino 0:e3fb1267e3c3 135 #if defined(ARDUINO)
cassyarduino 25:ef941d560208 136 #if defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__)
cassyarduino 19:e416943f7119 137 SPI.begin(SPI_9MHZ, MSBFIRST, 0);
cassyarduino 19:e416943f7119 138 #else
cassyarduino 19:e416943f7119 139 SPI.begin();
cassyarduino 19:e416943f7119 140 #endif
cassyarduino 0:e3fb1267e3c3 141 #endif
cassyarduino 0:e3fb1267e3c3 142 #if defined(ARDUINO_ARCH_AVR)
cassyarduino 0:e3fb1267e3c3 143 // AVR-specific code
cassyarduino 0:e3fb1267e3c3 144 SPI.setClockDivider(SPI_CLOCK_DIV2); //results in 8MHZ at 16MHZ system clock.
cassyarduino 0:e3fb1267e3c3 145 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 146 // SAM-specific code
cassyarduino 0:e3fb1267e3c3 147 SPI.setClockDivider(10); //defaults to 21 which results in aprox. 4MHZ. A 10 should result in a little more than 8MHZ.
cassyarduino 25:ef941d560208 148 #elif defined(__STM32F1__) || defined(__STM32F3__)
cassyarduino 0:e3fb1267e3c3 149 // generic, non-platform specific code
cassyarduino 0:e3fb1267e3c3 150 #define USE_STM32F1_DMAC 1 //on STM32
cassyarduino 0:e3fb1267e3c3 151 // BOARD_NR_SPI >= 1 BOARD_SPI1_NSS_PIN, BOARD_SPI1_SCK_PIN, BOARD_SPI1_MISO_PIN, BOARD_SPI1_MOSI_PIN
cassyarduino 0:e3fb1267e3c3 152 SPI.setBitOrder(MSBFIRST);
cassyarduino 0:e3fb1267e3c3 153 SPI.setDataMode(SPI_MODE0);
cassyarduino 0:e3fb1267e3c3 154 SPI.setClockDivider(SPI_CLOCK_DIV8); //value 8 the result is 9MHz at 72MHz clock.
cassyarduino 0:e3fb1267e3c3 155 #else
cassyarduino 0:e3fb1267e3c3 156 #if defined(ARDUINO)
cassyarduino 25:ef941d560208 157 #if !defined(__STM32F3__) && !defined(STM32F3) && !defined(__STM32F4__)
cassyarduino 19:e416943f7119 158 SPI.setBitOrder(MSBFIRST);
cassyarduino 19:e416943f7119 159 #endif
cassyarduino 20:fe5026169ec6 160 //Settings for ESP8266
cassyarduino 0:e3fb1267e3c3 161 //SPI.setDataMode(SPI_MODE0);
cassyarduino 0:e3fb1267e3c3 162 //SPI.setClockDivider(SPI_CLOCK_DIV16);
cassyarduino 0:e3fb1267e3c3 163 #endif
cassyarduino 0:e3fb1267e3c3 164 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 165 _spi.format(8, 0); // 8bit, mode 0
cassyarduino 0:e3fb1267e3c3 166 _spi.frequency(7000000); // 7MHz
cassyarduino 0:e3fb1267e3c3 167 #endif
cassyarduino 0:e3fb1267e3c3 168 #endif
cassyarduino 0:e3fb1267e3c3 169 #else
cassyarduino 0:e3fb1267e3c3 170 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 171 LogObject.uart_send_strln(F("ENC28J60::init DEBUG:Use Native hardware SPI"));
cassyarduino 0:e3fb1267e3c3 172 #endif
cassyarduino 0:e3fb1267e3c3 173 pinMode(SPI_MOSI, OUTPUT);
cassyarduino 0:e3fb1267e3c3 174 pinMode(SPI_SCK, OUTPUT);
cassyarduino 0:e3fb1267e3c3 175 pinMode(SPI_MISO, INPUT);
cassyarduino 0:e3fb1267e3c3 176 //Hardware SS must be configured as OUTPUT to enable SPI-master (regardless of which pin is configured as ENC28J60_CONTROL_CS)
cassyarduino 0:e3fb1267e3c3 177 //pinMode(ENC28J60_CONTROL_CS, OUTPUT);
cassyarduino 0:e3fb1267e3c3 178
cassyarduino 0:e3fb1267e3c3 179 digitalWrite(SPI_MOSI, LOW);
cassyarduino 0:e3fb1267e3c3 180 digitalWrite(SPI_SCK, LOW);
cassyarduino 0:e3fb1267e3c3 181
cassyarduino 0:e3fb1267e3c3 182 // initialize SPI interface
cassyarduino 0:e3fb1267e3c3 183 // master mode and Fosc/2 clock:
cassyarduino 0:e3fb1267e3c3 184 SPCR = (1<<SPE)|(1<<MSTR);
cassyarduino 0:e3fb1267e3c3 185 SPSR |= (1<<SPI2X);
cassyarduino 0:e3fb1267e3c3 186 #endif
cassyarduino 0:e3fb1267e3c3 187
cassyarduino 0:e3fb1267e3c3 188 // perform system reset
cassyarduino 0:e3fb1267e3c3 189 writeOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);
cassyarduino 0:e3fb1267e3c3 190 delay(2); // errata B7/2
cassyarduino 0:e3fb1267e3c3 191 delay(50);
cassyarduino 0:e3fb1267e3c3 192 // check CLKRDY bit to see if reset is complete
cassyarduino 0:e3fb1267e3c3 193 // The CLKRDY does not work. See Rev. B4 Silicon Errata point. Just wait.
cassyarduino 0:e3fb1267e3c3 194 //while(!(readReg(ESTAT) & ESTAT_CLKRDY));
cassyarduino 0:e3fb1267e3c3 195 // do bank 0 stuff
cassyarduino 0:e3fb1267e3c3 196 // initialize receive buffer
cassyarduino 0:e3fb1267e3c3 197 // 16-bit transfers, must write low byte first
cassyarduino 0:e3fb1267e3c3 198 // set receive buffer start address
cassyarduino 0:e3fb1267e3c3 199 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 200 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:Before readOp(ENC28J60_READ_CTRL_REG, ESTAT)"));
cassyarduino 0:e3fb1267e3c3 201 #endif
cassyarduino 0:e3fb1267e3c3 202 nextPacketPtr = RXSTART_INIT;
cassyarduino 0:e3fb1267e3c3 203 while ((!readOp(ENC28J60_READ_CTRL_REG, ESTAT) & ESTAT_CLKRDY) && (timeout>0))
cassyarduino 0:e3fb1267e3c3 204 {
cassyarduino 0:e3fb1267e3c3 205 timeout=timeout-1;
cassyarduino 0:e3fb1267e3c3 206 delay(10);
cassyarduino 0:e3fb1267e3c3 207 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 208 wdt_reset();
cassyarduino 0:e3fb1267e3c3 209 #endif
cassyarduino 0:e3fb1267e3c3 210 }
cassyarduino 0:e3fb1267e3c3 211 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 212 if (timeout==0) {LogObject.uart_send_strln(F("ENC28J60::init ERROR:TIMEOUT !!!"));}
cassyarduino 0:e3fb1267e3c3 213 #endif
cassyarduino 0:e3fb1267e3c3 214 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 215 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After readOp(ENC28J60_READ_CTRL_REG, ESTAT)"));
cassyarduino 0:e3fb1267e3c3 216 #endif
cassyarduino 0:e3fb1267e3c3 217 // Rx start
cassyarduino 0:e3fb1267e3c3 218 writeRegPair(ERXSTL, RXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 219 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 220 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After writeRegPair(ERXSTL, RXSTART_INIT)"));
cassyarduino 0:e3fb1267e3c3 221 #endif
cassyarduino 0:e3fb1267e3c3 222 // set receive pointer address
cassyarduino 0:e3fb1267e3c3 223 writeRegPair(ERXRDPTL, RXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 224 // RX end
cassyarduino 0:e3fb1267e3c3 225 writeRegPair(ERXNDL, RXSTOP_INIT);
cassyarduino 0:e3fb1267e3c3 226 // TX start
cassyarduino 0:e3fb1267e3c3 227 //writeRegPair(ETXSTL, TXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 228 // TX end
cassyarduino 0:e3fb1267e3c3 229 //writeRegPair(ETXNDL, TXSTOP_INIT);
cassyarduino 0:e3fb1267e3c3 230 // do bank 1 stuff, packet filter:
cassyarduino 0:e3fb1267e3c3 231 // For broadcast packets we allow only ARP packtets
cassyarduino 0:e3fb1267e3c3 232 // All other packets should be unicast only for our mac (MAADR)
cassyarduino 0:e3fb1267e3c3 233 //
cassyarduino 0:e3fb1267e3c3 234 // The pattern to match on is therefore
cassyarduino 0:e3fb1267e3c3 235 // Type ETH.DST
cassyarduino 0:e3fb1267e3c3 236 // ARP BROADCAST
cassyarduino 0:e3fb1267e3c3 237 // 06 08 -- ff ff ff ff ff ff -> ip checksum for theses bytes=f7f9
cassyarduino 0:e3fb1267e3c3 238 // in binary these poitions are:11 0000 0011 1111
cassyarduino 0:e3fb1267e3c3 239 // This is hex 303F->EPMM0=0x3f,EPMM1=0x30
cassyarduino 0:e3fb1267e3c3 240 //TODO define specific pattern to receive dhcp-broadcast packages instead of setting ERFCON_BCEN!
cassyarduino 0:e3fb1267e3c3 241 // enableBroadcast(); // change to add ERXFCON_BCEN recommended by epam
cassyarduino 0:e3fb1267e3c3 242 writeReg(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_PMEN|ERXFCON_BCEN);
cassyarduino 0:e3fb1267e3c3 243 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 244 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After writeReg(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_PMEN|ERXFCON_BCEN)"));
cassyarduino 0:e3fb1267e3c3 245 #endif
cassyarduino 33:7ba5d53df0f2 246 #if defined(ESP8266)
cassyarduino 33:7ba5d53df0f2 247 wdt_reset();
cassyarduino 33:7ba5d53df0f2 248 #endif
cassyarduino 0:e3fb1267e3c3 249 writeRegPair(EPMM0, 0x303f);
cassyarduino 0:e3fb1267e3c3 250 writeRegPair(EPMCSL, 0xf7f9);
cassyarduino 0:e3fb1267e3c3 251 //
cassyarduino 0:e3fb1267e3c3 252 //
cassyarduino 0:e3fb1267e3c3 253 // do bank 2 stuff
cassyarduino 0:e3fb1267e3c3 254 // enable MAC receive
cassyarduino 0:e3fb1267e3c3 255 // and bring MAC out of reset (writes 0x00 to MACON2)
cassyarduino 0:e3fb1267e3c3 256 writeRegPair(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS);
cassyarduino 0:e3fb1267e3c3 257 // enable automatic padding to 60bytes and CRC operations
cassyarduino 0:e3fb1267e3c3 258 writeOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN);
cassyarduino 0:e3fb1267e3c3 259 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 260 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After writeOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN)"));
cassyarduino 0:e3fb1267e3c3 261 #endif
cassyarduino 0:e3fb1267e3c3 262 // set inter-frame gap (non-back-to-back)
cassyarduino 0:e3fb1267e3c3 263 writeRegPair(MAIPGL, 0x0C12);
cassyarduino 0:e3fb1267e3c3 264 // set inter-frame gap (back-to-back)
cassyarduino 0:e3fb1267e3c3 265 writeReg(MABBIPG, 0x12);
cassyarduino 0:e3fb1267e3c3 266 // Set the maximum packet size which the controller will accept
cassyarduino 0:e3fb1267e3c3 267 // Do not send packets longer than MAX_FRAMELEN:
cassyarduino 0:e3fb1267e3c3 268 writeRegPair(MAMXFLL, MAX_FRAMELEN);
cassyarduino 0:e3fb1267e3c3 269 // do bank 3 stuff
cassyarduino 0:e3fb1267e3c3 270 // write MAC address
cassyarduino 0:e3fb1267e3c3 271 // NOTE: MAC address in ENC28J60 is byte-backward
cassyarduino 0:e3fb1267e3c3 272 writeReg(MAADR5, macaddr[0]);
cassyarduino 0:e3fb1267e3c3 273 writeReg(MAADR4, macaddr[1]);
cassyarduino 0:e3fb1267e3c3 274 writeReg(MAADR3, macaddr[2]);
cassyarduino 0:e3fb1267e3c3 275 writeReg(MAADR2, macaddr[3]);
cassyarduino 0:e3fb1267e3c3 276 writeReg(MAADR1, macaddr[4]);
cassyarduino 0:e3fb1267e3c3 277 writeReg(MAADR0, macaddr[5]);
cassyarduino 0:e3fb1267e3c3 278 // no loopback of transmitted frames
cassyarduino 0:e3fb1267e3c3 279 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 280 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:Before phyWrite(PHCON2, PHCON2_HDLDIS)"));
cassyarduino 0:e3fb1267e3c3 281 #endif
cassyarduino 0:e3fb1267e3c3 282 phyWrite(PHCON2, PHCON2_HDLDIS);
cassyarduino 0:e3fb1267e3c3 283 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 284 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After phyWrite(PHCON2, PHCON2_HDLDIS)"));
cassyarduino 0:e3fb1267e3c3 285 #endif
cassyarduino 0:e3fb1267e3c3 286 // switch to bank 0
cassyarduino 0:e3fb1267e3c3 287 setBank(ECON1);
cassyarduino 0:e3fb1267e3c3 288 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 289 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After setBank(ECON1)"));
cassyarduino 0:e3fb1267e3c3 290 #endif
cassyarduino 0:e3fb1267e3c3 291 // enable interrutps
cassyarduino 0:e3fb1267e3c3 292 writeOp(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE|EIE_PKTIE);
cassyarduino 0:e3fb1267e3c3 293 // enable packet reception
cassyarduino 0:e3fb1267e3c3 294 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
cassyarduino 0:e3fb1267e3c3 295 //Configure leds
cassyarduino 0:e3fb1267e3c3 296 phyWrite(PHLCON,0x476);
cassyarduino 0:e3fb1267e3c3 297
cassyarduino 0:e3fb1267e3c3 298 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 299 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:Before readReg(EREVID);"));
cassyarduino 0:e3fb1267e3c3 300 #endif
cassyarduino 0:e3fb1267e3c3 301 erevid=readReg(EREVID);
cassyarduino 0:e3fb1267e3c3 302 if (erevid==0xFF) {erevid=0;}
cassyarduino 0:e3fb1267e3c3 303 // microchip forgot to step the number on the silcon when they
cassyarduino 0:e3fb1267e3c3 304 // released the revision B7. 6 is now rev B7. We still have
cassyarduino 0:e3fb1267e3c3 305 // to see what they do when they release B8. At the moment
cassyarduino 0:e3fb1267e3c3 306 // there is no B8 out yet
cassyarduino 0:e3fb1267e3c3 307 //if (erevid > 5) ++erevid;
cassyarduino 0:e3fb1267e3c3 308 #if ACTLOGLEVEL>=LOG_INFO
cassyarduino 0:e3fb1267e3c3 309 LogObject.uart_send_str(F("ENC28J60::init INFO: Chip erevid="));
cassyarduino 0:e3fb1267e3c3 310 LogObject.uart_send_dec(erevid);
cassyarduino 0:e3fb1267e3c3 311 LogObject.uart_send_strln(F(" initialization completed."));
cassyarduino 0:e3fb1267e3c3 312 #endif
cassyarduino 0:e3fb1267e3c3 313
cassyarduino 0:e3fb1267e3c3 314 // return Enc28J60Network::erevid;
cassyarduino 0:e3fb1267e3c3 315 }
cassyarduino 0:e3fb1267e3c3 316
cassyarduino 0:e3fb1267e3c3 317 memhandle
cassyarduino 0:e3fb1267e3c3 318 Enc28J60Network::receivePacket(void)
cassyarduino 0:e3fb1267e3c3 319 {
cassyarduino 0:e3fb1267e3c3 320 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 321 LogObject.uart_send_strln(F("Enc28J60Network::receivePacket(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 322 #endif
cassyarduino 0:e3fb1267e3c3 323 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 324 wdt_reset();
cassyarduino 0:e3fb1267e3c3 325 #endif
cassyarduino 0:e3fb1267e3c3 326 uint8_t rxstat;
cassyarduino 0:e3fb1267e3c3 327 uint16_t len;
cassyarduino 0:e3fb1267e3c3 328 // check if a packet has been received and buffered
cassyarduino 0:e3fb1267e3c3 329 //if( !(readReg(EIR) & EIR_PKTIF) ){
cassyarduino 0:e3fb1267e3c3 330 // The above does not work. See Rev. B4 Silicon Errata point 6.
cassyarduino 0:e3fb1267e3c3 331 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 332 if (erevid==0)
cassyarduino 0:e3fb1267e3c3 333 {
cassyarduino 33:7ba5d53df0f2 334 LogObject.uart_send_strln(F("Enc28J60Network::receivePacket(void) ERROR:ENC28j50 Device not found !!! Bypass receivePacket function !!!"));
cassyarduino 0:e3fb1267e3c3 335 }
cassyarduino 0:e3fb1267e3c3 336 #endif
cassyarduino 0:e3fb1267e3c3 337 uint8_t epktcnt=readReg(EPKTCNT);
cassyarduino 16:66225c1d660c 338 if ((erevid!=0) && (epktcnt!=0))
cassyarduino 0:e3fb1267e3c3 339 {
cassyarduino 0:e3fb1267e3c3 340 uint16_t readPtr = nextPacketPtr+6 > RXSTOP_INIT ? nextPacketPtr+6-RXSTOP_INIT+RXSTART_INIT : nextPacketPtr+6;
cassyarduino 0:e3fb1267e3c3 341 // Set the read pointer to the start of the received packet
cassyarduino 0:e3fb1267e3c3 342 writeRegPair(ERDPTL, nextPacketPtr);
cassyarduino 0:e3fb1267e3c3 343 // read the next packet pointer
cassyarduino 0:e3fb1267e3c3 344 nextPacketPtr = readOp(ENC28J60_READ_BUF_MEM, 0);
cassyarduino 0:e3fb1267e3c3 345 nextPacketPtr |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
cassyarduino 0:e3fb1267e3c3 346 // read the packet length (see datasheet page 43)
cassyarduino 0:e3fb1267e3c3 347 len = readOp(ENC28J60_READ_BUF_MEM, 0);
cassyarduino 0:e3fb1267e3c3 348 len |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
cassyarduino 0:e3fb1267e3c3 349 len -= 4; //remove the CRC count
cassyarduino 0:e3fb1267e3c3 350 // read the receive status (see datasheet page 43)
cassyarduino 0:e3fb1267e3c3 351 rxstat = readOp(ENC28J60_READ_BUF_MEM, 0);
cassyarduino 0:e3fb1267e3c3 352 //rxstat |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
cassyarduino 0:e3fb1267e3c3 353 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 354 LogObject.uart_send_str(F("Enc28J60Network::receivePacket(void) DEBUG:receivePacket ["));
cassyarduino 0:e3fb1267e3c3 355 LogObject.uart_send_hex(readPtr);
cassyarduino 0:e3fb1267e3c3 356 LogObject.uart_send_str(F("-"));
cassyarduino 0:e3fb1267e3c3 357 LogObject.uart_send_hex((readPtr+len) % (RXSTOP_INIT+1));
cassyarduino 0:e3fb1267e3c3 358 LogObject.uart_send_str(F("], next: "));
cassyarduino 0:e3fb1267e3c3 359 LogObject.uart_send_hex(nextPacketPtr);
cassyarduino 0:e3fb1267e3c3 360 LogObject.uart_send_str(F(", stat: "));
cassyarduino 0:e3fb1267e3c3 361 LogObject.uart_send_hex(rxstat);
cassyarduino 0:e3fb1267e3c3 362 LogObject.uart_send_str(F(", Packet count: "));
cassyarduino 0:e3fb1267e3c3 363 LogObject.uart_send_dec(epktcnt);
cassyarduino 0:e3fb1267e3c3 364 LogObject.uart_send_str(F(" -> "));
cassyarduino 0:e3fb1267e3c3 365 LogObject.uart_send_strln((rxstat & 0x80)!=0 ? "OK" : "failed");
cassyarduino 0:e3fb1267e3c3 366 #endif
cassyarduino 0:e3fb1267e3c3 367 // decrement the packet counter indicate we are done with this packet
cassyarduino 0:e3fb1267e3c3 368 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PKTDEC);
cassyarduino 0:e3fb1267e3c3 369 // check CRC and symbol errors (see datasheet page 44, table 7-3):
cassyarduino 0:e3fb1267e3c3 370 // The ERXFCON.CRCEN is set by default. Normally we should not
cassyarduino 0:e3fb1267e3c3 371 // need to check this.
cassyarduino 0:e3fb1267e3c3 372 if (((rxstat & 0x80) != 0) && (nextPacketPtr<=RXSTOP_INIT))
cassyarduino 0:e3fb1267e3c3 373 {
cassyarduino 0:e3fb1267e3c3 374 receivePkt.begin = readPtr;
cassyarduino 0:e3fb1267e3c3 375 receivePkt.size = len;
cassyarduino 0:e3fb1267e3c3 376 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 377 LogObject.uart_send_str(F("Enc28J60Network::receivePacket(void) DEBUG: rxstat OK. receivePkt.size="));
cassyarduino 0:e3fb1267e3c3 378 LogObject.uart_send_decln(len);
cassyarduino 0:e3fb1267e3c3 379 #endif
cassyarduino 0:e3fb1267e3c3 380 return UIP_RECEIVEBUFFERHANDLE;
cassyarduino 0:e3fb1267e3c3 381 }
cassyarduino 0:e3fb1267e3c3 382 // Move the RX read pointer to the start of the next received packet
cassyarduino 0:e3fb1267e3c3 383 // This frees the memory we just read out
cassyarduino 0:e3fb1267e3c3 384 setERXRDPT();
cassyarduino 0:e3fb1267e3c3 385 }
cassyarduino 0:e3fb1267e3c3 386 return (NOBLOCK);
cassyarduino 0:e3fb1267e3c3 387 }
cassyarduino 0:e3fb1267e3c3 388
cassyarduino 0:e3fb1267e3c3 389 void
cassyarduino 0:e3fb1267e3c3 390 Enc28J60Network::setERXRDPT(void)
cassyarduino 0:e3fb1267e3c3 391 {
cassyarduino 0:e3fb1267e3c3 392 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 393 LogObject.uart_send_strln(F("Enc28J60Network::setERXRDPT(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 394 #endif
cassyarduino 17:be34a75aa9a7 395 uint16_t actnextPacketPtr;
cassyarduino 17:be34a75aa9a7 396 nextPacketPtr == RXSTART_INIT ? actnextPacketPtr=RXSTOP_INIT : actnextPacketPtr=nextPacketPtr-1;
cassyarduino 17:be34a75aa9a7 397 if (actnextPacketPtr>RXSTOP_INIT) {actnextPacketPtr=RXSTART_INIT;}
cassyarduino 17:be34a75aa9a7 398 if ((actnextPacketPtr&1)!=0) {actnextPacketPtr--;}
cassyarduino 16:66225c1d660c 399 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 17:be34a75aa9a7 400 LogObject.uart_send_str(F("Enc28J60Network::setERXRDPT(void) DEBUG:Set actnextPacketPtr:"));
cassyarduino 17:be34a75aa9a7 401 LogObject.uart_send_hexln(actnextPacketPtr);
cassyarduino 0:e3fb1267e3c3 402 #endif
cassyarduino 17:be34a75aa9a7 403 writeRegPair(ERXRDPTL, actnextPacketPtr);
cassyarduino 0:e3fb1267e3c3 404 }
cassyarduino 0:e3fb1267e3c3 405
cassyarduino 0:e3fb1267e3c3 406 memaddress
cassyarduino 0:e3fb1267e3c3 407 Enc28J60Network::blockSize(memhandle handle)
cassyarduino 0:e3fb1267e3c3 408 {
cassyarduino 0:e3fb1267e3c3 409 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 410 LogObject.uart_send_strln(F("Enc28J60Network::blockSize(memhandle handle) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 411 #endif
cassyarduino 0:e3fb1267e3c3 412 return ((handle == NOBLOCK) || (erevid==0)) ? 0 : handle == UIP_RECEIVEBUFFERHANDLE ? receivePkt.size : blocks[handle].size;
cassyarduino 0:e3fb1267e3c3 413 }
cassyarduino 0:e3fb1267e3c3 414
cassyarduino 0:e3fb1267e3c3 415 void
cassyarduino 0:e3fb1267e3c3 416 Enc28J60Network::sendPacket(memhandle handle)
cassyarduino 0:e3fb1267e3c3 417 {
cassyarduino 0:e3fb1267e3c3 418 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 419 LogObject.uart_send_strln(F("Enc28J60Network::sendPacket(memhandle handle) INFO:Function started"));
cassyarduino 0:e3fb1267e3c3 420 #endif
cassyarduino 0:e3fb1267e3c3 421 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 422 wdt_reset();
cassyarduino 0:e3fb1267e3c3 423 #endif
cassyarduino 33:7ba5d53df0f2 424 if (erevid==0)
cassyarduino 33:7ba5d53df0f2 425 {
cassyarduino 33:7ba5d53df0f2 426 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 33:7ba5d53df0f2 427 LogObject.uart_send_strln(F("Enc28J60Network::sendPacket(memhandle handle) ERROR:ENC28j50 Device not found !!! Bypass sendPacket function !!!"));
cassyarduino 33:7ba5d53df0f2 428 #endif
cassyarduino 33:7ba5d53df0f2 429 return;
cassyarduino 33:7ba5d53df0f2 430 }
cassyarduino 33:7ba5d53df0f2 431
cassyarduino 0:e3fb1267e3c3 432 memblock *packet = &blocks[handle];
cassyarduino 0:e3fb1267e3c3 433 uint16_t start = packet->begin-1;
cassyarduino 0:e3fb1267e3c3 434 uint16_t end = start + packet->size;
cassyarduino 0:e3fb1267e3c3 435
cassyarduino 0:e3fb1267e3c3 436 // backup data at control-byte position
cassyarduino 0:e3fb1267e3c3 437 uint8_t data = readByte(start);
cassyarduino 0:e3fb1267e3c3 438 // write control-byte (if not 0 anyway)
cassyarduino 0:e3fb1267e3c3 439 if (data)
cassyarduino 0:e3fb1267e3c3 440 writeByte(start, 0);
cassyarduino 0:e3fb1267e3c3 441
cassyarduino 0:e3fb1267e3c3 442 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 443 LogObject.uart_send_str(F("Enc28J60Network::sendPacket(memhandle handle) DEBUG:sendPacket("));
cassyarduino 0:e3fb1267e3c3 444 LogObject.uart_send_dec(handle);
cassyarduino 0:e3fb1267e3c3 445 LogObject.uart_send_str(F(") ["));
cassyarduino 0:e3fb1267e3c3 446 LogObject.uart_send_hex(start);
cassyarduino 0:e3fb1267e3c3 447 LogObject.uart_send_str(F("-"));
cassyarduino 0:e3fb1267e3c3 448 LogObject.uart_send_hex(end);
cassyarduino 0:e3fb1267e3c3 449 LogObject.uart_send_str(F("]: "));
cassyarduino 0:e3fb1267e3c3 450 for (uint16_t i=start; i<=end; i++)
cassyarduino 0:e3fb1267e3c3 451 {
cassyarduino 0:e3fb1267e3c3 452 LogObject.uart_send_hex(readByte(i));
cassyarduino 0:e3fb1267e3c3 453 LogObject.uart_send_str(F(" "));
cassyarduino 0:e3fb1267e3c3 454 }
cassyarduino 0:e3fb1267e3c3 455 LogObject.uart_send_strln(F(""));
cassyarduino 0:e3fb1267e3c3 456 #endif
cassyarduino 0:e3fb1267e3c3 457
cassyarduino 0:e3fb1267e3c3 458 // TX start
cassyarduino 0:e3fb1267e3c3 459 writeRegPair(ETXSTL, start);
cassyarduino 0:e3fb1267e3c3 460 // Set the TXND pointer to correspond to the packet size given
cassyarduino 0:e3fb1267e3c3 461 writeRegPair(ETXNDL, end);
cassyarduino 0:e3fb1267e3c3 462 // send the contents of the transmit buffer onto the network
cassyarduino 29:9fc1e6fb82ec 463
cassyarduino 33:7ba5d53df0f2 464 unsigned int retry = TX_COLLISION_RETRY_COUNT;
cassyarduino 33:7ba5d53df0f2 465 unsigned int timeout = 100;
cassyarduino 33:7ba5d53df0f2 466 do
cassyarduino 33:7ba5d53df0f2 467 {
cassyarduino 33:7ba5d53df0f2 468 // seydamir added
cassyarduino 33:7ba5d53df0f2 469 // Reset the transmit logic problem. See Rev. B7 Silicon Errata issues 12 and 13
cassyarduino 33:7ba5d53df0f2 470 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRST);
cassyarduino 33:7ba5d53df0f2 471 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRST);
cassyarduino 33:7ba5d53df0f2 472 writeOp(ENC28J60_BIT_FIELD_CLR, EIR, EIR_TXERIF | EIR_TXIF);
cassyarduino 33:7ba5d53df0f2 473 // end
cassyarduino 29:9fc1e6fb82ec 474
cassyarduino 33:7ba5d53df0f2 475 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRTS);
cassyarduino 33:7ba5d53df0f2 476 // Reset the transmit logic problem. See Rev. B4 Silicon Errata point 12.
cassyarduino 33:7ba5d53df0f2 477 //if( (readReg(EIR) & EIR_TXERIF) )
cassyarduino 33:7ba5d53df0f2 478 // {
cassyarduino 33:7ba5d53df0f2 479 // writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRTS);
cassyarduino 33:7ba5d53df0f2 480 // }
cassyarduino 33:7ba5d53df0f2 481
cassyarduino 33:7ba5d53df0f2 482 timeout = 100;
cassyarduino 33:7ba5d53df0f2 483 while (((readReg(EIR) & (EIR_TXIF | EIR_TXERIF)) == 0) && (timeout>0))
cassyarduino 33:7ba5d53df0f2 484 {
cassyarduino 33:7ba5d53df0f2 485 timeout=timeout-1;
cassyarduino 33:7ba5d53df0f2 486 delay(10);
cassyarduino 33:7ba5d53df0f2 487 #if defined(ESP8266)
cassyarduino 33:7ba5d53df0f2 488 wdt_reset();
cassyarduino 33:7ba5d53df0f2 489 #endif
cassyarduino 29:9fc1e6fb82ec 490 }
cassyarduino 33:7ba5d53df0f2 491 if (timeout==0)
cassyarduino 33:7ba5d53df0f2 492 {
cassyarduino 33:7ba5d53df0f2 493 /* Transmit hardware probably hung, try again later. */
cassyarduino 33:7ba5d53df0f2 494 /* Shouldn't happen according to errata 12 and 13. */
cassyarduino 33:7ba5d53df0f2 495 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRTS);
cassyarduino 33:7ba5d53df0f2 496 #if ACTLOGLEVEL>=LOG_WARN
cassyarduino 33:7ba5d53df0f2 497 LogObject.uart_send_strln(F("Enc28J60Network::sendPacket(memhandle handle) WARNING:Collision"));
cassyarduino 33:7ba5d53df0f2 498 #endif
cassyarduino 33:7ba5d53df0f2 499 retry=retry-1;
cassyarduino 33:7ba5d53df0f2 500 }
cassyarduino 33:7ba5d53df0f2 501 } while ((timeout == 0) && (retry != 0));
cassyarduino 33:7ba5d53df0f2 502 if (retry == 0)
cassyarduino 33:7ba5d53df0f2 503 {
cassyarduino 33:7ba5d53df0f2 504 #if ACTLOGLEVEL>=LOG_ERROR
cassyarduino 33:7ba5d53df0f2 505 LogObject.uart_send_strln(F("Enc28J60Network::sendPacket(memhandle handle) ERROR:COLLISION !!!"));
cassyarduino 33:7ba5d53df0f2 506 #endif
cassyarduino 33:7ba5d53df0f2 507 return;
cassyarduino 33:7ba5d53df0f2 508 }
cassyarduino 33:7ba5d53df0f2 509
cassyarduino 0:e3fb1267e3c3 510 //restore data on control-byte position
cassyarduino 0:e3fb1267e3c3 511 if (data)
cassyarduino 0:e3fb1267e3c3 512 writeByte(start, data);
cassyarduino 0:e3fb1267e3c3 513 }
cassyarduino 0:e3fb1267e3c3 514
cassyarduino 0:e3fb1267e3c3 515 uint16_t
cassyarduino 0:e3fb1267e3c3 516 Enc28J60Network::setReadPtr(memhandle handle, memaddress position, uint16_t len)
cassyarduino 0:e3fb1267e3c3 517 {
cassyarduino 0:e3fb1267e3c3 518 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 519 LogObject.uart_send_strln(F("Enc28J60Network::setReadPtr(memhandle handle, memaddress position, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 520 #endif
cassyarduino 0:e3fb1267e3c3 521 memblock *packet = handle == UIP_RECEIVEBUFFERHANDLE ? &receivePkt : &blocks[handle];
cassyarduino 0:e3fb1267e3c3 522 memaddress start = handle == UIP_RECEIVEBUFFERHANDLE && packet->begin + position > RXSTOP_INIT ? packet->begin + position-RXSTOP_INIT+RXSTART_INIT : packet->begin + position;
cassyarduino 0:e3fb1267e3c3 523
cassyarduino 0:e3fb1267e3c3 524 writeRegPair(ERDPTL, start);
cassyarduino 0:e3fb1267e3c3 525
cassyarduino 0:e3fb1267e3c3 526 if (len > packet->size - position)
cassyarduino 0:e3fb1267e3c3 527 len = packet->size - position;
cassyarduino 0:e3fb1267e3c3 528 return len;
cassyarduino 0:e3fb1267e3c3 529 }
cassyarduino 0:e3fb1267e3c3 530
cassyarduino 0:e3fb1267e3c3 531 uint16_t
cassyarduino 0:e3fb1267e3c3 532 Enc28J60Network::readPacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len)
cassyarduino 0:e3fb1267e3c3 533 {
cassyarduino 0:e3fb1267e3c3 534 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 535 LogObject.uart_send_strln(F("Enc28J60Network::readPacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 536 #endif
cassyarduino 0:e3fb1267e3c3 537 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 538 wdt_reset();
cassyarduino 0:e3fb1267e3c3 539 #endif
cassyarduino 0:e3fb1267e3c3 540 len = setReadPtr(handle, position, len);
cassyarduino 0:e3fb1267e3c3 541 readBuffer(len, buffer);
cassyarduino 20:fe5026169ec6 542 #if ACTLOGLEVEL>=LOG_DEBUG_V2
cassyarduino 20:fe5026169ec6 543 LogObject.uart_send_str(F("Enc28J60Network::readPacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len) DEBUG_V2: Read bytes:"));
cassyarduino 20:fe5026169ec6 544 LogObject.uart_send_dec(len);
cassyarduino 20:fe5026169ec6 545 LogObject.uart_send_str(F(" save to block("));
cassyarduino 20:fe5026169ec6 546 LogObject.uart_send_dec(handle);
cassyarduino 20:fe5026169ec6 547 LogObject.uart_send_str(F(") ["));
cassyarduino 20:fe5026169ec6 548 LogObject.uart_send_hex(position);
cassyarduino 20:fe5026169ec6 549 LogObject.uart_send_str(F("]: "));
cassyarduino 20:fe5026169ec6 550 for (uint16_t i=0; i<len; i++)
cassyarduino 20:fe5026169ec6 551 {
cassyarduino 20:fe5026169ec6 552 LogObject.uart_send_hex(buffer[i]);
cassyarduino 20:fe5026169ec6 553 LogObject.uart_send_str(F(" "));
cassyarduino 20:fe5026169ec6 554 }
cassyarduino 20:fe5026169ec6 555 LogObject.uart_send_strln(F(""));
cassyarduino 20:fe5026169ec6 556 #endif
cassyarduino 0:e3fb1267e3c3 557 return len;
cassyarduino 0:e3fb1267e3c3 558 }
cassyarduino 0:e3fb1267e3c3 559
cassyarduino 0:e3fb1267e3c3 560 uint16_t
cassyarduino 0:e3fb1267e3c3 561 Enc28J60Network::writePacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len)
cassyarduino 0:e3fb1267e3c3 562 {
cassyarduino 0:e3fb1267e3c3 563 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 564 LogObject.uart_send_str(F("Enc28J60Network::writePacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len) DEBUG_V3:Function started with len:"));
cassyarduino 0:e3fb1267e3c3 565 LogObject.uart_send_decln(len);
cassyarduino 0:e3fb1267e3c3 566 #endif
cassyarduino 0:e3fb1267e3c3 567 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 568 wdt_reset();
cassyarduino 0:e3fb1267e3c3 569 #endif
cassyarduino 0:e3fb1267e3c3 570 memblock *packet = &blocks[handle];
cassyarduino 0:e3fb1267e3c3 571 uint16_t start = packet->begin + position;
cassyarduino 0:e3fb1267e3c3 572
cassyarduino 0:e3fb1267e3c3 573 writeRegPair(EWRPTL, start);
cassyarduino 0:e3fb1267e3c3 574
cassyarduino 0:e3fb1267e3c3 575 if (len > packet->size - position)
cassyarduino 0:e3fb1267e3c3 576 len = packet->size - position;
cassyarduino 0:e3fb1267e3c3 577 writeBuffer(len, buffer);
cassyarduino 20:fe5026169ec6 578 #if ACTLOGLEVEL>=LOG_DEBUG_V2
cassyarduino 20:fe5026169ec6 579 LogObject.uart_send_str(F("Enc28J60Network::writePacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len) DEBUG_V2: Write bytes:"));
cassyarduino 20:fe5026169ec6 580 LogObject.uart_send_dec(len);
cassyarduino 20:fe5026169ec6 581 LogObject.uart_send_str(F(" save to block("));
cassyarduino 20:fe5026169ec6 582 LogObject.uart_send_dec(handle);
cassyarduino 20:fe5026169ec6 583 LogObject.uart_send_str(F(") ["));
cassyarduino 20:fe5026169ec6 584 LogObject.uart_send_hex(start);
cassyarduino 20:fe5026169ec6 585 LogObject.uart_send_str(F("]: "));
cassyarduino 20:fe5026169ec6 586 for (uint16_t i=0; i<len; i++)
cassyarduino 20:fe5026169ec6 587 {
cassyarduino 20:fe5026169ec6 588 LogObject.uart_send_hex(buffer[i]);
cassyarduino 20:fe5026169ec6 589 LogObject.uart_send_str(F(" "));
cassyarduino 20:fe5026169ec6 590 }
cassyarduino 20:fe5026169ec6 591 LogObject.uart_send_strln(F(""));
cassyarduino 20:fe5026169ec6 592 #endif
cassyarduino 0:e3fb1267e3c3 593 return len;
cassyarduino 0:e3fb1267e3c3 594 }
cassyarduino 0:e3fb1267e3c3 595
cassyarduino 0:e3fb1267e3c3 596
cassyarduino 0:e3fb1267e3c3 597 void Enc28J60Network::enableBroadcast (bool temporary) {
cassyarduino 0:e3fb1267e3c3 598 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 599 LogObject.uart_send_strln(F("Enc28J60Network::enableBroadcast (bool temporary) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 600 #endif
cassyarduino 0:e3fb1267e3c3 601 writeRegByte(ERXFCON, readRegByte(ERXFCON) | ERXFCON_BCEN);
cassyarduino 0:e3fb1267e3c3 602 if(!temporary)
cassyarduino 0:e3fb1267e3c3 603 broadcast_enabled = true;
cassyarduino 0:e3fb1267e3c3 604 }
cassyarduino 0:e3fb1267e3c3 605
cassyarduino 0:e3fb1267e3c3 606 void Enc28J60Network::disableBroadcast (bool temporary) {
cassyarduino 0:e3fb1267e3c3 607 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 608 LogObject.uart_send_strln(F("Enc28J60Network::disableBroadcast (bool temporary) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 609 #endif
cassyarduino 0:e3fb1267e3c3 610 if(!temporary)
cassyarduino 0:e3fb1267e3c3 611 broadcast_enabled = false;
cassyarduino 0:e3fb1267e3c3 612 if(!broadcast_enabled)
cassyarduino 0:e3fb1267e3c3 613 writeRegByte(ERXFCON, readRegByte(ERXFCON) & ~ERXFCON_BCEN);
cassyarduino 0:e3fb1267e3c3 614 }
cassyarduino 0:e3fb1267e3c3 615
cassyarduino 0:e3fb1267e3c3 616 void Enc28J60Network::enableMulticast (void) {
cassyarduino 0:e3fb1267e3c3 617 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 618 LogObject.uart_send_strln(F("Enc28J60Network::enableMulticast (void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 619 #endif
cassyarduino 0:e3fb1267e3c3 620 writeRegByte(ERXFCON, readRegByte(ERXFCON) | ERXFCON_MCEN);
cassyarduino 0:e3fb1267e3c3 621 }
cassyarduino 0:e3fb1267e3c3 622
cassyarduino 0:e3fb1267e3c3 623 void Enc28J60Network::disableMulticast (void) {
cassyarduino 0:e3fb1267e3c3 624 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 625 LogObject.uart_send_strln(F("Enc28J60Network::disableMulticast (void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 626 #endif
cassyarduino 0:e3fb1267e3c3 627 writeRegByte(ERXFCON, readRegByte(ERXFCON) & ~ERXFCON_MCEN);
cassyarduino 0:e3fb1267e3c3 628 }
cassyarduino 0:e3fb1267e3c3 629
cassyarduino 0:e3fb1267e3c3 630 uint8_t Enc28J60Network::readRegByte (uint8_t address) {
cassyarduino 0:e3fb1267e3c3 631 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 632 LogObject.uart_send_strln(F("Enc28J60Network::readRegByte (uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 633 #endif
cassyarduino 0:e3fb1267e3c3 634 setBank(address);
cassyarduino 0:e3fb1267e3c3 635 return readOp(ENC28J60_READ_CTRL_REG, address);
cassyarduino 0:e3fb1267e3c3 636 }
cassyarduino 0:e3fb1267e3c3 637
cassyarduino 0:e3fb1267e3c3 638 void Enc28J60Network::writeRegByte (uint8_t address, uint8_t data) {
cassyarduino 0:e3fb1267e3c3 639 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 640 LogObject.uart_send_strln(F("Enc28J60Network::writeRegByte (uint8_t address, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 641 #endif
cassyarduino 0:e3fb1267e3c3 642 setBank(address);
cassyarduino 0:e3fb1267e3c3 643 writeOp(ENC28J60_WRITE_CTRL_REG, address, data);
cassyarduino 0:e3fb1267e3c3 644 }
cassyarduino 0:e3fb1267e3c3 645
cassyarduino 0:e3fb1267e3c3 646
cassyarduino 0:e3fb1267e3c3 647 uint8_t Enc28J60Network::readByte(uint16_t addr)
cassyarduino 0:e3fb1267e3c3 648 {
cassyarduino 0:e3fb1267e3c3 649 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 650 LogObject.uart_send_strln(F("Enc28J60Network::readByte(uint16_t addr) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 651 #endif
cassyarduino 0:e3fb1267e3c3 652 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 653 wdt_reset();
cassyarduino 0:e3fb1267e3c3 654 #endif
cassyarduino 0:e3fb1267e3c3 655 writeRegPair(ERDPTL, addr);
cassyarduino 0:e3fb1267e3c3 656
cassyarduino 0:e3fb1267e3c3 657 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 658 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 659 // issue read command
cassyarduino 0:e3fb1267e3c3 660 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 661 SPI.transfer(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 662 // read data
cassyarduino 0:e3fb1267e3c3 663 uint8_t c = SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 664 #endif
cassyarduino 0:e3fb1267e3c3 665 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 666 _spi.write(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 667 // read data
cassyarduino 0:e3fb1267e3c3 668 uint8_t c = _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 669 #endif
cassyarduino 0:e3fb1267e3c3 670 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 671 return (c);
cassyarduino 0:e3fb1267e3c3 672 #else
cassyarduino 0:e3fb1267e3c3 673 // issue read command
cassyarduino 0:e3fb1267e3c3 674 SPDR = ENC28J60_READ_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 675 waitspi();
cassyarduino 0:e3fb1267e3c3 676 // read data
cassyarduino 0:e3fb1267e3c3 677 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 678 waitspi();
cassyarduino 0:e3fb1267e3c3 679 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 680 return (SPDR);
cassyarduino 0:e3fb1267e3c3 681 #endif
cassyarduino 0:e3fb1267e3c3 682 }
cassyarduino 0:e3fb1267e3c3 683
cassyarduino 0:e3fb1267e3c3 684 void Enc28J60Network::writeByte(uint16_t addr, uint8_t data)
cassyarduino 0:e3fb1267e3c3 685 {
cassyarduino 0:e3fb1267e3c3 686 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 687 LogObject.uart_send_strln(F("Enc28J60Network::writeByte(uint16_t addr, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 688 #endif
cassyarduino 0:e3fb1267e3c3 689 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 690 wdt_reset();
cassyarduino 0:e3fb1267e3c3 691 #endif
cassyarduino 0:e3fb1267e3c3 692 writeRegPair(EWRPTL, addr);
cassyarduino 0:e3fb1267e3c3 693
cassyarduino 0:e3fb1267e3c3 694 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 695 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 696 // issue write command
cassyarduino 0:e3fb1267e3c3 697 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 698 SPI.transfer(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 699 // write data
cassyarduino 0:e3fb1267e3c3 700 SPI.transfer(data);
cassyarduino 0:e3fb1267e3c3 701 #endif
cassyarduino 0:e3fb1267e3c3 702 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 703 _spi.write(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 704 // write data
cassyarduino 0:e3fb1267e3c3 705 _spi.write(data);
cassyarduino 0:e3fb1267e3c3 706 #endif
cassyarduino 0:e3fb1267e3c3 707 #else
cassyarduino 0:e3fb1267e3c3 708 // issue write command
cassyarduino 0:e3fb1267e3c3 709 SPDR = ENC28J60_WRITE_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 710 waitspi();
cassyarduino 0:e3fb1267e3c3 711 // write data
cassyarduino 0:e3fb1267e3c3 712 SPDR = data;
cassyarduino 0:e3fb1267e3c3 713 waitspi();
cassyarduino 0:e3fb1267e3c3 714 #endif
cassyarduino 0:e3fb1267e3c3 715 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 716 }
cassyarduino 0:e3fb1267e3c3 717
cassyarduino 0:e3fb1267e3c3 718 void
cassyarduino 0:e3fb1267e3c3 719 Enc28J60Network::copyPacket(memhandle dest_pkt, memaddress dest_pos, memhandle src_pkt, memaddress src_pos, uint16_t len)
cassyarduino 0:e3fb1267e3c3 720 {
cassyarduino 0:e3fb1267e3c3 721 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 722 LogObject.uart_send_strln(F("Enc28J60Network::copyPacket(memhandle dest_pkt, memaddress dest_pos, memhandle src_pkt, memaddress src_pos, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 723 #endif
cassyarduino 0:e3fb1267e3c3 724 memblock *dest = &blocks[dest_pkt];
cassyarduino 0:e3fb1267e3c3 725 memblock *src = src_pkt == UIP_RECEIVEBUFFERHANDLE ? &receivePkt : &blocks[src_pkt];
cassyarduino 0:e3fb1267e3c3 726 memaddress start = src_pkt == UIP_RECEIVEBUFFERHANDLE && src->begin + src_pos > RXSTOP_INIT ? src->begin + src_pos-RXSTOP_INIT+RXSTART_INIT : src->begin + src_pos;
cassyarduino 0:e3fb1267e3c3 727 enc28J60_mempool_block_move_callback(dest->begin+dest_pos,start,len);
cassyarduino 0:e3fb1267e3c3 728 // Move the RX read pointer to the start of the next received packet
cassyarduino 0:e3fb1267e3c3 729 // This frees the memory we just read out
cassyarduino 0:e3fb1267e3c3 730 setERXRDPT();
cassyarduino 0:e3fb1267e3c3 731 }
cassyarduino 0:e3fb1267e3c3 732
cassyarduino 0:e3fb1267e3c3 733 void
cassyarduino 0:e3fb1267e3c3 734 enc28J60_mempool_block_move_callback(memaddress dest, memaddress src, memaddress len)
cassyarduino 0:e3fb1267e3c3 735 {
cassyarduino 0:e3fb1267e3c3 736 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 737 LogObject.uart_send_strln(F("enc28J60_mempool_block_move_callback(memaddress dest, memaddress src, memaddress len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 738 #endif
cassyarduino 0:e3fb1267e3c3 739 //void
cassyarduino 0:e3fb1267e3c3 740 //Enc28J60Network::memblock_mv_cb(uint16_t dest, uint16_t src, uint16_t len)
cassyarduino 0:e3fb1267e3c3 741 //{
cassyarduino 0:e3fb1267e3c3 742 //as ENC28J60 DMA is unable to copy single bytes:
cassyarduino 0:e3fb1267e3c3 743 if (len == 1)
cassyarduino 0:e3fb1267e3c3 744 {
cassyarduino 0:e3fb1267e3c3 745 Enc28J60Network::writeByte(dest,Enc28J60Network::readByte(src));
cassyarduino 0:e3fb1267e3c3 746 }
cassyarduino 0:e3fb1267e3c3 747 else
cassyarduino 0:e3fb1267e3c3 748 {
cassyarduino 0:e3fb1267e3c3 749 // calculate address of last byte
cassyarduino 0:e3fb1267e3c3 750 len += src - 1;
cassyarduino 0:e3fb1267e3c3 751
cassyarduino 0:e3fb1267e3c3 752 /* 1. Appropriately program the EDMAST, EDMAND
cassyarduino 0:e3fb1267e3c3 753 and EDMADST register pairs. The EDMAST
cassyarduino 0:e3fb1267e3c3 754 registers should point to the first byte to copy
cassyarduino 0:e3fb1267e3c3 755 from, the EDMAND registers should point to the
cassyarduino 0:e3fb1267e3c3 756 last byte to copy and the EDMADST registers
cassyarduino 0:e3fb1267e3c3 757 should point to the first byte in the destination
cassyarduino 0:e3fb1267e3c3 758 range. The destination range will always be
cassyarduino 0:e3fb1267e3c3 759 linear, never wrapping at any values except from
cassyarduino 0:e3fb1267e3c3 760 8191 to 0 (the 8-Kbyte memory boundary).
cassyarduino 0:e3fb1267e3c3 761 Extreme care should be taken when
cassyarduino 0:e3fb1267e3c3 762 programming the start and end pointers to
cassyarduino 0:e3fb1267e3c3 763 prevent a never ending DMA operation which
cassyarduino 0:e3fb1267e3c3 764 would overwrite the entire 8-Kbyte buffer.
cassyarduino 0:e3fb1267e3c3 765 */
cassyarduino 0:e3fb1267e3c3 766 Enc28J60Network::writeRegPair(EDMASTL, src);
cassyarduino 0:e3fb1267e3c3 767 Enc28J60Network::writeRegPair(EDMADSTL, dest);
cassyarduino 0:e3fb1267e3c3 768
cassyarduino 0:e3fb1267e3c3 769 if ((src <= RXSTOP_INIT)&& (len > RXSTOP_INIT))len -= (RXSTOP_INIT-RXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 770 Enc28J60Network::writeRegPair(EDMANDL, len);
cassyarduino 0:e3fb1267e3c3 771
cassyarduino 0:e3fb1267e3c3 772 /*
cassyarduino 0:e3fb1267e3c3 773 2. If an interrupt at the end of the copy process is
cassyarduino 0:e3fb1267e3c3 774 desired, set EIE.DMAIE and EIE.INTIE and
cassyarduino 0:e3fb1267e3c3 775 clear EIR.DMAIF.
cassyarduino 0:e3fb1267e3c3 776
cassyarduino 0:e3fb1267e3c3 777 3. Verify that ECON1.CSUMEN is clear. */
cassyarduino 0:e3fb1267e3c3 778 Enc28J60Network::writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_CSUMEN);
cassyarduino 0:e3fb1267e3c3 779
cassyarduino 0:e3fb1267e3c3 780 /* 4. Start the DMA copy by setting ECON1.DMAST. */
cassyarduino 0:e3fb1267e3c3 781 Enc28J60Network::writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_DMAST);
cassyarduino 0:e3fb1267e3c3 782
cassyarduino 0:e3fb1267e3c3 783 // wait until runnig DMA is completed
cassyarduino 0:e3fb1267e3c3 784 while (Enc28J60Network::readOp(ENC28J60_READ_CTRL_REG, ECON1) & ECON1_DMAST)
cassyarduino 0:e3fb1267e3c3 785 {
cassyarduino 0:e3fb1267e3c3 786 delay(1);
cassyarduino 0:e3fb1267e3c3 787 }
cassyarduino 0:e3fb1267e3c3 788 }
cassyarduino 0:e3fb1267e3c3 789 }
cassyarduino 0:e3fb1267e3c3 790
cassyarduino 0:e3fb1267e3c3 791 void
cassyarduino 0:e3fb1267e3c3 792 Enc28J60Network::freePacket(void)
cassyarduino 0:e3fb1267e3c3 793 {
cassyarduino 0:e3fb1267e3c3 794 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 795 LogObject.uart_send_strln(F("Enc28J60Network::freePacket(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 796 #endif
cassyarduino 0:e3fb1267e3c3 797 setERXRDPT();
cassyarduino 0:e3fb1267e3c3 798 }
cassyarduino 0:e3fb1267e3c3 799
cassyarduino 0:e3fb1267e3c3 800 uint8_t
cassyarduino 0:e3fb1267e3c3 801 Enc28J60Network::readOp(uint8_t op, uint8_t address)
cassyarduino 0:e3fb1267e3c3 802 {
cassyarduino 0:e3fb1267e3c3 803 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 804 LogObject.uart_send_strln(F("Enc28J60Network::readOp(uint8_t op, uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 805 #endif
cassyarduino 0:e3fb1267e3c3 806 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 807 // issue read command
cassyarduino 0:e3fb1267e3c3 808 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 809 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 810 SPI.transfer(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 811 // read data
cassyarduino 0:e3fb1267e3c3 812 if(address & 0x80)
cassyarduino 0:e3fb1267e3c3 813 {
cassyarduino 0:e3fb1267e3c3 814 // do dummy read if needed (for mac and mii, see datasheet page 29)
cassyarduino 0:e3fb1267e3c3 815 SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 816 }
cassyarduino 0:e3fb1267e3c3 817 uint8_t c = SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 818 #endif
cassyarduino 0:e3fb1267e3c3 819 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 820 _spi.write(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 821 // read data
cassyarduino 0:e3fb1267e3c3 822 if(address & 0x80)
cassyarduino 0:e3fb1267e3c3 823 {
cassyarduino 0:e3fb1267e3c3 824 // do dummy read if needed (for mac and mii, see datasheet page 29)
cassyarduino 0:e3fb1267e3c3 825 _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 826 }
cassyarduino 0:e3fb1267e3c3 827 uint8_t c = _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 828 #endif
cassyarduino 0:e3fb1267e3c3 829 // release CS
cassyarduino 0:e3fb1267e3c3 830 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 831 return(c);
cassyarduino 0:e3fb1267e3c3 832 #else
cassyarduino 0:e3fb1267e3c3 833 // issue read command
cassyarduino 0:e3fb1267e3c3 834 SPDR = op | (address & ADDR_MASK);
cassyarduino 0:e3fb1267e3c3 835 waitspi();
cassyarduino 0:e3fb1267e3c3 836 // read data
cassyarduino 0:e3fb1267e3c3 837 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 838 waitspi();
cassyarduino 0:e3fb1267e3c3 839 // do dummy read if needed (for mac and mii, see datasheet page 29)
cassyarduino 0:e3fb1267e3c3 840 if(address & 0x80)
cassyarduino 0:e3fb1267e3c3 841 {
cassyarduino 0:e3fb1267e3c3 842 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 843 waitspi();
cassyarduino 0:e3fb1267e3c3 844 }
cassyarduino 0:e3fb1267e3c3 845 // release CS
cassyarduino 0:e3fb1267e3c3 846 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 847 return(SPDR);
cassyarduino 0:e3fb1267e3c3 848 #endif
cassyarduino 33:7ba5d53df0f2 849 #if defined(ESP8266)
cassyarduino 33:7ba5d53df0f2 850 yield();
cassyarduino 33:7ba5d53df0f2 851 #endif
cassyarduino 0:e3fb1267e3c3 852 }
cassyarduino 0:e3fb1267e3c3 853
cassyarduino 0:e3fb1267e3c3 854 void
cassyarduino 0:e3fb1267e3c3 855 Enc28J60Network::writeOp(uint8_t op, uint8_t address, uint8_t data)
cassyarduino 0:e3fb1267e3c3 856 {
cassyarduino 0:e3fb1267e3c3 857 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 858 LogObject.uart_send_strln(F("Enc28J60Network::writeOp(uint8_t op, uint8_t address, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 859 #endif
cassyarduino 0:e3fb1267e3c3 860 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 861 // issue write command
cassyarduino 0:e3fb1267e3c3 862 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 863 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 864 SPI.transfer(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 865 // write data
cassyarduino 0:e3fb1267e3c3 866 SPI.transfer(data);
cassyarduino 0:e3fb1267e3c3 867 #endif
cassyarduino 0:e3fb1267e3c3 868 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 869 _spi.write(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 870 // write data
cassyarduino 0:e3fb1267e3c3 871 _spi.write(data);
cassyarduino 0:e3fb1267e3c3 872 #endif
cassyarduino 0:e3fb1267e3c3 873 #else
cassyarduino 0:e3fb1267e3c3 874 // issue write command
cassyarduino 0:e3fb1267e3c3 875 SPDR = op | (address & ADDR_MASK);
cassyarduino 0:e3fb1267e3c3 876 waitspi();
cassyarduino 0:e3fb1267e3c3 877 // write data
cassyarduino 0:e3fb1267e3c3 878 SPDR = data;
cassyarduino 0:e3fb1267e3c3 879 waitspi();
cassyarduino 0:e3fb1267e3c3 880 #endif
cassyarduino 0:e3fb1267e3c3 881 CSPASSIVE;
cassyarduino 33:7ba5d53df0f2 882 #if defined(ESP8266)
cassyarduino 33:7ba5d53df0f2 883 yield();
cassyarduino 33:7ba5d53df0f2 884 #endif
cassyarduino 0:e3fb1267e3c3 885 }
cassyarduino 0:e3fb1267e3c3 886
cassyarduino 0:e3fb1267e3c3 887 void
cassyarduino 0:e3fb1267e3c3 888 Enc28J60Network::readBuffer(uint16_t len, uint8_t* data)
cassyarduino 0:e3fb1267e3c3 889 {
cassyarduino 0:e3fb1267e3c3 890 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 891 LogObject.uart_send_strln(F("Enc28J60Network::readBuffer(uint16_t len, uint8_t* data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 892 #endif
cassyarduino 0:e3fb1267e3c3 893 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 894 // issue read command
cassyarduino 0:e3fb1267e3c3 895 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 896 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 897 SPI.transfer(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 898 #endif
cassyarduino 0:e3fb1267e3c3 899 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 900 _spi.write(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 901 #endif
cassyarduino 0:e3fb1267e3c3 902 #else
cassyarduino 0:e3fb1267e3c3 903 SPDR = ENC28J60_READ_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 904 waitspi();
cassyarduino 0:e3fb1267e3c3 905 #endif
cassyarduino 0:e3fb1267e3c3 906 while(len)
cassyarduino 0:e3fb1267e3c3 907 {
cassyarduino 0:e3fb1267e3c3 908 len--;
cassyarduino 0:e3fb1267e3c3 909 // read data
cassyarduino 0:e3fb1267e3c3 910 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 911 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 912 *data = SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 913 #endif
cassyarduino 0:e3fb1267e3c3 914 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 915 *data = _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 916 #endif
cassyarduino 0:e3fb1267e3c3 917 #else
cassyarduino 0:e3fb1267e3c3 918 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 919 waitspi();
cassyarduino 0:e3fb1267e3c3 920 *data = SPDR;
cassyarduino 0:e3fb1267e3c3 921 #endif
cassyarduino 0:e3fb1267e3c3 922 data++;
cassyarduino 0:e3fb1267e3c3 923 }
cassyarduino 0:e3fb1267e3c3 924 //*data='\0';
cassyarduino 0:e3fb1267e3c3 925 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 926 }
cassyarduino 0:e3fb1267e3c3 927
cassyarduino 0:e3fb1267e3c3 928 void
cassyarduino 0:e3fb1267e3c3 929 Enc28J60Network::writeBuffer(uint16_t len, uint8_t* data)
cassyarduino 0:e3fb1267e3c3 930 {
cassyarduino 0:e3fb1267e3c3 931 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 932 LogObject.uart_send_strln(F("Enc28J60Network::writeBuffer(uint16_t len, uint8_t* data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 933 #endif
cassyarduino 0:e3fb1267e3c3 934 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 935 // issue write command
cassyarduino 0:e3fb1267e3c3 936 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 937 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 938 SPI.transfer(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 939 #endif
cassyarduino 0:e3fb1267e3c3 940 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 941 _spi.write(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 942 #endif
cassyarduino 0:e3fb1267e3c3 943 #else
cassyarduino 0:e3fb1267e3c3 944 SPDR = ENC28J60_WRITE_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 945 waitspi();
cassyarduino 0:e3fb1267e3c3 946 #endif
cassyarduino 0:e3fb1267e3c3 947 while(len)
cassyarduino 0:e3fb1267e3c3 948 {
cassyarduino 0:e3fb1267e3c3 949 len--;
cassyarduino 0:e3fb1267e3c3 950 // write data
cassyarduino 0:e3fb1267e3c3 951 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 952 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 953 SPI.transfer(*data);
cassyarduino 0:e3fb1267e3c3 954 #endif
cassyarduino 0:e3fb1267e3c3 955 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 956 _spi.write(*data);
cassyarduino 0:e3fb1267e3c3 957 #endif
cassyarduino 0:e3fb1267e3c3 958 data++;
cassyarduino 0:e3fb1267e3c3 959 #else
cassyarduino 0:e3fb1267e3c3 960 SPDR = *data;
cassyarduino 0:e3fb1267e3c3 961 data++;
cassyarduino 0:e3fb1267e3c3 962 waitspi();
cassyarduino 0:e3fb1267e3c3 963 #endif
cassyarduino 0:e3fb1267e3c3 964 }
cassyarduino 0:e3fb1267e3c3 965 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 966 }
cassyarduino 0:e3fb1267e3c3 967
cassyarduino 0:e3fb1267e3c3 968 void
cassyarduino 0:e3fb1267e3c3 969 Enc28J60Network::setBank(uint8_t address)
cassyarduino 0:e3fb1267e3c3 970 {
cassyarduino 0:e3fb1267e3c3 971 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 972 LogObject.uart_send_strln(F("Enc28J60Network::setBank(uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 973 #endif
cassyarduino 0:e3fb1267e3c3 974 // set the bank (if needed)
cassyarduino 0:e3fb1267e3c3 975 if((address & BANK_MASK) != bank)
cassyarduino 0:e3fb1267e3c3 976 {
cassyarduino 0:e3fb1267e3c3 977 // set the bank
cassyarduino 0:e3fb1267e3c3 978 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, (ECON1_BSEL1|ECON1_BSEL0));
cassyarduino 0:e3fb1267e3c3 979 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, (address & BANK_MASK)>>5);
cassyarduino 0:e3fb1267e3c3 980 bank = (address & BANK_MASK);
cassyarduino 0:e3fb1267e3c3 981 }
cassyarduino 0:e3fb1267e3c3 982 }
cassyarduino 0:e3fb1267e3c3 983
cassyarduino 0:e3fb1267e3c3 984 uint8_t
cassyarduino 0:e3fb1267e3c3 985 Enc28J60Network::readReg(uint8_t address)
cassyarduino 0:e3fb1267e3c3 986 {
cassyarduino 0:e3fb1267e3c3 987 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 988 LogObject.uart_send_strln(F("Enc28J60Network::readReg(uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 989 #endif
cassyarduino 0:e3fb1267e3c3 990 // set the bank
cassyarduino 0:e3fb1267e3c3 991 setBank(address);
cassyarduino 0:e3fb1267e3c3 992 // do the read
cassyarduino 0:e3fb1267e3c3 993 return readOp(ENC28J60_READ_CTRL_REG, address);
cassyarduino 0:e3fb1267e3c3 994 }
cassyarduino 0:e3fb1267e3c3 995
cassyarduino 0:e3fb1267e3c3 996 void
cassyarduino 0:e3fb1267e3c3 997 Enc28J60Network::writeReg(uint8_t address, uint8_t data)
cassyarduino 0:e3fb1267e3c3 998 {
cassyarduino 0:e3fb1267e3c3 999 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1000 LogObject.uart_send_strln(F("Enc28J60Network::writeReg(uint8_t address, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1001 #endif
cassyarduino 0:e3fb1267e3c3 1002 // set the bank
cassyarduino 0:e3fb1267e3c3 1003 setBank(address);
cassyarduino 0:e3fb1267e3c3 1004 // do the write
cassyarduino 0:e3fb1267e3c3 1005 writeOp(ENC28J60_WRITE_CTRL_REG, address, data);
cassyarduino 0:e3fb1267e3c3 1006 }
cassyarduino 0:e3fb1267e3c3 1007
cassyarduino 0:e3fb1267e3c3 1008 void
cassyarduino 0:e3fb1267e3c3 1009 Enc28J60Network::writeRegPair(uint8_t address, uint16_t data)
cassyarduino 0:e3fb1267e3c3 1010 {
cassyarduino 0:e3fb1267e3c3 1011 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1012 LogObject.uart_send_strln(F("Enc28J60Network::writeRegPair(uint8_t address, uint16_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1013 #endif
cassyarduino 0:e3fb1267e3c3 1014 // set the bank
cassyarduino 0:e3fb1267e3c3 1015 setBank(address);
cassyarduino 0:e3fb1267e3c3 1016 // do the write
cassyarduino 0:e3fb1267e3c3 1017 writeOp(ENC28J60_WRITE_CTRL_REG, address, (data&0xFF));
cassyarduino 0:e3fb1267e3c3 1018 writeOp(ENC28J60_WRITE_CTRL_REG, address+1, (data) >> 8);
cassyarduino 0:e3fb1267e3c3 1019 }
cassyarduino 0:e3fb1267e3c3 1020
cassyarduino 0:e3fb1267e3c3 1021 void
cassyarduino 0:e3fb1267e3c3 1022 Enc28J60Network::phyWrite(uint8_t address, uint16_t data)
cassyarduino 0:e3fb1267e3c3 1023 {
cassyarduino 0:e3fb1267e3c3 1024 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1025 LogObject.uart_send_strln(F("Enc28J60Network::phyWrite(uint8_t address, uint16_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1026 #endif
cassyarduino 0:e3fb1267e3c3 1027 unsigned int timeout = 15;
cassyarduino 0:e3fb1267e3c3 1028 // set the PHY register address
cassyarduino 0:e3fb1267e3c3 1029 writeReg(MIREGADR, address);
cassyarduino 0:e3fb1267e3c3 1030 // write the PHY data
cassyarduino 0:e3fb1267e3c3 1031 writeRegPair(MIWRL, data);
cassyarduino 0:e3fb1267e3c3 1032 // wait until the PHY write completes
cassyarduino 0:e3fb1267e3c3 1033 while (readReg(MISTAT) & MISTAT_BUSY)
cassyarduino 0:e3fb1267e3c3 1034 {
cassyarduino 0:e3fb1267e3c3 1035 delay(10);
cassyarduino 0:e3fb1267e3c3 1036 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 1037 wdt_reset();
cassyarduino 0:e3fb1267e3c3 1038 #endif
cassyarduino 0:e3fb1267e3c3 1039 if (--timeout == 0)
cassyarduino 0:e3fb1267e3c3 1040 {
cassyarduino 0:e3fb1267e3c3 1041 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 1042 LogObject.uart_send_strln(F("Enc28J60Network::phyWrite ERROR:TIMEOUT !!!"));
cassyarduino 0:e3fb1267e3c3 1043 #endif
cassyarduino 0:e3fb1267e3c3 1044 return;
cassyarduino 0:e3fb1267e3c3 1045 }
cassyarduino 0:e3fb1267e3c3 1046 }
cassyarduino 0:e3fb1267e3c3 1047 }
cassyarduino 0:e3fb1267e3c3 1048
cassyarduino 0:e3fb1267e3c3 1049 uint16_t
cassyarduino 0:e3fb1267e3c3 1050 Enc28J60Network::phyRead(uint8_t address)
cassyarduino 0:e3fb1267e3c3 1051 {
cassyarduino 0:e3fb1267e3c3 1052 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1053 LogObject.uart_send_strln(F("Enc28J60Network::phyRead(uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1054 #endif
cassyarduino 0:e3fb1267e3c3 1055 unsigned int timeout = 15;
cassyarduino 0:e3fb1267e3c3 1056 writeReg(MIREGADR,address);
cassyarduino 0:e3fb1267e3c3 1057 writeReg(MICMD, MICMD_MIIRD);
cassyarduino 0:e3fb1267e3c3 1058 // wait until the PHY read completes
cassyarduino 0:e3fb1267e3c3 1059 while(readReg(MISTAT) & MISTAT_BUSY)
cassyarduino 0:e3fb1267e3c3 1060 {
cassyarduino 0:e3fb1267e3c3 1061 delay(10);
cassyarduino 0:e3fb1267e3c3 1062 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 1063 wdt_reset();
cassyarduino 0:e3fb1267e3c3 1064 #endif
cassyarduino 0:e3fb1267e3c3 1065 if (--timeout == 0)
cassyarduino 0:e3fb1267e3c3 1066 {
cassyarduino 0:e3fb1267e3c3 1067 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 1068 LogObject.uart_send_strln(F("Enc28J60Network::phyRead ERROR:TIMEOUT !!!"));
cassyarduino 0:e3fb1267e3c3 1069 #endif
cassyarduino 0:e3fb1267e3c3 1070 return 0;
cassyarduino 0:e3fb1267e3c3 1071 }
cassyarduino 0:e3fb1267e3c3 1072 }
cassyarduino 0:e3fb1267e3c3 1073 writeReg(MICMD, 0);
cassyarduino 0:e3fb1267e3c3 1074 return (readReg(MIRDL) | readReg(MIRDH) << 8);
cassyarduino 0:e3fb1267e3c3 1075 }
cassyarduino 0:e3fb1267e3c3 1076
cassyarduino 0:e3fb1267e3c3 1077 void
cassyarduino 0:e3fb1267e3c3 1078 Enc28J60Network::clkout(uint8_t clk)
cassyarduino 0:e3fb1267e3c3 1079 {
cassyarduino 0:e3fb1267e3c3 1080 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1081 LogObject.uart_send_strln(F("Enc28J60Network::clkout(uint8_t clk) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1082 #endif
cassyarduino 0:e3fb1267e3c3 1083 //setup clkout: 2 is 12.5MHz:
cassyarduino 0:e3fb1267e3c3 1084 writeReg(ECOCON, clk & 0x7);
cassyarduino 0:e3fb1267e3c3 1085 }
cassyarduino 0:e3fb1267e3c3 1086
cassyarduino 0:e3fb1267e3c3 1087 uint16_t
cassyarduino 0:e3fb1267e3c3 1088 Enc28J60Network::chksum(uint16_t sum, memhandle handle, memaddress pos, uint16_t len)
cassyarduino 0:e3fb1267e3c3 1089 {
cassyarduino 0:e3fb1267e3c3 1090 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1091 LogObject.uart_send_strln(F("Enc28J60Network::chksum(uint16_t sum, memhandle handle, memaddress pos, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1092 #endif
cassyarduino 0:e3fb1267e3c3 1093 uint16_t t;
cassyarduino 0:e3fb1267e3c3 1094 len = setReadPtr(handle, pos, len)-1;
cassyarduino 0:e3fb1267e3c3 1095 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 1096 // issue read command
cassyarduino 0:e3fb1267e3c3 1097 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 1098 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 1099 SPI.transfer(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 1100 #endif
cassyarduino 0:e3fb1267e3c3 1101 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 1102 _spi.write(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 1103 #endif
cassyarduino 0:e3fb1267e3c3 1104 #else
cassyarduino 0:e3fb1267e3c3 1105 SPDR = ENC28J60_READ_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 1106 waitspi();
cassyarduino 0:e3fb1267e3c3 1107 #endif
cassyarduino 0:e3fb1267e3c3 1108 uint16_t i;
cassyarduino 0:e3fb1267e3c3 1109 for (i = 0; i < len; i+=2)
cassyarduino 0:e3fb1267e3c3 1110 {
cassyarduino 0:e3fb1267e3c3 1111 // read data
cassyarduino 0:e3fb1267e3c3 1112 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 1113 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 1114 t = SPI.transfer(0x00) << 8;
cassyarduino 0:e3fb1267e3c3 1115 t += SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 1116 #endif
cassyarduino 0:e3fb1267e3c3 1117 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 1118 t = _spi.write(0x00) << 8;
cassyarduino 0:e3fb1267e3c3 1119 t += _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 1120 #endif
cassyarduino 0:e3fb1267e3c3 1121 #else
cassyarduino 0:e3fb1267e3c3 1122 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 1123 waitspi();
cassyarduino 0:e3fb1267e3c3 1124 t = SPDR << 8;
cassyarduino 0:e3fb1267e3c3 1125 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 1126 waitspi();
cassyarduino 0:e3fb1267e3c3 1127 t += SPDR;
cassyarduino 0:e3fb1267e3c3 1128 #endif
cassyarduino 0:e3fb1267e3c3 1129 sum += t;
cassyarduino 0:e3fb1267e3c3 1130 if(sum < t)
cassyarduino 0:e3fb1267e3c3 1131 {
cassyarduino 0:e3fb1267e3c3 1132 sum++; /* carry */
cassyarduino 0:e3fb1267e3c3 1133 }
cassyarduino 0:e3fb1267e3c3 1134 }
cassyarduino 0:e3fb1267e3c3 1135 if(i == len)
cassyarduino 0:e3fb1267e3c3 1136 {
cassyarduino 0:e3fb1267e3c3 1137 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 1138 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 1139 t = (SPI.transfer(0x00) << 8) + 0;
cassyarduino 0:e3fb1267e3c3 1140 #endif
cassyarduino 0:e3fb1267e3c3 1141 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 1142 t = (_spi.write(0x00) << 8) + 0;
cassyarduino 0:e3fb1267e3c3 1143 #endif
cassyarduino 0:e3fb1267e3c3 1144 #else
cassyarduino 0:e3fb1267e3c3 1145 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 1146 waitspi();
cassyarduino 0:e3fb1267e3c3 1147 t = (SPDR << 8) + 0;
cassyarduino 0:e3fb1267e3c3 1148 #endif
cassyarduino 0:e3fb1267e3c3 1149 sum += t;
cassyarduino 0:e3fb1267e3c3 1150 if(sum < t)
cassyarduino 0:e3fb1267e3c3 1151 {
cassyarduino 0:e3fb1267e3c3 1152 sum++; /* carry */
cassyarduino 0:e3fb1267e3c3 1153 }
cassyarduino 0:e3fb1267e3c3 1154 }
cassyarduino 0:e3fb1267e3c3 1155 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 1156
cassyarduino 0:e3fb1267e3c3 1157 /* Return sum in host byte order. */
cassyarduino 0:e3fb1267e3c3 1158 return sum;
cassyarduino 0:e3fb1267e3c3 1159 }
cassyarduino 0:e3fb1267e3c3 1160
cassyarduino 0:e3fb1267e3c3 1161 void
cassyarduino 0:e3fb1267e3c3 1162 Enc28J60Network::powerOff(void)
cassyarduino 0:e3fb1267e3c3 1163 {
cassyarduino 0:e3fb1267e3c3 1164 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1165 LogObject.uart_send_strln(F("Enc28J60Network::powerOff(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1166 #endif
cassyarduino 0:e3fb1267e3c3 1167 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_RXEN);
cassyarduino 0:e3fb1267e3c3 1168 delay(50);
cassyarduino 0:e3fb1267e3c3 1169 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_VRPS);
cassyarduino 0:e3fb1267e3c3 1170 delay(50);
cassyarduino 0:e3fb1267e3c3 1171 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PWRSV);
cassyarduino 0:e3fb1267e3c3 1172 }
cassyarduino 0:e3fb1267e3c3 1173
cassyarduino 0:e3fb1267e3c3 1174 void
cassyarduino 0:e3fb1267e3c3 1175 Enc28J60Network::powerOn(void)
cassyarduino 0:e3fb1267e3c3 1176 {
cassyarduino 0:e3fb1267e3c3 1177 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1178 LogObject.uart_send_strln(F("Enc28J60Network::powerOn(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1179 #endif
cassyarduino 0:e3fb1267e3c3 1180 writeOp(ENC28J60_BIT_FIELD_CLR, ECON2, ECON2_PWRSV);
cassyarduino 0:e3fb1267e3c3 1181 delay(50);
cassyarduino 0:e3fb1267e3c3 1182 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
cassyarduino 0:e3fb1267e3c3 1183 delay(50);
cassyarduino 0:e3fb1267e3c3 1184 }
cassyarduino 0:e3fb1267e3c3 1185
cassyarduino 0:e3fb1267e3c3 1186 // read erevid from object:
cassyarduino 0:e3fb1267e3c3 1187 uint8_t
cassyarduino 0:e3fb1267e3c3 1188 Enc28J60Network::geterevid(void)
cassyarduino 0:e3fb1267e3c3 1189 {
cassyarduino 0:e3fb1267e3c3 1190 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1191 LogObject.uart_send_str(F("Enc28J60Network::geterevid(void) DEBUG_V3:Function started and return:"));
cassyarduino 0:e3fb1267e3c3 1192 LogObject.uart_send_decln(erevid);
cassyarduino 0:e3fb1267e3c3 1193 #endif
cassyarduino 0:e3fb1267e3c3 1194 return(erevid);
cassyarduino 0:e3fb1267e3c3 1195 }
cassyarduino 0:e3fb1267e3c3 1196
cassyarduino 0:e3fb1267e3c3 1197 // read the phstat2 of the chip:
cassyarduino 0:e3fb1267e3c3 1198 uint16_t
cassyarduino 0:e3fb1267e3c3 1199 Enc28J60Network::PhyStatus(void)
cassyarduino 0:e3fb1267e3c3 1200 {
cassyarduino 0:e3fb1267e3c3 1201 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1202 LogObject.uart_send_str(F("Enc28J60Network::PhyStatus(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1203 LogObject.uart_send_decln(erevid);
cassyarduino 0:e3fb1267e3c3 1204 #endif
cassyarduino 0:e3fb1267e3c3 1205 uint16_t phstat2;
cassyarduino 0:e3fb1267e3c3 1206 phstat2=phyRead(PHSTAT2);
cassyarduino 0:e3fb1267e3c3 1207 if ((phstat2 & 0x20) > 0) {phstat2=phstat2 &0x100;}
cassyarduino 0:e3fb1267e3c3 1208 phstat2=(phstat2 & 0xFF00) | erevid;
cassyarduino 0:e3fb1267e3c3 1209 if ((phstat2 & 0x8000) > 0) {phstat2=0;}
cassyarduino 0:e3fb1267e3c3 1210 return phstat2;
cassyarduino 0:e3fb1267e3c3 1211 }
cassyarduino 0:e3fb1267e3c3 1212
cassyarduino 0:e3fb1267e3c3 1213 bool
cassyarduino 0:e3fb1267e3c3 1214 Enc28J60Network::linkStatus(void)
cassyarduino 0:e3fb1267e3c3 1215 {
cassyarduino 0:e3fb1267e3c3 1216 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1217 LogObject.uart_send_strln(F("Enc28J60Network::linkStatus(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1218 #endif
cassyarduino 0:e3fb1267e3c3 1219 return (phyRead(PHSTAT2) & 0x0400) > 0;
cassyarduino 0:e3fb1267e3c3 1220 }
cassyarduino 0:e3fb1267e3c3 1221
cassyarduino 0:e3fb1267e3c3 1222 Enc28J60Network Enc28J60;