UIPEthernet library for Arduino IDE, Eclipse with arduino plugin and MBED/SMeshStudio (AVR,STM32F,ESP8266,Intel ARC32,Nordic nRF51,Teensy boards,Realtek Ameba(RTL8195A,RTL8710)), ENC28j60 network chip. Compatible with Wiznet W5100 Ethernet library API. Compiled and tested on Nucleo-F302R8. Master repository is: https://github.com/UIPEthernet/UIPEthernet/

Committer:
cassyarduino
Date:
Wed Jan 04 18:32:00 2017 +0100
Revision:
19:e416943f7119
Parent:
17:be34a75aa9a7
Child:
20:fe5026169ec6
Changes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cassyarduino 0:e3fb1267e3c3 1 /*
cassyarduino 0:e3fb1267e3c3 2 Enc28J60NetworkClass.h
cassyarduino 0:e3fb1267e3c3 3 UIPEthernet network driver for Microchip ENC28J60 Ethernet Interface.
cassyarduino 0:e3fb1267e3c3 4
cassyarduino 0:e3fb1267e3c3 5 Copyright (c) 2013 Norbert Truchsess <norbert.truchsess@t-online.de>
cassyarduino 0:e3fb1267e3c3 6 All rights reserved.
cassyarduino 0:e3fb1267e3c3 7
cassyarduino 0:e3fb1267e3c3 8 based on enc28j60.c file from the AVRlib library by Pascal Stang.
cassyarduino 0:e3fb1267e3c3 9 For AVRlib See http://www.procyonengineering.com/
cassyarduino 0:e3fb1267e3c3 10
cassyarduino 0:e3fb1267e3c3 11 This program is free software: you can redistribute it and/or modify
cassyarduino 0:e3fb1267e3c3 12 it under the terms of the GNU General Public License as published by
cassyarduino 0:e3fb1267e3c3 13 the Free Software Foundation, either version 3 of the License, or
cassyarduino 0:e3fb1267e3c3 14 (at your option) any later version.
cassyarduino 0:e3fb1267e3c3 15
cassyarduino 0:e3fb1267e3c3 16 This program is distributed in the hope that it will be useful,
cassyarduino 0:e3fb1267e3c3 17 but WITHOUT ANY WARRANTY; without even the implied warranty of
cassyarduino 0:e3fb1267e3c3 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
cassyarduino 0:e3fb1267e3c3 19 GNU General Public License for more details.
cassyarduino 0:e3fb1267e3c3 20
cassyarduino 0:e3fb1267e3c3 21 You should have received a copy of the GNU General Public License
cassyarduino 0:e3fb1267e3c3 22 along with this program. If not, see <http://www.gnu.org/licenses/>.
cassyarduino 0:e3fb1267e3c3 23 */
cassyarduino 0:e3fb1267e3c3 24
cassyarduino 0:e3fb1267e3c3 25 #include "Enc28J60Network.h"
cassyarduino 0:e3fb1267e3c3 26 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 27 #include "Arduino.h"
cassyarduino 0:e3fb1267e3c3 28 #endif
cassyarduino 0:e3fb1267e3c3 29 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 30 #include <mbed.h>
cassyarduino 0:e3fb1267e3c3 31 #define delay(x) wait_ms(x)
cassyarduino 0:e3fb1267e3c3 32 #endif
cassyarduino 0:e3fb1267e3c3 33 #include "logging.h"
cassyarduino 0:e3fb1267e3c3 34
cassyarduino 0:e3fb1267e3c3 35 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 36 #if defined(ARDUINO)
cassyarduino 19:e416943f7119 37 #if !defined(STM32F3)
cassyarduino 19:e416943f7119 38 #include <SPI.h>
cassyarduino 19:e416943f7119 39 extern SPIClass SPI;
cassyarduino 19:e416943f7119 40 #else
cassyarduino 19:e416943f7119 41 #include "HardwareSPI.h"
cassyarduino 19:e416943f7119 42 extern HardwareSPI SPI(1);
cassyarduino 19:e416943f7119 43 #endif
cassyarduino 0:e3fb1267e3c3 44 #endif
cassyarduino 0:e3fb1267e3c3 45 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 46 SPI _spi(SPI_MOSI,SPI_MISO,SPI_SCK);
cassyarduino 0:e3fb1267e3c3 47 DigitalOut _cs(ENC28J60_CONTROL_CS);
cassyarduino 0:e3fb1267e3c3 48 Serial LogObject(SERIAL_TX,SERIAL_RX);
cassyarduino 0:e3fb1267e3c3 49 #endif
cassyarduino 0:e3fb1267e3c3 50 #endif
cassyarduino 0:e3fb1267e3c3 51
cassyarduino 0:e3fb1267e3c3 52 extern "C" {
cassyarduino 0:e3fb1267e3c3 53 #if defined(ARDUINO_ARCH_AVR)
cassyarduino 0:e3fb1267e3c3 54 // AVR-specific code
cassyarduino 0:e3fb1267e3c3 55 #include <avr/io.h>
cassyarduino 0:e3fb1267e3c3 56 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 57 // SAM-specific code
cassyarduino 0:e3fb1267e3c3 58 #else
cassyarduino 0:e3fb1267e3c3 59 // generic, non-platform specific code
cassyarduino 0:e3fb1267e3c3 60 #endif
cassyarduino 0:e3fb1267e3c3 61 #include "enc28j60.h"
cassyarduino 0:e3fb1267e3c3 62 #include "uip.h"
cassyarduino 0:e3fb1267e3c3 63 }
cassyarduino 0:e3fb1267e3c3 64
cassyarduino 0:e3fb1267e3c3 65 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 66 // set CS to 0 = active
cassyarduino 0:e3fb1267e3c3 67 #define CSACTIVE digitalWrite(ENC28J60_CONTROL_CS, LOW)
cassyarduino 0:e3fb1267e3c3 68 // set CS to 1 = passive
cassyarduino 0:e3fb1267e3c3 69 #define CSPASSIVE digitalWrite(ENC28J60_CONTROL_CS, HIGH)
cassyarduino 0:e3fb1267e3c3 70 #endif
cassyarduino 0:e3fb1267e3c3 71 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 72 // set CS to 0 = active
cassyarduino 0:e3fb1267e3c3 73 #define CSACTIVE _cs=0
cassyarduino 0:e3fb1267e3c3 74 // set CS to 1 = passive
cassyarduino 0:e3fb1267e3c3 75 #define CSPASSIVE _cs=1
cassyarduino 0:e3fb1267e3c3 76 #endif
cassyarduino 0:e3fb1267e3c3 77
cassyarduino 0:e3fb1267e3c3 78 //
cassyarduino 0:e3fb1267e3c3 79 #if defined(ARDUINO_ARCH_AVR)
cassyarduino 0:e3fb1267e3c3 80 #define waitspi() while(!(SPSR&(1<<SPIF)))
cassyarduino 0:e3fb1267e3c3 81 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 82 #if ENC28J60_CONTROL_CS==BOARD_SPI_SS0 or ENC28J60_CONTROL_CS==BOARD_SPI_SS1 or ENC28J60_CONTROL_CS==BOARD_SPI_SS2 or ENC28J60_CONTROL_CS==BOARD_SPI_SS3
cassyarduino 0:e3fb1267e3c3 83 #define ENC28J60_USE_SPILIB_EXT 1
cassyarduino 0:e3fb1267e3c3 84 #endif
cassyarduino 0:e3fb1267e3c3 85 #endif
cassyarduino 0:e3fb1267e3c3 86
cassyarduino 0:e3fb1267e3c3 87 uint16_t Enc28J60Network::nextPacketPtr;
cassyarduino 0:e3fb1267e3c3 88 uint8_t Enc28J60Network::bank=0xff;
cassyarduino 0:e3fb1267e3c3 89 uint8_t Enc28J60Network::erevid=0;
cassyarduino 0:e3fb1267e3c3 90
cassyarduino 0:e3fb1267e3c3 91 struct memblock Enc28J60Network::receivePkt;
cassyarduino 0:e3fb1267e3c3 92
cassyarduino 0:e3fb1267e3c3 93 bool Enc28J60Network::broadcast_enabled = false;
cassyarduino 0:e3fb1267e3c3 94
cassyarduino 0:e3fb1267e3c3 95
cassyarduino 0:e3fb1267e3c3 96 void Enc28J60Network::init(uint8_t* macaddr)
cassyarduino 0:e3fb1267e3c3 97 {
cassyarduino 0:e3fb1267e3c3 98 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 99 LogObject.uart_send_strln(F("Enc28J60Network::init(uint8_t* macaddr) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 100 #endif
cassyarduino 0:e3fb1267e3c3 101 receivePkt.begin = 0;
cassyarduino 0:e3fb1267e3c3 102 receivePkt.size = 0;
cassyarduino 0:e3fb1267e3c3 103
cassyarduino 0:e3fb1267e3c3 104 unsigned int timeout = 15;
cassyarduino 0:e3fb1267e3c3 105 MemoryPool::init(); // 1 byte in between RX_STOP_INIT and pool to allow prepending of controlbyte
cassyarduino 0:e3fb1267e3c3 106 // initialize I/O
cassyarduino 0:e3fb1267e3c3 107 // ss as output:
cassyarduino 0:e3fb1267e3c3 108 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 109 pinMode(ENC28J60_CONTROL_CS, OUTPUT);
cassyarduino 0:e3fb1267e3c3 110 #endif
cassyarduino 0:e3fb1267e3c3 111 CSPASSIVE; // ss=0
cassyarduino 0:e3fb1267e3c3 112 //
cassyarduino 0:e3fb1267e3c3 113
cassyarduino 0:e3fb1267e3c3 114 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 115 LogObject.uart_send_str(F("ENC28J60::init DEBUG:csPin = "));
cassyarduino 0:e3fb1267e3c3 116 LogObject.uart_send_decln(ENC28J60_CONTROL_CS);
cassyarduino 0:e3fb1267e3c3 117 LogObject.uart_send_str(F("ENC28J60::init DEBUG:miso = "));
cassyarduino 0:e3fb1267e3c3 118 LogObject.uart_send_decln(SPI_MISO);
cassyarduino 0:e3fb1267e3c3 119 LogObject.uart_send_str(F("ENC28J60::init DEBUG:mosi = "));
cassyarduino 0:e3fb1267e3c3 120 LogObject.uart_send_decln(SPI_MOSI);
cassyarduino 0:e3fb1267e3c3 121 LogObject.uart_send_str(F("ENC28J60::init DEBUG:sck = "));
cassyarduino 0:e3fb1267e3c3 122 LogObject.uart_send_decln(SPI_SCK);
cassyarduino 0:e3fb1267e3c3 123 #endif
cassyarduino 0:e3fb1267e3c3 124 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 125 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 126 LogObject.uart_send_strln(F("ENC28J60::init DEBUG:Use SPI lib SPI.begin()"));
cassyarduino 0:e3fb1267e3c3 127 #endif
cassyarduino 0:e3fb1267e3c3 128 #if defined(ARDUINO)
cassyarduino 19:e416943f7119 129 #if defined(__STM32F3__) || defined(STM32F3)
cassyarduino 19:e416943f7119 130 SPI.begin(SPI_9MHZ, MSBFIRST, 0);
cassyarduino 19:e416943f7119 131 #else
cassyarduino 19:e416943f7119 132 SPI.begin();
cassyarduino 19:e416943f7119 133 #endif
cassyarduino 0:e3fb1267e3c3 134 #endif
cassyarduino 0:e3fb1267e3c3 135 #if defined(ARDUINO_ARCH_AVR)
cassyarduino 0:e3fb1267e3c3 136 // AVR-specific code
cassyarduino 0:e3fb1267e3c3 137 SPI.setClockDivider(SPI_CLOCK_DIV2); //results in 8MHZ at 16MHZ system clock.
cassyarduino 0:e3fb1267e3c3 138 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 139 // SAM-specific code
cassyarduino 0:e3fb1267e3c3 140 SPI.setClockDivider(10); //defaults to 21 which results in aprox. 4MHZ. A 10 should result in a little more than 8MHZ.
cassyarduino 0:e3fb1267e3c3 141 #elif defined(__STM32F1__) || defined(__STM32F3__) || defined(__STM32F4__)
cassyarduino 0:e3fb1267e3c3 142 // generic, non-platform specific code
cassyarduino 0:e3fb1267e3c3 143 #define USE_STM32F1_DMAC 1 //on STM32
cassyarduino 0:e3fb1267e3c3 144 // BOARD_NR_SPI >= 1 BOARD_SPI1_NSS_PIN, BOARD_SPI1_SCK_PIN, BOARD_SPI1_MISO_PIN, BOARD_SPI1_MOSI_PIN
cassyarduino 0:e3fb1267e3c3 145 SPI.setBitOrder(MSBFIRST);
cassyarduino 0:e3fb1267e3c3 146 SPI.setDataMode(SPI_MODE0);
cassyarduino 0:e3fb1267e3c3 147 SPI.setClockDivider(SPI_CLOCK_DIV8); //value 8 the result is 9MHz at 72MHz clock.
cassyarduino 0:e3fb1267e3c3 148 #else
cassyarduino 0:e3fb1267e3c3 149 #if defined(ARDUINO)
cassyarduino 19:e416943f7119 150 #if !defined(__STM32F3__) && !defined(STM32F3)
cassyarduino 19:e416943f7119 151 SPI.setBitOrder(MSBFIRST);
cassyarduino 19:e416943f7119 152 #endif
cassyarduino 0:e3fb1267e3c3 153 //SPI.setDataMode(SPI_MODE0);
cassyarduino 0:e3fb1267e3c3 154 //SPI.setClockDivider(SPI_CLOCK_DIV16);
cassyarduino 0:e3fb1267e3c3 155 #endif
cassyarduino 0:e3fb1267e3c3 156 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 157 _spi.format(8, 0); // 8bit, mode 0
cassyarduino 0:e3fb1267e3c3 158 _spi.frequency(7000000); // 7MHz
cassyarduino 0:e3fb1267e3c3 159 #endif
cassyarduino 0:e3fb1267e3c3 160 #endif
cassyarduino 0:e3fb1267e3c3 161 #else
cassyarduino 0:e3fb1267e3c3 162 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 163 LogObject.uart_send_strln(F("ENC28J60::init DEBUG:Use Native hardware SPI"));
cassyarduino 0:e3fb1267e3c3 164 #endif
cassyarduino 0:e3fb1267e3c3 165 pinMode(SPI_MOSI, OUTPUT);
cassyarduino 0:e3fb1267e3c3 166 pinMode(SPI_SCK, OUTPUT);
cassyarduino 0:e3fb1267e3c3 167 pinMode(SPI_MISO, INPUT);
cassyarduino 0:e3fb1267e3c3 168 //Hardware SS must be configured as OUTPUT to enable SPI-master (regardless of which pin is configured as ENC28J60_CONTROL_CS)
cassyarduino 0:e3fb1267e3c3 169 //pinMode(ENC28J60_CONTROL_CS, OUTPUT);
cassyarduino 0:e3fb1267e3c3 170
cassyarduino 0:e3fb1267e3c3 171 digitalWrite(SPI_MOSI, LOW);
cassyarduino 0:e3fb1267e3c3 172 digitalWrite(SPI_SCK, LOW);
cassyarduino 0:e3fb1267e3c3 173
cassyarduino 0:e3fb1267e3c3 174 // initialize SPI interface
cassyarduino 0:e3fb1267e3c3 175 // master mode and Fosc/2 clock:
cassyarduino 0:e3fb1267e3c3 176 SPCR = (1<<SPE)|(1<<MSTR);
cassyarduino 0:e3fb1267e3c3 177 SPSR |= (1<<SPI2X);
cassyarduino 0:e3fb1267e3c3 178 #endif
cassyarduino 0:e3fb1267e3c3 179
cassyarduino 0:e3fb1267e3c3 180 // perform system reset
cassyarduino 0:e3fb1267e3c3 181 writeOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);
cassyarduino 0:e3fb1267e3c3 182 delay(2); // errata B7/2
cassyarduino 0:e3fb1267e3c3 183 delay(50);
cassyarduino 0:e3fb1267e3c3 184 // check CLKRDY bit to see if reset is complete
cassyarduino 0:e3fb1267e3c3 185 // The CLKRDY does not work. See Rev. B4 Silicon Errata point. Just wait.
cassyarduino 0:e3fb1267e3c3 186 //while(!(readReg(ESTAT) & ESTAT_CLKRDY));
cassyarduino 0:e3fb1267e3c3 187 // do bank 0 stuff
cassyarduino 0:e3fb1267e3c3 188 // initialize receive buffer
cassyarduino 0:e3fb1267e3c3 189 // 16-bit transfers, must write low byte first
cassyarduino 0:e3fb1267e3c3 190 // set receive buffer start address
cassyarduino 0:e3fb1267e3c3 191 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 192 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:Before readOp(ENC28J60_READ_CTRL_REG, ESTAT)"));
cassyarduino 0:e3fb1267e3c3 193 #endif
cassyarduino 0:e3fb1267e3c3 194 nextPacketPtr = RXSTART_INIT;
cassyarduino 0:e3fb1267e3c3 195 while ((!readOp(ENC28J60_READ_CTRL_REG, ESTAT) & ESTAT_CLKRDY) && (timeout>0))
cassyarduino 0:e3fb1267e3c3 196 {
cassyarduino 0:e3fb1267e3c3 197 timeout=timeout-1;
cassyarduino 0:e3fb1267e3c3 198 delay(10);
cassyarduino 0:e3fb1267e3c3 199 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 200 wdt_reset();
cassyarduino 0:e3fb1267e3c3 201 #endif
cassyarduino 0:e3fb1267e3c3 202 }
cassyarduino 0:e3fb1267e3c3 203 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 204 if (timeout==0) {LogObject.uart_send_strln(F("ENC28J60::init ERROR:TIMEOUT !!!"));}
cassyarduino 0:e3fb1267e3c3 205 #endif
cassyarduino 0:e3fb1267e3c3 206 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 207 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After readOp(ENC28J60_READ_CTRL_REG, ESTAT)"));
cassyarduino 0:e3fb1267e3c3 208 #endif
cassyarduino 0:e3fb1267e3c3 209 // Rx start
cassyarduino 0:e3fb1267e3c3 210 writeRegPair(ERXSTL, RXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 211 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 212 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After writeRegPair(ERXSTL, RXSTART_INIT)"));
cassyarduino 0:e3fb1267e3c3 213 #endif
cassyarduino 0:e3fb1267e3c3 214 // set receive pointer address
cassyarduino 0:e3fb1267e3c3 215 writeRegPair(ERXRDPTL, RXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 216 // RX end
cassyarduino 0:e3fb1267e3c3 217 writeRegPair(ERXNDL, RXSTOP_INIT);
cassyarduino 0:e3fb1267e3c3 218 // TX start
cassyarduino 0:e3fb1267e3c3 219 //writeRegPair(ETXSTL, TXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 220 // TX end
cassyarduino 0:e3fb1267e3c3 221 //writeRegPair(ETXNDL, TXSTOP_INIT);
cassyarduino 0:e3fb1267e3c3 222 // do bank 1 stuff, packet filter:
cassyarduino 0:e3fb1267e3c3 223 // For broadcast packets we allow only ARP packtets
cassyarduino 0:e3fb1267e3c3 224 // All other packets should be unicast only for our mac (MAADR)
cassyarduino 0:e3fb1267e3c3 225 //
cassyarduino 0:e3fb1267e3c3 226 // The pattern to match on is therefore
cassyarduino 0:e3fb1267e3c3 227 // Type ETH.DST
cassyarduino 0:e3fb1267e3c3 228 // ARP BROADCAST
cassyarduino 0:e3fb1267e3c3 229 // 06 08 -- ff ff ff ff ff ff -> ip checksum for theses bytes=f7f9
cassyarduino 0:e3fb1267e3c3 230 // in binary these poitions are:11 0000 0011 1111
cassyarduino 0:e3fb1267e3c3 231 // This is hex 303F->EPMM0=0x3f,EPMM1=0x30
cassyarduino 0:e3fb1267e3c3 232 //TODO define specific pattern to receive dhcp-broadcast packages instead of setting ERFCON_BCEN!
cassyarduino 0:e3fb1267e3c3 233 // enableBroadcast(); // change to add ERXFCON_BCEN recommended by epam
cassyarduino 0:e3fb1267e3c3 234 writeReg(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_PMEN|ERXFCON_BCEN);
cassyarduino 0:e3fb1267e3c3 235 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 236 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After writeReg(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_PMEN|ERXFCON_BCEN)"));
cassyarduino 0:e3fb1267e3c3 237 #endif
cassyarduino 0:e3fb1267e3c3 238 writeRegPair(EPMM0, 0x303f);
cassyarduino 0:e3fb1267e3c3 239 writeRegPair(EPMCSL, 0xf7f9);
cassyarduino 0:e3fb1267e3c3 240 //
cassyarduino 0:e3fb1267e3c3 241 //
cassyarduino 0:e3fb1267e3c3 242 // do bank 2 stuff
cassyarduino 0:e3fb1267e3c3 243 // enable MAC receive
cassyarduino 0:e3fb1267e3c3 244 // and bring MAC out of reset (writes 0x00 to MACON2)
cassyarduino 0:e3fb1267e3c3 245 writeRegPair(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS);
cassyarduino 0:e3fb1267e3c3 246 // enable automatic padding to 60bytes and CRC operations
cassyarduino 0:e3fb1267e3c3 247 writeOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN);
cassyarduino 0:e3fb1267e3c3 248 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 249 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After writeOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN)"));
cassyarduino 0:e3fb1267e3c3 250 #endif
cassyarduino 0:e3fb1267e3c3 251 // set inter-frame gap (non-back-to-back)
cassyarduino 0:e3fb1267e3c3 252 writeRegPair(MAIPGL, 0x0C12);
cassyarduino 0:e3fb1267e3c3 253 // set inter-frame gap (back-to-back)
cassyarduino 0:e3fb1267e3c3 254 writeReg(MABBIPG, 0x12);
cassyarduino 0:e3fb1267e3c3 255 // Set the maximum packet size which the controller will accept
cassyarduino 0:e3fb1267e3c3 256 // Do not send packets longer than MAX_FRAMELEN:
cassyarduino 0:e3fb1267e3c3 257 writeRegPair(MAMXFLL, MAX_FRAMELEN);
cassyarduino 0:e3fb1267e3c3 258 // do bank 3 stuff
cassyarduino 0:e3fb1267e3c3 259 // write MAC address
cassyarduino 0:e3fb1267e3c3 260 // NOTE: MAC address in ENC28J60 is byte-backward
cassyarduino 0:e3fb1267e3c3 261 writeReg(MAADR5, macaddr[0]);
cassyarduino 0:e3fb1267e3c3 262 writeReg(MAADR4, macaddr[1]);
cassyarduino 0:e3fb1267e3c3 263 writeReg(MAADR3, macaddr[2]);
cassyarduino 0:e3fb1267e3c3 264 writeReg(MAADR2, macaddr[3]);
cassyarduino 0:e3fb1267e3c3 265 writeReg(MAADR1, macaddr[4]);
cassyarduino 0:e3fb1267e3c3 266 writeReg(MAADR0, macaddr[5]);
cassyarduino 0:e3fb1267e3c3 267 // no loopback of transmitted frames
cassyarduino 0:e3fb1267e3c3 268 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 269 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:Before phyWrite(PHCON2, PHCON2_HDLDIS)"));
cassyarduino 0:e3fb1267e3c3 270 #endif
cassyarduino 0:e3fb1267e3c3 271 phyWrite(PHCON2, PHCON2_HDLDIS);
cassyarduino 0:e3fb1267e3c3 272 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 273 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After phyWrite(PHCON2, PHCON2_HDLDIS)"));
cassyarduino 0:e3fb1267e3c3 274 #endif
cassyarduino 0:e3fb1267e3c3 275 // switch to bank 0
cassyarduino 0:e3fb1267e3c3 276 setBank(ECON1);
cassyarduino 0:e3fb1267e3c3 277 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 278 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After setBank(ECON1)"));
cassyarduino 0:e3fb1267e3c3 279 #endif
cassyarduino 0:e3fb1267e3c3 280 // enable interrutps
cassyarduino 0:e3fb1267e3c3 281 writeOp(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE|EIE_PKTIE);
cassyarduino 0:e3fb1267e3c3 282 // enable packet reception
cassyarduino 0:e3fb1267e3c3 283 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
cassyarduino 0:e3fb1267e3c3 284 //Configure leds
cassyarduino 0:e3fb1267e3c3 285 phyWrite(PHLCON,0x476);
cassyarduino 0:e3fb1267e3c3 286
cassyarduino 0:e3fb1267e3c3 287 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 288 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:Before readReg(EREVID);"));
cassyarduino 0:e3fb1267e3c3 289 #endif
cassyarduino 0:e3fb1267e3c3 290 erevid=readReg(EREVID);
cassyarduino 0:e3fb1267e3c3 291 if (erevid==0xFF) {erevid=0;}
cassyarduino 0:e3fb1267e3c3 292 // microchip forgot to step the number on the silcon when they
cassyarduino 0:e3fb1267e3c3 293 // released the revision B7. 6 is now rev B7. We still have
cassyarduino 0:e3fb1267e3c3 294 // to see what they do when they release B8. At the moment
cassyarduino 0:e3fb1267e3c3 295 // there is no B8 out yet
cassyarduino 0:e3fb1267e3c3 296 //if (erevid > 5) ++erevid;
cassyarduino 0:e3fb1267e3c3 297 #if ACTLOGLEVEL>=LOG_INFO
cassyarduino 0:e3fb1267e3c3 298 LogObject.uart_send_str(F("ENC28J60::init INFO: Chip erevid="));
cassyarduino 0:e3fb1267e3c3 299 LogObject.uart_send_dec(erevid);
cassyarduino 0:e3fb1267e3c3 300 LogObject.uart_send_strln(F(" initialization completed."));
cassyarduino 0:e3fb1267e3c3 301 #endif
cassyarduino 0:e3fb1267e3c3 302
cassyarduino 0:e3fb1267e3c3 303 // return Enc28J60Network::erevid;
cassyarduino 0:e3fb1267e3c3 304 }
cassyarduino 0:e3fb1267e3c3 305
cassyarduino 0:e3fb1267e3c3 306 memhandle
cassyarduino 0:e3fb1267e3c3 307 Enc28J60Network::receivePacket(void)
cassyarduino 0:e3fb1267e3c3 308 {
cassyarduino 0:e3fb1267e3c3 309 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 310 LogObject.uart_send_strln(F("Enc28J60Network::receivePacket(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 311 #endif
cassyarduino 0:e3fb1267e3c3 312 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 313 wdt_reset();
cassyarduino 0:e3fb1267e3c3 314 #endif
cassyarduino 0:e3fb1267e3c3 315 uint8_t rxstat;
cassyarduino 0:e3fb1267e3c3 316 uint16_t len;
cassyarduino 0:e3fb1267e3c3 317 // check if a packet has been received and buffered
cassyarduino 0:e3fb1267e3c3 318 //if( !(readReg(EIR) & EIR_PKTIF) ){
cassyarduino 0:e3fb1267e3c3 319 // The above does not work. See Rev. B4 Silicon Errata point 6.
cassyarduino 0:e3fb1267e3c3 320 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 321 if (erevid==0)
cassyarduino 0:e3fb1267e3c3 322 {
cassyarduino 0:e3fb1267e3c3 323 LogObject.uart_send_strln(F("Enc28J60Network::receivePacket(void) ERROR:ENC28j50 Device not found !!! Bypass receivePacket function !!!"));
cassyarduino 0:e3fb1267e3c3 324 }
cassyarduino 0:e3fb1267e3c3 325 #endif
cassyarduino 0:e3fb1267e3c3 326 uint8_t epktcnt=readReg(EPKTCNT);
cassyarduino 16:66225c1d660c 327 if ((erevid!=0) && (epktcnt!=0))
cassyarduino 0:e3fb1267e3c3 328 {
cassyarduino 0:e3fb1267e3c3 329 uint16_t readPtr = nextPacketPtr+6 > RXSTOP_INIT ? nextPacketPtr+6-RXSTOP_INIT+RXSTART_INIT : nextPacketPtr+6;
cassyarduino 0:e3fb1267e3c3 330 // Set the read pointer to the start of the received packet
cassyarduino 0:e3fb1267e3c3 331 writeRegPair(ERDPTL, nextPacketPtr);
cassyarduino 0:e3fb1267e3c3 332 // read the next packet pointer
cassyarduino 0:e3fb1267e3c3 333 nextPacketPtr = readOp(ENC28J60_READ_BUF_MEM, 0);
cassyarduino 0:e3fb1267e3c3 334 nextPacketPtr |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
cassyarduino 0:e3fb1267e3c3 335 // read the packet length (see datasheet page 43)
cassyarduino 0:e3fb1267e3c3 336 len = readOp(ENC28J60_READ_BUF_MEM, 0);
cassyarduino 0:e3fb1267e3c3 337 len |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
cassyarduino 0:e3fb1267e3c3 338 len -= 4; //remove the CRC count
cassyarduino 0:e3fb1267e3c3 339 // read the receive status (see datasheet page 43)
cassyarduino 0:e3fb1267e3c3 340 rxstat = readOp(ENC28J60_READ_BUF_MEM, 0);
cassyarduino 0:e3fb1267e3c3 341 //rxstat |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
cassyarduino 0:e3fb1267e3c3 342 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 343 LogObject.uart_send_str(F("Enc28J60Network::receivePacket(void) DEBUG:receivePacket ["));
cassyarduino 0:e3fb1267e3c3 344 LogObject.uart_send_hex(readPtr);
cassyarduino 0:e3fb1267e3c3 345 LogObject.uart_send_str(F("-"));
cassyarduino 0:e3fb1267e3c3 346 LogObject.uart_send_hex((readPtr+len) % (RXSTOP_INIT+1));
cassyarduino 0:e3fb1267e3c3 347 LogObject.uart_send_str(F("], next: "));
cassyarduino 0:e3fb1267e3c3 348 LogObject.uart_send_hex(nextPacketPtr);
cassyarduino 0:e3fb1267e3c3 349 LogObject.uart_send_str(F(", stat: "));
cassyarduino 0:e3fb1267e3c3 350 LogObject.uart_send_hex(rxstat);
cassyarduino 0:e3fb1267e3c3 351 LogObject.uart_send_str(F(", Packet count: "));
cassyarduino 0:e3fb1267e3c3 352 LogObject.uart_send_dec(epktcnt);
cassyarduino 0:e3fb1267e3c3 353 LogObject.uart_send_str(F(" -> "));
cassyarduino 0:e3fb1267e3c3 354 LogObject.uart_send_strln((rxstat & 0x80)!=0 ? "OK" : "failed");
cassyarduino 0:e3fb1267e3c3 355 #endif
cassyarduino 0:e3fb1267e3c3 356 // decrement the packet counter indicate we are done with this packet
cassyarduino 0:e3fb1267e3c3 357 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PKTDEC);
cassyarduino 0:e3fb1267e3c3 358 // check CRC and symbol errors (see datasheet page 44, table 7-3):
cassyarduino 0:e3fb1267e3c3 359 // The ERXFCON.CRCEN is set by default. Normally we should not
cassyarduino 0:e3fb1267e3c3 360 // need to check this.
cassyarduino 0:e3fb1267e3c3 361 if (((rxstat & 0x80) != 0) && (nextPacketPtr<=RXSTOP_INIT))
cassyarduino 0:e3fb1267e3c3 362 {
cassyarduino 0:e3fb1267e3c3 363 receivePkt.begin = readPtr;
cassyarduino 0:e3fb1267e3c3 364 receivePkt.size = len;
cassyarduino 0:e3fb1267e3c3 365 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 366 LogObject.uart_send_str(F("Enc28J60Network::receivePacket(void) DEBUG: rxstat OK. receivePkt.size="));
cassyarduino 0:e3fb1267e3c3 367 LogObject.uart_send_decln(len);
cassyarduino 0:e3fb1267e3c3 368 #endif
cassyarduino 0:e3fb1267e3c3 369 return UIP_RECEIVEBUFFERHANDLE;
cassyarduino 0:e3fb1267e3c3 370 }
cassyarduino 0:e3fb1267e3c3 371 // Move the RX read pointer to the start of the next received packet
cassyarduino 0:e3fb1267e3c3 372 // This frees the memory we just read out
cassyarduino 0:e3fb1267e3c3 373 setERXRDPT();
cassyarduino 0:e3fb1267e3c3 374 }
cassyarduino 0:e3fb1267e3c3 375 return (NOBLOCK);
cassyarduino 0:e3fb1267e3c3 376 }
cassyarduino 0:e3fb1267e3c3 377
cassyarduino 0:e3fb1267e3c3 378 void
cassyarduino 0:e3fb1267e3c3 379 Enc28J60Network::setERXRDPT(void)
cassyarduino 0:e3fb1267e3c3 380 {
cassyarduino 0:e3fb1267e3c3 381 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 382 LogObject.uart_send_strln(F("Enc28J60Network::setERXRDPT(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 383 #endif
cassyarduino 17:be34a75aa9a7 384 uint16_t actnextPacketPtr;
cassyarduino 17:be34a75aa9a7 385 nextPacketPtr == RXSTART_INIT ? actnextPacketPtr=RXSTOP_INIT : actnextPacketPtr=nextPacketPtr-1;
cassyarduino 17:be34a75aa9a7 386 if (actnextPacketPtr>RXSTOP_INIT) {actnextPacketPtr=RXSTART_INIT;}
cassyarduino 17:be34a75aa9a7 387 if ((actnextPacketPtr&1)!=0) {actnextPacketPtr--;}
cassyarduino 16:66225c1d660c 388 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 17:be34a75aa9a7 389 LogObject.uart_send_str(F("Enc28J60Network::setERXRDPT(void) DEBUG:Set actnextPacketPtr:"));
cassyarduino 17:be34a75aa9a7 390 LogObject.uart_send_hexln(actnextPacketPtr);
cassyarduino 0:e3fb1267e3c3 391 #endif
cassyarduino 17:be34a75aa9a7 392 writeRegPair(ERXRDPTL, actnextPacketPtr);
cassyarduino 0:e3fb1267e3c3 393 }
cassyarduino 0:e3fb1267e3c3 394
cassyarduino 0:e3fb1267e3c3 395 memaddress
cassyarduino 0:e3fb1267e3c3 396 Enc28J60Network::blockSize(memhandle handle)
cassyarduino 0:e3fb1267e3c3 397 {
cassyarduino 0:e3fb1267e3c3 398 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 399 LogObject.uart_send_strln(F("Enc28J60Network::blockSize(memhandle handle) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 400 #endif
cassyarduino 0:e3fb1267e3c3 401 return ((handle == NOBLOCK) || (erevid==0)) ? 0 : handle == UIP_RECEIVEBUFFERHANDLE ? receivePkt.size : blocks[handle].size;
cassyarduino 0:e3fb1267e3c3 402 }
cassyarduino 0:e3fb1267e3c3 403
cassyarduino 0:e3fb1267e3c3 404 void
cassyarduino 0:e3fb1267e3c3 405 Enc28J60Network::sendPacket(memhandle handle)
cassyarduino 0:e3fb1267e3c3 406 {
cassyarduino 0:e3fb1267e3c3 407 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 408 LogObject.uart_send_strln(F("Enc28J60Network::sendPacket(memhandle handle) INFO:Function started"));
cassyarduino 0:e3fb1267e3c3 409 #endif
cassyarduino 0:e3fb1267e3c3 410 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 411 wdt_reset();
cassyarduino 0:e3fb1267e3c3 412 #endif
cassyarduino 0:e3fb1267e3c3 413 memblock *packet = &blocks[handle];
cassyarduino 0:e3fb1267e3c3 414 uint16_t start = packet->begin-1;
cassyarduino 0:e3fb1267e3c3 415 uint16_t end = start + packet->size;
cassyarduino 0:e3fb1267e3c3 416
cassyarduino 0:e3fb1267e3c3 417 // backup data at control-byte position
cassyarduino 0:e3fb1267e3c3 418 uint8_t data = readByte(start);
cassyarduino 0:e3fb1267e3c3 419 // write control-byte (if not 0 anyway)
cassyarduino 0:e3fb1267e3c3 420 if (data)
cassyarduino 0:e3fb1267e3c3 421 writeByte(start, 0);
cassyarduino 0:e3fb1267e3c3 422
cassyarduino 0:e3fb1267e3c3 423 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 424 LogObject.uart_send_str(F("Enc28J60Network::sendPacket(memhandle handle) DEBUG:sendPacket("));
cassyarduino 0:e3fb1267e3c3 425 LogObject.uart_send_dec(handle);
cassyarduino 0:e3fb1267e3c3 426 LogObject.uart_send_str(F(") ["));
cassyarduino 0:e3fb1267e3c3 427 LogObject.uart_send_hex(start);
cassyarduino 0:e3fb1267e3c3 428 LogObject.uart_send_str(F("-"));
cassyarduino 0:e3fb1267e3c3 429 LogObject.uart_send_hex(end);
cassyarduino 0:e3fb1267e3c3 430 LogObject.uart_send_str(F("]: "));
cassyarduino 0:e3fb1267e3c3 431 for (uint16_t i=start; i<=end; i++)
cassyarduino 0:e3fb1267e3c3 432 {
cassyarduino 0:e3fb1267e3c3 433 LogObject.uart_send_hex(readByte(i));
cassyarduino 0:e3fb1267e3c3 434 LogObject.uart_send_str(F(" "));
cassyarduino 0:e3fb1267e3c3 435 }
cassyarduino 0:e3fb1267e3c3 436 LogObject.uart_send_strln(F(""));
cassyarduino 0:e3fb1267e3c3 437 #endif
cassyarduino 0:e3fb1267e3c3 438
cassyarduino 0:e3fb1267e3c3 439 // TX start
cassyarduino 0:e3fb1267e3c3 440 writeRegPair(ETXSTL, start);
cassyarduino 0:e3fb1267e3c3 441 // Set the TXND pointer to correspond to the packet size given
cassyarduino 0:e3fb1267e3c3 442 writeRegPair(ETXNDL, end);
cassyarduino 0:e3fb1267e3c3 443 // send the contents of the transmit buffer onto the network
cassyarduino 0:e3fb1267e3c3 444 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRTS);
cassyarduino 0:e3fb1267e3c3 445 // Reset the transmit logic problem. See Rev. B4 Silicon Errata point 12.
cassyarduino 0:e3fb1267e3c3 446 if( (readReg(EIR) & EIR_TXERIF) )
cassyarduino 0:e3fb1267e3c3 447 {
cassyarduino 0:e3fb1267e3c3 448 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRTS);
cassyarduino 0:e3fb1267e3c3 449 }
cassyarduino 0:e3fb1267e3c3 450
cassyarduino 0:e3fb1267e3c3 451 //restore data on control-byte position
cassyarduino 0:e3fb1267e3c3 452 if (data)
cassyarduino 0:e3fb1267e3c3 453 writeByte(start, data);
cassyarduino 0:e3fb1267e3c3 454 }
cassyarduino 0:e3fb1267e3c3 455
cassyarduino 0:e3fb1267e3c3 456 uint16_t
cassyarduino 0:e3fb1267e3c3 457 Enc28J60Network::setReadPtr(memhandle handle, memaddress position, uint16_t len)
cassyarduino 0:e3fb1267e3c3 458 {
cassyarduino 0:e3fb1267e3c3 459 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 460 LogObject.uart_send_strln(F("Enc28J60Network::setReadPtr(memhandle handle, memaddress position, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 461 #endif
cassyarduino 0:e3fb1267e3c3 462 memblock *packet = handle == UIP_RECEIVEBUFFERHANDLE ? &receivePkt : &blocks[handle];
cassyarduino 0:e3fb1267e3c3 463 memaddress start = handle == UIP_RECEIVEBUFFERHANDLE && packet->begin + position > RXSTOP_INIT ? packet->begin + position-RXSTOP_INIT+RXSTART_INIT : packet->begin + position;
cassyarduino 0:e3fb1267e3c3 464
cassyarduino 0:e3fb1267e3c3 465 writeRegPair(ERDPTL, start);
cassyarduino 0:e3fb1267e3c3 466
cassyarduino 0:e3fb1267e3c3 467 if (len > packet->size - position)
cassyarduino 0:e3fb1267e3c3 468 len = packet->size - position;
cassyarduino 0:e3fb1267e3c3 469 return len;
cassyarduino 0:e3fb1267e3c3 470 }
cassyarduino 0:e3fb1267e3c3 471
cassyarduino 0:e3fb1267e3c3 472 uint16_t
cassyarduino 0:e3fb1267e3c3 473 Enc28J60Network::readPacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len)
cassyarduino 0:e3fb1267e3c3 474 {
cassyarduino 0:e3fb1267e3c3 475 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 476 LogObject.uart_send_strln(F("Enc28J60Network::readPacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 477 #endif
cassyarduino 0:e3fb1267e3c3 478 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 479 wdt_reset();
cassyarduino 0:e3fb1267e3c3 480 #endif
cassyarduino 0:e3fb1267e3c3 481 len = setReadPtr(handle, position, len);
cassyarduino 0:e3fb1267e3c3 482 readBuffer(len, buffer);
cassyarduino 0:e3fb1267e3c3 483 return len;
cassyarduino 0:e3fb1267e3c3 484 }
cassyarduino 0:e3fb1267e3c3 485
cassyarduino 0:e3fb1267e3c3 486 uint16_t
cassyarduino 0:e3fb1267e3c3 487 Enc28J60Network::writePacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len)
cassyarduino 0:e3fb1267e3c3 488 {
cassyarduino 0:e3fb1267e3c3 489 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 490 LogObject.uart_send_str(F("Enc28J60Network::writePacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len) DEBUG_V3:Function started with len:"));
cassyarduino 0:e3fb1267e3c3 491 LogObject.uart_send_decln(len);
cassyarduino 0:e3fb1267e3c3 492 #endif
cassyarduino 0:e3fb1267e3c3 493 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 494 wdt_reset();
cassyarduino 0:e3fb1267e3c3 495 #endif
cassyarduino 0:e3fb1267e3c3 496 memblock *packet = &blocks[handle];
cassyarduino 0:e3fb1267e3c3 497 uint16_t start = packet->begin + position;
cassyarduino 0:e3fb1267e3c3 498
cassyarduino 0:e3fb1267e3c3 499 writeRegPair(EWRPTL, start);
cassyarduino 0:e3fb1267e3c3 500
cassyarduino 0:e3fb1267e3c3 501 if (len > packet->size - position)
cassyarduino 0:e3fb1267e3c3 502 len = packet->size - position;
cassyarduino 0:e3fb1267e3c3 503 writeBuffer(len, buffer);
cassyarduino 0:e3fb1267e3c3 504 return len;
cassyarduino 0:e3fb1267e3c3 505 }
cassyarduino 0:e3fb1267e3c3 506
cassyarduino 0:e3fb1267e3c3 507
cassyarduino 0:e3fb1267e3c3 508 void Enc28J60Network::enableBroadcast (bool temporary) {
cassyarduino 0:e3fb1267e3c3 509 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 510 LogObject.uart_send_strln(F("Enc28J60Network::enableBroadcast (bool temporary) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 511 #endif
cassyarduino 0:e3fb1267e3c3 512 writeRegByte(ERXFCON, readRegByte(ERXFCON) | ERXFCON_BCEN);
cassyarduino 0:e3fb1267e3c3 513 if(!temporary)
cassyarduino 0:e3fb1267e3c3 514 broadcast_enabled = true;
cassyarduino 0:e3fb1267e3c3 515 }
cassyarduino 0:e3fb1267e3c3 516
cassyarduino 0:e3fb1267e3c3 517 void Enc28J60Network::disableBroadcast (bool temporary) {
cassyarduino 0:e3fb1267e3c3 518 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 519 LogObject.uart_send_strln(F("Enc28J60Network::disableBroadcast (bool temporary) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 520 #endif
cassyarduino 0:e3fb1267e3c3 521 if(!temporary)
cassyarduino 0:e3fb1267e3c3 522 broadcast_enabled = false;
cassyarduino 0:e3fb1267e3c3 523 if(!broadcast_enabled)
cassyarduino 0:e3fb1267e3c3 524 writeRegByte(ERXFCON, readRegByte(ERXFCON) & ~ERXFCON_BCEN);
cassyarduino 0:e3fb1267e3c3 525 }
cassyarduino 0:e3fb1267e3c3 526
cassyarduino 0:e3fb1267e3c3 527 void Enc28J60Network::enableMulticast (void) {
cassyarduino 0:e3fb1267e3c3 528 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 529 LogObject.uart_send_strln(F("Enc28J60Network::enableMulticast (void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 530 #endif
cassyarduino 0:e3fb1267e3c3 531 writeRegByte(ERXFCON, readRegByte(ERXFCON) | ERXFCON_MCEN);
cassyarduino 0:e3fb1267e3c3 532 }
cassyarduino 0:e3fb1267e3c3 533
cassyarduino 0:e3fb1267e3c3 534 void Enc28J60Network::disableMulticast (void) {
cassyarduino 0:e3fb1267e3c3 535 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 536 LogObject.uart_send_strln(F("Enc28J60Network::disableMulticast (void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 537 #endif
cassyarduino 0:e3fb1267e3c3 538 writeRegByte(ERXFCON, readRegByte(ERXFCON) & ~ERXFCON_MCEN);
cassyarduino 0:e3fb1267e3c3 539 }
cassyarduino 0:e3fb1267e3c3 540
cassyarduino 0:e3fb1267e3c3 541 uint8_t Enc28J60Network::readRegByte (uint8_t address) {
cassyarduino 0:e3fb1267e3c3 542 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 543 LogObject.uart_send_strln(F("Enc28J60Network::readRegByte (uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 544 #endif
cassyarduino 0:e3fb1267e3c3 545 setBank(address);
cassyarduino 0:e3fb1267e3c3 546 return readOp(ENC28J60_READ_CTRL_REG, address);
cassyarduino 0:e3fb1267e3c3 547 }
cassyarduino 0:e3fb1267e3c3 548
cassyarduino 0:e3fb1267e3c3 549 void Enc28J60Network::writeRegByte (uint8_t address, uint8_t data) {
cassyarduino 0:e3fb1267e3c3 550 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 551 LogObject.uart_send_strln(F("Enc28J60Network::writeRegByte (uint8_t address, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 552 #endif
cassyarduino 0:e3fb1267e3c3 553 setBank(address);
cassyarduino 0:e3fb1267e3c3 554 writeOp(ENC28J60_WRITE_CTRL_REG, address, data);
cassyarduino 0:e3fb1267e3c3 555 }
cassyarduino 0:e3fb1267e3c3 556
cassyarduino 0:e3fb1267e3c3 557
cassyarduino 0:e3fb1267e3c3 558 uint8_t Enc28J60Network::readByte(uint16_t addr)
cassyarduino 0:e3fb1267e3c3 559 {
cassyarduino 0:e3fb1267e3c3 560 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 561 LogObject.uart_send_strln(F("Enc28J60Network::readByte(uint16_t addr) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 562 #endif
cassyarduino 0:e3fb1267e3c3 563 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 564 wdt_reset();
cassyarduino 0:e3fb1267e3c3 565 #endif
cassyarduino 0:e3fb1267e3c3 566 writeRegPair(ERDPTL, addr);
cassyarduino 0:e3fb1267e3c3 567
cassyarduino 0:e3fb1267e3c3 568 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 569 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 570 // issue read command
cassyarduino 0:e3fb1267e3c3 571 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 572 SPI.transfer(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 573 // read data
cassyarduino 0:e3fb1267e3c3 574 uint8_t c = SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 575 #endif
cassyarduino 0:e3fb1267e3c3 576 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 577 _spi.write(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 578 // read data
cassyarduino 0:e3fb1267e3c3 579 uint8_t c = _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 580 #endif
cassyarduino 0:e3fb1267e3c3 581 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 582 return (c);
cassyarduino 0:e3fb1267e3c3 583 #else
cassyarduino 0:e3fb1267e3c3 584 // issue read command
cassyarduino 0:e3fb1267e3c3 585 SPDR = ENC28J60_READ_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 586 waitspi();
cassyarduino 0:e3fb1267e3c3 587 // read data
cassyarduino 0:e3fb1267e3c3 588 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 589 waitspi();
cassyarduino 0:e3fb1267e3c3 590 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 591 return (SPDR);
cassyarduino 0:e3fb1267e3c3 592 #endif
cassyarduino 0:e3fb1267e3c3 593 }
cassyarduino 0:e3fb1267e3c3 594
cassyarduino 0:e3fb1267e3c3 595 void Enc28J60Network::writeByte(uint16_t addr, uint8_t data)
cassyarduino 0:e3fb1267e3c3 596 {
cassyarduino 0:e3fb1267e3c3 597 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 598 LogObject.uart_send_strln(F("Enc28J60Network::writeByte(uint16_t addr, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 599 #endif
cassyarduino 0:e3fb1267e3c3 600 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 601 wdt_reset();
cassyarduino 0:e3fb1267e3c3 602 #endif
cassyarduino 0:e3fb1267e3c3 603 writeRegPair(EWRPTL, addr);
cassyarduino 0:e3fb1267e3c3 604
cassyarduino 0:e3fb1267e3c3 605 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 606 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 607 // issue write command
cassyarduino 0:e3fb1267e3c3 608 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 609 SPI.transfer(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 610 // write data
cassyarduino 0:e3fb1267e3c3 611 SPI.transfer(data);
cassyarduino 0:e3fb1267e3c3 612 #endif
cassyarduino 0:e3fb1267e3c3 613 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 614 _spi.write(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 615 // write data
cassyarduino 0:e3fb1267e3c3 616 _spi.write(data);
cassyarduino 0:e3fb1267e3c3 617 #endif
cassyarduino 0:e3fb1267e3c3 618 #else
cassyarduino 0:e3fb1267e3c3 619 // issue write command
cassyarduino 0:e3fb1267e3c3 620 SPDR = ENC28J60_WRITE_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 621 waitspi();
cassyarduino 0:e3fb1267e3c3 622 // write data
cassyarduino 0:e3fb1267e3c3 623 SPDR = data;
cassyarduino 0:e3fb1267e3c3 624 waitspi();
cassyarduino 0:e3fb1267e3c3 625 #endif
cassyarduino 0:e3fb1267e3c3 626 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 627 }
cassyarduino 0:e3fb1267e3c3 628
cassyarduino 0:e3fb1267e3c3 629 void
cassyarduino 0:e3fb1267e3c3 630 Enc28J60Network::copyPacket(memhandle dest_pkt, memaddress dest_pos, memhandle src_pkt, memaddress src_pos, uint16_t len)
cassyarduino 0:e3fb1267e3c3 631 {
cassyarduino 0:e3fb1267e3c3 632 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 633 LogObject.uart_send_strln(F("Enc28J60Network::copyPacket(memhandle dest_pkt, memaddress dest_pos, memhandle src_pkt, memaddress src_pos, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 634 #endif
cassyarduino 0:e3fb1267e3c3 635 memblock *dest = &blocks[dest_pkt];
cassyarduino 0:e3fb1267e3c3 636 memblock *src = src_pkt == UIP_RECEIVEBUFFERHANDLE ? &receivePkt : &blocks[src_pkt];
cassyarduino 0:e3fb1267e3c3 637 memaddress start = src_pkt == UIP_RECEIVEBUFFERHANDLE && src->begin + src_pos > RXSTOP_INIT ? src->begin + src_pos-RXSTOP_INIT+RXSTART_INIT : src->begin + src_pos;
cassyarduino 0:e3fb1267e3c3 638 enc28J60_mempool_block_move_callback(dest->begin+dest_pos,start,len);
cassyarduino 0:e3fb1267e3c3 639 // Move the RX read pointer to the start of the next received packet
cassyarduino 0:e3fb1267e3c3 640 // This frees the memory we just read out
cassyarduino 0:e3fb1267e3c3 641 setERXRDPT();
cassyarduino 0:e3fb1267e3c3 642 }
cassyarduino 0:e3fb1267e3c3 643
cassyarduino 0:e3fb1267e3c3 644 void
cassyarduino 0:e3fb1267e3c3 645 enc28J60_mempool_block_move_callback(memaddress dest, memaddress src, memaddress len)
cassyarduino 0:e3fb1267e3c3 646 {
cassyarduino 0:e3fb1267e3c3 647 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 648 LogObject.uart_send_strln(F("enc28J60_mempool_block_move_callback(memaddress dest, memaddress src, memaddress len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 649 #endif
cassyarduino 0:e3fb1267e3c3 650 //void
cassyarduino 0:e3fb1267e3c3 651 //Enc28J60Network::memblock_mv_cb(uint16_t dest, uint16_t src, uint16_t len)
cassyarduino 0:e3fb1267e3c3 652 //{
cassyarduino 0:e3fb1267e3c3 653 //as ENC28J60 DMA is unable to copy single bytes:
cassyarduino 0:e3fb1267e3c3 654 if (len == 1)
cassyarduino 0:e3fb1267e3c3 655 {
cassyarduino 0:e3fb1267e3c3 656 Enc28J60Network::writeByte(dest,Enc28J60Network::readByte(src));
cassyarduino 0:e3fb1267e3c3 657 }
cassyarduino 0:e3fb1267e3c3 658 else
cassyarduino 0:e3fb1267e3c3 659 {
cassyarduino 0:e3fb1267e3c3 660 // calculate address of last byte
cassyarduino 0:e3fb1267e3c3 661 len += src - 1;
cassyarduino 0:e3fb1267e3c3 662
cassyarduino 0:e3fb1267e3c3 663 /* 1. Appropriately program the EDMAST, EDMAND
cassyarduino 0:e3fb1267e3c3 664 and EDMADST register pairs. The EDMAST
cassyarduino 0:e3fb1267e3c3 665 registers should point to the first byte to copy
cassyarduino 0:e3fb1267e3c3 666 from, the EDMAND registers should point to the
cassyarduino 0:e3fb1267e3c3 667 last byte to copy and the EDMADST registers
cassyarduino 0:e3fb1267e3c3 668 should point to the first byte in the destination
cassyarduino 0:e3fb1267e3c3 669 range. The destination range will always be
cassyarduino 0:e3fb1267e3c3 670 linear, never wrapping at any values except from
cassyarduino 0:e3fb1267e3c3 671 8191 to 0 (the 8-Kbyte memory boundary).
cassyarduino 0:e3fb1267e3c3 672 Extreme care should be taken when
cassyarduino 0:e3fb1267e3c3 673 programming the start and end pointers to
cassyarduino 0:e3fb1267e3c3 674 prevent a never ending DMA operation which
cassyarduino 0:e3fb1267e3c3 675 would overwrite the entire 8-Kbyte buffer.
cassyarduino 0:e3fb1267e3c3 676 */
cassyarduino 0:e3fb1267e3c3 677 Enc28J60Network::writeRegPair(EDMASTL, src);
cassyarduino 0:e3fb1267e3c3 678 Enc28J60Network::writeRegPair(EDMADSTL, dest);
cassyarduino 0:e3fb1267e3c3 679
cassyarduino 0:e3fb1267e3c3 680 if ((src <= RXSTOP_INIT)&& (len > RXSTOP_INIT))len -= (RXSTOP_INIT-RXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 681 Enc28J60Network::writeRegPair(EDMANDL, len);
cassyarduino 0:e3fb1267e3c3 682
cassyarduino 0:e3fb1267e3c3 683 /*
cassyarduino 0:e3fb1267e3c3 684 2. If an interrupt at the end of the copy process is
cassyarduino 0:e3fb1267e3c3 685 desired, set EIE.DMAIE and EIE.INTIE and
cassyarduino 0:e3fb1267e3c3 686 clear EIR.DMAIF.
cassyarduino 0:e3fb1267e3c3 687
cassyarduino 0:e3fb1267e3c3 688 3. Verify that ECON1.CSUMEN is clear. */
cassyarduino 0:e3fb1267e3c3 689 Enc28J60Network::writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_CSUMEN);
cassyarduino 0:e3fb1267e3c3 690
cassyarduino 0:e3fb1267e3c3 691 /* 4. Start the DMA copy by setting ECON1.DMAST. */
cassyarduino 0:e3fb1267e3c3 692 Enc28J60Network::writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_DMAST);
cassyarduino 0:e3fb1267e3c3 693
cassyarduino 0:e3fb1267e3c3 694 // wait until runnig DMA is completed
cassyarduino 0:e3fb1267e3c3 695 while (Enc28J60Network::readOp(ENC28J60_READ_CTRL_REG, ECON1) & ECON1_DMAST)
cassyarduino 0:e3fb1267e3c3 696 {
cassyarduino 0:e3fb1267e3c3 697 delay(1);
cassyarduino 0:e3fb1267e3c3 698 }
cassyarduino 0:e3fb1267e3c3 699 }
cassyarduino 0:e3fb1267e3c3 700 }
cassyarduino 0:e3fb1267e3c3 701
cassyarduino 0:e3fb1267e3c3 702 void
cassyarduino 0:e3fb1267e3c3 703 Enc28J60Network::freePacket(void)
cassyarduino 0:e3fb1267e3c3 704 {
cassyarduino 0:e3fb1267e3c3 705 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 706 LogObject.uart_send_strln(F("Enc28J60Network::freePacket(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 707 #endif
cassyarduino 0:e3fb1267e3c3 708 setERXRDPT();
cassyarduino 0:e3fb1267e3c3 709 }
cassyarduino 0:e3fb1267e3c3 710
cassyarduino 0:e3fb1267e3c3 711 uint8_t
cassyarduino 0:e3fb1267e3c3 712 Enc28J60Network::readOp(uint8_t op, uint8_t address)
cassyarduino 0:e3fb1267e3c3 713 {
cassyarduino 0:e3fb1267e3c3 714 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 715 LogObject.uart_send_strln(F("Enc28J60Network::readOp(uint8_t op, uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 716 #endif
cassyarduino 0:e3fb1267e3c3 717 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 718 // issue read command
cassyarduino 0:e3fb1267e3c3 719 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 720 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 721 SPI.transfer(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 722 // read data
cassyarduino 0:e3fb1267e3c3 723 if(address & 0x80)
cassyarduino 0:e3fb1267e3c3 724 {
cassyarduino 0:e3fb1267e3c3 725 // do dummy read if needed (for mac and mii, see datasheet page 29)
cassyarduino 0:e3fb1267e3c3 726 SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 727 }
cassyarduino 0:e3fb1267e3c3 728 uint8_t c = SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 729 #endif
cassyarduino 0:e3fb1267e3c3 730 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 731 _spi.write(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 732 // read data
cassyarduino 0:e3fb1267e3c3 733 if(address & 0x80)
cassyarduino 0:e3fb1267e3c3 734 {
cassyarduino 0:e3fb1267e3c3 735 // do dummy read if needed (for mac and mii, see datasheet page 29)
cassyarduino 0:e3fb1267e3c3 736 _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 737 }
cassyarduino 0:e3fb1267e3c3 738 uint8_t c = _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 739 #endif
cassyarduino 0:e3fb1267e3c3 740 // release CS
cassyarduino 0:e3fb1267e3c3 741 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 742 return(c);
cassyarduino 0:e3fb1267e3c3 743 #else
cassyarduino 0:e3fb1267e3c3 744 // issue read command
cassyarduino 0:e3fb1267e3c3 745 SPDR = op | (address & ADDR_MASK);
cassyarduino 0:e3fb1267e3c3 746 waitspi();
cassyarduino 0:e3fb1267e3c3 747 // read data
cassyarduino 0:e3fb1267e3c3 748 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 749 waitspi();
cassyarduino 0:e3fb1267e3c3 750 // do dummy read if needed (for mac and mii, see datasheet page 29)
cassyarduino 0:e3fb1267e3c3 751 if(address & 0x80)
cassyarduino 0:e3fb1267e3c3 752 {
cassyarduino 0:e3fb1267e3c3 753 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 754 waitspi();
cassyarduino 0:e3fb1267e3c3 755 }
cassyarduino 0:e3fb1267e3c3 756 // release CS
cassyarduino 0:e3fb1267e3c3 757 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 758 return(SPDR);
cassyarduino 0:e3fb1267e3c3 759 #endif
cassyarduino 0:e3fb1267e3c3 760 }
cassyarduino 0:e3fb1267e3c3 761
cassyarduino 0:e3fb1267e3c3 762 void
cassyarduino 0:e3fb1267e3c3 763 Enc28J60Network::writeOp(uint8_t op, uint8_t address, uint8_t data)
cassyarduino 0:e3fb1267e3c3 764 {
cassyarduino 0:e3fb1267e3c3 765 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 766 LogObject.uart_send_strln(F("Enc28J60Network::writeOp(uint8_t op, uint8_t address, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 767 #endif
cassyarduino 0:e3fb1267e3c3 768 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 769 // issue write command
cassyarduino 0:e3fb1267e3c3 770 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 771 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 772 SPI.transfer(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 773 // write data
cassyarduino 0:e3fb1267e3c3 774 SPI.transfer(data);
cassyarduino 0:e3fb1267e3c3 775 #endif
cassyarduino 0:e3fb1267e3c3 776 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 777 _spi.write(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 778 // write data
cassyarduino 0:e3fb1267e3c3 779 _spi.write(data);
cassyarduino 0:e3fb1267e3c3 780 #endif
cassyarduino 0:e3fb1267e3c3 781 #else
cassyarduino 0:e3fb1267e3c3 782 // issue write command
cassyarduino 0:e3fb1267e3c3 783 SPDR = op | (address & ADDR_MASK);
cassyarduino 0:e3fb1267e3c3 784 waitspi();
cassyarduino 0:e3fb1267e3c3 785 // write data
cassyarduino 0:e3fb1267e3c3 786 SPDR = data;
cassyarduino 0:e3fb1267e3c3 787 waitspi();
cassyarduino 0:e3fb1267e3c3 788 #endif
cassyarduino 0:e3fb1267e3c3 789 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 790 }
cassyarduino 0:e3fb1267e3c3 791
cassyarduino 0:e3fb1267e3c3 792 void
cassyarduino 0:e3fb1267e3c3 793 Enc28J60Network::readBuffer(uint16_t len, uint8_t* data)
cassyarduino 0:e3fb1267e3c3 794 {
cassyarduino 0:e3fb1267e3c3 795 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 796 LogObject.uart_send_strln(F("Enc28J60Network::readBuffer(uint16_t len, uint8_t* data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 797 #endif
cassyarduino 0:e3fb1267e3c3 798 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 799 // issue read command
cassyarduino 0:e3fb1267e3c3 800 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 801 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 802 SPI.transfer(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 803 #endif
cassyarduino 0:e3fb1267e3c3 804 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 805 _spi.write(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 806 #endif
cassyarduino 0:e3fb1267e3c3 807 #else
cassyarduino 0:e3fb1267e3c3 808 SPDR = ENC28J60_READ_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 809 waitspi();
cassyarduino 0:e3fb1267e3c3 810 #endif
cassyarduino 0:e3fb1267e3c3 811 while(len)
cassyarduino 0:e3fb1267e3c3 812 {
cassyarduino 0:e3fb1267e3c3 813 len--;
cassyarduino 0:e3fb1267e3c3 814 // read data
cassyarduino 0:e3fb1267e3c3 815 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 816 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 817 *data = SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 818 #endif
cassyarduino 0:e3fb1267e3c3 819 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 820 *data = _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 821 #endif
cassyarduino 0:e3fb1267e3c3 822 #else
cassyarduino 0:e3fb1267e3c3 823 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 824 waitspi();
cassyarduino 0:e3fb1267e3c3 825 *data = SPDR;
cassyarduino 0:e3fb1267e3c3 826 #endif
cassyarduino 0:e3fb1267e3c3 827 data++;
cassyarduino 0:e3fb1267e3c3 828 }
cassyarduino 0:e3fb1267e3c3 829 //*data='\0';
cassyarduino 0:e3fb1267e3c3 830 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 831 }
cassyarduino 0:e3fb1267e3c3 832
cassyarduino 0:e3fb1267e3c3 833 void
cassyarduino 0:e3fb1267e3c3 834 Enc28J60Network::writeBuffer(uint16_t len, uint8_t* data)
cassyarduino 0:e3fb1267e3c3 835 {
cassyarduino 0:e3fb1267e3c3 836 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 837 LogObject.uart_send_strln(F("Enc28J60Network::writeBuffer(uint16_t len, uint8_t* data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 838 #endif
cassyarduino 0:e3fb1267e3c3 839 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 840 // issue write command
cassyarduino 0:e3fb1267e3c3 841 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 842 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 843 SPI.transfer(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 844 #endif
cassyarduino 0:e3fb1267e3c3 845 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 846 _spi.write(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 847 #endif
cassyarduino 0:e3fb1267e3c3 848 #else
cassyarduino 0:e3fb1267e3c3 849 SPDR = ENC28J60_WRITE_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 850 waitspi();
cassyarduino 0:e3fb1267e3c3 851 #endif
cassyarduino 0:e3fb1267e3c3 852 while(len)
cassyarduino 0:e3fb1267e3c3 853 {
cassyarduino 0:e3fb1267e3c3 854 len--;
cassyarduino 0:e3fb1267e3c3 855 // write data
cassyarduino 0:e3fb1267e3c3 856 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 857 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 858 SPI.transfer(*data);
cassyarduino 0:e3fb1267e3c3 859 #endif
cassyarduino 0:e3fb1267e3c3 860 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 861 _spi.write(*data);
cassyarduino 0:e3fb1267e3c3 862 #endif
cassyarduino 0:e3fb1267e3c3 863 data++;
cassyarduino 0:e3fb1267e3c3 864 #else
cassyarduino 0:e3fb1267e3c3 865 SPDR = *data;
cassyarduino 0:e3fb1267e3c3 866 data++;
cassyarduino 0:e3fb1267e3c3 867 waitspi();
cassyarduino 0:e3fb1267e3c3 868 #endif
cassyarduino 0:e3fb1267e3c3 869 }
cassyarduino 0:e3fb1267e3c3 870 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 871 }
cassyarduino 0:e3fb1267e3c3 872
cassyarduino 0:e3fb1267e3c3 873 void
cassyarduino 0:e3fb1267e3c3 874 Enc28J60Network::setBank(uint8_t address)
cassyarduino 0:e3fb1267e3c3 875 {
cassyarduino 0:e3fb1267e3c3 876 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 877 LogObject.uart_send_strln(F("Enc28J60Network::setBank(uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 878 #endif
cassyarduino 0:e3fb1267e3c3 879 // set the bank (if needed)
cassyarduino 0:e3fb1267e3c3 880 if((address & BANK_MASK) != bank)
cassyarduino 0:e3fb1267e3c3 881 {
cassyarduino 0:e3fb1267e3c3 882 // set the bank
cassyarduino 0:e3fb1267e3c3 883 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, (ECON1_BSEL1|ECON1_BSEL0));
cassyarduino 0:e3fb1267e3c3 884 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, (address & BANK_MASK)>>5);
cassyarduino 0:e3fb1267e3c3 885 bank = (address & BANK_MASK);
cassyarduino 0:e3fb1267e3c3 886 }
cassyarduino 0:e3fb1267e3c3 887 }
cassyarduino 0:e3fb1267e3c3 888
cassyarduino 0:e3fb1267e3c3 889 uint8_t
cassyarduino 0:e3fb1267e3c3 890 Enc28J60Network::readReg(uint8_t address)
cassyarduino 0:e3fb1267e3c3 891 {
cassyarduino 0:e3fb1267e3c3 892 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 893 LogObject.uart_send_strln(F("Enc28J60Network::readReg(uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 894 #endif
cassyarduino 0:e3fb1267e3c3 895 // set the bank
cassyarduino 0:e3fb1267e3c3 896 setBank(address);
cassyarduino 0:e3fb1267e3c3 897 // do the read
cassyarduino 0:e3fb1267e3c3 898 return readOp(ENC28J60_READ_CTRL_REG, address);
cassyarduino 0:e3fb1267e3c3 899 }
cassyarduino 0:e3fb1267e3c3 900
cassyarduino 0:e3fb1267e3c3 901 void
cassyarduino 0:e3fb1267e3c3 902 Enc28J60Network::writeReg(uint8_t address, uint8_t data)
cassyarduino 0:e3fb1267e3c3 903 {
cassyarduino 0:e3fb1267e3c3 904 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 905 LogObject.uart_send_strln(F("Enc28J60Network::writeReg(uint8_t address, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 906 #endif
cassyarduino 0:e3fb1267e3c3 907 // set the bank
cassyarduino 0:e3fb1267e3c3 908 setBank(address);
cassyarduino 0:e3fb1267e3c3 909 // do the write
cassyarduino 0:e3fb1267e3c3 910 writeOp(ENC28J60_WRITE_CTRL_REG, address, data);
cassyarduino 0:e3fb1267e3c3 911 }
cassyarduino 0:e3fb1267e3c3 912
cassyarduino 0:e3fb1267e3c3 913 void
cassyarduino 0:e3fb1267e3c3 914 Enc28J60Network::writeRegPair(uint8_t address, uint16_t data)
cassyarduino 0:e3fb1267e3c3 915 {
cassyarduino 0:e3fb1267e3c3 916 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 917 LogObject.uart_send_strln(F("Enc28J60Network::writeRegPair(uint8_t address, uint16_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 918 #endif
cassyarduino 0:e3fb1267e3c3 919 // set the bank
cassyarduino 0:e3fb1267e3c3 920 setBank(address);
cassyarduino 0:e3fb1267e3c3 921 // do the write
cassyarduino 0:e3fb1267e3c3 922 writeOp(ENC28J60_WRITE_CTRL_REG, address, (data&0xFF));
cassyarduino 0:e3fb1267e3c3 923 writeOp(ENC28J60_WRITE_CTRL_REG, address+1, (data) >> 8);
cassyarduino 0:e3fb1267e3c3 924 }
cassyarduino 0:e3fb1267e3c3 925
cassyarduino 0:e3fb1267e3c3 926 void
cassyarduino 0:e3fb1267e3c3 927 Enc28J60Network::phyWrite(uint8_t address, uint16_t data)
cassyarduino 0:e3fb1267e3c3 928 {
cassyarduino 0:e3fb1267e3c3 929 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 930 LogObject.uart_send_strln(F("Enc28J60Network::phyWrite(uint8_t address, uint16_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 931 #endif
cassyarduino 0:e3fb1267e3c3 932 unsigned int timeout = 15;
cassyarduino 0:e3fb1267e3c3 933 // set the PHY register address
cassyarduino 0:e3fb1267e3c3 934 writeReg(MIREGADR, address);
cassyarduino 0:e3fb1267e3c3 935 // write the PHY data
cassyarduino 0:e3fb1267e3c3 936 writeRegPair(MIWRL, data);
cassyarduino 0:e3fb1267e3c3 937 // wait until the PHY write completes
cassyarduino 0:e3fb1267e3c3 938 while (readReg(MISTAT) & MISTAT_BUSY)
cassyarduino 0:e3fb1267e3c3 939 {
cassyarduino 0:e3fb1267e3c3 940 delay(10);
cassyarduino 0:e3fb1267e3c3 941 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 942 wdt_reset();
cassyarduino 0:e3fb1267e3c3 943 #endif
cassyarduino 0:e3fb1267e3c3 944 if (--timeout == 0)
cassyarduino 0:e3fb1267e3c3 945 {
cassyarduino 0:e3fb1267e3c3 946 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 947 LogObject.uart_send_strln(F("Enc28J60Network::phyWrite ERROR:TIMEOUT !!!"));
cassyarduino 0:e3fb1267e3c3 948 #endif
cassyarduino 0:e3fb1267e3c3 949 return;
cassyarduino 0:e3fb1267e3c3 950 }
cassyarduino 0:e3fb1267e3c3 951 }
cassyarduino 0:e3fb1267e3c3 952 }
cassyarduino 0:e3fb1267e3c3 953
cassyarduino 0:e3fb1267e3c3 954 uint16_t
cassyarduino 0:e3fb1267e3c3 955 Enc28J60Network::phyRead(uint8_t address)
cassyarduino 0:e3fb1267e3c3 956 {
cassyarduino 0:e3fb1267e3c3 957 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 958 LogObject.uart_send_strln(F("Enc28J60Network::phyRead(uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 959 #endif
cassyarduino 0:e3fb1267e3c3 960 unsigned int timeout = 15;
cassyarduino 0:e3fb1267e3c3 961 writeReg(MIREGADR,address);
cassyarduino 0:e3fb1267e3c3 962 writeReg(MICMD, MICMD_MIIRD);
cassyarduino 0:e3fb1267e3c3 963 // wait until the PHY read completes
cassyarduino 0:e3fb1267e3c3 964 while(readReg(MISTAT) & MISTAT_BUSY)
cassyarduino 0:e3fb1267e3c3 965 {
cassyarduino 0:e3fb1267e3c3 966 delay(10);
cassyarduino 0:e3fb1267e3c3 967 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 968 wdt_reset();
cassyarduino 0:e3fb1267e3c3 969 #endif
cassyarduino 0:e3fb1267e3c3 970 if (--timeout == 0)
cassyarduino 0:e3fb1267e3c3 971 {
cassyarduino 0:e3fb1267e3c3 972 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 973 LogObject.uart_send_strln(F("Enc28J60Network::phyRead ERROR:TIMEOUT !!!"));
cassyarduino 0:e3fb1267e3c3 974 #endif
cassyarduino 0:e3fb1267e3c3 975 return 0;
cassyarduino 0:e3fb1267e3c3 976 }
cassyarduino 0:e3fb1267e3c3 977 }
cassyarduino 0:e3fb1267e3c3 978 writeReg(MICMD, 0);
cassyarduino 0:e3fb1267e3c3 979 return (readReg(MIRDL) | readReg(MIRDH) << 8);
cassyarduino 0:e3fb1267e3c3 980 }
cassyarduino 0:e3fb1267e3c3 981
cassyarduino 0:e3fb1267e3c3 982 void
cassyarduino 0:e3fb1267e3c3 983 Enc28J60Network::clkout(uint8_t clk)
cassyarduino 0:e3fb1267e3c3 984 {
cassyarduino 0:e3fb1267e3c3 985 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 986 LogObject.uart_send_strln(F("Enc28J60Network::clkout(uint8_t clk) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 987 #endif
cassyarduino 0:e3fb1267e3c3 988 //setup clkout: 2 is 12.5MHz:
cassyarduino 0:e3fb1267e3c3 989 writeReg(ECOCON, clk & 0x7);
cassyarduino 0:e3fb1267e3c3 990 }
cassyarduino 0:e3fb1267e3c3 991
cassyarduino 0:e3fb1267e3c3 992 uint16_t
cassyarduino 0:e3fb1267e3c3 993 Enc28J60Network::chksum(uint16_t sum, memhandle handle, memaddress pos, uint16_t len)
cassyarduino 0:e3fb1267e3c3 994 {
cassyarduino 0:e3fb1267e3c3 995 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 996 LogObject.uart_send_strln(F("Enc28J60Network::chksum(uint16_t sum, memhandle handle, memaddress pos, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 997 #endif
cassyarduino 0:e3fb1267e3c3 998 uint16_t t;
cassyarduino 0:e3fb1267e3c3 999 len = setReadPtr(handle, pos, len)-1;
cassyarduino 0:e3fb1267e3c3 1000 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 1001 // issue read command
cassyarduino 0:e3fb1267e3c3 1002 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 1003 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 1004 SPI.transfer(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 1005 #endif
cassyarduino 0:e3fb1267e3c3 1006 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 1007 _spi.write(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 1008 #endif
cassyarduino 0:e3fb1267e3c3 1009 #else
cassyarduino 0:e3fb1267e3c3 1010 SPDR = ENC28J60_READ_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 1011 waitspi();
cassyarduino 0:e3fb1267e3c3 1012 #endif
cassyarduino 0:e3fb1267e3c3 1013 uint16_t i;
cassyarduino 0:e3fb1267e3c3 1014 for (i = 0; i < len; i+=2)
cassyarduino 0:e3fb1267e3c3 1015 {
cassyarduino 0:e3fb1267e3c3 1016 // read data
cassyarduino 0:e3fb1267e3c3 1017 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 1018 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 1019 t = SPI.transfer(0x00) << 8;
cassyarduino 0:e3fb1267e3c3 1020 t += SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 1021 #endif
cassyarduino 0:e3fb1267e3c3 1022 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 1023 t = _spi.write(0x00) << 8;
cassyarduino 0:e3fb1267e3c3 1024 t += _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 1025 #endif
cassyarduino 0:e3fb1267e3c3 1026 #else
cassyarduino 0:e3fb1267e3c3 1027 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 1028 waitspi();
cassyarduino 0:e3fb1267e3c3 1029 t = SPDR << 8;
cassyarduino 0:e3fb1267e3c3 1030 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 1031 waitspi();
cassyarduino 0:e3fb1267e3c3 1032 t += SPDR;
cassyarduino 0:e3fb1267e3c3 1033 #endif
cassyarduino 0:e3fb1267e3c3 1034 sum += t;
cassyarduino 0:e3fb1267e3c3 1035 if(sum < t)
cassyarduino 0:e3fb1267e3c3 1036 {
cassyarduino 0:e3fb1267e3c3 1037 sum++; /* carry */
cassyarduino 0:e3fb1267e3c3 1038 }
cassyarduino 0:e3fb1267e3c3 1039 }
cassyarduino 0:e3fb1267e3c3 1040 if(i == len)
cassyarduino 0:e3fb1267e3c3 1041 {
cassyarduino 0:e3fb1267e3c3 1042 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 1043 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 1044 t = (SPI.transfer(0x00) << 8) + 0;
cassyarduino 0:e3fb1267e3c3 1045 #endif
cassyarduino 0:e3fb1267e3c3 1046 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 1047 t = (_spi.write(0x00) << 8) + 0;
cassyarduino 0:e3fb1267e3c3 1048 #endif
cassyarduino 0:e3fb1267e3c3 1049 #else
cassyarduino 0:e3fb1267e3c3 1050 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 1051 waitspi();
cassyarduino 0:e3fb1267e3c3 1052 t = (SPDR << 8) + 0;
cassyarduino 0:e3fb1267e3c3 1053 #endif
cassyarduino 0:e3fb1267e3c3 1054 sum += t;
cassyarduino 0:e3fb1267e3c3 1055 if(sum < t)
cassyarduino 0:e3fb1267e3c3 1056 {
cassyarduino 0:e3fb1267e3c3 1057 sum++; /* carry */
cassyarduino 0:e3fb1267e3c3 1058 }
cassyarduino 0:e3fb1267e3c3 1059 }
cassyarduino 0:e3fb1267e3c3 1060 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 1061
cassyarduino 0:e3fb1267e3c3 1062 /* Return sum in host byte order. */
cassyarduino 0:e3fb1267e3c3 1063 return sum;
cassyarduino 0:e3fb1267e3c3 1064 }
cassyarduino 0:e3fb1267e3c3 1065
cassyarduino 0:e3fb1267e3c3 1066 void
cassyarduino 0:e3fb1267e3c3 1067 Enc28J60Network::powerOff(void)
cassyarduino 0:e3fb1267e3c3 1068 {
cassyarduino 0:e3fb1267e3c3 1069 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1070 LogObject.uart_send_strln(F("Enc28J60Network::powerOff(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1071 #endif
cassyarduino 0:e3fb1267e3c3 1072 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_RXEN);
cassyarduino 0:e3fb1267e3c3 1073 delay(50);
cassyarduino 0:e3fb1267e3c3 1074 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_VRPS);
cassyarduino 0:e3fb1267e3c3 1075 delay(50);
cassyarduino 0:e3fb1267e3c3 1076 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PWRSV);
cassyarduino 0:e3fb1267e3c3 1077 }
cassyarduino 0:e3fb1267e3c3 1078
cassyarduino 0:e3fb1267e3c3 1079 void
cassyarduino 0:e3fb1267e3c3 1080 Enc28J60Network::powerOn(void)
cassyarduino 0:e3fb1267e3c3 1081 {
cassyarduino 0:e3fb1267e3c3 1082 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1083 LogObject.uart_send_strln(F("Enc28J60Network::powerOn(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1084 #endif
cassyarduino 0:e3fb1267e3c3 1085 writeOp(ENC28J60_BIT_FIELD_CLR, ECON2, ECON2_PWRSV);
cassyarduino 0:e3fb1267e3c3 1086 delay(50);
cassyarduino 0:e3fb1267e3c3 1087 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
cassyarduino 0:e3fb1267e3c3 1088 delay(50);
cassyarduino 0:e3fb1267e3c3 1089 }
cassyarduino 0:e3fb1267e3c3 1090
cassyarduino 0:e3fb1267e3c3 1091 // read erevid from object:
cassyarduino 0:e3fb1267e3c3 1092 uint8_t
cassyarduino 0:e3fb1267e3c3 1093 Enc28J60Network::geterevid(void)
cassyarduino 0:e3fb1267e3c3 1094 {
cassyarduino 0:e3fb1267e3c3 1095 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1096 LogObject.uart_send_str(F("Enc28J60Network::geterevid(void) DEBUG_V3:Function started and return:"));
cassyarduino 0:e3fb1267e3c3 1097 LogObject.uart_send_decln(erevid);
cassyarduino 0:e3fb1267e3c3 1098 #endif
cassyarduino 0:e3fb1267e3c3 1099 return(erevid);
cassyarduino 0:e3fb1267e3c3 1100 }
cassyarduino 0:e3fb1267e3c3 1101
cassyarduino 0:e3fb1267e3c3 1102 // read the phstat2 of the chip:
cassyarduino 0:e3fb1267e3c3 1103 uint16_t
cassyarduino 0:e3fb1267e3c3 1104 Enc28J60Network::PhyStatus(void)
cassyarduino 0:e3fb1267e3c3 1105 {
cassyarduino 0:e3fb1267e3c3 1106 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1107 LogObject.uart_send_str(F("Enc28J60Network::PhyStatus(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1108 LogObject.uart_send_decln(erevid);
cassyarduino 0:e3fb1267e3c3 1109 #endif
cassyarduino 0:e3fb1267e3c3 1110 uint16_t phstat2;
cassyarduino 0:e3fb1267e3c3 1111 phstat2=phyRead(PHSTAT2);
cassyarduino 0:e3fb1267e3c3 1112 if ((phstat2 & 0x20) > 0) {phstat2=phstat2 &0x100;}
cassyarduino 0:e3fb1267e3c3 1113 phstat2=(phstat2 & 0xFF00) | erevid;
cassyarduino 0:e3fb1267e3c3 1114 if ((phstat2 & 0x8000) > 0) {phstat2=0;}
cassyarduino 0:e3fb1267e3c3 1115 return phstat2;
cassyarduino 0:e3fb1267e3c3 1116 }
cassyarduino 0:e3fb1267e3c3 1117
cassyarduino 0:e3fb1267e3c3 1118 bool
cassyarduino 0:e3fb1267e3c3 1119 Enc28J60Network::linkStatus(void)
cassyarduino 0:e3fb1267e3c3 1120 {
cassyarduino 0:e3fb1267e3c3 1121 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1122 LogObject.uart_send_strln(F("Enc28J60Network::linkStatus(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1123 #endif
cassyarduino 0:e3fb1267e3c3 1124 return (phyRead(PHSTAT2) & 0x0400) > 0;
cassyarduino 0:e3fb1267e3c3 1125 }
cassyarduino 0:e3fb1267e3c3 1126
cassyarduino 0:e3fb1267e3c3 1127 Enc28J60Network Enc28J60;