cassyarduino cassyarduino / UIPEthernet

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utility/Enc28J60Network.cpp@33:7ba5d53df0f2, 2017-02-14 (annotated)

Committer:
cassyarduino
Date:
Tue Feb 14 14:16:14 2017 +0100
Revision:
33:7ba5d53df0f2
Parent:
29:9fc1e6fb82ec
Child:
36:689bcc358067
Changes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cassyarduino 0:e3fb1267e3c3 1 /*
cassyarduino 0:e3fb1267e3c3 2 Enc28J60NetworkClass.h
cassyarduino 0:e3fb1267e3c3 3 UIPEthernet network driver for Microchip ENC28J60 Ethernet Interface.
cassyarduino 0:e3fb1267e3c3 4
cassyarduino 0:e3fb1267e3c3 5 Copyright (c) 2013 Norbert Truchsess <norbert.truchsess@t-online.de>
cassyarduino 0:e3fb1267e3c3 6 All rights reserved.
cassyarduino 0:e3fb1267e3c3 7
cassyarduino 0:e3fb1267e3c3 8 based on enc28j60.c file from the AVRlib library by Pascal Stang.
cassyarduino 0:e3fb1267e3c3 9 For AVRlib See http://www.procyonengineering.com/
cassyarduino 0:e3fb1267e3c3 10
cassyarduino 0:e3fb1267e3c3 11 This program is free software: you can redistribute it and/or modify
cassyarduino 0:e3fb1267e3c3 12 it under the terms of the GNU General Public License as published by
cassyarduino 0:e3fb1267e3c3 13 the Free Software Foundation, either version 3 of the License, or
cassyarduino 0:e3fb1267e3c3 14 (at your option) any later version.
cassyarduino 0:e3fb1267e3c3 15
cassyarduino 0:e3fb1267e3c3 16 This program is distributed in the hope that it will be useful,
cassyarduino 0:e3fb1267e3c3 17 but WITHOUT ANY WARRANTY; without even the implied warranty of
cassyarduino 0:e3fb1267e3c3 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
cassyarduino 0:e3fb1267e3c3 19 GNU General Public License for more details.
cassyarduino 0:e3fb1267e3c3 20
cassyarduino 0:e3fb1267e3c3 21 You should have received a copy of the GNU General Public License
cassyarduino 0:e3fb1267e3c3 22 along with this program. If not, see <http://www.gnu.org/licenses/>.
cassyarduino 0:e3fb1267e3c3 23 */
cassyarduino 0:e3fb1267e3c3 24
cassyarduino 0:e3fb1267e3c3 25 #include "Enc28J60Network.h"
cassyarduino 0:e3fb1267e3c3 26 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 27 #include "Arduino.h"
cassyarduino 0:e3fb1267e3c3 28 #endif
cassyarduino 0:e3fb1267e3c3 29 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 30 #include <mbed.h>
cassyarduino 20:fe5026169ec6 31 #include "mbed/millis.h"
cassyarduino 0:e3fb1267e3c3 32 #define delay(x) wait_ms(x)
cassyarduino 0:e3fb1267e3c3 33 #endif
cassyarduino 0:e3fb1267e3c3 34 #include "logging.h"
cassyarduino 0:e3fb1267e3c3 35
cassyarduino 0:e3fb1267e3c3 36 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 37 #if defined(ARDUINO)
cassyarduino 25:ef941d560208 38 #if !defined(STM32F3) && !defined(__STM32F4__)
cassyarduino 19:e416943f7119 39 #include <SPI.h>
cassyarduino 19:e416943f7119 40 extern SPIClass SPI;
cassyarduino 19:e416943f7119 41 #else
cassyarduino 19:e416943f7119 42 #include "HardwareSPI.h"
cassyarduino 19:e416943f7119 43 extern HardwareSPI SPI(1);
cassyarduino 19:e416943f7119 44 #endif
cassyarduino 0:e3fb1267e3c3 45 #endif
cassyarduino 0:e3fb1267e3c3 46 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 47 SPI _spi(SPI_MOSI,SPI_MISO,SPI_SCK);
cassyarduino 0:e3fb1267e3c3 48 DigitalOut _cs(ENC28J60_CONTROL_CS);
cassyarduino 0:e3fb1267e3c3 49 Serial LogObject(SERIAL_TX,SERIAL_RX);
cassyarduino 0:e3fb1267e3c3 50 #endif
cassyarduino 0:e3fb1267e3c3 51 #endif
cassyarduino 0:e3fb1267e3c3 52
cassyarduino 0:e3fb1267e3c3 53 extern "C" {
cassyarduino 0:e3fb1267e3c3 54 #if defined(ARDUINO_ARCH_AVR)
cassyarduino 0:e3fb1267e3c3 55 // AVR-specific code
cassyarduino 0:e3fb1267e3c3 56 #include <avr/io.h>
cassyarduino 0:e3fb1267e3c3 57 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 58 // SAM-specific code
cassyarduino 0:e3fb1267e3c3 59 #else
cassyarduino 0:e3fb1267e3c3 60 // generic, non-platform specific code
cassyarduino 0:e3fb1267e3c3 61 #endif
cassyarduino 0:e3fb1267e3c3 62 #include "enc28j60.h"
cassyarduino 0:e3fb1267e3c3 63 #include "uip.h"
cassyarduino 0:e3fb1267e3c3 64 }
cassyarduino 0:e3fb1267e3c3 65
cassyarduino 0:e3fb1267e3c3 66 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 67 // set CS to 0 = active
cassyarduino 0:e3fb1267e3c3 68 #define CSACTIVE digitalWrite(ENC28J60_CONTROL_CS, LOW)
cassyarduino 0:e3fb1267e3c3 69 // set CS to 1 = passive
cassyarduino 0:e3fb1267e3c3 70 #define CSPASSIVE digitalWrite(ENC28J60_CONTROL_CS, HIGH)
cassyarduino 0:e3fb1267e3c3 71 #endif
cassyarduino 0:e3fb1267e3c3 72 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 73 // set CS to 0 = active
cassyarduino 0:e3fb1267e3c3 74 #define CSACTIVE _cs=0
cassyarduino 0:e3fb1267e3c3 75 // set CS to 1 = passive
cassyarduino 0:e3fb1267e3c3 76 #define CSPASSIVE _cs=1
cassyarduino 0:e3fb1267e3c3 77 #endif
cassyarduino 0:e3fb1267e3c3 78
cassyarduino 0:e3fb1267e3c3 79 //
cassyarduino 0:e3fb1267e3c3 80 #if defined(ARDUINO_ARCH_AVR)
cassyarduino 0:e3fb1267e3c3 81 #define waitspi() while(!(SPSR&(1<<SPIF)))
cassyarduino 0:e3fb1267e3c3 82 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 83 #if ENC28J60_CONTROL_CS==BOARD_SPI_SS0 or ENC28J60_CONTROL_CS==BOARD_SPI_SS1 or ENC28J60_CONTROL_CS==BOARD_SPI_SS2 or ENC28J60_CONTROL_CS==BOARD_SPI_SS3
cassyarduino 0:e3fb1267e3c3 84 #define ENC28J60_USE_SPILIB_EXT 1
cassyarduino 0:e3fb1267e3c3 85 #endif
cassyarduino 0:e3fb1267e3c3 86 #endif
cassyarduino 0:e3fb1267e3c3 87
cassyarduino 0:e3fb1267e3c3 88 uint16_t Enc28J60Network::nextPacketPtr;
cassyarduino 0:e3fb1267e3c3 89 uint8_t Enc28J60Network::bank=0xff;
cassyarduino 0:e3fb1267e3c3 90 uint8_t Enc28J60Network::erevid=0;
cassyarduino 0:e3fb1267e3c3 91
cassyarduino 0:e3fb1267e3c3 92 struct memblock Enc28J60Network::receivePkt;
cassyarduino 0:e3fb1267e3c3 93
cassyarduino 0:e3fb1267e3c3 94 bool Enc28J60Network::broadcast_enabled = false;
cassyarduino 0:e3fb1267e3c3 95
cassyarduino 0:e3fb1267e3c3 96
cassyarduino 0:e3fb1267e3c3 97 void Enc28J60Network::init(uint8_t* macaddr)
cassyarduino 0:e3fb1267e3c3 98 {
cassyarduino 0:e3fb1267e3c3 99 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 100 LogObject.uart_send_strln(F("Enc28J60Network::init(uint8_t* macaddr) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 101 #endif
cassyarduino 0:e3fb1267e3c3 102 receivePkt.begin = 0;
cassyarduino 0:e3fb1267e3c3 103 receivePkt.size = 0;
cassyarduino 0:e3fb1267e3c3 104
cassyarduino 0:e3fb1267e3c3 105 unsigned int timeout = 15;
cassyarduino 0:e3fb1267e3c3 106 MemoryPool::init(); // 1 byte in between RX_STOP_INIT and pool to allow prepending of controlbyte
cassyarduino 0:e3fb1267e3c3 107 // initialize I/O
cassyarduino 0:e3fb1267e3c3 108 // ss as output:
cassyarduino 0:e3fb1267e3c3 109 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 110 pinMode(ENC28J60_CONTROL_CS, OUTPUT);
cassyarduino 0:e3fb1267e3c3 111 #endif
cassyarduino 20:fe5026169ec6 112 #if defined(__MBED__)
cassyarduino 20:fe5026169ec6 113 millis_start();
cassyarduino 20:fe5026169ec6 114 #endif
cassyarduino 0:e3fb1267e3c3 115 CSPASSIVE; // ss=0
cassyarduino 0:e3fb1267e3c3 116 //
cassyarduino 0:e3fb1267e3c3 117
cassyarduino 0:e3fb1267e3c3 118 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 119 LogObject.uart_send_str(F("ENC28J60::init DEBUG:csPin = "));
cassyarduino 0:e3fb1267e3c3 120 LogObject.uart_send_decln(ENC28J60_CONTROL_CS);
cassyarduino 0:e3fb1267e3c3 121 LogObject.uart_send_str(F("ENC28J60::init DEBUG:miso = "));
cassyarduino 0:e3fb1267e3c3 122 LogObject.uart_send_decln(SPI_MISO);
cassyarduino 0:e3fb1267e3c3 123 LogObject.uart_send_str(F("ENC28J60::init DEBUG:mosi = "));
cassyarduino 0:e3fb1267e3c3 124 LogObject.uart_send_decln(SPI_MOSI);
cassyarduino 0:e3fb1267e3c3 125 LogObject.uart_send_str(F("ENC28J60::init DEBUG:sck = "));
cassyarduino 0:e3fb1267e3c3 126 LogObject.uart_send_decln(SPI_SCK);
cassyarduino 0:e3fb1267e3c3 127 #endif
cassyarduino 0:e3fb1267e3c3 128 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 129 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 130 LogObject.uart_send_strln(F("ENC28J60::init DEBUG:Use SPI lib SPI.begin()"));
cassyarduino 0:e3fb1267e3c3 131 #endif
cassyarduino 0:e3fb1267e3c3 132 #if defined(ARDUINO)
cassyarduino 25:ef941d560208 133 #if defined(__STM32F3__) || defined(STM32F3) || defined(__STM32F4__)
cassyarduino 19:e416943f7119 134 SPI.begin(SPI_9MHZ, MSBFIRST, 0);
cassyarduino 19:e416943f7119 135 #else
cassyarduino 19:e416943f7119 136 SPI.begin();
cassyarduino 19:e416943f7119 137 #endif
cassyarduino 0:e3fb1267e3c3 138 #endif
cassyarduino 0:e3fb1267e3c3 139 #if defined(ARDUINO_ARCH_AVR)
cassyarduino 0:e3fb1267e3c3 140 // AVR-specific code
cassyarduino 0:e3fb1267e3c3 141 SPI.setClockDivider(SPI_CLOCK_DIV2); //results in 8MHZ at 16MHZ system clock.
cassyarduino 0:e3fb1267e3c3 142 #elif defined(ARDUINO_ARCH_SAM)
cassyarduino 0:e3fb1267e3c3 143 // SAM-specific code
cassyarduino 0:e3fb1267e3c3 144 SPI.setClockDivider(10); //defaults to 21 which results in aprox. 4MHZ. A 10 should result in a little more than 8MHZ.
cassyarduino 25:ef941d560208 145 #elif defined(__STM32F1__) || defined(__STM32F3__)
cassyarduino 0:e3fb1267e3c3 146 // generic, non-platform specific code
cassyarduino 0:e3fb1267e3c3 147 #define USE_STM32F1_DMAC 1 //on STM32
cassyarduino 0:e3fb1267e3c3 148 // BOARD_NR_SPI >= 1 BOARD_SPI1_NSS_PIN, BOARD_SPI1_SCK_PIN, BOARD_SPI1_MISO_PIN, BOARD_SPI1_MOSI_PIN
cassyarduino 0:e3fb1267e3c3 149 SPI.setBitOrder(MSBFIRST);
cassyarduino 0:e3fb1267e3c3 150 SPI.setDataMode(SPI_MODE0);
cassyarduino 0:e3fb1267e3c3 151 SPI.setClockDivider(SPI_CLOCK_DIV8); //value 8 the result is 9MHz at 72MHz clock.
cassyarduino 0:e3fb1267e3c3 152 #else
cassyarduino 0:e3fb1267e3c3 153 #if defined(ARDUINO)
cassyarduino 25:ef941d560208 154 #if !defined(__STM32F3__) && !defined(STM32F3) && !defined(__STM32F4__)
cassyarduino 19:e416943f7119 155 SPI.setBitOrder(MSBFIRST);
cassyarduino 19:e416943f7119 156 #endif
cassyarduino 20:fe5026169ec6 157 //Settings for ESP8266
cassyarduino 0:e3fb1267e3c3 158 //SPI.setDataMode(SPI_MODE0);
cassyarduino 0:e3fb1267e3c3 159 //SPI.setClockDivider(SPI_CLOCK_DIV16);
cassyarduino 0:e3fb1267e3c3 160 #endif
cassyarduino 0:e3fb1267e3c3 161 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 162 _spi.format(8, 0); // 8bit, mode 0
cassyarduino 0:e3fb1267e3c3 163 _spi.frequency(7000000); // 7MHz
cassyarduino 0:e3fb1267e3c3 164 #endif
cassyarduino 0:e3fb1267e3c3 165 #endif
cassyarduino 0:e3fb1267e3c3 166 #else
cassyarduino 0:e3fb1267e3c3 167 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 168 LogObject.uart_send_strln(F("ENC28J60::init DEBUG:Use Native hardware SPI"));
cassyarduino 0:e3fb1267e3c3 169 #endif
cassyarduino 0:e3fb1267e3c3 170 pinMode(SPI_MOSI, OUTPUT);
cassyarduino 0:e3fb1267e3c3 171 pinMode(SPI_SCK, OUTPUT);
cassyarduino 0:e3fb1267e3c3 172 pinMode(SPI_MISO, INPUT);
cassyarduino 0:e3fb1267e3c3 173 //Hardware SS must be configured as OUTPUT to enable SPI-master (regardless of which pin is configured as ENC28J60_CONTROL_CS)
cassyarduino 0:e3fb1267e3c3 174 //pinMode(ENC28J60_CONTROL_CS, OUTPUT);
cassyarduino 0:e3fb1267e3c3 175
cassyarduino 0:e3fb1267e3c3 176 digitalWrite(SPI_MOSI, LOW);
cassyarduino 0:e3fb1267e3c3 177 digitalWrite(SPI_SCK, LOW);
cassyarduino 0:e3fb1267e3c3 178
cassyarduino 0:e3fb1267e3c3 179 // initialize SPI interface
cassyarduino 0:e3fb1267e3c3 180 // master mode and Fosc/2 clock:
cassyarduino 0:e3fb1267e3c3 181 SPCR = (1<<SPE)|(1<<MSTR);
cassyarduino 0:e3fb1267e3c3 182 SPSR |= (1<<SPI2X);
cassyarduino 0:e3fb1267e3c3 183 #endif
cassyarduino 0:e3fb1267e3c3 184
cassyarduino 0:e3fb1267e3c3 185 // perform system reset
cassyarduino 0:e3fb1267e3c3 186 writeOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);
cassyarduino 0:e3fb1267e3c3 187 delay(2); // errata B7/2
cassyarduino 0:e3fb1267e3c3 188 delay(50);
cassyarduino 0:e3fb1267e3c3 189 // check CLKRDY bit to see if reset is complete
cassyarduino 0:e3fb1267e3c3 190 // The CLKRDY does not work. See Rev. B4 Silicon Errata point. Just wait.
cassyarduino 0:e3fb1267e3c3 191 //while(!(readReg(ESTAT) & ESTAT_CLKRDY));
cassyarduino 0:e3fb1267e3c3 192 // do bank 0 stuff
cassyarduino 0:e3fb1267e3c3 193 // initialize receive buffer
cassyarduino 0:e3fb1267e3c3 194 // 16-bit transfers, must write low byte first
cassyarduino 0:e3fb1267e3c3 195 // set receive buffer start address
cassyarduino 0:e3fb1267e3c3 196 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 197 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:Before readOp(ENC28J60_READ_CTRL_REG, ESTAT)"));
cassyarduino 0:e3fb1267e3c3 198 #endif
cassyarduino 0:e3fb1267e3c3 199 nextPacketPtr = RXSTART_INIT;
cassyarduino 0:e3fb1267e3c3 200 while ((!readOp(ENC28J60_READ_CTRL_REG, ESTAT) & ESTAT_CLKRDY) && (timeout>0))
cassyarduino 0:e3fb1267e3c3 201 {
cassyarduino 0:e3fb1267e3c3 202 timeout=timeout-1;
cassyarduino 0:e3fb1267e3c3 203 delay(10);
cassyarduino 0:e3fb1267e3c3 204 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 205 wdt_reset();
cassyarduino 0:e3fb1267e3c3 206 #endif
cassyarduino 0:e3fb1267e3c3 207 }
cassyarduino 0:e3fb1267e3c3 208 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 209 if (timeout==0) {LogObject.uart_send_strln(F("ENC28J60::init ERROR:TIMEOUT !!!"));}
cassyarduino 0:e3fb1267e3c3 210 #endif
cassyarduino 0:e3fb1267e3c3 211 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 212 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After readOp(ENC28J60_READ_CTRL_REG, ESTAT)"));
cassyarduino 0:e3fb1267e3c3 213 #endif
cassyarduino 0:e3fb1267e3c3 214 // Rx start
cassyarduino 0:e3fb1267e3c3 215 writeRegPair(ERXSTL, RXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 216 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 217 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After writeRegPair(ERXSTL, RXSTART_INIT)"));
cassyarduino 0:e3fb1267e3c3 218 #endif
cassyarduino 0:e3fb1267e3c3 219 // set receive pointer address
cassyarduino 0:e3fb1267e3c3 220 writeRegPair(ERXRDPTL, RXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 221 // RX end
cassyarduino 0:e3fb1267e3c3 222 writeRegPair(ERXNDL, RXSTOP_INIT);
cassyarduino 0:e3fb1267e3c3 223 // TX start
cassyarduino 0:e3fb1267e3c3 224 //writeRegPair(ETXSTL, TXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 225 // TX end
cassyarduino 0:e3fb1267e3c3 226 //writeRegPair(ETXNDL, TXSTOP_INIT);
cassyarduino 0:e3fb1267e3c3 227 // do bank 1 stuff, packet filter:
cassyarduino 0:e3fb1267e3c3 228 // For broadcast packets we allow only ARP packtets
cassyarduino 0:e3fb1267e3c3 229 // All other packets should be unicast only for our mac (MAADR)
cassyarduino 0:e3fb1267e3c3 230 //
cassyarduino 0:e3fb1267e3c3 231 // The pattern to match on is therefore
cassyarduino 0:e3fb1267e3c3 232 // Type ETH.DST
cassyarduino 0:e3fb1267e3c3 233 // ARP BROADCAST
cassyarduino 0:e3fb1267e3c3 234 // 06 08 -- ff ff ff ff ff ff -> ip checksum for theses bytes=f7f9
cassyarduino 0:e3fb1267e3c3 235 // in binary these poitions are:11 0000 0011 1111
cassyarduino 0:e3fb1267e3c3 236 // This is hex 303F->EPMM0=0x3f,EPMM1=0x30
cassyarduino 0:e3fb1267e3c3 237 //TODO define specific pattern to receive dhcp-broadcast packages instead of setting ERFCON_BCEN!
cassyarduino 0:e3fb1267e3c3 238 // enableBroadcast(); // change to add ERXFCON_BCEN recommended by epam
cassyarduino 0:e3fb1267e3c3 239 writeReg(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_PMEN|ERXFCON_BCEN);
cassyarduino 0:e3fb1267e3c3 240 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 241 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After writeReg(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_PMEN|ERXFCON_BCEN)"));
cassyarduino 0:e3fb1267e3c3 242 #endif
cassyarduino 33:7ba5d53df0f2 243 #if defined(ESP8266)
cassyarduino 33:7ba5d53df0f2 244 wdt_reset();
cassyarduino 33:7ba5d53df0f2 245 #endif
cassyarduino 0:e3fb1267e3c3 246 writeRegPair(EPMM0, 0x303f);
cassyarduino 0:e3fb1267e3c3 247 writeRegPair(EPMCSL, 0xf7f9);
cassyarduino 0:e3fb1267e3c3 248 //
cassyarduino 0:e3fb1267e3c3 249 //
cassyarduino 0:e3fb1267e3c3 250 // do bank 2 stuff
cassyarduino 0:e3fb1267e3c3 251 // enable MAC receive
cassyarduino 0:e3fb1267e3c3 252 // and bring MAC out of reset (writes 0x00 to MACON2)
cassyarduino 0:e3fb1267e3c3 253 writeRegPair(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS);
cassyarduino 0:e3fb1267e3c3 254 // enable automatic padding to 60bytes and CRC operations
cassyarduino 0:e3fb1267e3c3 255 writeOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN);
cassyarduino 0:e3fb1267e3c3 256 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 257 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After writeOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN)"));
cassyarduino 0:e3fb1267e3c3 258 #endif
cassyarduino 0:e3fb1267e3c3 259 // set inter-frame gap (non-back-to-back)
cassyarduino 0:e3fb1267e3c3 260 writeRegPair(MAIPGL, 0x0C12);
cassyarduino 0:e3fb1267e3c3 261 // set inter-frame gap (back-to-back)
cassyarduino 0:e3fb1267e3c3 262 writeReg(MABBIPG, 0x12);
cassyarduino 0:e3fb1267e3c3 263 // Set the maximum packet size which the controller will accept
cassyarduino 0:e3fb1267e3c3 264 // Do not send packets longer than MAX_FRAMELEN:
cassyarduino 0:e3fb1267e3c3 265 writeRegPair(MAMXFLL, MAX_FRAMELEN);
cassyarduino 0:e3fb1267e3c3 266 // do bank 3 stuff
cassyarduino 0:e3fb1267e3c3 267 // write MAC address
cassyarduino 0:e3fb1267e3c3 268 // NOTE: MAC address in ENC28J60 is byte-backward
cassyarduino 0:e3fb1267e3c3 269 writeReg(MAADR5, macaddr[0]);
cassyarduino 0:e3fb1267e3c3 270 writeReg(MAADR4, macaddr[1]);
cassyarduino 0:e3fb1267e3c3 271 writeReg(MAADR3, macaddr[2]);
cassyarduino 0:e3fb1267e3c3 272 writeReg(MAADR2, macaddr[3]);
cassyarduino 0:e3fb1267e3c3 273 writeReg(MAADR1, macaddr[4]);
cassyarduino 0:e3fb1267e3c3 274 writeReg(MAADR0, macaddr[5]);
cassyarduino 0:e3fb1267e3c3 275 // no loopback of transmitted frames
cassyarduino 0:e3fb1267e3c3 276 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 277 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:Before phyWrite(PHCON2, PHCON2_HDLDIS)"));
cassyarduino 0:e3fb1267e3c3 278 #endif
cassyarduino 0:e3fb1267e3c3 279 phyWrite(PHCON2, PHCON2_HDLDIS);
cassyarduino 0:e3fb1267e3c3 280 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 281 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After phyWrite(PHCON2, PHCON2_HDLDIS)"));
cassyarduino 0:e3fb1267e3c3 282 #endif
cassyarduino 0:e3fb1267e3c3 283 // switch to bank 0
cassyarduino 0:e3fb1267e3c3 284 setBank(ECON1);
cassyarduino 0:e3fb1267e3c3 285 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 286 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:After setBank(ECON1)"));
cassyarduino 0:e3fb1267e3c3 287 #endif
cassyarduino 0:e3fb1267e3c3 288 // enable interrutps
cassyarduino 0:e3fb1267e3c3 289 writeOp(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE|EIE_PKTIE);
cassyarduino 0:e3fb1267e3c3 290 // enable packet reception
cassyarduino 0:e3fb1267e3c3 291 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
cassyarduino 0:e3fb1267e3c3 292 //Configure leds
cassyarduino 0:e3fb1267e3c3 293 phyWrite(PHLCON,0x476);
cassyarduino 0:e3fb1267e3c3 294
cassyarduino 0:e3fb1267e3c3 295 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 296 LogObject.uart_send_strln(F("ENC28J60::init DEBUG_V3:Before readReg(EREVID);"));
cassyarduino 0:e3fb1267e3c3 297 #endif
cassyarduino 0:e3fb1267e3c3 298 erevid=readReg(EREVID);
cassyarduino 0:e3fb1267e3c3 299 if (erevid==0xFF) {erevid=0;}
cassyarduino 0:e3fb1267e3c3 300 // microchip forgot to step the number on the silcon when they
cassyarduino 0:e3fb1267e3c3 301 // released the revision B7. 6 is now rev B7. We still have
cassyarduino 0:e3fb1267e3c3 302 // to see what they do when they release B8. At the moment
cassyarduino 0:e3fb1267e3c3 303 // there is no B8 out yet
cassyarduino 0:e3fb1267e3c3 304 //if (erevid > 5) ++erevid;
cassyarduino 0:e3fb1267e3c3 305 #if ACTLOGLEVEL>=LOG_INFO
cassyarduino 0:e3fb1267e3c3 306 LogObject.uart_send_str(F("ENC28J60::init INFO: Chip erevid="));
cassyarduino 0:e3fb1267e3c3 307 LogObject.uart_send_dec(erevid);
cassyarduino 0:e3fb1267e3c3 308 LogObject.uart_send_strln(F(" initialization completed."));
cassyarduino 0:e3fb1267e3c3 309 #endif
cassyarduino 0:e3fb1267e3c3 310
cassyarduino 0:e3fb1267e3c3 311 // return Enc28J60Network::erevid;
cassyarduino 0:e3fb1267e3c3 312 }
cassyarduino 0:e3fb1267e3c3 313
cassyarduino 0:e3fb1267e3c3 314 memhandle
cassyarduino 0:e3fb1267e3c3 315 Enc28J60Network::receivePacket(void)
cassyarduino 0:e3fb1267e3c3 316 {
cassyarduino 0:e3fb1267e3c3 317 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 318 LogObject.uart_send_strln(F("Enc28J60Network::receivePacket(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 319 #endif
cassyarduino 0:e3fb1267e3c3 320 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 321 wdt_reset();
cassyarduino 0:e3fb1267e3c3 322 #endif
cassyarduino 0:e3fb1267e3c3 323 uint8_t rxstat;
cassyarduino 0:e3fb1267e3c3 324 uint16_t len;
cassyarduino 0:e3fb1267e3c3 325 // check if a packet has been received and buffered
cassyarduino 0:e3fb1267e3c3 326 //if( !(readReg(EIR) & EIR_PKTIF) ){
cassyarduino 0:e3fb1267e3c3 327 // The above does not work. See Rev. B4 Silicon Errata point 6.
cassyarduino 0:e3fb1267e3c3 328 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 329 if (erevid==0)
cassyarduino 0:e3fb1267e3c3 330 {
cassyarduino 33:7ba5d53df0f2 331 LogObject.uart_send_strln(F("Enc28J60Network::receivePacket(void) ERROR:ENC28j50 Device not found !!! Bypass receivePacket function !!!"));
cassyarduino 0:e3fb1267e3c3 332 }
cassyarduino 0:e3fb1267e3c3 333 #endif
cassyarduino 0:e3fb1267e3c3 334 uint8_t epktcnt=readReg(EPKTCNT);
cassyarduino 16:66225c1d660c 335 if ((erevid!=0) && (epktcnt!=0))
cassyarduino 0:e3fb1267e3c3 336 {
cassyarduino 0:e3fb1267e3c3 337 uint16_t readPtr = nextPacketPtr+6 > RXSTOP_INIT ? nextPacketPtr+6-RXSTOP_INIT+RXSTART_INIT : nextPacketPtr+6;
cassyarduino 0:e3fb1267e3c3 338 // Set the read pointer to the start of the received packet
cassyarduino 0:e3fb1267e3c3 339 writeRegPair(ERDPTL, nextPacketPtr);
cassyarduino 0:e3fb1267e3c3 340 // read the next packet pointer
cassyarduino 0:e3fb1267e3c3 341 nextPacketPtr = readOp(ENC28J60_READ_BUF_MEM, 0);
cassyarduino 0:e3fb1267e3c3 342 nextPacketPtr |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
cassyarduino 0:e3fb1267e3c3 343 // read the packet length (see datasheet page 43)
cassyarduino 0:e3fb1267e3c3 344 len = readOp(ENC28J60_READ_BUF_MEM, 0);
cassyarduino 0:e3fb1267e3c3 345 len |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
cassyarduino 0:e3fb1267e3c3 346 len -= 4; //remove the CRC count
cassyarduino 0:e3fb1267e3c3 347 // read the receive status (see datasheet page 43)
cassyarduino 0:e3fb1267e3c3 348 rxstat = readOp(ENC28J60_READ_BUF_MEM, 0);
cassyarduino 0:e3fb1267e3c3 349 //rxstat |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
cassyarduino 0:e3fb1267e3c3 350 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 351 LogObject.uart_send_str(F("Enc28J60Network::receivePacket(void) DEBUG:receivePacket ["));
cassyarduino 0:e3fb1267e3c3 352 LogObject.uart_send_hex(readPtr);
cassyarduino 0:e3fb1267e3c3 353 LogObject.uart_send_str(F("-"));
cassyarduino 0:e3fb1267e3c3 354 LogObject.uart_send_hex((readPtr+len) % (RXSTOP_INIT+1));
cassyarduino 0:e3fb1267e3c3 355 LogObject.uart_send_str(F("], next: "));
cassyarduino 0:e3fb1267e3c3 356 LogObject.uart_send_hex(nextPacketPtr);
cassyarduino 0:e3fb1267e3c3 357 LogObject.uart_send_str(F(", stat: "));
cassyarduino 0:e3fb1267e3c3 358 LogObject.uart_send_hex(rxstat);
cassyarduino 0:e3fb1267e3c3 359 LogObject.uart_send_str(F(", Packet count: "));
cassyarduino 0:e3fb1267e3c3 360 LogObject.uart_send_dec(epktcnt);
cassyarduino 0:e3fb1267e3c3 361 LogObject.uart_send_str(F(" -> "));
cassyarduino 0:e3fb1267e3c3 362 LogObject.uart_send_strln((rxstat & 0x80)!=0 ? "OK" : "failed");
cassyarduino 0:e3fb1267e3c3 363 #endif
cassyarduino 0:e3fb1267e3c3 364 // decrement the packet counter indicate we are done with this packet
cassyarduino 0:e3fb1267e3c3 365 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PKTDEC);
cassyarduino 0:e3fb1267e3c3 366 // check CRC and symbol errors (see datasheet page 44, table 7-3):
cassyarduino 0:e3fb1267e3c3 367 // The ERXFCON.CRCEN is set by default. Normally we should not
cassyarduino 0:e3fb1267e3c3 368 // need to check this.
cassyarduino 0:e3fb1267e3c3 369 if (((rxstat & 0x80) != 0) && (nextPacketPtr<=RXSTOP_INIT))
cassyarduino 0:e3fb1267e3c3 370 {
cassyarduino 0:e3fb1267e3c3 371 receivePkt.begin = readPtr;
cassyarduino 0:e3fb1267e3c3 372 receivePkt.size = len;
cassyarduino 0:e3fb1267e3c3 373 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 374 LogObject.uart_send_str(F("Enc28J60Network::receivePacket(void) DEBUG: rxstat OK. receivePkt.size="));
cassyarduino 0:e3fb1267e3c3 375 LogObject.uart_send_decln(len);
cassyarduino 0:e3fb1267e3c3 376 #endif
cassyarduino 0:e3fb1267e3c3 377 return UIP_RECEIVEBUFFERHANDLE;
cassyarduino 0:e3fb1267e3c3 378 }
cassyarduino 0:e3fb1267e3c3 379 // Move the RX read pointer to the start of the next received packet
cassyarduino 0:e3fb1267e3c3 380 // This frees the memory we just read out
cassyarduino 0:e3fb1267e3c3 381 setERXRDPT();
cassyarduino 0:e3fb1267e3c3 382 }
cassyarduino 0:e3fb1267e3c3 383 return (NOBLOCK);
cassyarduino 0:e3fb1267e3c3 384 }
cassyarduino 0:e3fb1267e3c3 385
cassyarduino 0:e3fb1267e3c3 386 void
cassyarduino 0:e3fb1267e3c3 387 Enc28J60Network::setERXRDPT(void)
cassyarduino 0:e3fb1267e3c3 388 {
cassyarduino 0:e3fb1267e3c3 389 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 390 LogObject.uart_send_strln(F("Enc28J60Network::setERXRDPT(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 391 #endif
cassyarduino 17:be34a75aa9a7 392 uint16_t actnextPacketPtr;
cassyarduino 17:be34a75aa9a7 393 nextPacketPtr == RXSTART_INIT ? actnextPacketPtr=RXSTOP_INIT : actnextPacketPtr=nextPacketPtr-1;
cassyarduino 17:be34a75aa9a7 394 if (actnextPacketPtr>RXSTOP_INIT) {actnextPacketPtr=RXSTART_INIT;}
cassyarduino 17:be34a75aa9a7 395 if ((actnextPacketPtr&1)!=0) {actnextPacketPtr--;}
cassyarduino 16:66225c1d660c 396 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 17:be34a75aa9a7 397 LogObject.uart_send_str(F("Enc28J60Network::setERXRDPT(void) DEBUG:Set actnextPacketPtr:"));
cassyarduino 17:be34a75aa9a7 398 LogObject.uart_send_hexln(actnextPacketPtr);
cassyarduino 0:e3fb1267e3c3 399 #endif
cassyarduino 17:be34a75aa9a7 400 writeRegPair(ERXRDPTL, actnextPacketPtr);
cassyarduino 0:e3fb1267e3c3 401 }
cassyarduino 0:e3fb1267e3c3 402
cassyarduino 0:e3fb1267e3c3 403 memaddress
cassyarduino 0:e3fb1267e3c3 404 Enc28J60Network::blockSize(memhandle handle)
cassyarduino 0:e3fb1267e3c3 405 {
cassyarduino 0:e3fb1267e3c3 406 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 407 LogObject.uart_send_strln(F("Enc28J60Network::blockSize(memhandle handle) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 408 #endif
cassyarduino 0:e3fb1267e3c3 409 return ((handle == NOBLOCK) || (erevid==0)) ? 0 : handle == UIP_RECEIVEBUFFERHANDLE ? receivePkt.size : blocks[handle].size;
cassyarduino 0:e3fb1267e3c3 410 }
cassyarduino 0:e3fb1267e3c3 411
cassyarduino 0:e3fb1267e3c3 412 void
cassyarduino 0:e3fb1267e3c3 413 Enc28J60Network::sendPacket(memhandle handle)
cassyarduino 0:e3fb1267e3c3 414 {
cassyarduino 0:e3fb1267e3c3 415 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 416 LogObject.uart_send_strln(F("Enc28J60Network::sendPacket(memhandle handle) INFO:Function started"));
cassyarduino 0:e3fb1267e3c3 417 #endif
cassyarduino 0:e3fb1267e3c3 418 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 419 wdt_reset();
cassyarduino 0:e3fb1267e3c3 420 #endif
cassyarduino 33:7ba5d53df0f2 421 if (erevid==0)
cassyarduino 33:7ba5d53df0f2 422 {
cassyarduino 33:7ba5d53df0f2 423 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 33:7ba5d53df0f2 424 LogObject.uart_send_strln(F("Enc28J60Network::sendPacket(memhandle handle) ERROR:ENC28j50 Device not found !!! Bypass sendPacket function !!!"));
cassyarduino 33:7ba5d53df0f2 425 #endif
cassyarduino 33:7ba5d53df0f2 426 return;
cassyarduino 33:7ba5d53df0f2 427 }
cassyarduino 33:7ba5d53df0f2 428
cassyarduino 0:e3fb1267e3c3 429 memblock *packet = &blocks[handle];
cassyarduino 0:e3fb1267e3c3 430 uint16_t start = packet->begin-1;
cassyarduino 0:e3fb1267e3c3 431 uint16_t end = start + packet->size;
cassyarduino 0:e3fb1267e3c3 432
cassyarduino 0:e3fb1267e3c3 433 // backup data at control-byte position
cassyarduino 0:e3fb1267e3c3 434 uint8_t data = readByte(start);
cassyarduino 0:e3fb1267e3c3 435 // write control-byte (if not 0 anyway)
cassyarduino 0:e3fb1267e3c3 436 if (data)
cassyarduino 0:e3fb1267e3c3 437 writeByte(start, 0);
cassyarduino 0:e3fb1267e3c3 438
cassyarduino 0:e3fb1267e3c3 439 #if ACTLOGLEVEL>=LOG_DEBUG
cassyarduino 0:e3fb1267e3c3 440 LogObject.uart_send_str(F("Enc28J60Network::sendPacket(memhandle handle) DEBUG:sendPacket("));
cassyarduino 0:e3fb1267e3c3 441 LogObject.uart_send_dec(handle);
cassyarduino 0:e3fb1267e3c3 442 LogObject.uart_send_str(F(") ["));
cassyarduino 0:e3fb1267e3c3 443 LogObject.uart_send_hex(start);
cassyarduino 0:e3fb1267e3c3 444 LogObject.uart_send_str(F("-"));
cassyarduino 0:e3fb1267e3c3 445 LogObject.uart_send_hex(end);
cassyarduino 0:e3fb1267e3c3 446 LogObject.uart_send_str(F("]: "));
cassyarduino 0:e3fb1267e3c3 447 for (uint16_t i=start; i<=end; i++)
cassyarduino 0:e3fb1267e3c3 448 {
cassyarduino 0:e3fb1267e3c3 449 LogObject.uart_send_hex(readByte(i));
cassyarduino 0:e3fb1267e3c3 450 LogObject.uart_send_str(F(" "));
cassyarduino 0:e3fb1267e3c3 451 }
cassyarduino 0:e3fb1267e3c3 452 LogObject.uart_send_strln(F(""));
cassyarduino 0:e3fb1267e3c3 453 #endif
cassyarduino 0:e3fb1267e3c3 454
cassyarduino 0:e3fb1267e3c3 455 // TX start
cassyarduino 0:e3fb1267e3c3 456 writeRegPair(ETXSTL, start);
cassyarduino 0:e3fb1267e3c3 457 // Set the TXND pointer to correspond to the packet size given
cassyarduino 0:e3fb1267e3c3 458 writeRegPair(ETXNDL, end);
cassyarduino 0:e3fb1267e3c3 459 // send the contents of the transmit buffer onto the network
cassyarduino 29:9fc1e6fb82ec 460
cassyarduino 33:7ba5d53df0f2 461 unsigned int retry = TX_COLLISION_RETRY_COUNT;
cassyarduino 33:7ba5d53df0f2 462 unsigned int timeout = 100;
cassyarduino 33:7ba5d53df0f2 463 do
cassyarduino 33:7ba5d53df0f2 464 {
cassyarduino 33:7ba5d53df0f2 465 // seydamir added
cassyarduino 33:7ba5d53df0f2 466 // Reset the transmit logic problem. See Rev. B7 Silicon Errata issues 12 and 13
cassyarduino 33:7ba5d53df0f2 467 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRST);
cassyarduino 33:7ba5d53df0f2 468 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRST);
cassyarduino 33:7ba5d53df0f2 469 writeOp(ENC28J60_BIT_FIELD_CLR, EIR, EIR_TXERIF | EIR_TXIF);
cassyarduino 33:7ba5d53df0f2 470 // end
cassyarduino 29:9fc1e6fb82ec 471
cassyarduino 33:7ba5d53df0f2 472 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRTS);
cassyarduino 33:7ba5d53df0f2 473 // Reset the transmit logic problem. See Rev. B4 Silicon Errata point 12.
cassyarduino 33:7ba5d53df0f2 474 //if( (readReg(EIR) & EIR_TXERIF) )
cassyarduino 33:7ba5d53df0f2 475 // {
cassyarduino 33:7ba5d53df0f2 476 // writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRTS);
cassyarduino 33:7ba5d53df0f2 477 // }
cassyarduino 33:7ba5d53df0f2 478
cassyarduino 33:7ba5d53df0f2 479 timeout = 100;
cassyarduino 33:7ba5d53df0f2 480 while (((readReg(EIR) & (EIR_TXIF | EIR_TXERIF)) == 0) && (timeout>0))
cassyarduino 33:7ba5d53df0f2 481 {
cassyarduino 33:7ba5d53df0f2 482 timeout=timeout-1;
cassyarduino 33:7ba5d53df0f2 483 delay(10);
cassyarduino 33:7ba5d53df0f2 484 #if defined(ESP8266)
cassyarduino 33:7ba5d53df0f2 485 wdt_reset();
cassyarduino 33:7ba5d53df0f2 486 #endif
cassyarduino 29:9fc1e6fb82ec 487 }
cassyarduino 33:7ba5d53df0f2 488 if (timeout==0)
cassyarduino 33:7ba5d53df0f2 489 {
cassyarduino 33:7ba5d53df0f2 490 /* Transmit hardware probably hung, try again later. */
cassyarduino 33:7ba5d53df0f2 491 /* Shouldn't happen according to errata 12 and 13. */
cassyarduino 33:7ba5d53df0f2 492 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRTS);
cassyarduino 33:7ba5d53df0f2 493 #if ACTLOGLEVEL>=LOG_WARN
cassyarduino 33:7ba5d53df0f2 494 LogObject.uart_send_strln(F("Enc28J60Network::sendPacket(memhandle handle) WARNING:Collision"));
cassyarduino 33:7ba5d53df0f2 495 #endif
cassyarduino 33:7ba5d53df0f2 496 retry=retry-1;
cassyarduino 33:7ba5d53df0f2 497 }
cassyarduino 33:7ba5d53df0f2 498 } while ((timeout == 0) && (retry != 0));
cassyarduino 33:7ba5d53df0f2 499 if (retry == 0)
cassyarduino 33:7ba5d53df0f2 500 {
cassyarduino 33:7ba5d53df0f2 501 #if ACTLOGLEVEL>=LOG_ERROR
cassyarduino 33:7ba5d53df0f2 502 LogObject.uart_send_strln(F("Enc28J60Network::sendPacket(memhandle handle) ERROR:COLLISION !!!"));
cassyarduino 33:7ba5d53df0f2 503 #endif
cassyarduino 33:7ba5d53df0f2 504 return;
cassyarduino 33:7ba5d53df0f2 505 }
cassyarduino 33:7ba5d53df0f2 506
cassyarduino 0:e3fb1267e3c3 507 //restore data on control-byte position
cassyarduino 0:e3fb1267e3c3 508 if (data)
cassyarduino 0:e3fb1267e3c3 509 writeByte(start, data);
cassyarduino 0:e3fb1267e3c3 510 }
cassyarduino 0:e3fb1267e3c3 511
cassyarduino 0:e3fb1267e3c3 512 uint16_t
cassyarduino 0:e3fb1267e3c3 513 Enc28J60Network::setReadPtr(memhandle handle, memaddress position, uint16_t len)
cassyarduino 0:e3fb1267e3c3 514 {
cassyarduino 0:e3fb1267e3c3 515 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 516 LogObject.uart_send_strln(F("Enc28J60Network::setReadPtr(memhandle handle, memaddress position, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 517 #endif
cassyarduino 0:e3fb1267e3c3 518 memblock *packet = handle == UIP_RECEIVEBUFFERHANDLE ? &receivePkt : &blocks[handle];
cassyarduino 0:e3fb1267e3c3 519 memaddress start = handle == UIP_RECEIVEBUFFERHANDLE && packet->begin + position > RXSTOP_INIT ? packet->begin + position-RXSTOP_INIT+RXSTART_INIT : packet->begin + position;
cassyarduino 0:e3fb1267e3c3 520
cassyarduino 0:e3fb1267e3c3 521 writeRegPair(ERDPTL, start);
cassyarduino 0:e3fb1267e3c3 522
cassyarduino 0:e3fb1267e3c3 523 if (len > packet->size - position)
cassyarduino 0:e3fb1267e3c3 524 len = packet->size - position;
cassyarduino 0:e3fb1267e3c3 525 return len;
cassyarduino 0:e3fb1267e3c3 526 }
cassyarduino 0:e3fb1267e3c3 527
cassyarduino 0:e3fb1267e3c3 528 uint16_t
cassyarduino 0:e3fb1267e3c3 529 Enc28J60Network::readPacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len)
cassyarduino 0:e3fb1267e3c3 530 {
cassyarduino 0:e3fb1267e3c3 531 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 532 LogObject.uart_send_strln(F("Enc28J60Network::readPacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 533 #endif
cassyarduino 0:e3fb1267e3c3 534 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 535 wdt_reset();
cassyarduino 0:e3fb1267e3c3 536 #endif
cassyarduino 0:e3fb1267e3c3 537 len = setReadPtr(handle, position, len);
cassyarduino 0:e3fb1267e3c3 538 readBuffer(len, buffer);
cassyarduino 20:fe5026169ec6 539 #if ACTLOGLEVEL>=LOG_DEBUG_V2
cassyarduino 20:fe5026169ec6 540 LogObject.uart_send_str(F("Enc28J60Network::readPacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len) DEBUG_V2: Read bytes:"));
cassyarduino 20:fe5026169ec6 541 LogObject.uart_send_dec(len);
cassyarduino 20:fe5026169ec6 542 LogObject.uart_send_str(F(" save to block("));
cassyarduino 20:fe5026169ec6 543 LogObject.uart_send_dec(handle);
cassyarduino 20:fe5026169ec6 544 LogObject.uart_send_str(F(") ["));
cassyarduino 20:fe5026169ec6 545 LogObject.uart_send_hex(position);
cassyarduino 20:fe5026169ec6 546 LogObject.uart_send_str(F("]: "));
cassyarduino 20:fe5026169ec6 547 for (uint16_t i=0; i<len; i++)
cassyarduino 20:fe5026169ec6 548 {
cassyarduino 20:fe5026169ec6 549 LogObject.uart_send_hex(buffer[i]);
cassyarduino 20:fe5026169ec6 550 LogObject.uart_send_str(F(" "));
cassyarduino 20:fe5026169ec6 551 }
cassyarduino 20:fe5026169ec6 552 LogObject.uart_send_strln(F(""));
cassyarduino 20:fe5026169ec6 553 #endif
cassyarduino 0:e3fb1267e3c3 554 return len;
cassyarduino 0:e3fb1267e3c3 555 }
cassyarduino 0:e3fb1267e3c3 556
cassyarduino 0:e3fb1267e3c3 557 uint16_t
cassyarduino 0:e3fb1267e3c3 558 Enc28J60Network::writePacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len)
cassyarduino 0:e3fb1267e3c3 559 {
cassyarduino 0:e3fb1267e3c3 560 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 561 LogObject.uart_send_str(F("Enc28J60Network::writePacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len) DEBUG_V3:Function started with len:"));
cassyarduino 0:e3fb1267e3c3 562 LogObject.uart_send_decln(len);
cassyarduino 0:e3fb1267e3c3 563 #endif
cassyarduino 0:e3fb1267e3c3 564 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 565 wdt_reset();
cassyarduino 0:e3fb1267e3c3 566 #endif
cassyarduino 0:e3fb1267e3c3 567 memblock *packet = &blocks[handle];
cassyarduino 0:e3fb1267e3c3 568 uint16_t start = packet->begin + position;
cassyarduino 0:e3fb1267e3c3 569
cassyarduino 0:e3fb1267e3c3 570 writeRegPair(EWRPTL, start);
cassyarduino 0:e3fb1267e3c3 571
cassyarduino 0:e3fb1267e3c3 572 if (len > packet->size - position)
cassyarduino 0:e3fb1267e3c3 573 len = packet->size - position;
cassyarduino 0:e3fb1267e3c3 574 writeBuffer(len, buffer);
cassyarduino 20:fe5026169ec6 575 #if ACTLOGLEVEL>=LOG_DEBUG_V2
cassyarduino 20:fe5026169ec6 576 LogObject.uart_send_str(F("Enc28J60Network::writePacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len) DEBUG_V2: Write bytes:"));
cassyarduino 20:fe5026169ec6 577 LogObject.uart_send_dec(len);
cassyarduino 20:fe5026169ec6 578 LogObject.uart_send_str(F(" save to block("));
cassyarduino 20:fe5026169ec6 579 LogObject.uart_send_dec(handle);
cassyarduino 20:fe5026169ec6 580 LogObject.uart_send_str(F(") ["));
cassyarduino 20:fe5026169ec6 581 LogObject.uart_send_hex(start);
cassyarduino 20:fe5026169ec6 582 LogObject.uart_send_str(F("]: "));
cassyarduino 20:fe5026169ec6 583 for (uint16_t i=0; i<len; i++)
cassyarduino 20:fe5026169ec6 584 {
cassyarduino 20:fe5026169ec6 585 LogObject.uart_send_hex(buffer[i]);
cassyarduino 20:fe5026169ec6 586 LogObject.uart_send_str(F(" "));
cassyarduino 20:fe5026169ec6 587 }
cassyarduino 20:fe5026169ec6 588 LogObject.uart_send_strln(F(""));
cassyarduino 20:fe5026169ec6 589 #endif
cassyarduino 0:e3fb1267e3c3 590 return len;
cassyarduino 0:e3fb1267e3c3 591 }
cassyarduino 0:e3fb1267e3c3 592
cassyarduino 0:e3fb1267e3c3 593
cassyarduino 0:e3fb1267e3c3 594 void Enc28J60Network::enableBroadcast (bool temporary) {
cassyarduino 0:e3fb1267e3c3 595 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 596 LogObject.uart_send_strln(F("Enc28J60Network::enableBroadcast (bool temporary) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 597 #endif
cassyarduino 0:e3fb1267e3c3 598 writeRegByte(ERXFCON, readRegByte(ERXFCON) | ERXFCON_BCEN);
cassyarduino 0:e3fb1267e3c3 599 if(!temporary)
cassyarduino 0:e3fb1267e3c3 600 broadcast_enabled = true;
cassyarduino 0:e3fb1267e3c3 601 }
cassyarduino 0:e3fb1267e3c3 602
cassyarduino 0:e3fb1267e3c3 603 void Enc28J60Network::disableBroadcast (bool temporary) {
cassyarduino 0:e3fb1267e3c3 604 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 605 LogObject.uart_send_strln(F("Enc28J60Network::disableBroadcast (bool temporary) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 606 #endif
cassyarduino 0:e3fb1267e3c3 607 if(!temporary)
cassyarduino 0:e3fb1267e3c3 608 broadcast_enabled = false;
cassyarduino 0:e3fb1267e3c3 609 if(!broadcast_enabled)
cassyarduino 0:e3fb1267e3c3 610 writeRegByte(ERXFCON, readRegByte(ERXFCON) & ~ERXFCON_BCEN);
cassyarduino 0:e3fb1267e3c3 611 }
cassyarduino 0:e3fb1267e3c3 612
cassyarduino 0:e3fb1267e3c3 613 void Enc28J60Network::enableMulticast (void) {
cassyarduino 0:e3fb1267e3c3 614 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 615 LogObject.uart_send_strln(F("Enc28J60Network::enableMulticast (void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 616 #endif
cassyarduino 0:e3fb1267e3c3 617 writeRegByte(ERXFCON, readRegByte(ERXFCON) | ERXFCON_MCEN);
cassyarduino 0:e3fb1267e3c3 618 }
cassyarduino 0:e3fb1267e3c3 619
cassyarduino 0:e3fb1267e3c3 620 void Enc28J60Network::disableMulticast (void) {
cassyarduino 0:e3fb1267e3c3 621 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 622 LogObject.uart_send_strln(F("Enc28J60Network::disableMulticast (void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 623 #endif
cassyarduino 0:e3fb1267e3c3 624 writeRegByte(ERXFCON, readRegByte(ERXFCON) & ~ERXFCON_MCEN);
cassyarduino 0:e3fb1267e3c3 625 }
cassyarduino 0:e3fb1267e3c3 626
cassyarduino 0:e3fb1267e3c3 627 uint8_t Enc28J60Network::readRegByte (uint8_t address) {
cassyarduino 0:e3fb1267e3c3 628 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 629 LogObject.uart_send_strln(F("Enc28J60Network::readRegByte (uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 630 #endif
cassyarduino 0:e3fb1267e3c3 631 setBank(address);
cassyarduino 0:e3fb1267e3c3 632 return readOp(ENC28J60_READ_CTRL_REG, address);
cassyarduino 0:e3fb1267e3c3 633 }
cassyarduino 0:e3fb1267e3c3 634
cassyarduino 0:e3fb1267e3c3 635 void Enc28J60Network::writeRegByte (uint8_t address, uint8_t data) {
cassyarduino 0:e3fb1267e3c3 636 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 637 LogObject.uart_send_strln(F("Enc28J60Network::writeRegByte (uint8_t address, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 638 #endif
cassyarduino 0:e3fb1267e3c3 639 setBank(address);
cassyarduino 0:e3fb1267e3c3 640 writeOp(ENC28J60_WRITE_CTRL_REG, address, data);
cassyarduino 0:e3fb1267e3c3 641 }
cassyarduino 0:e3fb1267e3c3 642
cassyarduino 0:e3fb1267e3c3 643
cassyarduino 0:e3fb1267e3c3 644 uint8_t Enc28J60Network::readByte(uint16_t addr)
cassyarduino 0:e3fb1267e3c3 645 {
cassyarduino 0:e3fb1267e3c3 646 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 647 LogObject.uart_send_strln(F("Enc28J60Network::readByte(uint16_t addr) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 648 #endif
cassyarduino 0:e3fb1267e3c3 649 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 650 wdt_reset();
cassyarduino 0:e3fb1267e3c3 651 #endif
cassyarduino 0:e3fb1267e3c3 652 writeRegPair(ERDPTL, addr);
cassyarduino 0:e3fb1267e3c3 653
cassyarduino 0:e3fb1267e3c3 654 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 655 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 656 // issue read command
cassyarduino 0:e3fb1267e3c3 657 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 658 SPI.transfer(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 659 // read data
cassyarduino 0:e3fb1267e3c3 660 uint8_t c = SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 661 #endif
cassyarduino 0:e3fb1267e3c3 662 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 663 _spi.write(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 664 // read data
cassyarduino 0:e3fb1267e3c3 665 uint8_t c = _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 666 #endif
cassyarduino 0:e3fb1267e3c3 667 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 668 return (c);
cassyarduino 0:e3fb1267e3c3 669 #else
cassyarduino 0:e3fb1267e3c3 670 // issue read command
cassyarduino 0:e3fb1267e3c3 671 SPDR = ENC28J60_READ_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 672 waitspi();
cassyarduino 0:e3fb1267e3c3 673 // read data
cassyarduino 0:e3fb1267e3c3 674 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 675 waitspi();
cassyarduino 0:e3fb1267e3c3 676 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 677 return (SPDR);
cassyarduino 0:e3fb1267e3c3 678 #endif
cassyarduino 0:e3fb1267e3c3 679 }
cassyarduino 0:e3fb1267e3c3 680
cassyarduino 0:e3fb1267e3c3 681 void Enc28J60Network::writeByte(uint16_t addr, uint8_t data)
cassyarduino 0:e3fb1267e3c3 682 {
cassyarduino 0:e3fb1267e3c3 683 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 684 LogObject.uart_send_strln(F("Enc28J60Network::writeByte(uint16_t addr, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 685 #endif
cassyarduino 0:e3fb1267e3c3 686 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 687 wdt_reset();
cassyarduino 0:e3fb1267e3c3 688 #endif
cassyarduino 0:e3fb1267e3c3 689 writeRegPair(EWRPTL, addr);
cassyarduino 0:e3fb1267e3c3 690
cassyarduino 0:e3fb1267e3c3 691 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 692 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 693 // issue write command
cassyarduino 0:e3fb1267e3c3 694 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 695 SPI.transfer(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 696 // write data
cassyarduino 0:e3fb1267e3c3 697 SPI.transfer(data);
cassyarduino 0:e3fb1267e3c3 698 #endif
cassyarduino 0:e3fb1267e3c3 699 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 700 _spi.write(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 701 // write data
cassyarduino 0:e3fb1267e3c3 702 _spi.write(data);
cassyarduino 0:e3fb1267e3c3 703 #endif
cassyarduino 0:e3fb1267e3c3 704 #else
cassyarduino 0:e3fb1267e3c3 705 // issue write command
cassyarduino 0:e3fb1267e3c3 706 SPDR = ENC28J60_WRITE_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 707 waitspi();
cassyarduino 0:e3fb1267e3c3 708 // write data
cassyarduino 0:e3fb1267e3c3 709 SPDR = data;
cassyarduino 0:e3fb1267e3c3 710 waitspi();
cassyarduino 0:e3fb1267e3c3 711 #endif
cassyarduino 0:e3fb1267e3c3 712 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 713 }
cassyarduino 0:e3fb1267e3c3 714
cassyarduino 0:e3fb1267e3c3 715 void
cassyarduino 0:e3fb1267e3c3 716 Enc28J60Network::copyPacket(memhandle dest_pkt, memaddress dest_pos, memhandle src_pkt, memaddress src_pos, uint16_t len)
cassyarduino 0:e3fb1267e3c3 717 {
cassyarduino 0:e3fb1267e3c3 718 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 719 LogObject.uart_send_strln(F("Enc28J60Network::copyPacket(memhandle dest_pkt, memaddress dest_pos, memhandle src_pkt, memaddress src_pos, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 720 #endif
cassyarduino 0:e3fb1267e3c3 721 memblock *dest = &blocks[dest_pkt];
cassyarduino 0:e3fb1267e3c3 722 memblock *src = src_pkt == UIP_RECEIVEBUFFERHANDLE ? &receivePkt : &blocks[src_pkt];
cassyarduino 0:e3fb1267e3c3 723 memaddress start = src_pkt == UIP_RECEIVEBUFFERHANDLE && src->begin + src_pos > RXSTOP_INIT ? src->begin + src_pos-RXSTOP_INIT+RXSTART_INIT : src->begin + src_pos;
cassyarduino 0:e3fb1267e3c3 724 enc28J60_mempool_block_move_callback(dest->begin+dest_pos,start,len);
cassyarduino 0:e3fb1267e3c3 725 // Move the RX read pointer to the start of the next received packet
cassyarduino 0:e3fb1267e3c3 726 // This frees the memory we just read out
cassyarduino 0:e3fb1267e3c3 727 setERXRDPT();
cassyarduino 0:e3fb1267e3c3 728 }
cassyarduino 0:e3fb1267e3c3 729
cassyarduino 0:e3fb1267e3c3 730 void
cassyarduino 0:e3fb1267e3c3 731 enc28J60_mempool_block_move_callback(memaddress dest, memaddress src, memaddress len)
cassyarduino 0:e3fb1267e3c3 732 {
cassyarduino 0:e3fb1267e3c3 733 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 734 LogObject.uart_send_strln(F("enc28J60_mempool_block_move_callback(memaddress dest, memaddress src, memaddress len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 735 #endif
cassyarduino 0:e3fb1267e3c3 736 //void
cassyarduino 0:e3fb1267e3c3 737 //Enc28J60Network::memblock_mv_cb(uint16_t dest, uint16_t src, uint16_t len)
cassyarduino 0:e3fb1267e3c3 738 //{
cassyarduino 0:e3fb1267e3c3 739 //as ENC28J60 DMA is unable to copy single bytes:
cassyarduino 0:e3fb1267e3c3 740 if (len == 1)
cassyarduino 0:e3fb1267e3c3 741 {
cassyarduino 0:e3fb1267e3c3 742 Enc28J60Network::writeByte(dest,Enc28J60Network::readByte(src));
cassyarduino 0:e3fb1267e3c3 743 }
cassyarduino 0:e3fb1267e3c3 744 else
cassyarduino 0:e3fb1267e3c3 745 {
cassyarduino 0:e3fb1267e3c3 746 // calculate address of last byte
cassyarduino 0:e3fb1267e3c3 747 len += src - 1;
cassyarduino 0:e3fb1267e3c3 748
cassyarduino 0:e3fb1267e3c3 749 /* 1. Appropriately program the EDMAST, EDMAND
cassyarduino 0:e3fb1267e3c3 750 and EDMADST register pairs. The EDMAST
cassyarduino 0:e3fb1267e3c3 751 registers should point to the first byte to copy
cassyarduino 0:e3fb1267e3c3 752 from, the EDMAND registers should point to the
cassyarduino 0:e3fb1267e3c3 753 last byte to copy and the EDMADST registers
cassyarduino 0:e3fb1267e3c3 754 should point to the first byte in the destination
cassyarduino 0:e3fb1267e3c3 755 range. The destination range will always be
cassyarduino 0:e3fb1267e3c3 756 linear, never wrapping at any values except from
cassyarduino 0:e3fb1267e3c3 757 8191 to 0 (the 8-Kbyte memory boundary).
cassyarduino 0:e3fb1267e3c3 758 Extreme care should be taken when
cassyarduino 0:e3fb1267e3c3 759 programming the start and end pointers to
cassyarduino 0:e3fb1267e3c3 760 prevent a never ending DMA operation which
cassyarduino 0:e3fb1267e3c3 761 would overwrite the entire 8-Kbyte buffer.
cassyarduino 0:e3fb1267e3c3 762 */
cassyarduino 0:e3fb1267e3c3 763 Enc28J60Network::writeRegPair(EDMASTL, src);
cassyarduino 0:e3fb1267e3c3 764 Enc28J60Network::writeRegPair(EDMADSTL, dest);
cassyarduino 0:e3fb1267e3c3 765
cassyarduino 0:e3fb1267e3c3 766 if ((src <= RXSTOP_INIT)&& (len > RXSTOP_INIT))len -= (RXSTOP_INIT-RXSTART_INIT);
cassyarduino 0:e3fb1267e3c3 767 Enc28J60Network::writeRegPair(EDMANDL, len);
cassyarduino 0:e3fb1267e3c3 768
cassyarduino 0:e3fb1267e3c3 769 /*
cassyarduino 0:e3fb1267e3c3 770 2. If an interrupt at the end of the copy process is
cassyarduino 0:e3fb1267e3c3 771 desired, set EIE.DMAIE and EIE.INTIE and
cassyarduino 0:e3fb1267e3c3 772 clear EIR.DMAIF.
cassyarduino 0:e3fb1267e3c3 773
cassyarduino 0:e3fb1267e3c3 774 3. Verify that ECON1.CSUMEN is clear. */
cassyarduino 0:e3fb1267e3c3 775 Enc28J60Network::writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_CSUMEN);
cassyarduino 0:e3fb1267e3c3 776
cassyarduino 0:e3fb1267e3c3 777 /* 4. Start the DMA copy by setting ECON1.DMAST. */
cassyarduino 0:e3fb1267e3c3 778 Enc28J60Network::writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_DMAST);
cassyarduino 0:e3fb1267e3c3 779
cassyarduino 0:e3fb1267e3c3 780 // wait until runnig DMA is completed
cassyarduino 0:e3fb1267e3c3 781 while (Enc28J60Network::readOp(ENC28J60_READ_CTRL_REG, ECON1) & ECON1_DMAST)
cassyarduino 0:e3fb1267e3c3 782 {
cassyarduino 0:e3fb1267e3c3 783 delay(1);
cassyarduino 0:e3fb1267e3c3 784 }
cassyarduino 0:e3fb1267e3c3 785 }
cassyarduino 0:e3fb1267e3c3 786 }
cassyarduino 0:e3fb1267e3c3 787
cassyarduino 0:e3fb1267e3c3 788 void
cassyarduino 0:e3fb1267e3c3 789 Enc28J60Network::freePacket(void)
cassyarduino 0:e3fb1267e3c3 790 {
cassyarduino 0:e3fb1267e3c3 791 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 792 LogObject.uart_send_strln(F("Enc28J60Network::freePacket(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 793 #endif
cassyarduino 0:e3fb1267e3c3 794 setERXRDPT();
cassyarduino 0:e3fb1267e3c3 795 }
cassyarduino 0:e3fb1267e3c3 796
cassyarduino 0:e3fb1267e3c3 797 uint8_t
cassyarduino 0:e3fb1267e3c3 798 Enc28J60Network::readOp(uint8_t op, uint8_t address)
cassyarduino 0:e3fb1267e3c3 799 {
cassyarduino 0:e3fb1267e3c3 800 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 801 LogObject.uart_send_strln(F("Enc28J60Network::readOp(uint8_t op, uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 802 #endif
cassyarduino 0:e3fb1267e3c3 803 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 804 // issue read command
cassyarduino 0:e3fb1267e3c3 805 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 806 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 807 SPI.transfer(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 808 // read data
cassyarduino 0:e3fb1267e3c3 809 if(address & 0x80)
cassyarduino 0:e3fb1267e3c3 810 {
cassyarduino 0:e3fb1267e3c3 811 // do dummy read if needed (for mac and mii, see datasheet page 29)
cassyarduino 0:e3fb1267e3c3 812 SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 813 }
cassyarduino 0:e3fb1267e3c3 814 uint8_t c = SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 815 #endif
cassyarduino 0:e3fb1267e3c3 816 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 817 _spi.write(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 818 // read data
cassyarduino 0:e3fb1267e3c3 819 if(address & 0x80)
cassyarduino 0:e3fb1267e3c3 820 {
cassyarduino 0:e3fb1267e3c3 821 // do dummy read if needed (for mac and mii, see datasheet page 29)
cassyarduino 0:e3fb1267e3c3 822 _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 823 }
cassyarduino 0:e3fb1267e3c3 824 uint8_t c = _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 825 #endif
cassyarduino 0:e3fb1267e3c3 826 // release CS
cassyarduino 0:e3fb1267e3c3 827 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 828 return(c);
cassyarduino 0:e3fb1267e3c3 829 #else
cassyarduino 0:e3fb1267e3c3 830 // issue read command
cassyarduino 0:e3fb1267e3c3 831 SPDR = op | (address & ADDR_MASK);
cassyarduino 0:e3fb1267e3c3 832 waitspi();
cassyarduino 0:e3fb1267e3c3 833 // read data
cassyarduino 0:e3fb1267e3c3 834 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 835 waitspi();
cassyarduino 0:e3fb1267e3c3 836 // do dummy read if needed (for mac and mii, see datasheet page 29)
cassyarduino 0:e3fb1267e3c3 837 if(address & 0x80)
cassyarduino 0:e3fb1267e3c3 838 {
cassyarduino 0:e3fb1267e3c3 839 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 840 waitspi();
cassyarduino 0:e3fb1267e3c3 841 }
cassyarduino 0:e3fb1267e3c3 842 // release CS
cassyarduino 0:e3fb1267e3c3 843 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 844 return(SPDR);
cassyarduino 0:e3fb1267e3c3 845 #endif
cassyarduino 33:7ba5d53df0f2 846 #if defined(ESP8266)
cassyarduino 33:7ba5d53df0f2 847 yield();
cassyarduino 33:7ba5d53df0f2 848 #endif
cassyarduino 0:e3fb1267e3c3 849 }
cassyarduino 0:e3fb1267e3c3 850
cassyarduino 0:e3fb1267e3c3 851 void
cassyarduino 0:e3fb1267e3c3 852 Enc28J60Network::writeOp(uint8_t op, uint8_t address, uint8_t data)
cassyarduino 0:e3fb1267e3c3 853 {
cassyarduino 0:e3fb1267e3c3 854 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 855 LogObject.uart_send_strln(F("Enc28J60Network::writeOp(uint8_t op, uint8_t address, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 856 #endif
cassyarduino 0:e3fb1267e3c3 857 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 858 // issue write command
cassyarduino 0:e3fb1267e3c3 859 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 860 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 861 SPI.transfer(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 862 // write data
cassyarduino 0:e3fb1267e3c3 863 SPI.transfer(data);
cassyarduino 0:e3fb1267e3c3 864 #endif
cassyarduino 0:e3fb1267e3c3 865 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 866 _spi.write(op | (address & ADDR_MASK));
cassyarduino 0:e3fb1267e3c3 867 // write data
cassyarduino 0:e3fb1267e3c3 868 _spi.write(data);
cassyarduino 0:e3fb1267e3c3 869 #endif
cassyarduino 0:e3fb1267e3c3 870 #else
cassyarduino 0:e3fb1267e3c3 871 // issue write command
cassyarduino 0:e3fb1267e3c3 872 SPDR = op | (address & ADDR_MASK);
cassyarduino 0:e3fb1267e3c3 873 waitspi();
cassyarduino 0:e3fb1267e3c3 874 // write data
cassyarduino 0:e3fb1267e3c3 875 SPDR = data;
cassyarduino 0:e3fb1267e3c3 876 waitspi();
cassyarduino 0:e3fb1267e3c3 877 #endif
cassyarduino 0:e3fb1267e3c3 878 CSPASSIVE;
cassyarduino 33:7ba5d53df0f2 879 #if defined(ESP8266)
cassyarduino 33:7ba5d53df0f2 880 yield();
cassyarduino 33:7ba5d53df0f2 881 #endif
cassyarduino 0:e3fb1267e3c3 882 }
cassyarduino 0:e3fb1267e3c3 883
cassyarduino 0:e3fb1267e3c3 884 void
cassyarduino 0:e3fb1267e3c3 885 Enc28J60Network::readBuffer(uint16_t len, uint8_t* data)
cassyarduino 0:e3fb1267e3c3 886 {
cassyarduino 0:e3fb1267e3c3 887 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 888 LogObject.uart_send_strln(F("Enc28J60Network::readBuffer(uint16_t len, uint8_t* data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 889 #endif
cassyarduino 0:e3fb1267e3c3 890 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 891 // issue read command
cassyarduino 0:e3fb1267e3c3 892 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 893 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 894 SPI.transfer(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 895 #endif
cassyarduino 0:e3fb1267e3c3 896 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 897 _spi.write(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 898 #endif
cassyarduino 0:e3fb1267e3c3 899 #else
cassyarduino 0:e3fb1267e3c3 900 SPDR = ENC28J60_READ_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 901 waitspi();
cassyarduino 0:e3fb1267e3c3 902 #endif
cassyarduino 0:e3fb1267e3c3 903 while(len)
cassyarduino 0:e3fb1267e3c3 904 {
cassyarduino 0:e3fb1267e3c3 905 len--;
cassyarduino 0:e3fb1267e3c3 906 // read data
cassyarduino 0:e3fb1267e3c3 907 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 908 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 909 *data = SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 910 #endif
cassyarduino 0:e3fb1267e3c3 911 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 912 *data = _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 913 #endif
cassyarduino 0:e3fb1267e3c3 914 #else
cassyarduino 0:e3fb1267e3c3 915 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 916 waitspi();
cassyarduino 0:e3fb1267e3c3 917 *data = SPDR;
cassyarduino 0:e3fb1267e3c3 918 #endif
cassyarduino 0:e3fb1267e3c3 919 data++;
cassyarduino 0:e3fb1267e3c3 920 }
cassyarduino 0:e3fb1267e3c3 921 //*data='\0';
cassyarduino 0:e3fb1267e3c3 922 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 923 }
cassyarduino 0:e3fb1267e3c3 924
cassyarduino 0:e3fb1267e3c3 925 void
cassyarduino 0:e3fb1267e3c3 926 Enc28J60Network::writeBuffer(uint16_t len, uint8_t* data)
cassyarduino 0:e3fb1267e3c3 927 {
cassyarduino 0:e3fb1267e3c3 928 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 929 LogObject.uart_send_strln(F("Enc28J60Network::writeBuffer(uint16_t len, uint8_t* data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 930 #endif
cassyarduino 0:e3fb1267e3c3 931 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 932 // issue write command
cassyarduino 0:e3fb1267e3c3 933 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 934 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 935 SPI.transfer(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 936 #endif
cassyarduino 0:e3fb1267e3c3 937 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 938 _spi.write(ENC28J60_WRITE_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 939 #endif
cassyarduino 0:e3fb1267e3c3 940 #else
cassyarduino 0:e3fb1267e3c3 941 SPDR = ENC28J60_WRITE_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 942 waitspi();
cassyarduino 0:e3fb1267e3c3 943 #endif
cassyarduino 0:e3fb1267e3c3 944 while(len)
cassyarduino 0:e3fb1267e3c3 945 {
cassyarduino 0:e3fb1267e3c3 946 len--;
cassyarduino 0:e3fb1267e3c3 947 // write data
cassyarduino 0:e3fb1267e3c3 948 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 949 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 950 SPI.transfer(*data);
cassyarduino 0:e3fb1267e3c3 951 #endif
cassyarduino 0:e3fb1267e3c3 952 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 953 _spi.write(*data);
cassyarduino 0:e3fb1267e3c3 954 #endif
cassyarduino 0:e3fb1267e3c3 955 data++;
cassyarduino 0:e3fb1267e3c3 956 #else
cassyarduino 0:e3fb1267e3c3 957 SPDR = *data;
cassyarduino 0:e3fb1267e3c3 958 data++;
cassyarduino 0:e3fb1267e3c3 959 waitspi();
cassyarduino 0:e3fb1267e3c3 960 #endif
cassyarduino 0:e3fb1267e3c3 961 }
cassyarduino 0:e3fb1267e3c3 962 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 963 }
cassyarduino 0:e3fb1267e3c3 964
cassyarduino 0:e3fb1267e3c3 965 void
cassyarduino 0:e3fb1267e3c3 966 Enc28J60Network::setBank(uint8_t address)
cassyarduino 0:e3fb1267e3c3 967 {
cassyarduino 0:e3fb1267e3c3 968 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 969 LogObject.uart_send_strln(F("Enc28J60Network::setBank(uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 970 #endif
cassyarduino 0:e3fb1267e3c3 971 // set the bank (if needed)
cassyarduino 0:e3fb1267e3c3 972 if((address & BANK_MASK) != bank)
cassyarduino 0:e3fb1267e3c3 973 {
cassyarduino 0:e3fb1267e3c3 974 // set the bank
cassyarduino 0:e3fb1267e3c3 975 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, (ECON1_BSEL1|ECON1_BSEL0));
cassyarduino 0:e3fb1267e3c3 976 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, (address & BANK_MASK)>>5);
cassyarduino 0:e3fb1267e3c3 977 bank = (address & BANK_MASK);
cassyarduino 0:e3fb1267e3c3 978 }
cassyarduino 0:e3fb1267e3c3 979 }
cassyarduino 0:e3fb1267e3c3 980
cassyarduino 0:e3fb1267e3c3 981 uint8_t
cassyarduino 0:e3fb1267e3c3 982 Enc28J60Network::readReg(uint8_t address)
cassyarduino 0:e3fb1267e3c3 983 {
cassyarduino 0:e3fb1267e3c3 984 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 985 LogObject.uart_send_strln(F("Enc28J60Network::readReg(uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 986 #endif
cassyarduino 0:e3fb1267e3c3 987 // set the bank
cassyarduino 0:e3fb1267e3c3 988 setBank(address);
cassyarduino 0:e3fb1267e3c3 989 // do the read
cassyarduino 0:e3fb1267e3c3 990 return readOp(ENC28J60_READ_CTRL_REG, address);
cassyarduino 0:e3fb1267e3c3 991 }
cassyarduino 0:e3fb1267e3c3 992
cassyarduino 0:e3fb1267e3c3 993 void
cassyarduino 0:e3fb1267e3c3 994 Enc28J60Network::writeReg(uint8_t address, uint8_t data)
cassyarduino 0:e3fb1267e3c3 995 {
cassyarduino 0:e3fb1267e3c3 996 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 997 LogObject.uart_send_strln(F("Enc28J60Network::writeReg(uint8_t address, uint8_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 998 #endif
cassyarduino 0:e3fb1267e3c3 999 // set the bank
cassyarduino 0:e3fb1267e3c3 1000 setBank(address);
cassyarduino 0:e3fb1267e3c3 1001 // do the write
cassyarduino 0:e3fb1267e3c3 1002 writeOp(ENC28J60_WRITE_CTRL_REG, address, data);
cassyarduino 0:e3fb1267e3c3 1003 }
cassyarduino 0:e3fb1267e3c3 1004
cassyarduino 0:e3fb1267e3c3 1005 void
cassyarduino 0:e3fb1267e3c3 1006 Enc28J60Network::writeRegPair(uint8_t address, uint16_t data)
cassyarduino 0:e3fb1267e3c3 1007 {
cassyarduino 0:e3fb1267e3c3 1008 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1009 LogObject.uart_send_strln(F("Enc28J60Network::writeRegPair(uint8_t address, uint16_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1010 #endif
cassyarduino 0:e3fb1267e3c3 1011 // set the bank
cassyarduino 0:e3fb1267e3c3 1012 setBank(address);
cassyarduino 0:e3fb1267e3c3 1013 // do the write
cassyarduino 0:e3fb1267e3c3 1014 writeOp(ENC28J60_WRITE_CTRL_REG, address, (data&0xFF));
cassyarduino 0:e3fb1267e3c3 1015 writeOp(ENC28J60_WRITE_CTRL_REG, address+1, (data) >> 8);
cassyarduino 0:e3fb1267e3c3 1016 }
cassyarduino 0:e3fb1267e3c3 1017
cassyarduino 0:e3fb1267e3c3 1018 void
cassyarduino 0:e3fb1267e3c3 1019 Enc28J60Network::phyWrite(uint8_t address, uint16_t data)
cassyarduino 0:e3fb1267e3c3 1020 {
cassyarduino 0:e3fb1267e3c3 1021 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1022 LogObject.uart_send_strln(F("Enc28J60Network::phyWrite(uint8_t address, uint16_t data) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1023 #endif
cassyarduino 0:e3fb1267e3c3 1024 unsigned int timeout = 15;
cassyarduino 0:e3fb1267e3c3 1025 // set the PHY register address
cassyarduino 0:e3fb1267e3c3 1026 writeReg(MIREGADR, address);
cassyarduino 0:e3fb1267e3c3 1027 // write the PHY data
cassyarduino 0:e3fb1267e3c3 1028 writeRegPair(MIWRL, data);
cassyarduino 0:e3fb1267e3c3 1029 // wait until the PHY write completes
cassyarduino 0:e3fb1267e3c3 1030 while (readReg(MISTAT) & MISTAT_BUSY)
cassyarduino 0:e3fb1267e3c3 1031 {
cassyarduino 0:e3fb1267e3c3 1032 delay(10);
cassyarduino 0:e3fb1267e3c3 1033 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 1034 wdt_reset();
cassyarduino 0:e3fb1267e3c3 1035 #endif
cassyarduino 0:e3fb1267e3c3 1036 if (--timeout == 0)
cassyarduino 0:e3fb1267e3c3 1037 {
cassyarduino 0:e3fb1267e3c3 1038 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 1039 LogObject.uart_send_strln(F("Enc28J60Network::phyWrite ERROR:TIMEOUT !!!"));
cassyarduino 0:e3fb1267e3c3 1040 #endif
cassyarduino 0:e3fb1267e3c3 1041 return;
cassyarduino 0:e3fb1267e3c3 1042 }
cassyarduino 0:e3fb1267e3c3 1043 }
cassyarduino 0:e3fb1267e3c3 1044 }
cassyarduino 0:e3fb1267e3c3 1045
cassyarduino 0:e3fb1267e3c3 1046 uint16_t
cassyarduino 0:e3fb1267e3c3 1047 Enc28J60Network::phyRead(uint8_t address)
cassyarduino 0:e3fb1267e3c3 1048 {
cassyarduino 0:e3fb1267e3c3 1049 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1050 LogObject.uart_send_strln(F("Enc28J60Network::phyRead(uint8_t address) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1051 #endif
cassyarduino 0:e3fb1267e3c3 1052 unsigned int timeout = 15;
cassyarduino 0:e3fb1267e3c3 1053 writeReg(MIREGADR,address);
cassyarduino 0:e3fb1267e3c3 1054 writeReg(MICMD, MICMD_MIIRD);
cassyarduino 0:e3fb1267e3c3 1055 // wait until the PHY read completes
cassyarduino 0:e3fb1267e3c3 1056 while(readReg(MISTAT) & MISTAT_BUSY)
cassyarduino 0:e3fb1267e3c3 1057 {
cassyarduino 0:e3fb1267e3c3 1058 delay(10);
cassyarduino 0:e3fb1267e3c3 1059 #if defined(ESP8266)
cassyarduino 0:e3fb1267e3c3 1060 wdt_reset();
cassyarduino 0:e3fb1267e3c3 1061 #endif
cassyarduino 0:e3fb1267e3c3 1062 if (--timeout == 0)
cassyarduino 0:e3fb1267e3c3 1063 {
cassyarduino 0:e3fb1267e3c3 1064 #if ACTLOGLEVEL>=LOG_ERR
cassyarduino 0:e3fb1267e3c3 1065 LogObject.uart_send_strln(F("Enc28J60Network::phyRead ERROR:TIMEOUT !!!"));
cassyarduino 0:e3fb1267e3c3 1066 #endif
cassyarduino 0:e3fb1267e3c3 1067 return 0;
cassyarduino 0:e3fb1267e3c3 1068 }
cassyarduino 0:e3fb1267e3c3 1069 }
cassyarduino 0:e3fb1267e3c3 1070 writeReg(MICMD, 0);
cassyarduino 0:e3fb1267e3c3 1071 return (readReg(MIRDL) | readReg(MIRDH) << 8);
cassyarduino 0:e3fb1267e3c3 1072 }
cassyarduino 0:e3fb1267e3c3 1073
cassyarduino 0:e3fb1267e3c3 1074 void
cassyarduino 0:e3fb1267e3c3 1075 Enc28J60Network::clkout(uint8_t clk)
cassyarduino 0:e3fb1267e3c3 1076 {
cassyarduino 0:e3fb1267e3c3 1077 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1078 LogObject.uart_send_strln(F("Enc28J60Network::clkout(uint8_t clk) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1079 #endif
cassyarduino 0:e3fb1267e3c3 1080 //setup clkout: 2 is 12.5MHz:
cassyarduino 0:e3fb1267e3c3 1081 writeReg(ECOCON, clk & 0x7);
cassyarduino 0:e3fb1267e3c3 1082 }
cassyarduino 0:e3fb1267e3c3 1083
cassyarduino 0:e3fb1267e3c3 1084 uint16_t
cassyarduino 0:e3fb1267e3c3 1085 Enc28J60Network::chksum(uint16_t sum, memhandle handle, memaddress pos, uint16_t len)
cassyarduino 0:e3fb1267e3c3 1086 {
cassyarduino 0:e3fb1267e3c3 1087 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1088 LogObject.uart_send_strln(F("Enc28J60Network::chksum(uint16_t sum, memhandle handle, memaddress pos, uint16_t len) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1089 #endif
cassyarduino 0:e3fb1267e3c3 1090 uint16_t t;
cassyarduino 0:e3fb1267e3c3 1091 len = setReadPtr(handle, pos, len)-1;
cassyarduino 0:e3fb1267e3c3 1092 CSACTIVE;
cassyarduino 0:e3fb1267e3c3 1093 // issue read command
cassyarduino 0:e3fb1267e3c3 1094 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 1095 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 1096 SPI.transfer(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 1097 #endif
cassyarduino 0:e3fb1267e3c3 1098 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 1099 _spi.write(ENC28J60_READ_BUF_MEM);
cassyarduino 0:e3fb1267e3c3 1100 #endif
cassyarduino 0:e3fb1267e3c3 1101 #else
cassyarduino 0:e3fb1267e3c3 1102 SPDR = ENC28J60_READ_BUF_MEM;
cassyarduino 0:e3fb1267e3c3 1103 waitspi();
cassyarduino 0:e3fb1267e3c3 1104 #endif
cassyarduino 0:e3fb1267e3c3 1105 uint16_t i;
cassyarduino 0:e3fb1267e3c3 1106 for (i = 0; i < len; i+=2)
cassyarduino 0:e3fb1267e3c3 1107 {
cassyarduino 0:e3fb1267e3c3 1108 // read data
cassyarduino 0:e3fb1267e3c3 1109 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 1110 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 1111 t = SPI.transfer(0x00) << 8;
cassyarduino 0:e3fb1267e3c3 1112 t += SPI.transfer(0x00);
cassyarduino 0:e3fb1267e3c3 1113 #endif
cassyarduino 0:e3fb1267e3c3 1114 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 1115 t = _spi.write(0x00) << 8;
cassyarduino 0:e3fb1267e3c3 1116 t += _spi.write(0x00);
cassyarduino 0:e3fb1267e3c3 1117 #endif
cassyarduino 0:e3fb1267e3c3 1118 #else
cassyarduino 0:e3fb1267e3c3 1119 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 1120 waitspi();
cassyarduino 0:e3fb1267e3c3 1121 t = SPDR << 8;
cassyarduino 0:e3fb1267e3c3 1122 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 1123 waitspi();
cassyarduino 0:e3fb1267e3c3 1124 t += SPDR;
cassyarduino 0:e3fb1267e3c3 1125 #endif
cassyarduino 0:e3fb1267e3c3 1126 sum += t;
cassyarduino 0:e3fb1267e3c3 1127 if(sum < t)
cassyarduino 0:e3fb1267e3c3 1128 {
cassyarduino 0:e3fb1267e3c3 1129 sum++; /* carry */
cassyarduino 0:e3fb1267e3c3 1130 }
cassyarduino 0:e3fb1267e3c3 1131 }
cassyarduino 0:e3fb1267e3c3 1132 if(i == len)
cassyarduino 0:e3fb1267e3c3 1133 {
cassyarduino 0:e3fb1267e3c3 1134 #if ENC28J60_USE_SPILIB
cassyarduino 0:e3fb1267e3c3 1135 #if defined(ARDUINO)
cassyarduino 0:e3fb1267e3c3 1136 t = (SPI.transfer(0x00) << 8) + 0;
cassyarduino 0:e3fb1267e3c3 1137 #endif
cassyarduino 0:e3fb1267e3c3 1138 #if defined(__MBED__)
cassyarduino 0:e3fb1267e3c3 1139 t = (_spi.write(0x00) << 8) + 0;
cassyarduino 0:e3fb1267e3c3 1140 #endif
cassyarduino 0:e3fb1267e3c3 1141 #else
cassyarduino 0:e3fb1267e3c3 1142 SPDR = 0x00;
cassyarduino 0:e3fb1267e3c3 1143 waitspi();
cassyarduino 0:e3fb1267e3c3 1144 t = (SPDR << 8) + 0;
cassyarduino 0:e3fb1267e3c3 1145 #endif
cassyarduino 0:e3fb1267e3c3 1146 sum += t;
cassyarduino 0:e3fb1267e3c3 1147 if(sum < t)
cassyarduino 0:e3fb1267e3c3 1148 {
cassyarduino 0:e3fb1267e3c3 1149 sum++; /* carry */
cassyarduino 0:e3fb1267e3c3 1150 }
cassyarduino 0:e3fb1267e3c3 1151 }
cassyarduino 0:e3fb1267e3c3 1152 CSPASSIVE;
cassyarduino 0:e3fb1267e3c3 1153
cassyarduino 0:e3fb1267e3c3 1154 /* Return sum in host byte order. */
cassyarduino 0:e3fb1267e3c3 1155 return sum;
cassyarduino 0:e3fb1267e3c3 1156 }
cassyarduino 0:e3fb1267e3c3 1157
cassyarduino 0:e3fb1267e3c3 1158 void
cassyarduino 0:e3fb1267e3c3 1159 Enc28J60Network::powerOff(void)
cassyarduino 0:e3fb1267e3c3 1160 {
cassyarduino 0:e3fb1267e3c3 1161 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1162 LogObject.uart_send_strln(F("Enc28J60Network::powerOff(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1163 #endif
cassyarduino 0:e3fb1267e3c3 1164 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_RXEN);
cassyarduino 0:e3fb1267e3c3 1165 delay(50);
cassyarduino 0:e3fb1267e3c3 1166 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_VRPS);
cassyarduino 0:e3fb1267e3c3 1167 delay(50);
cassyarduino 0:e3fb1267e3c3 1168 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PWRSV);
cassyarduino 0:e3fb1267e3c3 1169 }
cassyarduino 0:e3fb1267e3c3 1170
cassyarduino 0:e3fb1267e3c3 1171 void
cassyarduino 0:e3fb1267e3c3 1172 Enc28J60Network::powerOn(void)
cassyarduino 0:e3fb1267e3c3 1173 {
cassyarduino 0:e3fb1267e3c3 1174 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1175 LogObject.uart_send_strln(F("Enc28J60Network::powerOn(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1176 #endif
cassyarduino 0:e3fb1267e3c3 1177 writeOp(ENC28J60_BIT_FIELD_CLR, ECON2, ECON2_PWRSV);
cassyarduino 0:e3fb1267e3c3 1178 delay(50);
cassyarduino 0:e3fb1267e3c3 1179 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
cassyarduino 0:e3fb1267e3c3 1180 delay(50);
cassyarduino 0:e3fb1267e3c3 1181 }
cassyarduino 0:e3fb1267e3c3 1182
cassyarduino 0:e3fb1267e3c3 1183 // read erevid from object:
cassyarduino 0:e3fb1267e3c3 1184 uint8_t
cassyarduino 0:e3fb1267e3c3 1185 Enc28J60Network::geterevid(void)
cassyarduino 0:e3fb1267e3c3 1186 {
cassyarduino 0:e3fb1267e3c3 1187 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1188 LogObject.uart_send_str(F("Enc28J60Network::geterevid(void) DEBUG_V3:Function started and return:"));
cassyarduino 0:e3fb1267e3c3 1189 LogObject.uart_send_decln(erevid);
cassyarduino 0:e3fb1267e3c3 1190 #endif
cassyarduino 0:e3fb1267e3c3 1191 return(erevid);
cassyarduino 0:e3fb1267e3c3 1192 }
cassyarduino 0:e3fb1267e3c3 1193
cassyarduino 0:e3fb1267e3c3 1194 // read the phstat2 of the chip:
cassyarduino 0:e3fb1267e3c3 1195 uint16_t
cassyarduino 0:e3fb1267e3c3 1196 Enc28J60Network::PhyStatus(void)
cassyarduino 0:e3fb1267e3c3 1197 {
cassyarduino 0:e3fb1267e3c3 1198 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1199 LogObject.uart_send_str(F("Enc28J60Network::PhyStatus(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1200 LogObject.uart_send_decln(erevid);
cassyarduino 0:e3fb1267e3c3 1201 #endif
cassyarduino 0:e3fb1267e3c3 1202 uint16_t phstat2;
cassyarduino 0:e3fb1267e3c3 1203 phstat2=phyRead(PHSTAT2);
cassyarduino 0:e3fb1267e3c3 1204 if ((phstat2 & 0x20) > 0) {phstat2=phstat2 &0x100;}
cassyarduino 0:e3fb1267e3c3 1205 phstat2=(phstat2 & 0xFF00) | erevid;
cassyarduino 0:e3fb1267e3c3 1206 if ((phstat2 & 0x8000) > 0) {phstat2=0;}
cassyarduino 0:e3fb1267e3c3 1207 return phstat2;
cassyarduino 0:e3fb1267e3c3 1208 }
cassyarduino 0:e3fb1267e3c3 1209
cassyarduino 0:e3fb1267e3c3 1210 bool
cassyarduino 0:e3fb1267e3c3 1211 Enc28J60Network::linkStatus(void)
cassyarduino 0:e3fb1267e3c3 1212 {
cassyarduino 0:e3fb1267e3c3 1213 #if ACTLOGLEVEL>=LOG_DEBUG_V3
cassyarduino 0:e3fb1267e3c3 1214 LogObject.uart_send_strln(F("Enc28J60Network::linkStatus(void) DEBUG_V3:Function started"));
cassyarduino 0:e3fb1267e3c3 1215 #endif
cassyarduino 0:e3fb1267e3c3 1216 return (phyRead(PHSTAT2) & 0x0400) > 0;
cassyarduino 0:e3fb1267e3c3 1217 }
cassyarduino 0:e3fb1267e3c3 1218
cassyarduino 0:e3fb1267e3c3 1219 Enc28J60Network Enc28J60;