stm32f767 stm32l010 oled hal

Dependents:   HAL_oled_16x24_767_1 HAL_oled_16x24_010_2 HAL_oled_16x24_031_1

Committer:
caa45040
Date:
Thu Aug 11 00:15:50 2022 +0000
Revision:
2:9b41b26677a2
Parent:
0:896a43c93cd9
stm32l010 stm32f767 stm32g031 oled wait_ms not

Who changed what in which revision?

UserRevisionLine numberNew contents of line
caa45040 0:896a43c93cd9 1 /** @file SSD1308 I2C device class header file
caa45040 0:896a43c93cd9 2 * Based on Solomon Systech SSD1308 datasheet, rev. 1, 10/2008
caa45040 0:896a43c93cd9 3 * The SSD1308 is used for example in the Seeed 128x64 OLED Display
caa45040 0:896a43c93cd9 4 * http://www.seeedstudio.com/depot/grove-oled-display-12864-p-781.html?cPath=163_167
caa45040 0:896a43c93cd9 5 */
caa45040 0:896a43c93cd9 6 // The original code by Andrew Schamp is using (and has been submitted as a part of) Jeff Rowberg's I2Cdevlib library,
caa45040 0:896a43c93cd9 7 // which should (hopefully) always be available at https://github.com/jrowberg/i2cdevlib
caa45040 0:896a43c93cd9 8 // Some parts also mashed up from Graphic Library for driving monochrome displays based on the PCD8544,
caa45040 0:896a43c93cd9 9 // Copyright (c) 2011, Wim De Roeve, who in turn did partial port of code found on
caa45040 0:896a43c93cd9 10 // http://serdisplib.sourceforge.net/ser/pcd8544.html#links and by Petras Saduikis <petras@petras.co.uk>
caa45040 0:896a43c93cd9 11 //
caa45040 0:896a43c93cd9 12 // Changelog:
caa45040 0:896a43c93cd9 13 // 2011-08-25 - Initial release by Andrew Schamp <schamp@gmail.com>
caa45040 0:896a43c93cd9 14 // 2012-06-19 - Ported to mbed and optimised (WH)
caa45040 0:896a43c93cd9 15 // 2013-07-12 - Minor comment fix and placeholder for SSD1306 (WH)
caa45040 0:896a43c93cd9 16 // 2015-01-01 - Switch for optimised I2C calls to test on F401 (WH)
caa45040 0:896a43c93cd9 17 // 2017-12-18 - Fixed non-copyable issue (Thx kenjiArai)
caa45040 0:896a43c93cd9 18 //
caa45040 0:896a43c93cd9 19 /*
caa45040 0:896a43c93cd9 20 ================================================================================
caa45040 0:896a43c93cd9 21 I2Cdev device library code is placed under the MIT license
caa45040 0:896a43c93cd9 22 Copyright (c) 2011 Andrew Schamp
caa45040 0:896a43c93cd9 23 Copyright (c) 2012,2013,2017 WH (mbed port)
caa45040 0:896a43c93cd9 24
caa45040 0:896a43c93cd9 25 Permission is hereby granted, free of charge, to any person obtaining a copy
caa45040 0:896a43c93cd9 26 of this software and associated documentation files (the "Software"), to deal
caa45040 0:896a43c93cd9 27 in the Software without restriction, including without limitation the rights
caa45040 0:896a43c93cd9 28 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
caa45040 0:896a43c93cd9 29 copies of the Software, and to permit persons to whom the Software is
caa45040 0:896a43c93cd9 30 furnished to do so, subject to the following conditions:
caa45040 0:896a43c93cd9 31
caa45040 0:896a43c93cd9 32 The above copyright notice and this permission notice shall be included in
caa45040 0:896a43c93cd9 33 all copies or substantial portions of the Software.
caa45040 0:896a43c93cd9 34
caa45040 0:896a43c93cd9 35 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
caa45040 0:896a43c93cd9 36 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
caa45040 0:896a43c93cd9 37 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
caa45040 0:896a43c93cd9 38 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
caa45040 0:896a43c93cd9 39 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
caa45040 0:896a43c93cd9 40 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
caa45040 0:896a43c93cd9 41 THE SOFTWARE.
caa45040 0:896a43c93cd9 42 ================================================================================
caa45040 0:896a43c93cd9 43 */
caa45040 0:896a43c93cd9 44
caa45040 0:896a43c93cd9 45 #ifndef SSD1308_H
caa45040 0:896a43c93cd9 46 #define SSD1308_H
caa45040 0:896a43c93cd9 47
caa45040 0:896a43c93cd9 48 // This is the I2C address (8 bit)
caa45040 0:896a43c93cd9 49 // There are two possible addresses: with D/C# (pin 13) grounded, the address is 0x78,
caa45040 0:896a43c93cd9 50 // with D/C# tied high it is 0x7A. Assume grounded by default.
caa45040 0:896a43c93cd9 51 #define SSD1308_SA0 0x78
caa45040 0:896a43c93cd9 52 #define SSD1308_SA1 0x7A
caa45040 0:896a43c93cd9 53 #define SSD1308_DEF_SA SSD1308_SA0
caa45040 0:896a43c93cd9 54
caa45040 0:896a43c93cd9 55 // Display dimensions
caa45040 0:896a43c93cd9 56 #define ROWS 64
caa45040 0:896a43c93cd9 57 #define COLUMNS 128
caa45040 0:896a43c93cd9 58 #define PAGES (ROWS / 8)
caa45040 0:896a43c93cd9 59 #define MAX_PAGE (PAGES - 1)
caa45040 0:896a43c93cd9 60 #define MAX_ROW (ROWS - 1)
caa45040 0:896a43c93cd9 61 #define MAX_COL (COLUMNS - 1)
caa45040 0:896a43c93cd9 62
caa45040 0:896a43c93cd9 63 // Character dimensions 8x8 font
caa45040 0:896a43c93cd9 64 #define CHARS (COLUMNS / FONT8x8_WIDTH)
caa45040 0:896a43c93cd9 65
caa45040 0:896a43c93cd9 66 // Command and Datamode
caa45040 0:896a43c93cd9 67 #define COMMAND_MODE 0x80 // continuation bit is set!
caa45040 0:896a43c93cd9 68 #define DATA_MODE 0x40
caa45040 0:896a43c93cd9 69
caa45040 0:896a43c93cd9 70 // Commands and Parameter defines
caa45040 0:896a43c93cd9 71 #define SET_LOWER_COLUMN 0x00 // | with lower nibble (Page mode only)
caa45040 0:896a43c93cd9 72 #define SET_HIGHER_COLUMN 0x10 // | with higher nibble (Page mode only)
caa45040 0:896a43c93cd9 73
caa45040 0:896a43c93cd9 74 #define HORIZONTAL_ADDRESSING_MODE 0x00
caa45040 0:896a43c93cd9 75 #define VERTICAL_ADDRESSING_MODE 0x01
caa45040 0:896a43c93cd9 76 #define PAGE_ADDRESSING_MODE 0x02
caa45040 0:896a43c93cd9 77 #define SET_MEMORY_ADDRESSING_MODE 0x20 // takes one byte as given above
caa45040 0:896a43c93cd9 78
caa45040 0:896a43c93cd9 79 #define SET_COLUMN_ADDRESS 0x21 // takes two bytes, start address and end address of display data RAM
caa45040 0:896a43c93cd9 80 #define SET_PAGE_ADDRESS 0x22 // takes two bytes, start address and end address of display data RAM
caa45040 0:896a43c93cd9 81
caa45040 0:896a43c93cd9 82 // Command maybe unsupported by SSD1308
caa45040 0:896a43c93cd9 83 #define FADE_INTERVAL_8_FRAMES 0x00
caa45040 0:896a43c93cd9 84 #define FADE_INTERVAL_16_FRAMES 0x01
caa45040 0:896a43c93cd9 85 #define FADE_INTERVAL_24_FRAMES 0x02
caa45040 0:896a43c93cd9 86 #define FADE_INTERVAL_32_FRAMES 0x03
caa45040 0:896a43c93cd9 87 #define FADE_INTERVAL_64_FRAMES 0x07
caa45040 0:896a43c93cd9 88 #define FADE_INTERVAL_128_FRAMES 0x0F
caa45040 0:896a43c93cd9 89 #define FADE_BLINK_DISABLE 0x00
caa45040 0:896a43c93cd9 90 #define FADE_OUT_ENABLE 0x20
caa45040 0:896a43c93cd9 91 #define BLINK_ENABLE 0x30
caa45040 0:896a43c93cd9 92 #define SET_FADE_BLINK 0x23 // takes one byte
caa45040 0:896a43c93cd9 93 // bit5-4 = 0, fade/blink mode
caa45040 0:896a43c93cd9 94 // bit3-0 = Time interval in frames
caa45040 0:896a43c93cd9 95
caa45040 0:896a43c93cd9 96 #define SET_DISPLAY_START_LINE 0x40 // | with a row number 0-63 to set start row. (Reset = 0)
caa45040 0:896a43c93cd9 97
caa45040 0:896a43c93cd9 98 #define SET_CONTRAST 0x81 // takes one byte, 0x00 - 0xFF
caa45040 0:896a43c93cd9 99
caa45040 0:896a43c93cd9 100 #define SET_SEGMENT_REMAP_0 0xA0 // column address 0 is mapped to SEG0 (Reset)
caa45040 0:896a43c93cd9 101 #define SET_SEGMENT_REMAP_127 0xA1 // column address 127 is mapped to SEG0
caa45040 0:896a43c93cd9 102
caa45040 0:896a43c93cd9 103 #define SET_DISPLAY_GDDRAM 0xA4 // restores display to contents of RAM
caa45040 0:896a43c93cd9 104 #define SET_ENTIRE_DISPLAY_ON 0xA5 // turns all pixels on, does not affect RAM
caa45040 0:896a43c93cd9 105
caa45040 0:896a43c93cd9 106 #define SET_NORMAL_DISPLAY 0xA6 // a databit of 1 indicates pixel 'ON'
caa45040 0:896a43c93cd9 107 #define SET_INVERSE_DISPLAY 0xA7 // a databit of 1 indicates pixel 'OFF'
caa45040 0:896a43c93cd9 108
caa45040 0:896a43c93cd9 109 #define SET_MULTIPLEX_RATIO 0xA8 // takes one byte, from 16xMUX to 64xMUX (MUX Ratio = byte+1; Default 64)
caa45040 0:896a43c93cd9 110
caa45040 0:896a43c93cd9 111 #define EXTERNAL_IREF 0x10
caa45040 0:896a43c93cd9 112 #define INTERNAL_IREF 0x00
caa45040 0:896a43c93cd9 113 #define SET_IREF_SELECTION 0xAD // sets internal or external Iref
caa45040 0:896a43c93cd9 114
caa45040 0:896a43c93cd9 115 #define SET_DISPLAY_POWER_OFF 0xAE
caa45040 0:896a43c93cd9 116 #define SET_DISPLAY_POWER_ON 0xAF
caa45040 0:896a43c93cd9 117
caa45040 0:896a43c93cd9 118 #define PAGE0 0x00
caa45040 0:896a43c93cd9 119 #define PAGE1 0x01
caa45040 0:896a43c93cd9 120 #define PAGE2 0x02
caa45040 0:896a43c93cd9 121 #define PAGE3 0x03
caa45040 0:896a43c93cd9 122 #define PAGE4 0x04
caa45040 0:896a43c93cd9 123 #define PAGE5 0x05
caa45040 0:896a43c93cd9 124 #define PAGE6 0x06
caa45040 0:896a43c93cd9 125 #define PAGE7 0x07
caa45040 0:896a43c93cd9 126 #define SET_PAGE_START_ADDRESS 0xB0 // | with a page number to get start address (Page mode only)
caa45040 0:896a43c93cd9 127
caa45040 0:896a43c93cd9 128 #define SET_COMMON_REMAP_0 0xC0 // row address 0 is mapped to COM0 (Reset)
caa45040 0:896a43c93cd9 129 #define SET_COMMON_REMAP_63 0xC8 // row address 63 is mapped to COM0
caa45040 0:896a43c93cd9 130
caa45040 0:896a43c93cd9 131 #define SET_DISPLAY_OFFSET 0xD3 // takes one byte from 0-63 for vertical shift, Reset = 0
caa45040 0:896a43c93cd9 132
caa45040 0:896a43c93cd9 133 #define SET_DISPLAY_CLOCK 0xD5 // takes one byte
caa45040 0:896a43c93cd9 134 // bit7-4 = Osc Freq DCLK (Reset = 1000b)
caa45040 0:896a43c93cd9 135 // bit3-0 = Divide ration (Reset = oooob, Ratio = 1)
caa45040 0:896a43c93cd9 136
caa45040 0:896a43c93cd9 137 #define SET_PRECHARGE_TIME 0xD9 // takes one byte
caa45040 0:896a43c93cd9 138 // bit7-4 = Phase2, upto 15 DCLKs (Reset = 0010b)
caa45040 0:896a43c93cd9 139 // bit3-0 = Phase1, upto 15 DCLKs (Reset = 0010b)
caa45040 0:896a43c93cd9 140
caa45040 0:896a43c93cd9 141
caa45040 0:896a43c93cd9 142 #define COMMON_BASE 0x02 //
caa45040 0:896a43c93cd9 143 #define COMMON_SEQUENTIAL 0x00 // Sequential common pins config
caa45040 0:896a43c93cd9 144 #define COMMON_ALTERNATIVE 0x10 // Odd/Even common pins config (Reset)
caa45040 0:896a43c93cd9 145 #define COMMON_LEFTRIGHT_NORMAL 0x00 // LeftRight Normal (Reset)
caa45040 0:896a43c93cd9 146 #define COMMON_LEFTRIGHT_FLIP 0x20 // LeftRight Flip
caa45040 0:896a43c93cd9 147 #define SET_COMMON_CONF 0xDA // takes one byte as given above
caa45040 0:896a43c93cd9 148
caa45040 0:896a43c93cd9 149
caa45040 0:896a43c93cd9 150 #define VCOMH_DESELECT_0_65_CODE 0x00
caa45040 0:896a43c93cd9 151 #define VCOMH_DESELECT_0_77_CODE 0x20
caa45040 0:896a43c93cd9 152 #define VCOMH_DESELECT_0_83_CODE 0x30
caa45040 0:896a43c93cd9 153 #define SET_VCOMH_DESELECT_LEVEL 0xDB // takes one byte as given above
caa45040 0:896a43c93cd9 154
caa45040 0:896a43c93cd9 155 #define NOP 0xE3
caa45040 0:896a43c93cd9 156
caa45040 0:896a43c93cd9 157 #define SCROLL_INTERVAL_5_FRAMES 0x00
caa45040 0:896a43c93cd9 158 #define SCROLL_INTERVAL_64_FRAMES 0x01
caa45040 0:896a43c93cd9 159 #define SCROLL_INTERVAL_128_FRAMES 0x02
caa45040 0:896a43c93cd9 160 #define SCROLL_INTERVAL_256_FRAMES 0x03
caa45040 0:896a43c93cd9 161 #define SCROLL_INTERVAL_3_FRAMES 0x04
caa45040 0:896a43c93cd9 162 #define SCROLL_INTERVAL_4_FRAMES 0x05
caa45040 0:896a43c93cd9 163 #define SCROLL_INTERVAL_25_FRAMES 0x06
caa45040 0:896a43c93cd9 164 #define SCROLL_INTERVAL_2_FRAMES 0x07
caa45040 0:896a43c93cd9 165
caa45040 0:896a43c93cd9 166 #define SET_RIGHT_HOR_SCROLL 0x26 // takes 6 bytes: 0x00, PageStart, Scroll_Interval, PageEnd, 0x00, 0xFF
caa45040 0:896a43c93cd9 167 #define SET_LEFT_HOR_SCROLL 0x27 // takes 6 bytes: 0x00, PageStart, Scroll_Interval, PageEnd, 0x00, 0xFF
caa45040 0:896a43c93cd9 168
caa45040 0:896a43c93cd9 169 #define SET_VERT_RIGHT_HOR_SCROLL 0x29 // takes 5 bytes: 0x00, PageStart, Scroll_Interval, PageEnd, VertOffset
caa45040 0:896a43c93cd9 170 #define SET_VERT_LEFT_HOR_SCROLL 0x2A // takes 5 bytes: 0x00, PageStart, Scroll_Interval, PageEnd, VertOffset
caa45040 0:896a43c93cd9 171
caa45040 0:896a43c93cd9 172 #define SET_DEACTIVATE_SCROLL 0x2E
caa45040 0:896a43c93cd9 173 #define SET_ACTIVATE_SCROLL 0x2F
caa45040 0:896a43c93cd9 174
caa45040 0:896a43c93cd9 175 #define SET_VERTICAL_SCROLL_AREA 0xA3 // takes 2 bytes: Rows in Top Area (Reset=0), Rows in Scroll Area (Reset=64)
caa45040 0:896a43c93cd9 176
caa45040 0:896a43c93cd9 177
caa45040 0:896a43c93cd9 178
caa45040 0:896a43c93cd9 179 /** Class to control an SSD1308 based oled Display
caa45040 0:896a43c93cd9 180 *
caa45040 0:896a43c93cd9 181 * Example:
caa45040 0:896a43c93cd9 182 * @code
caa45040 0:896a43c93cd9 183 * #include "mbed.h"
caa45040 0:896a43c93cd9 184 * #include "mbed_logo.h"
caa45040 0:896a43c93cd9 185 * #include "SSD1308.h"
caa45040 0:896a43c93cd9 186
caa45040 0:896a43c93cd9 187 * //Pin Defines for I2C Bus
caa45040 0:896a43c93cd9 188 * #define D_SDA p28
caa45040 0:896a43c93cd9 189 * #define D_SCL p27
caa45040 0:896a43c93cd9 190 * I2C i2c(D_SDA, D_SCL);
caa45040 0:896a43c93cd9 191 *
caa45040 0:896a43c93cd9 192 * // Host PC Communication channels
caa45040 0:896a43c93cd9 193 * Serial pc(USBTX, USBRX); // tx, rx
caa45040 0:896a43c93cd9 194 *
caa45040 0:896a43c93cd9 195 * // Instantiate OLED
caa45040 0:896a43c93cd9 196 * SSD1308 oled = SSD1308(&i2c, SSD1308_SA0);
caa45040 0:896a43c93cd9 197 *
caa45040 0:896a43c93cd9 198 * int main() {
caa45040 0:896a43c93cd9 199 * pc.printf("OLED test start\r");
caa45040 0:896a43c93cd9 200 * oled.writeString(0, 0, "Hello World !");
caa45040 0:896a43c93cd9 201 * // oled.printf("Hello World !");
caa45040 0:896a43c93cd9 202 *
caa45040 0:896a43c93cd9 203 * oled.fillDisplay(0xAA);
caa45040 0:896a43c93cd9 204 * oled.setDisplayOff();
caa45040 0:896a43c93cd9 205 * wait(1);
caa45040 0:896a43c93cd9 206 * oled.setDisplayOn();
caa45040 0:896a43c93cd9 207 *
caa45040 0:896a43c93cd9 208 * oled.clearDisplay();
caa45040 0:896a43c93cd9 209 * oled.setDisplayInverse();
caa45040 0:896a43c93cd9 210 * wait(0.5);
caa45040 0:896a43c93cd9 211 * oled.setDisplayNormal();
caa45040 0:896a43c93cd9 212 *
caa45040 0:896a43c93cd9 213 * oled.writeBitmap((uint8_t*) mbed_logo);
caa45040 0:896a43c93cd9 214 *
caa45040 0:896a43c93cd9 215 * pc.printf("OLED test done\r\n");
caa45040 0:896a43c93cd9 216 * }
caa45040 0:896a43c93cd9 217 *
caa45040 0:896a43c93cd9 218 * @endcode
caa45040 0:896a43c93cd9 219 */
caa45040 0:896a43c93cd9 220 //class SSD1308 : public Stream {
caa45040 0:896a43c93cd9 221 struct SSD1308 {
caa45040 0:896a43c93cd9 222
caa45040 0:896a43c93cd9 223
caa45040 0:896a43c93cd9 224 // public:
caa45040 0:896a43c93cd9 225
caa45040 0:896a43c93cd9 226 /**
caa45040 0:896a43c93cd9 227 *@brief Constructor
caa45040 0:896a43c93cd9 228 *@param I2C &i2c reference to i2c,
caa45040 0:896a43c93cd9 229 *@param uint8_t deviceAddress slaveaddress (8bit to use for the controller (0x78 by default, assumes D/C# (pin 13) grounded)
caa45040 0:896a43c93cd9 230 */
caa45040 0:896a43c93cd9 231 //SSD1308( uint8_t address = SSD1308_DEF_SA);
caa45040 0:896a43c93cd9 232 SSD1308( I2C_HandleTypeDef* _hi2c , uint8_t address = SSD1308_DEF_SA );
caa45040 0:896a43c93cd9 233
caa45040 0:896a43c93cd9 234
caa45040 0:896a43c93cd9 235 // High Level methods
caa45040 0:896a43c93cd9 236
caa45040 0:896a43c93cd9 237 /** @brief High level Init, most settings remain at Power-On reset value
caa45040 0:896a43c93cd9 238 */
caa45040 0:896a43c93cd9 239 void initialize();
caa45040 0:896a43c93cd9 240
caa45040 0:896a43c93cd9 241 /** @brief clear the display
caa45040 0:896a43c93cd9 242 */
caa45040 0:896a43c93cd9 243 void clearDisplay();
caa45040 0:896a43c93cd9 244
caa45040 0:896a43c93cd9 245
caa45040 0:896a43c93cd9 246 /** @brief fill the display
caa45040 0:896a43c93cd9 247 * @param uint8_t pattern fillpattern vertical patch or 8 bits
caa45040 0:896a43c93cd9 248 * @param uint8_t start_page begin page (0..MAX_PAGE)
caa45040 0:896a43c93cd9 249 * @param uint8_t end_page end page (start_page..MAX_PAGE)
caa45040 0:896a43c93cd9 250 * @param uint8_t start_col begin column (0..MAX_COL)
caa45040 0:896a43c93cd9 251 * @param uint8_t end_col end column (start_col..MAX_COL)
caa45040 0:896a43c93cd9 252 */
caa45040 0:896a43c93cd9 253 void fillDisplay(uint8_t pattern = 0x00,
caa45040 0:896a43c93cd9 254 uint8_t start_page=0, uint8_t end_page=MAX_PAGE,
caa45040 0:896a43c93cd9 255 uint8_t start_col=0, uint8_t end_col=MAX_COL);
caa45040 0:896a43c93cd9 256
caa45040 0:896a43c93cd9 257
caa45040 0:896a43c93cd9 258 /** @brief write a bitmap to the display
caa45040 0:896a43c93cd9 259 * @param uint8_t* data pointer to bitmap
caa45040 0:896a43c93cd9 260 * @param uint8_t start_page begin page (0..MAX_PAGE)
caa45040 0:896a43c93cd9 261 * @param uint8_t end_page end page (start_page..MAX_PAGE)
caa45040 0:896a43c93cd9 262 * @param uint8_t start_col begin column (0..MAX_COL)
caa45040 0:896a43c93cd9 263 * @param uint8_t end_col end column (start_col..MAX_COL)
caa45040 0:896a43c93cd9 264 */
caa45040 0:896a43c93cd9 265 void writeBitmap(uint8_t* data,
caa45040 0:896a43c93cd9 266 uint8_t start_page=0, uint8_t end_page=MAX_PAGE,
caa45040 0:896a43c93cd9 267 uint8_t start_col=0, uint8_t end_col=MAX_COL);
caa45040 0:896a43c93cd9 268
caa45040 0:896a43c93cd9 269 // Select inverted or normal text
caa45040 0:896a43c93cd9 270 //void setInverted(bool inverted) { _inverted = inverted; };
caa45040 0:896a43c93cd9 271
caa45040 0:896a43c93cd9 272
caa45040 0:896a43c93cd9 273 /** @brief Write large character (16x24 font)
caa45040 0:896a43c93cd9 274 * @param uint8_t row row number (0...MAX_ROW)
caa45040 0:896a43c93cd9 275 * @param uint8_t col column number (0...MAX_COL)
caa45040 0:896a43c93cd9 276 * @param char chr Used for displaying numbers 0 - 9 and '+', '-', '.'
caa45040 0:896a43c93cd9 277 */
caa45040 0:896a43c93cd9 278 void writeBigChar(uint8_t row, uint8_t col, char chr);
caa45040 0:896a43c93cd9 279
caa45040 0:896a43c93cd9 280
caa45040 0:896a43c93cd9 281
caa45040 0:896a43c93cd9 282
caa45040 0:896a43c93cd9 283
caa45040 0:896a43c93cd9 284 // Medium Level methods
caa45040 0:896a43c93cd9 285
caa45040 0:896a43c93cd9 286 /** @brief Set Horizontal Addressing Mode (cursor incr left-to-right, top-to-bottom)
caa45040 0:896a43c93cd9 287 *
caa45040 0:896a43c93cd9 288 */
caa45040 0:896a43c93cd9 289 void setHorizontalAddressingMode();
caa45040 0:896a43c93cd9 290
caa45040 0:896a43c93cd9 291 /** @brief Set Page Addressing Mode (cursor incr left-to-right)
caa45040 0:896a43c93cd9 292 *
caa45040 0:896a43c93cd9 293 */
caa45040 0:896a43c93cd9 294 void setPageAddressingMode();
caa45040 0:896a43c93cd9 295
caa45040 0:896a43c93cd9 296 /** @brief Set Addressing Mode
caa45040 0:896a43c93cd9 297 * @param uint8_t mode
caa45040 0:896a43c93cd9 298 */
caa45040 0:896a43c93cd9 299 void setMemoryAddressingMode(uint8_t mode);
caa45040 0:896a43c93cd9 300
caa45040 0:896a43c93cd9 301
caa45040 0:896a43c93cd9 302 /** @param uint8_t start startcolumn (valid range 0..MAX_COL)
caa45040 0:896a43c93cd9 303 * @param uint8_t end endcolumn (valid range start..MAX_COL)
caa45040 0:896a43c93cd9 304 */
caa45040 0:896a43c93cd9 305 void setColumnAddress(uint8_t start, uint8_t end);
caa45040 0:896a43c93cd9 306
caa45040 0:896a43c93cd9 307 /** @param uint8_t start startpage (valid range 0..MAX_PAGE)
caa45040 0:896a43c93cd9 308 * @param uint8_t end endpage (valid range start..MAX_PAGE)
caa45040 0:896a43c93cd9 309 */
caa45040 0:896a43c93cd9 310 void setPageAddress(uint8_t start, uint8_t end);
caa45040 0:896a43c93cd9 311
caa45040 0:896a43c93cd9 312
caa45040 0:896a43c93cd9 313 /** @brief Enable Display
caa45040 0:896a43c93cd9 314 */
caa45040 0:896a43c93cd9 315 void setDisplayOn();
caa45040 0:896a43c93cd9 316
caa45040 0:896a43c93cd9 317 /** @brief Disable Display
caa45040 0:896a43c93cd9 318 */
caa45040 0:896a43c93cd9 319 void setDisplayOff();
caa45040 0:896a43c93cd9 320
caa45040 0:896a43c93cd9 321 /** @brief Display Flip (Left/Right, Up/Down)
caa45040 0:896a43c93cd9 322 * @param bool left flip Left/Right
caa45040 0:896a43c93cd9 323 * @param bool down flip Up/Down
caa45040 0:896a43c93cd9 324 */
caa45040 0:896a43c93cd9 325 void setDisplayFlip(bool left, bool down);
caa45040 0:896a43c93cd9 326
caa45040 0:896a43c93cd9 327
caa45040 0:896a43c93cd9 328
caa45040 0:896a43c93cd9 329
caa45040 0:896a43c93cd9 330 // private:
caa45040 0:896a43c93cd9 331
caa45040 0:896a43c93cd9 332
caa45040 0:896a43c93cd9 333 // Low Level methods
caa45040 0:896a43c93cd9 334
caa45040 0:896a43c93cd9 335 /** @brief Write command that has no parameters
caa45040 0:896a43c93cd9 336 */
caa45040 0:896a43c93cd9 337 void _sendCommand(uint8_t command);
caa45040 0:896a43c93cd9 338
caa45040 0:896a43c93cd9 339 /** @brief Write command that has one parameter
caa45040 0:896a43c93cd9 340 */
caa45040 0:896a43c93cd9 341 void _sendCommand(uint8_t command, uint8_t param1);
caa45040 0:896a43c93cd9 342
caa45040 0:896a43c93cd9 343 /** @brief Write command that has two parameters
caa45040 0:896a43c93cd9 344 */
caa45040 0:896a43c93cd9 345 void _sendCommand(uint8_t command, uint8_t param1, uint8_t param2);
caa45040 0:896a43c93cd9 346 // void sendCommands(uint8_t len, uint8_t* buf);
caa45040 0:896a43c93cd9 347
caa45040 0:896a43c93cd9 348 /** @brief Write command that has five parameters
caa45040 0:896a43c93cd9 349 */
caa45040 0:896a43c93cd9 350 void _sendCommand(uint8_t command, uint8_t param1, uint8_t param2,
caa45040 0:896a43c93cd9 351 uint8_t param3, uint8_t param4,
caa45040 0:896a43c93cd9 352 uint8_t param5);
caa45040 0:896a43c93cd9 353
caa45040 0:896a43c93cd9 354 /** @brief Write command that has six parameters
caa45040 0:896a43c93cd9 355 */
caa45040 0:896a43c93cd9 356 void _sendCommand(uint8_t command, uint8_t param1, uint8_t param2,
caa45040 0:896a43c93cd9 357 uint8_t param3, uint8_t param4,
caa45040 0:896a43c93cd9 358 uint8_t param5, uint8_t param6);
caa45040 0:896a43c93cd9 359
caa45040 0:896a43c93cd9 360 /** @brief Write databyte to display
caa45040 0:896a43c93cd9 361 * @brief Start at current cursor location
caa45040 0:896a43c93cd9 362 * @param uint8_t data databyte to write
caa45040 0:896a43c93cd9 363 */
caa45040 0:896a43c93cd9 364 void _sendData(uint8_t data);
caa45040 0:896a43c93cd9 365
caa45040 0:896a43c93cd9 366 /** @brief Write len bytes from buffer data to display,
caa45040 0:896a43c93cd9 367 * @brief Start at current cursor location
caa45040 0:896a43c93cd9 368 * @param uint8_t len number of bytes to write
caa45040 0:896a43c93cd9 369 * @param uint8_t* data pointer to data
caa45040 0:896a43c93cd9 370 */
caa45040 0:896a43c93cd9 371 void _sendData(uint8_t len, uint8_t* data);
caa45040 0:896a43c93cd9 372
caa45040 0:896a43c93cd9 373
caa45040 0:896a43c93cd9 374 //I2C *_i2c; // I2C bus reference
caa45040 0:896a43c93cd9 375 uint8_t _readOpcode; // contains the I2C address of the device
caa45040 0:896a43c93cd9 376 uint8_t _writeOpcode; // contains the I2C address of the device
caa45040 0:896a43c93cd9 377
caa45040 0:896a43c93cd9 378 //bool _inverted; // inverted or normal text
caa45040 0:896a43c93cd9 379
caa45040 0:896a43c93cd9 380 I2C_HandleTypeDef* _hi2c;
caa45040 0:896a43c93cd9 381
caa45040 0:896a43c93cd9 382 };
caa45040 0:896a43c93cd9 383
caa45040 0:896a43c93cd9 384 #endif