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Fork of Impedance_Fast_Circuitry by
Diff: dma.cpp
- Revision:
- 48:29f14bc30ba6
- Parent:
- 46:a015ebf4663b
- Child:
- 49:4dcf4717a8bb
--- a/dma.cpp Sat Jan 31 16:44:40 2015 +0000
+++ b/dma.cpp Sat Jan 31 18:38:17 2015 +0000
@@ -21,8 +21,10 @@
// Enable DMA channels and select MUX to the correct source (see page 95 of user manual
DMAMUX_CHCFG0 |= DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_SOURCE(40); // ADC0
DMAMUX_CHCFG1 |= DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_SOURCE(41); // ADC1
- DMAMUX_CHCFG2 |= DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_TRIG_MASK | DMAMUX_CHCFG_SOURCE(48);
+ DMAMUX_CHCFG2 |= DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_SOURCE(48); // Set trigger source to PDB (Don't set DMA Trig Enable because that is for the PIT)
/* Source number Source module Source description
+ 40 ADC0
+ 41 ADC1
30 FTM2 Channel 0
31 FTM2 Channel 1
48 PDB -
@@ -36,7 +38,7 @@
DMA_CR |= DMA_CR_ERCA_MASK;
// Set memory address for source and destination for DMA0, DMA1, and DMA2
- DMA_TCD0_SADDR = (uint32_t) &ADC0_RA;
+ DMA_TCD0_SADDR = (uint32_t) &ADC0_RB;
DMA_TCD0_DADDR = (uint32_t) sample_array0;
DMA_TCD1_SADDR = (uint32_t) &ADC1_RA;
DMA_TCD1_DADDR = (uint32_t) sample_array1;
