Andrew Miller
/
FRDM_Serial
ak;jglif;awjd
Sentral.h@4:1e5639a2a3ae, 2016-05-20 (annotated)
- Committer:
- awmiller
- Date:
- Fri May 20 17:24:57 2016 +0000
- Revision:
- 4:1e5639a2a3ae
sentral tester
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
awmiller | 4:1e5639a2a3ae | 1 | #ifndef __SENTRAL_H |
awmiller | 4:1e5639a2a3ae | 2 | #define __SENTRAL_H |
awmiller | 4:1e5639a2a3ae | 3 | |
awmiller | 4:1e5639a2a3ae | 4 | #define SENTRAL_DI02 |
awmiller | 4:1e5639a2a3ae | 5 | |
awmiller | 4:1e5639a2a3ae | 6 | typedef struct { |
awmiller | 4:1e5639a2a3ae | 7 | unsigned long AXIS_X; |
awmiller | 4:1e5639a2a3ae | 8 | unsigned long AXIS_Y; |
awmiller | 4:1e5639a2a3ae | 9 | unsigned long AXIS_Z; |
awmiller | 4:1e5639a2a3ae | 10 | unsigned long AXIS_W; |
awmiller | 4:1e5639a2a3ae | 11 | } QuaternionData; |
awmiller | 4:1e5639a2a3ae | 12 | |
awmiller | 4:1e5639a2a3ae | 13 | #define SENTRAL_EEPROM_ADDRESS 0xa0 |
awmiller | 4:1e5639a2a3ae | 14 | #define SENTRAL_ADDRESS 0x50 |
awmiller | 4:1e5639a2a3ae | 15 | #define SENTRAL_ACC_ADDRESS 0x1a |
awmiller | 4:1e5639a2a3ae | 16 | #define SENTRAL_Q_ADDRESS 0x00 |
awmiller | 4:1e5639a2a3ae | 17 | |
awmiller | 4:1e5639a2a3ae | 18 | void Setup_Sentral_EEPROM(); |
awmiller | 4:1e5639a2a3ae | 19 | int SentralGetQData(QuaternionData* buff); |
awmiller | 4:1e5639a2a3ae | 20 | |
awmiller | 4:1e5639a2a3ae | 21 | #define SentralAddress 0x50 |
awmiller | 4:1e5639a2a3ae | 22 | |
awmiller | 4:1e5639a2a3ae | 23 | |
awmiller | 4:1e5639a2a3ae | 24 | #ifdef SENTRAL_DI02 |
awmiller | 4:1e5639a2a3ae | 25 | #define RETURN_SUCCESS 1 |
awmiller | 4:1e5639a2a3ae | 26 | #define RETURN_FAILURE 0 |
awmiller | 4:1e5639a2a3ae | 27 | #define ENABLE_EVENTS_REG 0x33 |
awmiller | 4:1e5639a2a3ae | 28 | #define MAG_RATE_REG 0x55 |
awmiller | 4:1e5639a2a3ae | 29 | #define ACCEL_RATE_REG 0x56 |
awmiller | 4:1e5639a2a3ae | 30 | #define GYRO_RATE_REG 0x57 |
awmiller | 4:1e5639a2a3ae | 31 | #define HOST_CONTROL_REG 0x34 |
awmiller | 4:1e5639a2a3ae | 32 | #define SENTRAL_STATUS_REG 0x37 |
awmiller | 4:1e5639a2a3ae | 33 | #define PASSTHROUGH_CONFIG_REG 0xa0 |
awmiller | 4:1e5639a2a3ae | 34 | #define RESET_REQ_REG 0x9b |
awmiller | 4:1e5639a2a3ae | 35 | #define REVISION_ID_REG 0x91 |
awmiller | 4:1e5639a2a3ae | 36 | #define HOST_STATUS_REG 0x92 |
awmiller | 4:1e5639a2a3ae | 37 | #define ALGORITHM_CONTROL 0x54 |
awmiller | 4:1e5639a2a3ae | 38 | |
awmiller | 4:1e5639a2a3ae | 39 | #define DEFAULT_I2C_SPEED_KHZ 100 |
awmiller | 4:1e5639a2a3ae | 40 | |
awmiller | 4:1e5639a2a3ae | 41 | //M_BED PORTS |
awmiller | 4:1e5639a2a3ae | 42 | //int ResetSentral(UInt8 NewByte); |
awmiller | 4:1e5639a2a3ae | 43 | //int Setup_Sentral(void); |
awmiller | 4:1e5639a2a3ae | 44 | unsigned int SentralSetup(Serial &pc,I2C &master); |
awmiller | 4:1e5639a2a3ae | 45 | |
awmiller | 4:1e5639a2a3ae | 46 | //M_BED ROUTINES |
awmiller | 4:1e5639a2a3ae | 47 | #define AddrSA0_hi 0x52 |
awmiller | 4:1e5639a2a3ae | 48 | int Sentral_Power(int val =1); |
awmiller | 4:1e5639a2a3ae | 49 | int Set_SA0(int val =0); |
awmiller | 4:1e5639a2a3ae | 50 | void Sentral_Reset(); |
awmiller | 4:1e5639a2a3ae | 51 | void SA0_init(); |
awmiller | 4:1e5639a2a3ae | 52 | int Sentral_pass_through(Serial &pc,I2C &master, int recursion =0); |
awmiller | 4:1e5639a2a3ae | 53 | |
awmiller | 4:1e5639a2a3ae | 54 | |
awmiller | 4:1e5639a2a3ae | 55 | |
awmiller | 4:1e5639a2a3ae | 56 | |
awmiller | 4:1e5639a2a3ae | 57 | #endif |
awmiller | 4:1e5639a2a3ae | 58 | |
awmiller | 4:1e5639a2a3ae | 59 | #endif |