Andriy Makukha / Mbed 2 deprecated football_project_wo_output

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Dependencies:   mbed

Fork of football_project by MZJ

io/MySerial.cpp@5:1b9734e68327, 2015-04-17 (annotated)

Committer:
AntonLS
Date:
Fri Apr 17 04:20:07 2015 +0000
Revision:
5:1b9734e68327
Parent:
4:17b8edf264c3
Child:
6:ef758ac3c928
Waits for BLE ready on characteristic update.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AntonLS 1:0ba687d4196f 1 /*
AntonLS 1:0ba687d4196f 2 *
AntonLS 1:0ba687d4196f 3 * Replacement for Serial, so UART flow control is inited properly. ALS 20150412
AntonLS 1:0ba687d4196f 4 *
AntonLS 1:0ba687d4196f 5 * MySerialBase is a replacement for SerialBase, to prevent it from calling
AntonLS 1:0ba687d4196f 6 * the faulty-for-nRF51822-uart-init serial_init()
AntonLS 1:0ba687d4196f 7 * in mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c
AntonLS 1:0ba687d4196f 8 *
AntonLS 1:0ba687d4196f 9 */
AntonLS 1:0ba687d4196f 10
AntonLS 1:0ba687d4196f 11 #include "MySerial.h"
AntonLS 1:0ba687d4196f 12
AntonLS 1:0ba687d4196f 13 extern "C"
AntonLS 1:0ba687d4196f 14 {
AntonLS 1:0ba687d4196f 15 void pin_mode( PinName, PinMode );
AntonLS 1:0ba687d4196f 16 }
AntonLS 1:0ba687d4196f 17
AntonLS 1:0ba687d4196f 18 extern int stdio_uart_inited;
AntonLS 1:0ba687d4196f 19 extern serial_t stdio_uart;
AntonLS 1:0ba687d4196f 20
AntonLS 1:0ba687d4196f 21
AntonLS 1:0ba687d4196f 22 using namespace moo;
AntonLS 1:0ba687d4196f 23
AntonLS 1:0ba687d4196f 24
AntonLS 1:0ba687d4196f 25 MySerialBase::MySerialBase( PinName tx, PinName rx,
AntonLS 1:0ba687d4196f 26 PinName rts, PinName cts ) : _my_serial(), _my_baud( 9600 )
AntonLS 1:0ba687d4196f 27 {
AntonLS 2:fe1566cdb6e7 28 my_serial_init( &_my_serial, tx, rx, rts, cts, _my_baud );
AntonLS 1:0ba687d4196f 29 serial_irq_handler( &_my_serial, _irq_handler, (uint32_t)this );
AntonLS 5:1b9734e68327 30
AntonLS 5:1b9734e68327 31 // For uart errors
AntonLS 5:1b9734e68327 32 attach( this, &MySerialBase::error_handler, (Serial::IrqType)ErrIrq );
AntonLS 1:0ba687d4196f 33 }
AntonLS 1:0ba687d4196f 34 void MySerialBase::baud( int baudrate )
AntonLS 1:0ba687d4196f 35 {
AntonLS 1:0ba687d4196f 36 serial_baud( &_my_serial, baudrate );
AntonLS 1:0ba687d4196f 37 _my_baud = baudrate;
AntonLS 1:0ba687d4196f 38 }
AntonLS 1:0ba687d4196f 39 void MySerialBase::format( int bits, SerialBase::Parity parity, int stop_bits )
AntonLS 1:0ba687d4196f 40 {
AntonLS 1:0ba687d4196f 41 serial_format( &_my_serial, bits, (SerialParity)parity, stop_bits );
AntonLS 1:0ba687d4196f 42 }
AntonLS 1:0ba687d4196f 43 int MySerialBase::readable()
AntonLS 1:0ba687d4196f 44 {
AntonLS 1:0ba687d4196f 45 return serial_readable( &_my_serial );
AntonLS 1:0ba687d4196f 46 }
AntonLS 1:0ba687d4196f 47 int MySerialBase::writeable()
AntonLS 1:0ba687d4196f 48 {
AntonLS 1:0ba687d4196f 49 return serial_writable( &_my_serial );
AntonLS 1:0ba687d4196f 50 }
AntonLS 5:1b9734e68327 51 void MySerialBase::attach( void (*fptr)(void), Serial::IrqType type )
AntonLS 1:0ba687d4196f 52 {
AntonLS 1:0ba687d4196f 53 if( fptr )
AntonLS 1:0ba687d4196f 54 {
AntonLS 1:0ba687d4196f 55 _my_irq[type].attach( fptr );
AntonLS 5:1b9734e68327 56 my_serial_irq_set( &_my_serial, (IrqType)type, 1 );
AntonLS 5:1b9734e68327 57
AntonLS 1:0ba687d4196f 58 } else
AntonLS 5:1b9734e68327 59 {
AntonLS 5:1b9734e68327 60 my_serial_irq_set( &_my_serial, (IrqType)type, 0 );
AntonLS 5:1b9734e68327 61 }
AntonLS 1:0ba687d4196f 62 }
AntonLS 2:fe1566cdb6e7 63 void MySerialBase::my_serial_init( serial_t *obj, PinName tx, PinName rx, PinName rts, PinName cts, int baudrate )
AntonLS 2:fe1566cdb6e7 64 {
AntonLS 2:fe1566cdb6e7 65 UARTName uart = UART_0;
AntonLS 2:fe1566cdb6e7 66 obj->uart = (NRF_UART_Type *)uart;
AntonLS 2:fe1566cdb6e7 67
AntonLS 2:fe1566cdb6e7 68 // pin configurations --
AntonLS 2:fe1566cdb6e7 69 NRF_GPIO->DIR |= (1 << tx); // TX_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 70 NRF_GPIO->DIR |= ((NC == rts) ? 0 : (1 << rts)); // RTS_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 71
AntonLS 2:fe1566cdb6e7 72 NRF_GPIO->DIR &= ~(1 << rx); // RX_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 73 NRF_GPIO->DIR &= ~((NC == cts) ? 0 : (1 << cts)); // CTS_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 74
AntonLS 2:fe1566cdb6e7 75 obj->uart->PSELRTS = ((NC == rts) ? 0xFFFFFFFF : rts); // RTS_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 76 obj->uart->PSELTXD = tx; // TX_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 77 obj->uart->PSELCTS = ((NC == cts) ? 0xFFFFFFFF : cts); // CTS_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 78 obj->uart->PSELRXD = rx; // RX_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 79
AntonLS 2:fe1566cdb6e7 80 if( (NC != rts) || (NC != cts) )
AntonLS 2:fe1566cdb6e7 81 {
AntonLS 2:fe1566cdb6e7 82 obj->uart->CONFIG |= 0x01; // Enable HWFC
AntonLS 2:fe1566cdb6e7 83
AntonLS 2:fe1566cdb6e7 84 } else
AntonLS 2:fe1566cdb6e7 85 {
AntonLS 2:fe1566cdb6e7 86 obj->uart->CONFIG &= ~0x01; // Disable HWFC;
AntonLS 2:fe1566cdb6e7 87 }
AntonLS 2:fe1566cdb6e7 88
AntonLS 2:fe1566cdb6e7 89 // set default baud rate and format
AntonLS 2:fe1566cdb6e7 90 serial_baud ( obj, baudrate );
AntonLS 2:fe1566cdb6e7 91 serial_format( obj, 8, ParityNone, 1 );
AntonLS 2:fe1566cdb6e7 92
AntonLS 2:fe1566cdb6e7 93 obj->uart->ENABLE = (UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos);
AntonLS 2:fe1566cdb6e7 94 obj->uart->TASKS_STARTTX = 1;
AntonLS 2:fe1566cdb6e7 95 obj->uart->TASKS_STARTRX = 1;
AntonLS 2:fe1566cdb6e7 96 obj->uart->EVENTS_RXDRDY = 0;
AntonLS 2:fe1566cdb6e7 97 // dummy write needed or TXDRDY trails write rather than leads write.
AntonLS 2:fe1566cdb6e7 98 // pins are disconnected so nothing is physically transmitted on the wire
AntonLS 2:fe1566cdb6e7 99 obj->uart->TXD = 0;
AntonLS 2:fe1566cdb6e7 100
AntonLS 2:fe1566cdb6e7 101 obj->index = 0;
AntonLS 2:fe1566cdb6e7 102
AntonLS 2:fe1566cdb6e7 103 // set rx/tx pins in PullUp mode
AntonLS 2:fe1566cdb6e7 104 if (tx != NC) {
AntonLS 2:fe1566cdb6e7 105 pin_mode(tx, PullUp);
AntonLS 2:fe1566cdb6e7 106 }
AntonLS 2:fe1566cdb6e7 107 if (rx != NC) {
AntonLS 2:fe1566cdb6e7 108 pin_mode(rx, PullUp);
AntonLS 2:fe1566cdb6e7 109 }
AntonLS 2:fe1566cdb6e7 110
AntonLS 2:fe1566cdb6e7 111 // Set CTS pin to PullDown mode if used.
AntonLS 2:fe1566cdb6e7 112 if( cts != NC )
AntonLS 2:fe1566cdb6e7 113 {
AntonLS 2:fe1566cdb6e7 114 pin_mode( cts, PullDown );
AntonLS 2:fe1566cdb6e7 115 }
AntonLS 2:fe1566cdb6e7 116
AntonLS 2:fe1566cdb6e7 117
AntonLS 2:fe1566cdb6e7 118 if (uart == STDIO_UART) {
AntonLS 2:fe1566cdb6e7 119 stdio_uart_inited = 1;
AntonLS 2:fe1566cdb6e7 120 memcpy(&stdio_uart, obj, sizeof(serial_t));
AntonLS 2:fe1566cdb6e7 121 }
AntonLS 2:fe1566cdb6e7 122 }
AntonLS 5:1b9734e68327 123 // Replacement for serial_irq_set() in serial_api.c so we can grab uart errors.
AntonLS 5:1b9734e68327 124 void MySerialBase::my_serial_irq_set( serial_t *obj, IrqType irq, uint32_t enable )
AntonLS 5:1b9734e68327 125 {
AntonLS 5:1b9734e68327 126 IRQn_Type irq_n = (IRQn_Type)0;
AntonLS 5:1b9734e68327 127
AntonLS 5:1b9734e68327 128 switch( (int)obj->uart )
AntonLS 5:1b9734e68327 129 {
AntonLS 5:1b9734e68327 130 case UART_0:
AntonLS 5:1b9734e68327 131 irq_n = UART0_IRQn;
AntonLS 5:1b9734e68327 132 break;
AntonLS 5:1b9734e68327 133 }
AntonLS 5:1b9734e68327 134
AntonLS 5:1b9734e68327 135 if( enable )
AntonLS 5:1b9734e68327 136 {
AntonLS 5:1b9734e68327 137 switch( irq )
AntonLS 5:1b9734e68327 138 {
AntonLS 5:1b9734e68327 139 case RxIrq:
AntonLS 5:1b9734e68327 140 obj->uart->INTEN |= (UART_INTENSET_RXDRDY_Msk);
AntonLS 5:1b9734e68327 141 break;
AntonLS 5:1b9734e68327 142 case TxIrq:
AntonLS 5:1b9734e68327 143 obj->uart->INTEN |= (UART_INTENSET_TXDRDY_Msk);
AntonLS 5:1b9734e68327 144 break;
AntonLS 5:1b9734e68327 145 case ErrIrq:
AntonLS 5:1b9734e68327 146 obj->uart->INTEN |= (UART_INTENSET_ERROR_Msk);
AntonLS 5:1b9734e68327 147 break;
AntonLS 5:1b9734e68327 148 }
AntonLS 5:1b9734e68327 149 NVIC_SetPriority( irq_n, 3 );
AntonLS 5:1b9734e68327 150 NVIC_EnableIRQ( irq_n );
AntonLS 5:1b9734e68327 151
AntonLS 5:1b9734e68327 152 } else
AntonLS 5:1b9734e68327 153 { // disable
AntonLS 5:1b9734e68327 154 // masked writes to INTENSET dont disable and masked writes to
AntonLS 5:1b9734e68327 155 // INTENCLR seemed to clear the entire register, not bits.
AntonLS 5:1b9734e68327 156 // Added INTEN to memory map and seems to allow set and clearing of specific bits as desired
AntonLS 5:1b9734e68327 157 switch( irq )
AntonLS 5:1b9734e68327 158 {
AntonLS 5:1b9734e68327 159 case RxIrq:
AntonLS 5:1b9734e68327 160 obj->uart->INTEN &= ~(UART_INTENCLR_RXDRDY_Msk);
AntonLS 5:1b9734e68327 161 break;
AntonLS 5:1b9734e68327 162 case TxIrq:
AntonLS 5:1b9734e68327 163 obj->uart->INTEN &= ~(UART_INTENCLR_TXDRDY_Msk);
AntonLS 5:1b9734e68327 164 break;
AntonLS 5:1b9734e68327 165 case ErrIrq:
AntonLS 5:1b9734e68327 166 obj->uart->INTEN &= ~(UART_INTENCLR_ERROR_Msk);
AntonLS 5:1b9734e68327 167 break;
AntonLS 5:1b9734e68327 168 }
AntonLS 5:1b9734e68327 169
AntonLS 5:1b9734e68327 170 if( 0 == obj->uart->INTENCLR )
AntonLS 5:1b9734e68327 171 {
AntonLS 5:1b9734e68327 172 NVIC_DisableIRQ( irq_n );
AntonLS 5:1b9734e68327 173 }
AntonLS 5:1b9734e68327 174 }
AntonLS 5:1b9734e68327 175 }
AntonLS 1:0ba687d4196f 176 void MySerialBase::_irq_handler( uint32_t id, SerialIrq irq_type )
AntonLS 1:0ba687d4196f 177 {
AntonLS 1:0ba687d4196f 178 MySerialBase *handler = (MySerialBase*)id;
AntonLS 1:0ba687d4196f 179 handler->_my_irq[irq_type].call();
AntonLS 1:0ba687d4196f 180 }
AntonLS 5:1b9734e68327 181 void MySerialBase::error_handler()
AntonLS 5:1b9734e68327 182 {
AntonLS 5:1b9734e68327 183 puts( "\r\nUART ERR! " );
AntonLS 5:1b9734e68327 184
AntonLS 5:1b9734e68327 185 if( (UART_ERRORSRC_OVERRUN_Present << UART_ERRORSRC_OVERRUN_Pos) == (UART_ERRORSRC_OVERRUN_Msk & _my_serial.uart->ERRORSRC) )
AntonLS 5:1b9734e68327 186 {
AntonLS 5:1b9734e68327 187 puts( "\r\n[ERR: OVERRUN]\r\n" );
AntonLS 5:1b9734e68327 188
AntonLS 5:1b9734e68327 189 // Clear the error
AntonLS 5:1b9734e68327 190 _my_serial.uart->ERRORSRC = (UART_ERRORSRC_OVERRUN_Clear << UART_ERRORSRC_OVERRUN_Pos);
AntonLS 5:1b9734e68327 191 }
AntonLS 5:1b9734e68327 192 }
AntonLS 1:0ba687d4196f 193 int MySerialBase::_base_getc()
AntonLS 1:0ba687d4196f 194 {
AntonLS 1:0ba687d4196f 195 return serial_getc( &_my_serial );
AntonLS 1:0ba687d4196f 196 }
AntonLS 1:0ba687d4196f 197 int MySerialBase::_base_putc( int c )
AntonLS 1:0ba687d4196f 198 {
AntonLS 1:0ba687d4196f 199 serial_putc( &_my_serial, c );
AntonLS 1:0ba687d4196f 200 return c;
AntonLS 1:0ba687d4196f 201 }
AntonLS 1:0ba687d4196f 202 void MySerialBase::send_break()
AntonLS 1:0ba687d4196f 203 {
AntonLS 1:0ba687d4196f 204 // Wait for 1.5 frames before clearing the break condition
AntonLS 1:0ba687d4196f 205 // This will have different effects on our platforms, but should
AntonLS 1:0ba687d4196f 206 // ensure that we keep the break active for at least one frame.
AntonLS 1:0ba687d4196f 207 // We consider a full frame (1 start bit + 8 data bits bits +
AntonLS 1:0ba687d4196f 208 // 1 parity bit + 2 stop bits = 12 bits) for computation.
AntonLS 1:0ba687d4196f 209 // One bit time (in us) = 1000000/_my_baud
AntonLS 1:0ba687d4196f 210 // Twelve bits: 12000000/baud delay
AntonLS 1:0ba687d4196f 211 // 1.5 frames: 18000000/baud delay
AntonLS 1:0ba687d4196f 212 serial_break_set( &_my_serial );
AntonLS 1:0ba687d4196f 213 wait_us( 18000000/_my_baud );
AntonLS 1:0ba687d4196f 214 serial_break_clear( &_my_serial );
AntonLS 1:0ba687d4196f 215 }
AntonLS 1:0ba687d4196f 216
AntonLS 1:0ba687d4196f 217
AntonLS 1:0ba687d4196f 218 MySerial::MySerial( PinName tx, PinName rx, const char *name,
AntonLS 1:0ba687d4196f 219 PinName rts, PinName cts ) : MySerialBase( tx, rx, rts, cts ), Stream( name )
AntonLS 1:0ba687d4196f 220 {
AntonLS 1:0ba687d4196f 221 }
AntonLS 1:0ba687d4196f 222 int MySerial::_getc()
AntonLS 1:0ba687d4196f 223 {
AntonLS 1:0ba687d4196f 224 return _base_getc();
AntonLS 1:0ba687d4196f 225 }
AntonLS 1:0ba687d4196f 226 int MySerial::_putc( int c )
AntonLS 1:0ba687d4196f 227 {
AntonLS 1:0ba687d4196f 228 return _base_putc( c );
AntonLS 1:0ba687d4196f 229 }
AntonLS 1:0ba687d4196f 230 int MySerial::puts( const char *str )
AntonLS 1:0ba687d4196f 231 {
AntonLS 1:0ba687d4196f 232 while( *str )
AntonLS 1:0ba687d4196f 233 putc( *str ++ );
AntonLS 1:0ba687d4196f 234
AntonLS 1:0ba687d4196f 235 return 0;
AntonLS 1:0ba687d4196f 236 }
AntonLS 4:17b8edf264c3 237
AntonLS 1:0ba687d4196f 238 int MySerial::printf( const char *format, ... )
AntonLS 1:0ba687d4196f 239 {
AntonLS 1:0ba687d4196f 240 va_list arg;
AntonLS 1:0ba687d4196f 241 va_start( arg, format );
AntonLS 1:0ba687d4196f 242
AntonLS 1:0ba687d4196f 243 int len = MySerial::vprintf( format, arg );
AntonLS 1:0ba687d4196f 244
AntonLS 1:0ba687d4196f 245 va_end( arg );
AntonLS 1:0ba687d4196f 246
AntonLS 1:0ba687d4196f 247 return len;
AntonLS 1:0ba687d4196f 248 }
AntonLS 1:0ba687d4196f 249 int MySerial::vprintf( const char *format, va_list arg )
AntonLS 1:0ba687d4196f 250 {
AntonLS 1:0ba687d4196f 251 int len = vsnprintf( NULL, 0, format, arg );
AntonLS 1:0ba687d4196f 252 if( len < STRING_STACK_LIMIT )
AntonLS 1:0ba687d4196f 253 {
AntonLS 1:0ba687d4196f 254 char temp[STRING_STACK_LIMIT];
AntonLS 1:0ba687d4196f 255 vsprintf( temp, format, arg );
AntonLS 1:0ba687d4196f 256 puts( temp );
AntonLS 1:0ba687d4196f 257
AntonLS 1:0ba687d4196f 258 } else
AntonLS 1:0ba687d4196f 259 {
AntonLS 1:0ba687d4196f 260 char *temp = new char[len + 1];
AntonLS 1:0ba687d4196f 261 vsprintf( temp, format, arg );
AntonLS 1:0ba687d4196f 262 puts( temp );
AntonLS 1:0ba687d4196f 263 delete[] temp;
AntonLS 1:0ba687d4196f 264 }
AntonLS 1:0ba687d4196f 265
AntonLS 1:0ba687d4196f 266 return len;
AntonLS 1:0ba687d4196f 267 }
AntonLS 1:0ba687d4196f 268
AntonLS 1:0ba687d4196f 269 /* EOF */