Andriy Makukha / Mbed 2 deprecated football_project_wo_output

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Dependencies:   mbed

Fork of football_project by MZJ

io/MySerial.cpp@6:ef758ac3c928, 2015-04-17 (annotated)

Committer:
AntonLS
Date:
Fri Apr 17 20:55:25 2015 +0000
Revision:
6:ef758ac3c928
Parent:
5:1b9734e68327
Child:
7:205ef63d311a
Using non-low-level flow control because irq handler won't pass hwfc events.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AntonLS 1:0ba687d4196f 1 /*
AntonLS 1:0ba687d4196f 2 *
AntonLS 1:0ba687d4196f 3 * Replacement for Serial, so UART flow control is inited properly. ALS 20150412
AntonLS 1:0ba687d4196f 4 *
AntonLS 1:0ba687d4196f 5 * MySerialBase is a replacement for SerialBase, to prevent it from calling
AntonLS 1:0ba687d4196f 6 * the faulty-for-nRF51822-uart-init serial_init()
AntonLS 1:0ba687d4196f 7 * in mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c
AntonLS 1:0ba687d4196f 8 *
AntonLS 1:0ba687d4196f 9 */
AntonLS 1:0ba687d4196f 10
AntonLS 1:0ba687d4196f 11 #include "MySerial.h"
AntonLS 1:0ba687d4196f 12
AntonLS 1:0ba687d4196f 13 extern "C"
AntonLS 1:0ba687d4196f 14 {
AntonLS 1:0ba687d4196f 15 void pin_mode( PinName, PinMode );
AntonLS 6:ef758ac3c928 16
AntonLS 6:ef758ac3c928 17 void UART0_My_IRQHandler(); // Rename to UART0_IRQHandler once serial_api.c excludes in lib rebuild.
AntonLS 1:0ba687d4196f 18 }
AntonLS 1:0ba687d4196f 19
AntonLS 1:0ba687d4196f 20 extern int stdio_uart_inited;
AntonLS 1:0ba687d4196f 21 extern serial_t stdio_uart;
AntonLS 1:0ba687d4196f 22
AntonLS 6:ef758ac3c928 23 // Our versions of serial_api.c's...
AntonLS 6:ef758ac3c928 24 // (serial_free(), etc. in serial_api.c won't work because we have our own copy.)
AntonLS 6:ef758ac3c928 25 #define UART_NUM 1
AntonLS 6:ef758ac3c928 26 static uint32_t serial_irq_ids[UART_NUM] = {0};
AntonLS 6:ef758ac3c928 27 static uart_irq_handler irq_handler;
AntonLS 6:ef758ac3c928 28
AntonLS 1:0ba687d4196f 29
AntonLS 1:0ba687d4196f 30 using namespace moo;
AntonLS 1:0ba687d4196f 31
AntonLS 1:0ba687d4196f 32
AntonLS 1:0ba687d4196f 33 MySerialBase::MySerialBase( PinName tx, PinName rx,
AntonLS 1:0ba687d4196f 34 PinName rts, PinName cts ) : _my_serial(), _my_baud( 9600 )
AntonLS 1:0ba687d4196f 35 {
AntonLS 2:fe1566cdb6e7 36 my_serial_init( &_my_serial, tx, rx, rts, cts, _my_baud );
AntonLS 6:ef758ac3c928 37 my_serial_irq_handler( &_my_serial, _irq_handler, (uint32_t)this );
AntonLS 5:1b9734e68327 38
AntonLS 6:ef758ac3c928 39 // For cts -- Won't work until we use our own UART0_IRQHandler (alter serial_api.c / rebuild mbed lib.)
AntonLS 6:ef758ac3c928 40 attach( this, &MySerialBase::cts_handler, (Serial::IrqType)CtsIrq );
AntonLS 6:ef758ac3c928 41 // For uart errors -- Won't work until we use our own UART0_IRQHandler (alter serial_api.c / rebuild mbed lib.)
AntonLS 5:1b9734e68327 42 attach( this, &MySerialBase::error_handler, (Serial::IrqType)ErrIrq );
AntonLS 1:0ba687d4196f 43 }
AntonLS 1:0ba687d4196f 44 void MySerialBase::baud( int baudrate )
AntonLS 1:0ba687d4196f 45 {
AntonLS 1:0ba687d4196f 46 serial_baud( &_my_serial, baudrate );
AntonLS 1:0ba687d4196f 47 _my_baud = baudrate;
AntonLS 1:0ba687d4196f 48 }
AntonLS 1:0ba687d4196f 49 void MySerialBase::format( int bits, SerialBase::Parity parity, int stop_bits )
AntonLS 1:0ba687d4196f 50 {
AntonLS 1:0ba687d4196f 51 serial_format( &_my_serial, bits, (SerialParity)parity, stop_bits );
AntonLS 1:0ba687d4196f 52 }
AntonLS 1:0ba687d4196f 53 int MySerialBase::readable()
AntonLS 1:0ba687d4196f 54 {
AntonLS 1:0ba687d4196f 55 return serial_readable( &_my_serial );
AntonLS 1:0ba687d4196f 56 }
AntonLS 1:0ba687d4196f 57 int MySerialBase::writeable()
AntonLS 1:0ba687d4196f 58 {
AntonLS 1:0ba687d4196f 59 return serial_writable( &_my_serial );
AntonLS 1:0ba687d4196f 60 }
AntonLS 5:1b9734e68327 61 void MySerialBase::attach( void (*fptr)(void), Serial::IrqType type )
AntonLS 1:0ba687d4196f 62 {
AntonLS 1:0ba687d4196f 63 if( fptr )
AntonLS 1:0ba687d4196f 64 {
AntonLS 1:0ba687d4196f 65 _my_irq[type].attach( fptr );
AntonLS 5:1b9734e68327 66 my_serial_irq_set( &_my_serial, (IrqType)type, 1 );
AntonLS 5:1b9734e68327 67
AntonLS 1:0ba687d4196f 68 } else
AntonLS 5:1b9734e68327 69 {
AntonLS 5:1b9734e68327 70 my_serial_irq_set( &_my_serial, (IrqType)type, 0 );
AntonLS 5:1b9734e68327 71 }
AntonLS 1:0ba687d4196f 72 }
AntonLS 2:fe1566cdb6e7 73 void MySerialBase::my_serial_init( serial_t *obj, PinName tx, PinName rx, PinName rts, PinName cts, int baudrate )
AntonLS 2:fe1566cdb6e7 74 {
AntonLS 2:fe1566cdb6e7 75 UARTName uart = UART_0;
AntonLS 2:fe1566cdb6e7 76 obj->uart = (NRF_UART_Type *)uart;
AntonLS 2:fe1566cdb6e7 77
AntonLS 2:fe1566cdb6e7 78 // pin configurations --
AntonLS 2:fe1566cdb6e7 79 NRF_GPIO->DIR |= (1 << tx); // TX_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 80 NRF_GPIO->DIR |= ((NC == rts) ? 0 : (1 << rts)); // RTS_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 81
AntonLS 2:fe1566cdb6e7 82 NRF_GPIO->DIR &= ~(1 << rx); // RX_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 83 NRF_GPIO->DIR &= ~((NC == cts) ? 0 : (1 << cts)); // CTS_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 84
AntonLS 2:fe1566cdb6e7 85 obj->uart->PSELRTS = ((NC == rts) ? 0xFFFFFFFF : rts); // RTS_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 86 obj->uart->PSELTXD = tx; // TX_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 87 obj->uart->PSELCTS = ((NC == cts) ? 0xFFFFFFFF : cts); // CTS_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 88 obj->uart->PSELRXD = rx; // RX_PIN_NUMBER
AntonLS 2:fe1566cdb6e7 89
AntonLS 2:fe1566cdb6e7 90 if( (NC != rts) || (NC != cts) )
AntonLS 2:fe1566cdb6e7 91 {
AntonLS 2:fe1566cdb6e7 92 obj->uart->CONFIG |= 0x01; // Enable HWFC
AntonLS 2:fe1566cdb6e7 93
AntonLS 2:fe1566cdb6e7 94 } else
AntonLS 2:fe1566cdb6e7 95 {
AntonLS 2:fe1566cdb6e7 96 obj->uart->CONFIG &= ~0x01; // Disable HWFC;
AntonLS 2:fe1566cdb6e7 97 }
AntonLS 2:fe1566cdb6e7 98
AntonLS 2:fe1566cdb6e7 99 // set default baud rate and format
AntonLS 2:fe1566cdb6e7 100 serial_baud ( obj, baudrate );
AntonLS 2:fe1566cdb6e7 101 serial_format( obj, 8, ParityNone, 1 );
AntonLS 2:fe1566cdb6e7 102
AntonLS 2:fe1566cdb6e7 103 obj->uart->ENABLE = (UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos);
AntonLS 2:fe1566cdb6e7 104 obj->uart->TASKS_STARTTX = 1;
AntonLS 2:fe1566cdb6e7 105 obj->uart->TASKS_STARTRX = 1;
AntonLS 2:fe1566cdb6e7 106 obj->uart->EVENTS_RXDRDY = 0;
AntonLS 2:fe1566cdb6e7 107 // dummy write needed or TXDRDY trails write rather than leads write.
AntonLS 2:fe1566cdb6e7 108 // pins are disconnected so nothing is physically transmitted on the wire
AntonLS 2:fe1566cdb6e7 109 obj->uart->TXD = 0;
AntonLS 2:fe1566cdb6e7 110
AntonLS 2:fe1566cdb6e7 111 obj->index = 0;
AntonLS 2:fe1566cdb6e7 112
AntonLS 2:fe1566cdb6e7 113 // set rx/tx pins in PullUp mode
AntonLS 2:fe1566cdb6e7 114 if (tx != NC) {
AntonLS 2:fe1566cdb6e7 115 pin_mode(tx, PullUp);
AntonLS 2:fe1566cdb6e7 116 }
AntonLS 2:fe1566cdb6e7 117 if (rx != NC) {
AntonLS 2:fe1566cdb6e7 118 pin_mode(rx, PullUp);
AntonLS 2:fe1566cdb6e7 119 }
AntonLS 2:fe1566cdb6e7 120
AntonLS 2:fe1566cdb6e7 121 // Set CTS pin to PullDown mode if used.
AntonLS 2:fe1566cdb6e7 122 if( cts != NC )
AntonLS 2:fe1566cdb6e7 123 {
AntonLS 2:fe1566cdb6e7 124 pin_mode( cts, PullDown );
AntonLS 2:fe1566cdb6e7 125 }
AntonLS 2:fe1566cdb6e7 126
AntonLS 2:fe1566cdb6e7 127
AntonLS 2:fe1566cdb6e7 128 if (uart == STDIO_UART) {
AntonLS 2:fe1566cdb6e7 129 stdio_uart_inited = 1;
AntonLS 2:fe1566cdb6e7 130 memcpy(&stdio_uart, obj, sizeof(serial_t));
AntonLS 2:fe1566cdb6e7 131 }
AntonLS 2:fe1566cdb6e7 132 }
AntonLS 6:ef758ac3c928 133 void MySerialBase::my_serial_irq_handler( serial_t *obj, uart_irq_handler handler, uint32_t id )
AntonLS 6:ef758ac3c928 134 {
AntonLS 6:ef758ac3c928 135 irq_handler = handler;
AntonLS 6:ef758ac3c928 136 serial_irq_ids[obj->index] = id;
AntonLS 6:ef758ac3c928 137 }
AntonLS 6:ef758ac3c928 138
AntonLS 5:1b9734e68327 139 // Replacement for serial_irq_set() in serial_api.c so we can grab uart errors.
AntonLS 5:1b9734e68327 140 void MySerialBase::my_serial_irq_set( serial_t *obj, IrqType irq, uint32_t enable )
AntonLS 5:1b9734e68327 141 {
AntonLS 5:1b9734e68327 142 IRQn_Type irq_n = (IRQn_Type)0;
AntonLS 5:1b9734e68327 143
AntonLS 5:1b9734e68327 144 switch( (int)obj->uart )
AntonLS 5:1b9734e68327 145 {
AntonLS 5:1b9734e68327 146 case UART_0:
AntonLS 5:1b9734e68327 147 irq_n = UART0_IRQn;
AntonLS 5:1b9734e68327 148 break;
AntonLS 5:1b9734e68327 149 }
AntonLS 5:1b9734e68327 150
AntonLS 5:1b9734e68327 151 if( enable )
AntonLS 5:1b9734e68327 152 {
AntonLS 5:1b9734e68327 153 switch( irq )
AntonLS 5:1b9734e68327 154 {
AntonLS 5:1b9734e68327 155 case RxIrq:
AntonLS 5:1b9734e68327 156 obj->uart->INTEN |= (UART_INTENSET_RXDRDY_Msk);
AntonLS 5:1b9734e68327 157 break;
AntonLS 5:1b9734e68327 158 case TxIrq:
AntonLS 5:1b9734e68327 159 obj->uart->INTEN |= (UART_INTENSET_TXDRDY_Msk);
AntonLS 5:1b9734e68327 160 break;
AntonLS 5:1b9734e68327 161 case ErrIrq:
AntonLS 5:1b9734e68327 162 obj->uart->INTEN |= (UART_INTENSET_ERROR_Msk);
AntonLS 5:1b9734e68327 163 break;
AntonLS 5:1b9734e68327 164 }
AntonLS 5:1b9734e68327 165 NVIC_SetPriority( irq_n, 3 );
AntonLS 5:1b9734e68327 166 NVIC_EnableIRQ( irq_n );
AntonLS 5:1b9734e68327 167
AntonLS 5:1b9734e68327 168 } else
AntonLS 5:1b9734e68327 169 { // disable
AntonLS 5:1b9734e68327 170 // masked writes to INTENSET dont disable and masked writes to
AntonLS 5:1b9734e68327 171 // INTENCLR seemed to clear the entire register, not bits.
AntonLS 5:1b9734e68327 172 // Added INTEN to memory map and seems to allow set and clearing of specific bits as desired
AntonLS 5:1b9734e68327 173 switch( irq )
AntonLS 5:1b9734e68327 174 {
AntonLS 5:1b9734e68327 175 case RxIrq:
AntonLS 5:1b9734e68327 176 obj->uart->INTEN &= ~(UART_INTENCLR_RXDRDY_Msk);
AntonLS 5:1b9734e68327 177 break;
AntonLS 5:1b9734e68327 178 case TxIrq:
AntonLS 5:1b9734e68327 179 obj->uart->INTEN &= ~(UART_INTENCLR_TXDRDY_Msk);
AntonLS 5:1b9734e68327 180 break;
AntonLS 5:1b9734e68327 181 case ErrIrq:
AntonLS 5:1b9734e68327 182 obj->uart->INTEN &= ~(UART_INTENCLR_ERROR_Msk);
AntonLS 5:1b9734e68327 183 break;
AntonLS 5:1b9734e68327 184 }
AntonLS 5:1b9734e68327 185
AntonLS 5:1b9734e68327 186 if( 0 == obj->uart->INTENCLR )
AntonLS 5:1b9734e68327 187 {
AntonLS 5:1b9734e68327 188 NVIC_DisableIRQ( irq_n );
AntonLS 5:1b9734e68327 189 }
AntonLS 5:1b9734e68327 190 }
AntonLS 5:1b9734e68327 191 }
AntonLS 1:0ba687d4196f 192 void MySerialBase::_irq_handler( uint32_t id, SerialIrq irq_type )
AntonLS 1:0ba687d4196f 193 {
AntonLS 1:0ba687d4196f 194 MySerialBase *handler = (MySerialBase*)id;
AntonLS 1:0ba687d4196f 195 handler->_my_irq[irq_type].call();
AntonLS 1:0ba687d4196f 196 }
AntonLS 6:ef758ac3c928 197
AntonLS 6:ef758ac3c928 198 // Won't work until we use our own UART0_IRQHandler (alter serial_api.c / rebuild mbed lib.)
AntonLS 5:1b9734e68327 199 void MySerialBase::error_handler()
AntonLS 5:1b9734e68327 200 {
AntonLS 5:1b9734e68327 201 puts( "\r\nUART ERR! " );
AntonLS 5:1b9734e68327 202
AntonLS 5:1b9734e68327 203 if( (UART_ERRORSRC_OVERRUN_Present << UART_ERRORSRC_OVERRUN_Pos) == (UART_ERRORSRC_OVERRUN_Msk & _my_serial.uart->ERRORSRC) )
AntonLS 5:1b9734e68327 204 {
AntonLS 5:1b9734e68327 205 puts( "\r\n[ERR: OVERRUN]\r\n" );
AntonLS 5:1b9734e68327 206
AntonLS 5:1b9734e68327 207 // Clear the error
AntonLS 5:1b9734e68327 208 _my_serial.uart->ERRORSRC = (UART_ERRORSRC_OVERRUN_Clear << UART_ERRORSRC_OVERRUN_Pos);
AntonLS 5:1b9734e68327 209 }
AntonLS 5:1b9734e68327 210 }
AntonLS 6:ef758ac3c928 211
AntonLS 6:ef758ac3c928 212 // Won't work until we use our own UART0_IRQHandler (alter serial_api.c / rebuild mbed lib.)
AntonLS 6:ef758ac3c928 213 void MySerialBase::cts_handler()
AntonLS 6:ef758ac3c928 214 {
AntonLS 6:ef758ac3c928 215 puts( "\r\n[CTS: High]\r\n" );
AntonLS 6:ef758ac3c928 216 }
AntonLS 6:ef758ac3c928 217
AntonLS 1:0ba687d4196f 218 int MySerialBase::_base_getc()
AntonLS 1:0ba687d4196f 219 {
AntonLS 1:0ba687d4196f 220 return serial_getc( &_my_serial );
AntonLS 1:0ba687d4196f 221 }
AntonLS 1:0ba687d4196f 222 int MySerialBase::_base_putc( int c )
AntonLS 1:0ba687d4196f 223 {
AntonLS 1:0ba687d4196f 224 serial_putc( &_my_serial, c );
AntonLS 1:0ba687d4196f 225 return c;
AntonLS 1:0ba687d4196f 226 }
AntonLS 1:0ba687d4196f 227 void MySerialBase::send_break()
AntonLS 1:0ba687d4196f 228 {
AntonLS 1:0ba687d4196f 229 // Wait for 1.5 frames before clearing the break condition
AntonLS 1:0ba687d4196f 230 // This will have different effects on our platforms, but should
AntonLS 1:0ba687d4196f 231 // ensure that we keep the break active for at least one frame.
AntonLS 1:0ba687d4196f 232 // We consider a full frame (1 start bit + 8 data bits bits +
AntonLS 1:0ba687d4196f 233 // 1 parity bit + 2 stop bits = 12 bits) for computation.
AntonLS 1:0ba687d4196f 234 // One bit time (in us) = 1000000/_my_baud
AntonLS 1:0ba687d4196f 235 // Twelve bits: 12000000/baud delay
AntonLS 1:0ba687d4196f 236 // 1.5 frames: 18000000/baud delay
AntonLS 1:0ba687d4196f 237 serial_break_set( &_my_serial );
AntonLS 1:0ba687d4196f 238 wait_us( 18000000/_my_baud );
AntonLS 1:0ba687d4196f 239 serial_break_clear( &_my_serial );
AntonLS 1:0ba687d4196f 240 }
AntonLS 1:0ba687d4196f 241
AntonLS 1:0ba687d4196f 242
AntonLS 1:0ba687d4196f 243 MySerial::MySerial( PinName tx, PinName rx, const char *name,
AntonLS 1:0ba687d4196f 244 PinName rts, PinName cts ) : MySerialBase( tx, rx, rts, cts ), Stream( name )
AntonLS 1:0ba687d4196f 245 {
AntonLS 1:0ba687d4196f 246 }
AntonLS 1:0ba687d4196f 247 int MySerial::_getc()
AntonLS 1:0ba687d4196f 248 {
AntonLS 1:0ba687d4196f 249 return _base_getc();
AntonLS 1:0ba687d4196f 250 }
AntonLS 1:0ba687d4196f 251 int MySerial::_putc( int c )
AntonLS 1:0ba687d4196f 252 {
AntonLS 1:0ba687d4196f 253 return _base_putc( c );
AntonLS 1:0ba687d4196f 254 }
AntonLS 1:0ba687d4196f 255 int MySerial::puts( const char *str )
AntonLS 1:0ba687d4196f 256 {
AntonLS 1:0ba687d4196f 257 while( *str )
AntonLS 1:0ba687d4196f 258 putc( *str ++ );
AntonLS 1:0ba687d4196f 259
AntonLS 1:0ba687d4196f 260 return 0;
AntonLS 1:0ba687d4196f 261 }
AntonLS 4:17b8edf264c3 262
AntonLS 1:0ba687d4196f 263 int MySerial::printf( const char *format, ... )
AntonLS 1:0ba687d4196f 264 {
AntonLS 1:0ba687d4196f 265 va_list arg;
AntonLS 1:0ba687d4196f 266 va_start( arg, format );
AntonLS 1:0ba687d4196f 267
AntonLS 1:0ba687d4196f 268 int len = MySerial::vprintf( format, arg );
AntonLS 1:0ba687d4196f 269
AntonLS 1:0ba687d4196f 270 va_end( arg );
AntonLS 1:0ba687d4196f 271
AntonLS 1:0ba687d4196f 272 return len;
AntonLS 1:0ba687d4196f 273 }
AntonLS 1:0ba687d4196f 274 int MySerial::vprintf( const char *format, va_list arg )
AntonLS 1:0ba687d4196f 275 {
AntonLS 1:0ba687d4196f 276 int len = vsnprintf( NULL, 0, format, arg );
AntonLS 1:0ba687d4196f 277 if( len < STRING_STACK_LIMIT )
AntonLS 1:0ba687d4196f 278 {
AntonLS 1:0ba687d4196f 279 char temp[STRING_STACK_LIMIT];
AntonLS 1:0ba687d4196f 280 vsprintf( temp, format, arg );
AntonLS 1:0ba687d4196f 281 puts( temp );
AntonLS 1:0ba687d4196f 282
AntonLS 1:0ba687d4196f 283 } else
AntonLS 1:0ba687d4196f 284 {
AntonLS 1:0ba687d4196f 285 char *temp = new char[len + 1];
AntonLS 1:0ba687d4196f 286 vsprintf( temp, format, arg );
AntonLS 1:0ba687d4196f 287 puts( temp );
AntonLS 1:0ba687d4196f 288 delete[] temp;
AntonLS 1:0ba687d4196f 289 }
AntonLS 1:0ba687d4196f 290
AntonLS 1:0ba687d4196f 291 return len;
AntonLS 1:0ba687d4196f 292 }
AntonLS 1:0ba687d4196f 293
AntonLS 6:ef758ac3c928 294 // Won't work until we use our own UART0_IRQHandler (alter serial_api.c / rebuild mbed lib.)
AntonLS 6:ef758ac3c928 295
AntonLS 6:ef758ac3c928 296 #ifdef __cplusplus
AntonLS 6:ef758ac3c928 297 extern "C"
AntonLS 6:ef758ac3c928 298 {
AntonLS 6:ef758ac3c928 299 #endif
AntonLS 6:ef758ac3c928 300 void UART0_My_IRQHandler() // Rename to UART0_IRQHandler once serial_api.c excludes in lib rebuild.
AntonLS 6:ef758ac3c928 301 {
AntonLS 6:ef758ac3c928 302 MySerial::IrqType irq_type;
AntonLS 6:ef758ac3c928 303
AntonLS 6:ef758ac3c928 304 if( (NRF_UART0->INTENSET & UART_INTENSET_TXDRDY_Msk) && NRF_UART0->EVENTS_TXDRDY )
AntonLS 6:ef758ac3c928 305 {
AntonLS 6:ef758ac3c928 306 irq_type = MySerial::TxIrq;
AntonLS 6:ef758ac3c928 307
AntonLS 6:ef758ac3c928 308 } else if( (NRF_UART0->INTENSET & UART_INTENSET_RXDRDY_Msk) && NRF_UART0->EVENTS_RXDRDY )
AntonLS 6:ef758ac3c928 309 {
AntonLS 6:ef758ac3c928 310 irq_type = MySerial::RxIrq;
AntonLS 6:ef758ac3c928 311
AntonLS 6:ef758ac3c928 312 } else if( (NRF_UART0->INTENSET & UART_INTENSET_ERROR_Msk) && NRF_UART0->EVENTS_ERROR )
AntonLS 6:ef758ac3c928 313 {
AntonLS 6:ef758ac3c928 314 irq_type = MySerial::ErrIrq;
AntonLS 6:ef758ac3c928 315
AntonLS 6:ef758ac3c928 316 } else if( (NRF_UART0->INTENSET & UART_INTENSET_CTS_Msk) && NRF_UART0->EVENTS_CTS )
AntonLS 6:ef758ac3c928 317 {
AntonLS 6:ef758ac3c928 318 irq_type = MySerial::CtsIrq;
AntonLS 6:ef758ac3c928 319
AntonLS 6:ef758ac3c928 320 } else if( (NRF_UART0->INTENSET & UART_INTENSET_NCTS_Msk) && NRF_UART0->EVENTS_NCTS )
AntonLS 6:ef758ac3c928 321 {
AntonLS 6:ef758ac3c928 322 irq_type = MySerial::NctsIrq;
AntonLS 6:ef758ac3c928 323
AntonLS 6:ef758ac3c928 324 } else if( (NRF_UART0->INTENSET & UART_INTENSET_RXTO_Msk) && NRF_UART0->EVENTS_RXTO )
AntonLS 6:ef758ac3c928 325 {
AntonLS 6:ef758ac3c928 326 irq_type = MySerial::RxtoIrq;
AntonLS 6:ef758ac3c928 327
AntonLS 6:ef758ac3c928 328 } else
AntonLS 6:ef758ac3c928 329 {
AntonLS 6:ef758ac3c928 330 return;
AntonLS 6:ef758ac3c928 331 }
AntonLS 6:ef758ac3c928 332
AntonLS 6:ef758ac3c928 333 if( serial_irq_ids[0] != 0 )
AntonLS 6:ef758ac3c928 334 {
AntonLS 6:ef758ac3c928 335 irq_handler( serial_irq_ids[0], (SerialIrq)irq_type );
AntonLS 6:ef758ac3c928 336 }
AntonLS 6:ef758ac3c928 337 }
AntonLS 6:ef758ac3c928 338 #ifdef __cplusplus
AntonLS 6:ef758ac3c928 339 }
AntonLS 6:ef758ac3c928 340 #endif
AntonLS 6:ef758ac3c928 341
AntonLS 1:0ba687d4196f 342 /* EOF */