Diff: hrtimer/hrtimer.c

Revision:

40:53666b1a5848

Parent:

39:5b594b1b6a0a

Child:

63:28738aaad2a8

diff -r 5b594b1b6a0a -r 53666b1a5848 hrtimer/hrtimer.c
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/hrtimer/hrtimer.c	Tue Dec 04 12:26:27 2018 +0000
@@ -0,0 +1,61 @@
+#include <stdint.h>
+#include <stdbool.h>
+
+#include   "hrtimer.h"
+
+#define TCR  (*((volatile unsigned *) 0x40004004))
+#define TC   (*((volatile unsigned *) 0x40004008))
+#define PR   (*((volatile unsigned *) 0x4000400C))
+#define MCR  (*((volatile unsigned *) 0x40004014))
+#define CTCR (*((volatile unsigned *) 0x40004070))
+
+uint32_t HrTimerCount()
+{
+    return TC;
+}
+uint32_t HrTimerSinceRepetitive(uint32_t* pLastCount)
+{
+    uint32_t thisCount = TC;
+    uint32_t period = thisCount - *pLastCount;    
+    *pLastCount = thisCount;
+    return period;
+}
+uint32_t HrTimerSince(uint32_t lastCount)
+{
+    return TC - lastCount; 
+}
+uint32_t HrTimerSinceMs(uint32_t lastCount)
+{
+    uint32_t count = TC - lastCount;
+    return count / (HR_TIMER_COUNT_PER_SECOND / 1000);
+}
+
+bool HrTimerRepetitiveTick(uint32_t* pLastCount, uint32_t interval)
+{
+    if (TC - *pLastCount >= interval) //All unsigned wrap around arithmetic
+    {
+        *pLastCount += interval;
+        return true;
+    }
+    return false;
+}
+
+int32_t HrTimerMultiplyFractionalPart(int32_t value, uint32_t part, uint32_t interval)
+{
+    int64_t fraction;
+    
+    fraction = part;
+    fraction <<= 32;
+    fraction /= interval;
+              
+    return (value * fraction) >> 32;
+}
+
+void HrTimerInit()
+{    
+    TCR     =     2; // 21.6.2 Timer Control Register - Reset TC and PC.
+    CTCR    =     0; // 21.6.3 Count Control Register - Timer mode
+    PR      =     0; // 21.6.5 Prescale register      - Don't prescale 96MHz clock (divide by PR+1).
+    MCR     =     0; // 21.6.8 Match Control Register - no interrupt or reset
+    TCR     =     1; // 21.6.2 Timer Control Register - Enable TC and PC
+}