just a fork with another display choosen. LCD at D1 ROBOT shield seems to in YWROBOT configuration.

Dependents:   Nucleo_praktyki

Fork of TextLCD by Wim Huiskamp

Committer:
amateusz
Date:
Wed Jan 31 11:47:46 2018 +0000
Revision:
42:6c5cf2a0d238
Parent:
41:111ca62e8a59
Changed configuration, because my LCD is YWROBOT and not DEFAULT. But I don't really want to commit this to repo.. I just want to publish my program, so if this gets commited I'll try to delete it or something.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 37:ce348c002929 1 /* mbed TextLCD Library, for LCDs based on HD44780 controllers
simon 6:e4cb7ddee0d3 2 * Copyright (c) 2007-2010, sford, http://mbed.org
wim 14:0c32b66b14b8 3 * 2013, v01: WH, Added LCD types, fixed LCD address issues, added Cursor and UDCs
wim 14:0c32b66b14b8 4 * 2013, v02: WH, Added I2C and SPI bus interfaces
wim 15:b70ebfffb258 5 * 2013, v03: WH, Added support for LCD40x4 which uses 2 controllers
wim 18:bd65dc10f27f 6 * 2013, v04: WH, Added support for Display On/Off, improved 4bit bootprocess
wim 18:bd65dc10f27f 7 * 2013, v05: WH, Added support for 8x2B, added some UDCs
wim 19:c747b9e2e7b8 8 * 2013, v06: WH, Added support for devices that use internal DC/DC converters
wim 20:e0da005a777f 9 * 2013, v07: WH, Added support for backlight and include portdefinitions for LCD2004 Module from DFROBOT
wim 22:35742ec80c24 10 * 2014, v08: WH, Refactored in Base and Derived Classes to deal with mbed lib change regarding 'NC' defined pins
wim 25:6162b31128c9 11 * 2014, v09: WH/EO, Added Class for Native SPI controllers such as ST7032
wim 26:bd897a001012 12 * 2014, v10: WH, Added Class for Native I2C controllers such as ST7032i, Added support for MCP23008 I2C portexpander, Added support for Adafruit module
wim 30:033048611c01 13 * 2014, v11: WH, Added support for native I2C controllers such as PCF21XX, Improved the _initCtrl() method to deal with differences between all supported controllers
wim 32:59c4b8f648d4 14 * 2014, v12: WH, Added support for native I2C controller PCF2119 and native I2C/SPI controllers SSD1803, ST7036, added setContrast method (by JH1PJL) for supported devices (eg ST7032i)
wim 34:e5a0dcb43ecc 15 * 2014, v13: WH, Added support for controllers US2066/SSD1311 (OLED), added setUDCBlink() method for supported devices (eg SSD1803), fixed issue in setPower()
wim 34:e5a0dcb43ecc 16 * 2014, v14: WH, Added support for PT6314 (VFD), added setOrient() method for supported devices (eg SSD1803, US2066), added Double Height lines for supported devices,
wim 34:e5a0dcb43ecc 17 * added 16 UDCs for supported devices (eg PCF2103), moved UDC defines to TextLCD_UDC file, added TextLCD_Config.h for feature and footprint settings.
wim 35:311be6444a39 18 * 2014, v15: WH, Added AC780 support, added I2C expander modules, fixed setBacklight() for inverted logic modules. Fixed bug in LCD_SPI_N define
wim 36:9f5f86dfd44a 19 * 2014, v16: WH, Added ST7070 and KS0073 support, added setIcon(), clrIcon() and setInvert() method for supported devices
wim 37:ce348c002929 20 * 2015, v17: WH, Clean up low-level _writeCommand() and _writeData(), Added support for alternative fonttables (eg PCF21XX), Added ST7066_ACM controller for ACM1602 module
wim 38:cbe275b0b647 21 * 2015, v18: WH, Performance improvement I2C portexpander
wim 38:cbe275b0b647 22 * 2015, v19: WH, Fixed Adafruit I2C/SPI portexpander pinmappings, fixed SYDZ Backlight
wim 39:e9c2319de9c5 23 * 2015, v20: WH, Fixed occasional Init fail caused by insufficient wait time after ReturnHome command (0x02), Added defines to reduce memory footprint (eg LCD_ICON),
wim 40:d3496c3ea301 24 * Fixed and Added more fonttable support for PCF2119R_3V3, Added HD66712 controller.
wim 41:111ca62e8a59 25 * 2015, v21: WH, Added LCD32x2 defines and code, Fixed KS0073 DL=1 init for SPI, Added defines to reduce memory footprint (LCD_TWO_CTRL, LCD_CONTRAST, LCD_UTF8_FONT)
wim 41:111ca62e8a59 26 * Added SPLC792A controller, Added UTF8_2_LCD decode for Cyrilic font (By Andriy Ribalko). Added setFont()
simon 1:ac48b187213c 27 *
simon 1:ac48b187213c 28 * Permission is hereby granted, free of charge, to any person obtaining a copy
simon 1:ac48b187213c 29 * of this software and associated documentation files (the "Software"), to deal
simon 1:ac48b187213c 30 * in the Software without restriction, including without limitation the rights
simon 1:ac48b187213c 31 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
simon 1:ac48b187213c 32 * copies of the Software, and to permit persons to whom the Software is
simon 1:ac48b187213c 33 * furnished to do so, subject to the following conditions:
simon 1:ac48b187213c 34 *
simon 1:ac48b187213c 35 * The above copyright notice and this permission notice shall be included in
simon 1:ac48b187213c 36 * all copies or substantial portions of the Software.
simon 1:ac48b187213c 37 *
simon 1:ac48b187213c 38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
simon 1:ac48b187213c 39 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
simon 1:ac48b187213c 40 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
simon 1:ac48b187213c 41 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
simon 1:ac48b187213c 42 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
simon 1:ac48b187213c 43 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
simon 1:ac48b187213c 44 * THE SOFTWARE.
simon 1:ac48b187213c 45 */
wim 34:e5a0dcb43ecc 46 #include "mbed.h"
simon 1:ac48b187213c 47 #include "TextLCD.h"
wim 34:e5a0dcb43ecc 48 #include "TextLCD_UDC.inc"
wim 41:111ca62e8a59 49 #include "TextLCD_UTF8.inc"
wim 34:e5a0dcb43ecc 50
wim 21:9eb628d9e164 51 /** Create a TextLCD_Base interface
wim 15:b70ebfffb258 52 *
wim 21:9eb628d9e164 53 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 54 * @param ctrl LCD controller (default = HD44780)
wim 15:b70ebfffb258 55 */
wim 21:9eb628d9e164 56 TextLCD_Base::TextLCD_Base(LCDType type, LCDCtrl ctrl) : _type(type), _ctrl(ctrl) {
wim 30:033048611c01 57
wim 30:033048611c01 58 // Extract LCDType data
wim 30:033048611c01 59
wim 41:111ca62e8a59 60 // Columns encoded in b15..b8
wim 41:111ca62e8a59 61 _nr_cols = (_type & LCD_T_COL_MSK) >> LCD_T_COL_SHFT;
wim 41:111ca62e8a59 62
wim 41:111ca62e8a59 63 // Rows encoded in b23..b16
wim 41:111ca62e8a59 64 _nr_rows = (_type & LCD_T_ROW_MSK) >> LCD_T_ROW_SHFT;
wim 41:111ca62e8a59 65
wim 41:111ca62e8a59 66 // Addressing mode encoded in b27..b24
wim 30:033048611c01 67 _addr_mode = _type & LCD_T_ADR_MSK;
wim 37:ce348c002929 68
wim 37:ce348c002929 69 // Font table, encoded in LCDCtrl
wim 39:e9c2319de9c5 70 _font = _ctrl & LCD_C_FNT_MSK;
wim 14:0c32b66b14b8 71 }
wim 14:0c32b66b14b8 72
wim 21:9eb628d9e164 73 /** Init the LCD Controller(s)
wim 21:9eb628d9e164 74 * Clear display
wim 36:9f5f86dfd44a 75 * @param _LCDDatalength dl sets the datalength of data/commands
wim 36:9f5f86dfd44a 76 * @return none
wim 21:9eb628d9e164 77 */
wim 36:9f5f86dfd44a 78 void TextLCD_Base::_init(_LCDDatalength dl) {
wim 38:cbe275b0b647 79
wim 38:cbe275b0b647 80 wait_ms(100); // Wait 100ms to ensure powered up
wim 15:b70ebfffb258 81
wim 41:111ca62e8a59 82 #if (LCD_TWO_CTRL == 1)
wim 15:b70ebfffb258 83 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 84 if(_type==LCD40x4) {
wim 30:033048611c01 85 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 36:9f5f86dfd44a 86 _initCtrl(dl); // Init 2nd controller
wim 15:b70ebfffb258 87 }
wim 41:111ca62e8a59 88 #endif
wim 15:b70ebfffb258 89
wim 15:b70ebfffb258 90 // Select and configure primary LCD controller
wim 27:22d5086f6ba6 91 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 36:9f5f86dfd44a 92 _initCtrl(dl); // Init primary controller
wim 28:30fa94f7341c 93
wim 32:59c4b8f648d4 94 // Clear whole display and Reset Cursor location
wim 32:59c4b8f648d4 95 // Note: This will make sure that some 3-line displays that skip topline of a 4-line configuration
wim 32:59c4b8f648d4 96 // are cleared and init cursor correctly.
wim 32:59c4b8f648d4 97 cls();
wim 15:b70ebfffb258 98 }
wim 15:b70ebfffb258 99
wim 21:9eb628d9e164 100 /** Init the LCD controller
wim 36:9f5f86dfd44a 101 * Set number of lines, fonttype, no cursor etc
wim 36:9f5f86dfd44a 102 * The controller is accessed in 4-bit parallel mode either directly via mbed pins or through I2C or SPI expander.
wim 36:9f5f86dfd44a 103 * Some controllers also support native I2C or SPI interfaces.
wim 36:9f5f86dfd44a 104 *
wim 41:111ca62e8a59 105 * @param _LCDDatalength dl sets the 4 or 8 bit datalength of data/commands. Required for some native serial modes that dont work when DL=0.
wim 36:9f5f86dfd44a 106 * @return none
wim 30:033048611c01 107 *
wim 30:033048611c01 108 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 21:9eb628d9e164 109 */
wim 36:9f5f86dfd44a 110 void TextLCD_Base::_initCtrl(_LCDDatalength dl) {
wim 32:59c4b8f648d4 111 int _bias_lines=0; // Set Bias and lines (Instr Set 1), temporary variable.
wim 32:59c4b8f648d4 112 int _lines=0; // Set lines (Ext Instr Set), temporary variable.
wim 36:9f5f86dfd44a 113
wim 26:bd897a001012 114 this->_setRS(false); // command mode
simon 1:ac48b187213c 115
wim 37:ce348c002929 116 if (dl == _LCD_DL_4) {
wim 37:ce348c002929 117 // The Controller could be in 8 bit mode (power-on reset) or in 4 bit mode (warm reboot) at this point.
wim 37:ce348c002929 118 // Follow this procedure to make sure the Controller enters the correct state. The hardware interface
wim 37:ce348c002929 119 // between the uP and the LCD can only write the 4 most significant bits (Most Significant Nibble, MSN).
wim 37:ce348c002929 120 // In 4 bit mode the LCD expects the MSN first, followed by the LSN.
wim 37:ce348c002929 121 //
wim 38:cbe275b0b647 122 // Current state: 8 bit mode | 4 bit mode, MSN is next | 4 bit mode, LSN is next
wim 37:ce348c002929 123 //-------------------------------------------------------------------------------------------------
wim 38:cbe275b0b647 124 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN), | set dummy LSN,
wim 38:cbe275b0b647 125 // remains in 8 bit mode | remains in 4 bit mode | remains in 4 bit mode
wim 37:ce348c002929 126 wait_ms(15); //
wim 37:ce348c002929 127
wim 38:cbe275b0b647 128 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set dummy LSN, | set 8bit mode (MSN),
wim 38:cbe275b0b647 129 // remains in 8 bit mode | change to 8 bit mode | remains in 4 bit mode
wim 37:ce348c002929 130 wait_ms(15); //
wim 33:900a94bc7585 131
wim 38:cbe275b0b647 132 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN) and dummy LSN, | set dummy LSN,
wim 38:cbe275b0b647 133 // remains in 8 bit mode | remains in 8 bit mode | change to 8 bit mode
wim 37:ce348c002929 134 wait_ms(15); //
wim 37:ce348c002929 135
wim 37:ce348c002929 136 // Controller is now in 8 bit mode
wim 37:ce348c002929 137
wim 37:ce348c002929 138 _writeNibble(0x2); // Change to 4-bit mode (MSN), the LSN is undefined dummy
wim 37:ce348c002929 139 wait_us(40); // most instructions take 40us
wim 37:ce348c002929 140
wim 37:ce348c002929 141 // Controller is now in 4-bit mode
wim 37:ce348c002929 142 // Note: 4/8 bit mode is ignored for most native SPI and I2C devices. They dont use the parallel bus.
wim 37:ce348c002929 143 // However, _writeNibble() method is void anyway for native SPI and I2C devices.
wim 38:cbe275b0b647 144 }
wim 38:cbe275b0b647 145 else {
wim 38:cbe275b0b647 146 // Reset in 8 bit mode, final Function set will follow
wim 38:cbe275b0b647 147 _writeCommand(0x30); // Function set 0 0 1 DL=1 N F x x
wim 39:e9c2319de9c5 148 wait_ms(1); // most instructions take 40us
wim 37:ce348c002929 149 }
wim 25:6162b31128c9 150
wim 29:a3663151aa65 151 // Device specific initialisations: DC/DC converter to generate VLCD or VLED, number of lines etc
wim 19:c747b9e2e7b8 152 switch (_ctrl) {
wim 32:59c4b8f648d4 153
wim 36:9f5f86dfd44a 154 case KS0073:
wim 36:9f5f86dfd44a 155 // Initialise Display configuration
wim 36:9f5f86dfd44a 156 switch (_type) {
wim 41:111ca62e8a59 157 // case LCD6x1:
wim 36:9f5f86dfd44a 158 case LCD8x1: //8x1 is a regular 1 line display
wim 41:111ca62e8a59 159 // case LCD8x2B: //8x1 is a 16x1 line display
wim 36:9f5f86dfd44a 160 case LCD12x1:
wim 36:9f5f86dfd44a 161 case LCD16x1:
wim 36:9f5f86dfd44a 162 case LCD20x1:
wim 36:9f5f86dfd44a 163 case LCD24x1:
wim 36:9f5f86dfd44a 164 // case LCD32x1: // EXT pin is High, extension driver needed
wim 41:111ca62e8a59 165 // case LCD40x1: // EXT pin is High, extension driver needed
wim 41:111ca62e8a59 166 // case LCD52x1: // EXT pin is High, extension driver needed
wim 41:111ca62e8a59 167 _function = dl | 0x02; // Set function, 0 0 1 DL, N, RE(0), DH, REV
wim 41:111ca62e8a59 168 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 169 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 170 // N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim 41:111ca62e8a59 171 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 172 // DH=1 (Disp shift enable, special mode for KS0073)
wim 41:111ca62e8a59 173 // REV=0 (Reverse normal, special mode for KS0073)
wim 41:111ca62e8a59 174
wim 41:111ca62e8a59 175 _function_1 = dl | 0x04; // Set function, 0 0 1 DL, N, RE(1), BE, LP (Ext Regs)
wim 41:111ca62e8a59 176 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 177 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 178 // N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim 41:111ca62e8a59 179 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 180 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 41:111ca62e8a59 181 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 182
wim 36:9f5f86dfd44a 183 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 41:111ca62e8a59 184 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 185 break;
wim 36:9f5f86dfd44a 186
wim 36:9f5f86dfd44a 187 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 188 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 189 case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 190 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 41:111ca62e8a59 191 // case LCD16x3D1: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 192 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 193 case LCD20x4D: // Special mode for KS0073, KS0078
wim 41:111ca62e8a59 194 _function = dl | 0x02; // Set function, 0 0 1 DL, N, RE(0), DH, REV
wim 41:111ca62e8a59 195 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 196 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 197 // N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim 41:111ca62e8a59 198 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 199 // DH=1 (Disp shift enable, special mode for KS0073)
wim 41:111ca62e8a59 200 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 201
wim 41:111ca62e8a59 202 _function_1 = dl | 0x04; // Set function, 0 0 1 DL, N, RE(1), BE, LP (Ext Regs)
wim 41:111ca62e8a59 203 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 204 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 205 // N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim 41:111ca62e8a59 206 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 207 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 41:111ca62e8a59 208 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 209
wim 36:9f5f86dfd44a 210 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 41:111ca62e8a59 211 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 212 break;
wim 36:9f5f86dfd44a 213
wim 41:111ca62e8a59 214 // case LCD6x2:
wim 41:111ca62e8a59 215 case LCD8x2:
wim 41:111ca62e8a59 216 case LCD16x2:
wim 41:111ca62e8a59 217 // case LCD16x1C:
wim 41:111ca62e8a59 218 case LCD20x2:
wim 41:111ca62e8a59 219 case LCD24x2:
wim 41:111ca62e8a59 220 case LCD32x2:
wim 41:111ca62e8a59 221 // All other LCD types are initialised as 2 Line displays
wim 41:111ca62e8a59 222 _function = dl | 0x0A; // Set function, 0 0 1 DL, N, RE(0), DH, REV
wim 41:111ca62e8a59 223 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 224 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 225 // N=1 (2-line mode), N=0 (1-line mode)
wim 41:111ca62e8a59 226 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 227 // DH=1 (Disp shift enable, special mode for KS0073)
wim 41:111ca62e8a59 228 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 229
wim 41:111ca62e8a59 230 _function_1 = dl | 0x0C; // Set function, 0 0 1 DL, N, RE(1), BE, LP (Ext Regs)
wim 41:111ca62e8a59 231 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 232 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 233 // N=1 (2 line mode), N=0 (1-line mode)
wim 41:111ca62e8a59 234 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 235 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 41:111ca62e8a59 236 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 237
wim 36:9f5f86dfd44a 238 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 239 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 240 break;
wim 41:111ca62e8a59 241
wim 41:111ca62e8a59 242 default:
wim 41:111ca62e8a59 243 error("Error: LCD Controller type does not support this Display type\n\r");
wim 41:111ca62e8a59 244 break;
wim 36:9f5f86dfd44a 245 } // switch type
wim 36:9f5f86dfd44a 246
wim 36:9f5f86dfd44a 247 // init special features
wim 36:9f5f86dfd44a 248 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 249 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 250 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 251 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 252 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 253 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 254
wim 36:9f5f86dfd44a 255 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 256 // FW=0 (5-dot font, special mode for KS0073)
wim 36:9f5f86dfd44a 257 // BW=0 (Cur BW invert disable, special mode for KS0073)
wim 36:9f5f86dfd44a 258 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0073)
wim 36:9f5f86dfd44a 259
wim 36:9f5f86dfd44a 260 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 36:9f5f86dfd44a 261 // Dotscroll/Display shift enable (Special mode for KS0073)
wim 36:9f5f86dfd44a 262
wim 36:9f5f86dfd44a 263 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 36:9f5f86dfd44a 264 // Scroll quantity (Special mode for KS0073)
wim 36:9f5f86dfd44a 265
wim 36:9f5f86dfd44a 266 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 267 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 268 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 269 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 270 // DH=1 (Disp shift enable/disable, special mode for KS0073)
wim 36:9f5f86dfd44a 271 // REV=0 (Reverse/Normal, special mode for KS0073)
wim 36:9f5f86dfd44a 272 break; // case KS0073 Controller
wim 36:9f5f86dfd44a 273
wim 36:9f5f86dfd44a 274
wim 29:a3663151aa65 275 case KS0078:
wim 29:a3663151aa65 276 // Initialise Display configuration
wim 29:a3663151aa65 277 switch (_type) {
wim 29:a3663151aa65 278 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 279 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 280 // case LCD12x1:
wim 29:a3663151aa65 281 case LCD16x1:
wim 30:033048611c01 282 // case LCD20x1:
wim 29:a3663151aa65 283 case LCD24x1:
wim 41:111ca62e8a59 284 _function = dl | 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 285 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 286 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 287 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 288 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 289 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 290
wim 41:111ca62e8a59 291 _function_1 = dl | 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 292 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 293 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 294 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 295 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 296 // 0
wim 30:033048611c01 297
wim 32:59c4b8f648d4 298 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 299 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 300 break;
wim 29:a3663151aa65 301
wim 36:9f5f86dfd44a 302 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 303 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 304 // case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 305 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 306 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 307 // case LCD20x4D: // Special mode for KS0073, KS0078
wim 30:033048611c01 308 // case LCD24x3D: // Special mode for KS0078
wim 30:033048611c01 309 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 310 case LCD24x4D: // Special mode for KS0078
wim 41:111ca62e8a59 311 _function = dl | 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 312 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 313 // N=0 (dont care for 4 line mode)
wim 32:59c4b8f648d4 314 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 315 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 316 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 317
wim 41:111ca62e8a59 318 _function_1 = dl | 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 319 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 320 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 321 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 322 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 323 // 0
wim 29:a3663151aa65 324
wim 32:59c4b8f648d4 325 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 326 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 30:033048611c01 327 break;
wim 33:900a94bc7585 328
wim 41:111ca62e8a59 329 // case LCD6x2:
wim 41:111ca62e8a59 330 case LCD8x2:
wim 41:111ca62e8a59 331 case LCD16x2:
wim 41:111ca62e8a59 332 // case LCD16x1C:
wim 41:111ca62e8a59 333 case LCD20x2:
wim 41:111ca62e8a59 334 case LCD24x2:
wim 41:111ca62e8a59 335 case LCD32x2:
wim 41:111ca62e8a59 336 case LCD40x2:
wim 30:033048611c01 337 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 41:111ca62e8a59 338 _function = dl | 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 339 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 340 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 341 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 342 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 343 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 344
wim 41:111ca62e8a59 345 _function_1 = dl | 0x0C; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 346 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 347 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 348 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 349 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 350 // 0
wim 30:033048611c01 351
wim 32:59c4b8f648d4 352 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 353 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 354 break;
wim 41:111ca62e8a59 355
wim 41:111ca62e8a59 356 default:
wim 41:111ca62e8a59 357 error("Error: LCD Controller type does not support this Display type\n\r");
wim 41:111ca62e8a59 358 break;
wim 29:a3663151aa65 359 } // switch type
wim 29:a3663151aa65 360
wim 32:59c4b8f648d4 361 // init special features
wim 32:59c4b8f648d4 362 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 363 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 364 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 365 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 366 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 367 // 0
wim 32:59c4b8f648d4 368
wim 32:59c4b8f648d4 369 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 370 // FW=0 (5-dot font, special mode for KS0078)
wim 32:59c4b8f648d4 371 // BW=0 (Cur BW invert disable, special mode for KS0078)
wim 32:59c4b8f648d4 372 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0078)
wim 32:59c4b8f648d4 373
wim 32:59c4b8f648d4 374 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 32:59c4b8f648d4 375 // Dotscroll/Display shift enable (Special mode for KS0078)
wim 32:59c4b8f648d4 376
wim 32:59c4b8f648d4 377 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 32:59c4b8f648d4 378 // Scroll quantity (Special mode for KS0078)
wim 32:59c4b8f648d4 379
wim 32:59c4b8f648d4 380 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 381 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 382 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 383 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 384 // DH=1 (Disp shift enable/disable, special mode for KS0078)
wim 32:59c4b8f648d4 385 // REV=0 (Reverse/Normal, special mode for KS0078)
wim 29:a3663151aa65 386 break; // case KS0078 Controller
wim 29:a3663151aa65 387
wim 26:bd897a001012 388 case ST7032_3V3:
wim 26:bd897a001012 389 // ST7032 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 41:111ca62e8a59 390 // Note: very similar to SPLC792A
wim 26:bd897a001012 391 case ST7032_5V:
wim 32:59c4b8f648d4 392 // ST7032 controller: Disable Voltage booster for VLCD. VDD=5V
wim 41:111ca62e8a59 393
wim 29:a3663151aa65 394 // Initialise Display configuration
wim 29:a3663151aa65 395 switch (_type) {
wim 29:a3663151aa65 396 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 397 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 398 // case LCD12x1:
wim 29:a3663151aa65 399 case LCD16x1:
wim 30:033048611c01 400 // case LCD20x1:
wim 32:59c4b8f648d4 401 case LCD24x1:
wim 32:59c4b8f648d4 402 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=0 (1-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 403 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 404 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 405 break;
wim 28:30fa94f7341c 406
wim 32:59c4b8f648d4 407 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 408 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 409 case LCD12x4D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 410 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 411 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 412 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 413 break;
wim 29:a3663151aa65 414
wim 32:59c4b8f648d4 415 default:
wim 32:59c4b8f648d4 416 // All other LCD types are initialised as 2 Line displays
wim 32:59c4b8f648d4 417 _function = 0x08; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=1 (2-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 418 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 419 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 420 break;
wim 32:59c4b8f648d4 421 } // switch type
wim 32:59c4b8f648d4 422
wim 32:59c4b8f648d4 423 // init special features
wim 33:900a94bc7585 424 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 33:900a94bc7585 425
wim 33:900a94bc7585 426 _writeCommand(0x1C); // Internal OSC frequency adjustment Framefreq=183HZ, Bias will be 1/4 (Instr Set=1)
wim 41:111ca62e8a59 427 // Note: Bias and Osc register not available on SPLC792A
wim 32:59c4b8f648d4 428
wim 32:59c4b8f648d4 429 _contrast = LCD_ST7032_CONTRAST;
wim 32:59c4b8f648d4 430 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast Low bits, 0 1 1 1 C3 C2 C1 C0 (IS=1)
wim 32:59c4b8f648d4 431
wim 32:59c4b8f648d4 432
wim 32:59c4b8f648d4 433 if (_ctrl == ST7032_3V3) {
wim 41:111ca62e8a59 434 // _icon_power = 0x04; // Icon display off (Bit3=0), Booster circuit is turned on (Bit2=1) (IS=1)
wim 41:111ca62e8a59 435 _icon_power = 0x0C; // Icon display on (Bit3=1), Booster circuit is turned on (Bit2=1) (IS=1)
wim 41:111ca62e8a59 436 // Note: Booster circuit always on for SPLC792A, Bit2 is dont care
wim 32:59c4b8f648d4 437 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 438 }
wim 32:59c4b8f648d4 439 else {
wim 36:9f5f86dfd44a 440 // _icon_power = 0x00; // Icon display off, Booster circuit is turned off (IS=1)
wim 36:9f5f86dfd44a 441 _icon_power = 0x08; // Icon display on, Booster circuit is turned off (IS=1)
wim 32:59c4b8f648d4 442 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 443 }
wim 32:59c4b8f648d4 444 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Icon, Booster and Contrast High bits, 0 1 0 1 Ion Bon C5 C4 (IS=1)
wim 32:59c4b8f648d4 445 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 446
wim 32:59c4b8f648d4 447 _writeCommand(0x68 | (LCD_ST7032_RAB & 0x07)); // Voltage follower, 0 1 1 0 FOn=1, Ampl ratio Rab2=1, Rab1=0, Rab0=0 (IS=1)
wim 32:59c4b8f648d4 448 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 449
wim 32:59c4b8f648d4 450 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 451
wim 32:59c4b8f648d4 452 break; // case ST7032_3V3 Controller
wim 32:59c4b8f648d4 453 // case ST7032_5V Controller
wim 32:59c4b8f648d4 454
wim 32:59c4b8f648d4 455 case ST7036_3V3:
wim 32:59c4b8f648d4 456 // ST7036 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 457 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 458 case ST7036_5V:
wim 32:59c4b8f648d4 459 // ST7036 controller: Disable Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 460 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 461
wim 32:59c4b8f648d4 462 // Initialise Display configuration
wim 32:59c4b8f648d4 463 switch (_type) {
wim 32:59c4b8f648d4 464 case LCD8x1: //8x1 is a regular 1 line display
wim 32:59c4b8f648d4 465 case LCD8x2B: //8x2D is a special case of 16x1
wim 32:59c4b8f648d4 466 // case LCD12x1:
wim 32:59c4b8f648d4 467 case LCD16x1:
wim 32:59c4b8f648d4 468 case LCD24x1:
wim 32:59c4b8f648d4 469 _function = 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), DH=0 (5x7font), IS2, IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 470 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 471 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 472
wim 32:59c4b8f648d4 473 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 474 break;
wim 32:59c4b8f648d4 475
wim 32:59c4b8f648d4 476 // case LCD12x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 477 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 478 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 479 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 480 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 481
wim 32:59c4b8f648d4 482 _bias_lines = 0x05; // Bias: 1/5, 3-Lines LCD
wim 32:59c4b8f648d4 483 break;
wim 32:59c4b8f648d4 484
wim 32:59c4b8f648d4 485 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 486 // case LCD16x3D1: // Special mode for SSD1803
wim 30:033048611c01 487 case LCD12x4D: // Special mode for PCF2116
wim 30:033048611c01 488 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 489 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 490 break;
wim 28:30fa94f7341c 491
wim 29:a3663151aa65 492 default:
wim 32:59c4b8f648d4 493 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 494 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 495 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 496 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 497
wim 32:59c4b8f648d4 498 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 499 break;
wim 32:59c4b8f648d4 500 } // switch type
wim 32:59c4b8f648d4 501
wim 29:a3663151aa65 502
wim 32:59c4b8f648d4 503 // init special features
wim 33:900a94bc7585 504 _writeCommand(0x20 | _function | 0x01); // Set function, IS2,IS1 = 01 (Select Instr Set = 1)
wim 32:59c4b8f648d4 505 _writeCommand(0x10 | _bias_lines); // Set Bias and 1,2 or 3 lines (Instr Set 1)
wim 29:a3663151aa65 506
wim 32:59c4b8f648d4 507 _contrast = LCD_ST7036_CONTRAST;
wim 32:59c4b8f648d4 508 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast, 0 1 1 1 C3 C2 C1 C0 (Instr Set 1)
wim 32:59c4b8f648d4 509
wim 32:59c4b8f648d4 510 if (_ctrl == ST7036_3V3) {
wim 36:9f5f86dfd44a 511 _icon_power = 0x0C; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=1 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 512 // _icon_power = 0x04; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=1 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 513 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 514 }
wim 32:59c4b8f648d4 515 else {
wim 36:9f5f86dfd44a 516 _icon_power = 0x08; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=0 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 517 // _icon_power = 0x00; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=0 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 518 }
wim 29:a3663151aa65 519
wim 32:59c4b8f648d4 520 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Contrast C5, C4 (Instr Set 1)
wim 32:59c4b8f648d4 521 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 522
wim 32:59c4b8f648d4 523 _writeCommand(0x68 | (LCD_ST7036_RAB & 0x07)); // Voltagefollower On = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 0 1 (Instr Set 1)
wim 32:59c4b8f648d4 524 wait_ms(10); // Wait 10ms to ensure powered up
wim 28:30fa94f7341c 525
wim 32:59c4b8f648d4 526 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instruction Set = 0)
wim 32:59c4b8f648d4 527
wim 32:59c4b8f648d4 528 break; // case ST7036_3V3 Controller
wim 32:59c4b8f648d4 529 // case ST7036_5V Controller
wim 36:9f5f86dfd44a 530
wim 36:9f5f86dfd44a 531 case ST7070:
wim 36:9f5f86dfd44a 532 // Initialise Display configuration
wim 36:9f5f86dfd44a 533 switch (_type) {
wim 36:9f5f86dfd44a 534 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 535 case LCD8x2B: //8x2D is a special case of 16x1
wim 36:9f5f86dfd44a 536 // case LCD12x1:
wim 36:9f5f86dfd44a 537 case LCD16x1:
wim 36:9f5f86dfd44a 538 case LCD24x1:
wim 36:9f5f86dfd44a 539 _function = dl | 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 540 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 541 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 542 break;
wim 36:9f5f86dfd44a 543
wim 36:9f5f86dfd44a 544 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 36:9f5f86dfd44a 545 // case LCD16x3D1: // Special mode for SSD1803
wim 36:9f5f86dfd44a 546 case LCD12x4D: // Special mode for PCF2116
wim 36:9f5f86dfd44a 547 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 548 // case LCD12x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 549 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 550 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 551 break;
wim 36:9f5f86dfd44a 552
wim 36:9f5f86dfd44a 553 default:
wim 36:9f5f86dfd44a 554 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 555 _function = dl | 0x08; // Set function, 0 0 1 DL, N=1 (2 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 556 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 557 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 558 break;
wim 36:9f5f86dfd44a 559 } // switch type
wim 36:9f5f86dfd44a 560
wim 36:9f5f86dfd44a 561 // _writeCommand(0x00); // NOP, make sure to sync SPI
wim 36:9f5f86dfd44a 562
wim 36:9f5f86dfd44a 563 // init special features
wim 36:9f5f86dfd44a 564 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 565
wim 36:9f5f86dfd44a 566 _writeCommand(0x04 | 0x00); // Set Bias resistors 0 0 0 0 0 1 Rb1,Rb0= 0 0 (Extern Res) (Instr Set 1)
wim 36:9f5f86dfd44a 567
wim 36:9f5f86dfd44a 568 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 569 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 570 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 571
wim 36:9f5f86dfd44a 572 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 573
wim 36:9f5f86dfd44a 574 break; // case ST7070 Controller
wim 36:9f5f86dfd44a 575
wim 32:59c4b8f648d4 576 case SSD1803_3V3:
wim 32:59c4b8f648d4 577 // SSD1803 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 578 // Note: supports 1,2, 3 or 4 lines
wim 32:59c4b8f648d4 579 // case SSD1803_5V:
wim 32:59c4b8f648d4 580 // SSD1803 controller: No Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 581
wim 29:a3663151aa65 582 // Initialise Display configuration
wim 29:a3663151aa65 583 switch (_type) {
wim 29:a3663151aa65 584 case LCD8x1: //8x1 is a regular 1 line display
wim 30:033048611c01 585 case LCD8x2B: //8x2D is a special case of 16x1
wim 29:a3663151aa65 586 // case LCD12x1:
wim 29:a3663151aa65 587 case LCD16x1:
wim 29:a3663151aa65 588 case LCD24x1:
wim 32:59c4b8f648d4 589 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 590 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 591 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 592 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 593 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 594 // DH=0 Double Height disable
wim 32:59c4b8f648d4 595 // IS=0
wim 32:59c4b8f648d4 596
wim 33:900a94bc7585 597 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 598 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 599 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 600 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 601 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 602 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 603 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 604
wim 32:59c4b8f648d4 605 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 606 // NW=0 1-Line LCD (N=0)
wim 29:a3663151aa65 607 break;
wim 32:59c4b8f648d4 608
wim 33:900a94bc7585 609 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 610 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 611 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 612 // case LCD16x3D1: // Special mode for SSD1803
wim 32:59c4b8f648d4 613 // case LCD20x3D: // Special mode for SSD1803
wim 32:59c4b8f648d4 614 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 615 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 616 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 617 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 618 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 619 // DH=0 Double Height disable
wim 32:59c4b8f648d4 620 // IS=0
wim 32:59c4b8f648d4 621
wim 33:900a94bc7585 622 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 623 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 624 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 625 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 626 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 627 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 628 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 629
wim 32:59c4b8f648d4 630 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 631 // NW=1 3-Line LCD (N=0)
wim 29:a3663151aa65 632 break;
wim 30:033048611c01 633
wim 39:e9c2319de9c5 634 // case LCD10x2D: // Special mode for SSD1803, 4-line mode but switch to double height font
wim 39:e9c2319de9c5 635 case LCD10x4D: // Special mode for SSD1803
wim 32:59c4b8f648d4 636 case LCD20x4D: // Special mode for SSD1803
wim 32:59c4b8f648d4 637 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 638 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 639 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 640 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 641 // N=1 4 Line
wim 32:59c4b8f648d4 642 // DH=0 Double Height disable
wim 32:59c4b8f648d4 643 // IS=0
wim 32:59c4b8f648d4 644
wim 33:900a94bc7585 645 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 646 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 647 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 648 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 649 // N=1 4 Line
wim 32:59c4b8f648d4 650 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 651 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 652
wim 32:59c4b8f648d4 653 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 654 // NW=1 4-Line LCD (N=1)
wim 32:59c4b8f648d4 655 break;
wim 32:59c4b8f648d4 656
wim 33:900a94bc7585 657 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 658 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 659 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 660 break;
wim 30:033048611c01 661
wim 29:a3663151aa65 662 default:
wim 30:033048611c01 663 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 664 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 665 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 666 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 667 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 668 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 669 // DH=0 Double Height disable
wim 36:9f5f86dfd44a 670 // RE=0
wim 32:59c4b8f648d4 671 // IS=0
wim 29:a3663151aa65 672
wim 33:900a94bc7585 673 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 674 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 675 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 676 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 677 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 678 // BE=0 Blink Enable off, special feature of SSD1803
wim 36:9f5f86dfd44a 679 // RE=1
wim 32:59c4b8f648d4 680 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 681
wim 32:59c4b8f648d4 682 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 683 // NW=0 2-Line LCD (N=1)
wim 32:59c4b8f648d4 684 break;
wim 32:59c4b8f648d4 685 } // switch type
wim 32:59c4b8f648d4 686
wim 32:59c4b8f648d4 687
wim 32:59c4b8f648d4 688 // init special features
wim 33:900a94bc7585 689 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 690 // Select Extended Instruction Set
wim 33:900a94bc7585 691
wim 33:900a94bc7585 692 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 693 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 694 wait_ms(5); // Wait to ensure completion or SSD1803 fails to set Top/Bottom after reset..
wim 33:900a94bc7585 695
wim 33:900a94bc7585 696 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 32:59c4b8f648d4 697
wim 32:59c4b8f648d4 698 _writeCommand(0x10); // Double Height and Bias, 0 0 0 1 UD2=0, UD1=0, BS1=0 Bias 1/5, DH=0 (Ext Instr Set)
wim 32:59c4b8f648d4 699
wim 32:59c4b8f648d4 700 // _writeCommand(0x76); // Set TC Control, 0 1 1 1 0 1 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 701 // _writeData(0x02); // Set TC data, 0 0 0 0 0 TC2,TC1,TC0 = 0 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 702
wim 32:59c4b8f648d4 703 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS=1 Select Instruction Set 1
wim 32:59c4b8f648d4 704 // Select Std Instr set, Select IS=1
wim 32:59c4b8f648d4 705
wim 32:59c4b8f648d4 706 _contrast = LCD_SSD1_CONTRAST;
wim 32:59c4b8f648d4 707 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast 0 1 1 1 C3, C2, C1, C0 (Instr Set 1)
wim 32:59c4b8f648d4 708
wim 36:9f5f86dfd44a 709 // _icon_power = 0x04; // Icon off, Booster on (Instr Set 1)
wim 36:9f5f86dfd44a 710 _icon_power = 0x0C; // Icon on, Booster on (Instr Set 1)
wim 32:59c4b8f648d4 711 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 712 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Power, Icon and Contrast, 0 1 0 1 Ion Bon C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 713 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 714
wim 32:59c4b8f648d4 715 _writeCommand(0x68 | (LCD_SSD1_RAB & 0x07)); // Set Voltagefollower 0 1 1 0 Don = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 1 0 (Instr Set 1)
wim 32:59c4b8f648d4 716 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 717
wim 33:900a94bc7585 718 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 719 // Select Extended Instruction Set 1
wim 32:59c4b8f648d4 720 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set 1)
wim 32:59c4b8f648d4 721
wim 32:59c4b8f648d4 722
wim 32:59c4b8f648d4 723 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 32:59c4b8f648d4 724 // Select Std Instr set, Select IS=0
wim 32:59c4b8f648d4 725
wim 32:59c4b8f648d4 726 break; // case SSD1803 Controller
wim 32:59c4b8f648d4 727
wim 29:a3663151aa65 728
wim 32:59c4b8f648d4 729 // Note1: The PCF21XX family of controllers has several types that dont have an onboard voltage generator for V-LCD.
wim 32:59c4b8f648d4 730 // You must supply this LCD voltage externally and not try to enable VGen.
wim 32:59c4b8f648d4 731 // Note2: The early versions of PCF2116 controllers (eg PCF2116C) can not generate sufficiently negative voltage for the LCD at a VDD of 3V3.
wim 32:59c4b8f648d4 732 // You must supply this voltage externally and not enable VGen or you must use a higher VDD (e.g. 5V) and enable VGen.
wim 32:59c4b8f648d4 733 // More recent versions of the controller (eg PCF2116K) have an improved VGen that will work with 3V3.
wim 32:59c4b8f648d4 734 // Note3: See datasheet, PCF2116 and other types provide a V0 pin to control the LCD contrast voltage that is provided by VGen. This pins allows
wim 32:59c4b8f648d4 735 // contrast control similar to that of pin 3 on the standard 14pin LCD module connector.
wim 32:59c4b8f648d4 736 // You can disable VGen by connecting Vo to VDD. VLCD will then be used directly as LCD voltage.
wim 32:59c4b8f648d4 737 // Note4: PCF2113 and PCF2119 are different wrt to VLCD generator! There is no V0 pin. The contrast voltage is software controlled by setting the VA and VB registers.
wim 32:59c4b8f648d4 738 // Vgen is automatically switched off when the contrast voltage VA or VB is set to 0x00. Note that certain limits apply to allowed values for VA and VB.
wim 32:59c4b8f648d4 739 // Note5: See datasheet, members of the PCF21XX family support different numbers of rows/columns. Not all can support 3 or 4 rows.
wim 32:59c4b8f648d4 740 // Note6: See datasheet, the PCF21XX-C and PCF21XX-K use a non-standard character set. This may result is strange looking text when not corrected..
wim 32:59c4b8f648d4 741
wim 34:e5a0dcb43ecc 742 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 743 // PCF2103 controller: No Voltage generator for VLCD, VDD=3V3..5V, VLCD input controls contrast voltage.
wim 34:e5a0dcb43ecc 744 // Initialise Display configuration
wim 34:e5a0dcb43ecc 745 switch (_type) {
wim 34:e5a0dcb43ecc 746 case LCD24x1:
wim 34:e5a0dcb43ecc 747 _function = 0x00; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=0 1-line/24 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 748 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 749 break;
wim 34:e5a0dcb43ecc 750
wim 34:e5a0dcb43ecc 751 // case LCD12x1D: //Special mode for PCF21XX, Only top line used
wim 34:e5a0dcb43ecc 752 case LCD12x2:
wim 34:e5a0dcb43ecc 753 _function = 0x04; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/12 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 754 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 755 break;
wim 34:e5a0dcb43ecc 756
wim 34:e5a0dcb43ecc 757 default:
wim 34:e5a0dcb43ecc 758 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 759 break;
wim 34:e5a0dcb43ecc 760
wim 34:e5a0dcb43ecc 761 } // switch type
wim 34:e5a0dcb43ecc 762
wim 34:e5a0dcb43ecc 763 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 764 wait_ms(10); // Wait 10ms to ensure powered up
wim 34:e5a0dcb43ecc 765
wim 34:e5a0dcb43ecc 766 // Note: Display from GA628 shows 12 chars. This is actually the right half of a 24x1 display. The commons have been connected in reverse order.
wim 34:e5a0dcb43ecc 767 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 768
wim 34:e5a0dcb43ecc 769 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 770 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no Icon blink), 0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 771
wim 34:e5a0dcb43ecc 772 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 773
wim 36:9f5f86dfd44a 774 #if(0)
wim 34:e5a0dcb43ecc 775 // Select CG RAM
wim 34:e5a0dcb43ecc 776 _writeCommand(0x40); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 777 // Store UDC/Icon pattern:
wim 34:e5a0dcb43ecc 778 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 34:e5a0dcb43ecc 779 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 34:e5a0dcb43ecc 780 for (int i=0; i<(8 * 8); i++) {
wim 34:e5a0dcb43ecc 781 // _writeData(0x1F); // All On
wim 34:e5a0dcb43ecc 782 _writeData(0x00); // All Off
wim 34:e5a0dcb43ecc 783 }
wim 36:9f5f86dfd44a 784 #endif
wim 34:e5a0dcb43ecc 785 break; // case PCF2103_3V3 Controller
wim 34:e5a0dcb43ecc 786
wim 30:033048611c01 787 case PCF2113_3V3:
wim 32:59c4b8f648d4 788 // PCF2113 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 29:a3663151aa65 789 // Initialise Display configuration
wim 29:a3663151aa65 790 switch (_type) {
wim 29:a3663151aa65 791 // case LCD12x1:
wim 33:900a94bc7585 792 // _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/12 chars display mode, SL=1, IS=0
wim 32:59c4b8f648d4 793 // Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 794 case LCD24x1:
wim 33:900a94bc7585 795 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/24 chars display mode, SL=0, IS=0
wim 32:59c4b8f648d4 796 // Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 797 break;
wim 30:033048611c01 798
wim 30:033048611c01 799 case LCD12x2:
wim 33:900a94bc7585 800 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=1 2-line/12 chars display mode, SL=0, IS=0
wim 30:033048611c01 801 break;
wim 30:033048611c01 802
wim 30:033048611c01 803 default:
wim 30:033048611c01 804 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 805 break;
wim 30:033048611c01 806
wim 30:033048611c01 807 } // switch type
wim 30:033048611c01 808
wim 32:59c4b8f648d4 809 // Init special features
wim 33:900a94bc7585 810 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 33:900a94bc7585 811
wim 33:900a94bc7585 812 _writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim 33:900a94bc7585 813 _writeCommand(0x10); // Temp Compensation Set 0001 0, 0, TC1=0, TC2=0 (Instr. Set 1)
wim 33:900a94bc7585 814 // _writeCommand(0x42); // HV GEN 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 33:900a94bc7585 815 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV Gen 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 32:59c4b8f648d4 816
wim 32:59c4b8f648d4 817 _contrast = LCD_PCF2_CONTRAST;
wim 33:900a94bc7585 818 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=0, VA=contrast
wim 33:900a94bc7585 819 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=1, VB=contrast
wim 32:59c4b8f648d4 820 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 821
wim 33:900a94bc7585 822 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 33:900a94bc7585 823 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no icon blink) DM=0 (no direct mode) (Instr. Set 1)
wim 33:900a94bc7585 824
wim 33:900a94bc7585 825 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 32:59c4b8f648d4 826
wim 30:033048611c01 827 break; // case PCF2113_3V3 Controller
wim 30:033048611c01 828
wim 30:033048611c01 829
wim 32:59c4b8f648d4 830 // case PCF2113_5V:
wim 32:59c4b8f648d4 831 // PCF2113 controller: No Voltage generator for VLCD. VDD=5V. Contrast voltage controlled by VA or VB.
wim 32:59c4b8f648d4 832 //@TODO
wim 32:59c4b8f648d4 833
wim 30:033048611c01 834
wim 30:033048611c01 835 case PCF2116_3V3:
wim 32:59c4b8f648d4 836 // PCF2116 controller: Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 30:033048611c01 837 // Initialise Display configuration
wim 30:033048611c01 838 switch (_type) {
wim 30:033048611c01 839 // case LCD12x1:
wim 30:033048611c01 840 // case LCD12x2:
wim 30:033048611c01 841 case LCD24x1:
wim 34:e5a0dcb43ecc 842 _writeCommand(0x22); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=1 Vgen on, 0
wim 29:a3663151aa65 843 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 844 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 845 break;
wim 29:a3663151aa65 846
wim 32:59c4b8f648d4 847 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 848 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 849 case LCD12x4D: // Special mode for PCF21XX:
wim 34:e5a0dcb43ecc 850 _writeCommand(0x2E); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 851 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 852 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 853 break;
wim 30:033048611c01 854
wim 30:033048611c01 855 case LCD24x2:
wim 34:e5a0dcb43ecc 856 _writeCommand(0x2A); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=0 2-line/24 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 857 //Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 858 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 859 break;
wim 32:59c4b8f648d4 860
wim 30:033048611c01 861 default:
wim 30:033048611c01 862 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 863 break;
wim 30:033048611c01 864
wim 29:a3663151aa65 865 } // switch type
wim 29:a3663151aa65 866
wim 30:033048611c01 867 break; // case PCF2116_3V3 Controller
wim 29:a3663151aa65 868
wim 32:59c4b8f648d4 869
wim 32:59c4b8f648d4 870 //Experimental for cellphone 3-line display, SA=0x74, No Ack supported, Character set C or K, DL = 8 bit, N=0,M=1 (reserved mode !!), external VLCD -2V5
wim 32:59c4b8f648d4 871 //@TODO
wim 32:59c4b8f648d4 872 case PCF2116_5V:
wim 32:59c4b8f648d4 873 // PCF2116 controller: No Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 32:59c4b8f648d4 874 // Initialise Display configuration
wim 32:59c4b8f648d4 875 switch (_type) {
wim 32:59c4b8f648d4 876 // case LCD12x1:
wim 32:59c4b8f648d4 877 // case LCD12x2:
wim 32:59c4b8f648d4 878 // case LCD24x1:
wim 34:e5a0dcb43ecc 879 // _writeCommand(0x20); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=0 no Vgen, 0
wim 32:59c4b8f648d4 880 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 881 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 882 // break;
wim 32:59c4b8f648d4 883
wim 32:59c4b8f648d4 884 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 885 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 886 case LCD12x4D: // Special mode for PCF21XX:
wim 32:59c4b8f648d4 887 // _writeCommand(0x34); //FUNCTION SET 8 bit, N=0/M=1 4-line/12 chars display mode OK
wim 32:59c4b8f648d4 888 // _writeCommand(0x24); //FUNCTION SET 4 bit, N=0/M=1 4-line/12 chars display mode OK
wim 34:e5a0dcb43ecc 889 _writeCommand(0x2C); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=0 no Vgen, 0 OK
wim 32:59c4b8f648d4 890 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 891 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 892 break;
wim 32:59c4b8f648d4 893
wim 32:59c4b8f648d4 894 // case LCD24x2:
wim 32:59c4b8f648d4 895 // _writeCommand(0x28); //FUNCTION SET 4 bit, N=1/M=0 2-line/24 chars display mode
wim 32:59c4b8f648d4 896 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 897 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 898 // break;
wim 32:59c4b8f648d4 899
wim 32:59c4b8f648d4 900 default:
wim 32:59c4b8f648d4 901 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 902 break;
wim 32:59c4b8f648d4 903
wim 32:59c4b8f648d4 904 } // switch type
wim 32:59c4b8f648d4 905
wim 32:59c4b8f648d4 906 break; // case PCF2116_5V Controller
wim 32:59c4b8f648d4 907
wim 32:59c4b8f648d4 908 case PCF2119_3V3:
wim 39:e9c2319de9c5 909 case PCF2119R_3V3:
wim 32:59c4b8f648d4 910 // PCF2119 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 911 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 912 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 32:59c4b8f648d4 913
wim 32:59c4b8f648d4 914 //POR or Hardware Reset should be applied
wim 32:59c4b8f648d4 915 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 916
wim 32:59c4b8f648d4 917 // Initialise Display configuration
wim 32:59c4b8f648d4 918 switch (_type) {
wim 32:59c4b8f648d4 919 case LCD8x1:
wim 32:59c4b8f648d4 920 // case LCD12x1:
wim 32:59c4b8f648d4 921 case LCD16x1:
wim 34:e5a0dcb43ecc 922 _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/16 chars display mode, SL=1
wim 32:59c4b8f648d4 923 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 924 break;
wim 32:59c4b8f648d4 925
wim 32:59c4b8f648d4 926 case LCD24x1:
wim 32:59c4b8f648d4 927 // case LCD32x1:
wim 34:e5a0dcb43ecc 928 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/32 chars display mode, SL=0
wim 32:59c4b8f648d4 929 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 930 break;
wim 32:59c4b8f648d4 931
wim 32:59c4b8f648d4 932 case LCD8x2:
wim 32:59c4b8f648d4 933 // case LCD12x2:
wim 32:59c4b8f648d4 934 case LCD16x2:
wim 34:e5a0dcb43ecc 935 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/16 chars display mode, SL=0
wim 32:59c4b8f648d4 936 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 937 break;
wim 32:59c4b8f648d4 938
wim 32:59c4b8f648d4 939 default:
wim 32:59c4b8f648d4 940 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 941 break;
wim 32:59c4b8f648d4 942
wim 32:59c4b8f648d4 943 } // switch type
wim 32:59c4b8f648d4 944
wim 32:59c4b8f648d4 945 // Init special features
wim 32:59c4b8f648d4 946 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 947
wim 39:e9c2319de9c5 948 // _writeCommand(0x04); // DISP CONF SET (Instr. Set 1) 0000, 0, 1, P=0, Q=0 (IC at Bottom)
wim 39:e9c2319de9c5 949 // _writeCommand(0x05); // Display Conf Set 0000, 0, 1, P=0, Q=1
wim 39:e9c2319de9c5 950 // _writeCommand(0x06); // Display Conf Set 0000, 0, 1, P=1, Q=0
wim 39:e9c2319de9c5 951 _writeCommand(0x07); // Display Conf Set 0000, 0, 1, P=1, Q=1 (IC at Top)
wim 39:e9c2319de9c5 952
wim 32:59c4b8f648d4 953 _writeCommand(0x10); // TEMP CTRL SET (Instr. Set 1) 0001, 0, 0, TC1=0, TC2=0
wim 32:59c4b8f648d4 954 // _writeCommand(0x42); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 955 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 956
wim 32:59c4b8f648d4 957 _contrast = LCD_PCF2_CONTRAST;
wim 32:59c4b8f648d4 958 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 959 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 960 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 961
wim 32:59c4b8f648d4 962 _writeCommand(0x02); // SCRN CONF (Instr. Set 1) L=0
wim 32:59c4b8f648d4 963 _writeCommand(0x08); // ICON CONF (Instr. Set 1) IM=0 (Char mode) IB=0 (no icon blink) DM=0 (no direct mode)
wim 32:59c4b8f648d4 964
wim 32:59c4b8f648d4 965 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 966
wim 32:59c4b8f648d4 967 break; // case PCF2119_3V3 Controller
wim 32:59c4b8f648d4 968
wim 32:59c4b8f648d4 969 // case PCF2119_5V:
wim 32:59c4b8f648d4 970 // PCF2119 controller: No Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 971 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 972 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 30:033048611c01 973 //@TODO
wim 29:a3663151aa65 974
wim 19:c747b9e2e7b8 975 case WS0010:
wim 19:c747b9e2e7b8 976 // WS0010 OLED controller: Initialise DC/DC Voltage converter for LEDs
wim 30:033048611c01 977 // Note1: Identical to RS0010
wim 30:033048611c01 978 // Note2: supports 1 or 2 lines (and 16x100 graphics)
wim 30:033048611c01 979 // supports 4 fonts (English/Japanese (default), Western European-I, English/Russian, Western European-II)
wim 19:c747b9e2e7b8 980 // Cursor/Disp shift set 0001 SC RL 0 0
wim 19:c747b9e2e7b8 981 //
wim 30:033048611c01 982 // Mode and Power set 0001 GC PWR 1 1
wim 19:c747b9e2e7b8 983 // GC = 0 (Graph Mode=1, Char Mode=0)
wim 30:033048611c01 984 // PWR = 1 (DC/DC On/Off)
wim 30:033048611c01 985
wim 30:033048611c01 986 //@Todo: This may be needed to enable a warm reboot
wim 32:59c4b8f648d4 987 //_writeCommand(0x13); // Char mode, DC/DC off
wim 30:033048611c01 988 //wait_ms(10); // Wait 10ms to ensure powered down
wim 32:59c4b8f648d4 989 _writeCommand(0x17); // Char mode, DC/DC on
wim 30:033048611c01 990 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 991
wim 29:a3663151aa65 992 // Initialise Display configuration
wim 29:a3663151aa65 993 switch (_type) {
wim 29:a3663151aa65 994 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 995 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 996 // case LCD12x1:
wim 29:a3663151aa65 997 case LCD16x1:
wim 30:033048611c01 998 case LCD24x1:
wim 30:033048611c01 999 _writeCommand(0x20); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 1000 // DL=0 (4 bits bus)
wim 30:033048611c01 1001 // N=0 (1 line)
wim 30:033048611c01 1002 // F=0 (5x7 dots font)
wim 30:033048611c01 1003 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 1004 break;
wim 30:033048611c01 1005
wim 32:59c4b8f648d4 1006 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1007 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 1008 case LCD12x4D: // Special mode for PCF21XX:
wim 33:900a94bc7585 1009 case LCD16x3G: // Special mode for ST7036
wim 30:033048611c01 1010 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 1011 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 1012 break;
wim 29:a3663151aa65 1013
wim 29:a3663151aa65 1014 default:
wim 30:033048611c01 1015 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 30:033048611c01 1016 _writeCommand(0x28); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 1017 // DL=0 (4 bits bus)
wim 30:033048611c01 1018 // N=1 (2 lines)
wim 30:033048611c01 1019 // F=0 (5x7 dots font)
wim 30:033048611c01 1020 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 1021
wim 29:a3663151aa65 1022 break;
wim 29:a3663151aa65 1023 } // switch type
wim 29:a3663151aa65 1024
wim 32:59c4b8f648d4 1025 break; // case WS0010 Controller
wim 33:900a94bc7585 1026
wim 33:900a94bc7585 1027
wim 33:900a94bc7585 1028 case US2066_3V3:
wim 33:900a94bc7585 1029 // US2066/SSD1311 OLED controller, Initialise for VDD=3V3
wim 33:900a94bc7585 1030 // Note: supports 1,2, 3 or 4 lines
wim 33:900a94bc7585 1031 // case USS2066_5V:
wim 33:900a94bc7585 1032 // US2066 controller, VDD=5V
wim 33:900a94bc7585 1033
wim 33:900a94bc7585 1034 // Initialise Display configuration
wim 33:900a94bc7585 1035 switch (_type) {
wim 33:900a94bc7585 1036 case LCD8x1: //8x1 is a regular 1 line display
wim 33:900a94bc7585 1037 case LCD8x2B: //8x2D is a special case of 16x1
wim 33:900a94bc7585 1038 // case LCD12x1:
wim 33:900a94bc7585 1039 case LCD16x1:
wim 33:900a94bc7585 1040 // case LCD20x1:
wim 33:900a94bc7585 1041 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1042 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1043 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1044 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1045 // DH=0 Double Height disable
wim 33:900a94bc7585 1046 // IS=0
wim 33:900a94bc7585 1047
wim 33:900a94bc7585 1048 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1049 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1050 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1051 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1052 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1053 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1054
wim 33:900a94bc7585 1055 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1056 // NW=0 1-Line LCD (N=0)
wim 33:900a94bc7585 1057 break;
wim 33:900a94bc7585 1058
wim 33:900a94bc7585 1059 case LCD16x1C:
wim 33:900a94bc7585 1060 case LCD8x2:
wim 33:900a94bc7585 1061 case LCD16x2:
wim 33:900a94bc7585 1062 case LCD20x2:
wim 33:900a94bc7585 1063 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1064 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1065 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1066 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1067 // DH=0 Double Height disable
wim 33:900a94bc7585 1068 // IS=0
wim 33:900a94bc7585 1069
wim 33:900a94bc7585 1070 _function_1 = 0x0A; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1071 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1072 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1073 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1074 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1075 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1076
wim 33:900a94bc7585 1077 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1078 // NW=0 2-Line LCD (N=1)
wim 33:900a94bc7585 1079 break;
wim 33:900a94bc7585 1080
wim 33:900a94bc7585 1081 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1082 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1083 case LCD16x3D: // Special mode for KS0078, SSD1803 and US2066
wim 33:900a94bc7585 1084 // case LCD16x3D1: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1085 // case LCD20x3D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1086 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1087 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1088 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1089 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1090 // DH=0 Double Height disable
wim 33:900a94bc7585 1091 // IS=0
wim 33:900a94bc7585 1092
wim 33:900a94bc7585 1093 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1094 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1095 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1096 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1097 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1098 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1099
wim 33:900a94bc7585 1100 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1101 // NW=1 3-Line LCD (N=0)
wim 33:900a94bc7585 1102 break;
wim 33:900a94bc7585 1103
wim 33:900a94bc7585 1104 case LCD20x4D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1105 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1106 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1107 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1108 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1109 // DH=0 Double Height disable
wim 33:900a94bc7585 1110 // IS=0
wim 33:900a94bc7585 1111
wim 33:900a94bc7585 1112 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1113 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1114 // DL=0 bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1115 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1116 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1117 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1118
wim 33:900a94bc7585 1119 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1120 // NW=1 4-Line LCD (N=1)
wim 33:900a94bc7585 1121 break;
wim 33:900a94bc7585 1122
wim 33:900a94bc7585 1123 // case LCD24x1:
wim 33:900a94bc7585 1124 // case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 1125 // case LCD24x4D: // Special mode for KS0078
wim 33:900a94bc7585 1126 default:
wim 33:900a94bc7585 1127 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 1128 break;
wim 33:900a94bc7585 1129
wim 33:900a94bc7585 1130 } // switch type
wim 33:900a94bc7585 1131
wim 34:e5a0dcb43ecc 1132 _writeCommand(0x00); // NOP, make sure to sync SPI
wim 33:900a94bc7585 1133
wim 33:900a94bc7585 1134 // init special features
wim 33:900a94bc7585 1135 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1136 // Select Extended Instruction Set
wim 33:900a94bc7585 1137
wim 33:900a94bc7585 1138 _writeCommand(0x71); // Function Select A: 0 1 1 1 0 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1139 _writeData(0x00); // Disable Internal VDD
wim 33:900a94bc7585 1140
wim 33:900a94bc7585 1141 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1142
wim 33:900a94bc7585 1143 _writeCommand(0xD5); // Display Clock Divide Ratio: 1 1 0 1 0 1 0 1 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1144 _writeCommand(0x70); // Display Clock Divide Ratio value: 0 1 1 1 0 0 0 0 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1145
wim 33:900a94bc7585 1146 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1147
wim 33:900a94bc7585 1148 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 1149 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 1150
wim 33:900a94bc7585 1151 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 33:900a94bc7585 1152
wim 34:e5a0dcb43ecc 1153 // _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 33:900a94bc7585 1154 // // Default
wim 33:900a94bc7585 1155
wim 33:900a94bc7585 1156 _writeCommand(0x72); // Function Select B: 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 33:900a94bc7585 1157 _writeData(0x01); // Select ROM A (CGRAM 8, CGROM 248)
wim 33:900a94bc7585 1158
wim 33:900a94bc7585 1159 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1160
wim 33:900a94bc7585 1161 _writeCommand(0xDA); // Set Segm Pins Config: 1 1 0 1 1 0 1 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1162 _writeCommand(0x10); // Set Segm Pins Config value: Altern Odd/Even, Disable Remap (Ext Instr Set, OLED)
wim 33:900a94bc7585 1163
wim 33:900a94bc7585 1164 _writeCommand(0xDC); // Function Select C: 1 1 0 1 1 1 0 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1165 // _writeCommand(0x00); // Set internal VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1166 _writeCommand(0x80); // Set external VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1167
wim 33:900a94bc7585 1168 _contrast = LCD_US20_CONTRAST;
wim 33:900a94bc7585 1169 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1170 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits, use 6 bits for compatibility
wim 33:900a94bc7585 1171
wim 33:900a94bc7585 1172 _writeCommand(0xD9); // Set Phase Length: 1 1 0 1 1 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1173 _writeCommand(0xF1); // Set Phase Length Value:
wim 33:900a94bc7585 1174
wim 33:900a94bc7585 1175 _writeCommand(0xDB); // Set VCOMH Deselect Lvl: 1 1 0 1 1 0 1 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1176 _writeCommand(0x30); // Set VCOMH Deselect Value: 0.83 x VCC
wim 33:900a94bc7585 1177
wim 33:900a94bc7585 1178 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 1179
wim 33:900a94bc7585 1180 //Test Fade/Blinking. Hard Blink on/off, No fade in/out ??
wim 33:900a94bc7585 1181 // _writeCommand(0x23); // Set (Ext Instr Set, OLED)
wim 33:900a94bc7585 1182 // _writeCommand(0x3F); // Set interval 128 frames
wim 33:900a94bc7585 1183 //End Test Blinking
wim 33:900a94bc7585 1184
wim 33:900a94bc7585 1185 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1186
wim 33:900a94bc7585 1187 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 X N DH RE(0) IS=1 Select Instruction Set 1
wim 33:900a94bc7585 1188 // Select Std Instr set, Select IS=1
wim 33:900a94bc7585 1189
wim 33:900a94bc7585 1190 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1191 // Select Ext Instr Set, IS=1
wim 33:900a94bc7585 1192 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set, IS=1)
wim 33:900a94bc7585 1193
wim 33:900a94bc7585 1194 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 1195 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1196 break; // case US2066/SSD1311 Controller
wim 33:900a94bc7585 1197
wim 34:e5a0dcb43ecc 1198 //not yet tested on hardware
wim 34:e5a0dcb43ecc 1199 case PT6314 :
wim 34:e5a0dcb43ecc 1200 // Initialise Display configuration
wim 34:e5a0dcb43ecc 1201 switch (_type) {
wim 34:e5a0dcb43ecc 1202 case LCD8x1: //8x1 is a regular 1 line display
wim 34:e5a0dcb43ecc 1203 case LCD8x2B: //8x2B is a special case of 16x1
wim 34:e5a0dcb43ecc 1204 // case LCD12x1:
wim 34:e5a0dcb43ecc 1205 case LCD16x1:
wim 34:e5a0dcb43ecc 1206 case LCD20x1:
wim 34:e5a0dcb43ecc 1207 case LCD24x1:
wim 34:e5a0dcb43ecc 1208 _function = 0x00; // Function set 001 DL N X BR1 BR0
wim 34:e5a0dcb43ecc 1209 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1210 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1211 // N=0 (1 line)
wim 34:e5a0dcb43ecc 1212 // X
wim 34:e5a0dcb43ecc 1213 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1214 // BR0=0
wim 34:e5a0dcb43ecc 1215 // 0x0 = 100%
wim 34:e5a0dcb43ecc 1216 // 0x1 = 75%
wim 34:e5a0dcb43ecc 1217 // 0x2 = 50%
wim 34:e5a0dcb43ecc 1218 // 0x3 = 25%
wim 34:e5a0dcb43ecc 1219
wim 34:e5a0dcb43ecc 1220 break;
wim 34:e5a0dcb43ecc 1221
wim 34:e5a0dcb43ecc 1222 // All other valid LCD types are initialised as 2 Line displays
wim 34:e5a0dcb43ecc 1223 case LCD8x2:
wim 34:e5a0dcb43ecc 1224 case LCD16x2:
wim 34:e5a0dcb43ecc 1225 case LCD20x2:
wim 34:e5a0dcb43ecc 1226 case LCD24x2:
wim 34:e5a0dcb43ecc 1227 _function = 0x08; // Function set 001 DL N X BR1 BR2
wim 34:e5a0dcb43ecc 1228 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1229 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1230 // N=1 (2 lines)
wim 34:e5a0dcb43ecc 1231 // X
wim 34:e5a0dcb43ecc 1232 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1233 // BR0=0
wim 34:e5a0dcb43ecc 1234 break;
wim 34:e5a0dcb43ecc 1235
wim 34:e5a0dcb43ecc 1236 default:
wim 34:e5a0dcb43ecc 1237 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 1238 break;
wim 34:e5a0dcb43ecc 1239 } // switch type
wim 34:e5a0dcb43ecc 1240
wim 34:e5a0dcb43ecc 1241 _contrast = LCD_PT63_CONTRAST;
wim 34:e5a0dcb43ecc 1242 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 34:e5a0dcb43ecc 1243 break; // case PT6314 Controller (VFD)
wim 39:e9c2319de9c5 1244
wim 39:e9c2319de9c5 1245
wim 39:e9c2319de9c5 1246 case HD66712:
wim 39:e9c2319de9c5 1247 // Initialise Display configuration
wim 39:e9c2319de9c5 1248 switch (_type) {
wim 39:e9c2319de9c5 1249 case LCD8x1: //8x1 is a regular 1 line display
wim 39:e9c2319de9c5 1250 case LCD12x1:
wim 39:e9c2319de9c5 1251 case LCD16x1:
wim 39:e9c2319de9c5 1252 case LCD20x1:
wim 39:e9c2319de9c5 1253 case LCD24x1:
wim 39:e9c2319de9c5 1254 // case LCD32x1: // EXT pin is High, extension driver needed
wim 40:d3496c3ea301 1255 _function = 0x02; // Function set 001 DL N RE(0) - - (Std Regs)
wim 39:e9c2319de9c5 1256 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1257 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1258 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1259 //
wim 39:e9c2319de9c5 1260
wim 39:e9c2319de9c5 1261 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1262 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1263 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1264 // RE=1 (Ena Extended Regs; special mode for HD66712)
wim 40:d3496c3ea301 1265 // BE=0 (Blink Enable, CG/SEG RAM; special mode for HD66712)
wim 40:d3496c3ea301 1266 // LP=0 (LP=1 Low power mode, LP=0 Normal; special mode for HD66712)
wim 39:e9c2319de9c5 1267
wim 39:e9c2319de9c5 1268 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1269 // NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim 39:e9c2319de9c5 1270 break;
wim 39:e9c2319de9c5 1271
wim 40:d3496c3ea301 1272 // case LCD12x3D: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim 40:d3496c3ea301 1273 // case LCD12x3D1: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim 39:e9c2319de9c5 1274 case LCD12x4D: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim 40:d3496c3ea301 1275 // case LCD16x3D: // Special mode for KS0073, KS0078 and HD66712
wim 40:d3496c3ea301 1276 // case LCD16x4D: // Special mode for KS0073, KS0078 and HD66712
wim 39:e9c2319de9c5 1277 case LCD20x4D: // Special mode for KS0073, KS0078 and HD66712
wim 40:d3496c3ea301 1278 _function = 0x02; // Function set 001 DL N RE(0) - - (Std Regs)
wim 39:e9c2319de9c5 1279 // DL=0 (4 bits bus)
wim 40:d3496c3ea301 1280 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1281 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1282 //
wim 39:e9c2319de9c5 1283
wim 39:e9c2319de9c5 1284 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1285 // DL=0 (4 bits bus)
wim 40:d3496c3ea301 1286 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1287 // RE=1 (Ena Extended Regs; special mode for HD66712)
wim 40:d3496c3ea301 1288 // BE=0 (Blink Enable, CG/SEG RAM; special mode for HD66712)
wim 40:d3496c3ea301 1289 // LP=0 (LP=1 Low power mode, LP=0 Normal; special mode for HD66712)
wim 39:e9c2319de9c5 1290
wim 39:e9c2319de9c5 1291 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1292 // NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim 39:e9c2319de9c5 1293 break;
wim 39:e9c2319de9c5 1294
wim 39:e9c2319de9c5 1295 case LCD16x3G: // Special mode for ST7036
wim 39:e9c2319de9c5 1296 // case LCD24x3D: // Special mode for KS0078
wim 39:e9c2319de9c5 1297 // case LCD24x3D1: // Special mode for KS0078
wim 39:e9c2319de9c5 1298 case LCD24x4D: // Special mode for KS0078
wim 39:e9c2319de9c5 1299 error("Error: LCD Controller type does not support this Display type\n\r");
wim 39:e9c2319de9c5 1300 break;
wim 39:e9c2319de9c5 1301
wim 39:e9c2319de9c5 1302 default:
wim 39:e9c2319de9c5 1303 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 40:d3496c3ea301 1304 _function = 0x0A; // Function set 001 DL N RE(0) - - (Std Regs)
wim 39:e9c2319de9c5 1305 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1306 // N=1 (2-line mode), N=0 (1-line mode)
wim 40:d3496c3ea301 1307 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 39:e9c2319de9c5 1308
wim 39:e9c2319de9c5 1309 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1310 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1311 // N=1 (2 line mode), N=0 (1-line mode)
wim 40:d3496c3ea301 1312 // RE=1 (Ena Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1313 // BE=0 (Blink Enable, CG/SEG RAM, special mode for HD66712)
wim 40:d3496c3ea301 1314 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 39:e9c2319de9c5 1315
wim 39:e9c2319de9c5 1316 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1317 // NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim 39:e9c2319de9c5 1318 break;
wim 39:e9c2319de9c5 1319 } // switch type
wim 39:e9c2319de9c5 1320
wim 39:e9c2319de9c5 1321 // init special features
wim 39:e9c2319de9c5 1322 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1323 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 39:e9c2319de9c5 1324 // N=0 (1 line mode), N=1 (2 line mode)
wim 40:d3496c3ea301 1325 // RE=1 (Ena Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1326 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for HD66712)
wim 39:e9c2319de9c5 1327 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 39:e9c2319de9c5 1328
wim 39:e9c2319de9c5 1329 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1330 // FW=0 (5-dot font, special mode for HD66712)
wim 40:d3496c3ea301 1331 // BW=0 (Cur BW invert disable, special mode for HD66712)
wim 40:d3496c3ea301 1332 // NW=0 (1,2 Line), NW=1 (4 line, special mode for HD66712)
wim 40:d3496c3ea301 1333
wim 40:d3496c3ea301 1334 _writeCommand(0x10); // Scroll/Shift set 0001 HS4 HS3 HS2 HS1 (Ext Regs)
wim 40:d3496c3ea301 1335 // Dotscroll/Display shift enable (Special mode for HD66712)
wim 40:d3496c3ea301 1336
wim 40:d3496c3ea301 1337 _writeCommand(0x80); // Scroll Quantity set 1 0 HDS5 HDS4 HDS3 HDS2 HDS1 HDS0 (Ext Regs)
wim 40:d3496c3ea301 1338 // Scroll quantity (Special mode for HD66712)
wim 39:e9c2319de9c5 1339
wim 39:e9c2319de9c5 1340 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 39:e9c2319de9c5 1341 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 39:e9c2319de9c5 1342 // N=0 (1 line mode), N=1 (2 line mode)
wim 40:d3496c3ea301 1343 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1344 // DH=1 (Disp shift enable/disable, special mode for HD66712)
wim 40:d3496c3ea301 1345 // REV=0 (Reverse/Normal, special mode for HD66712)
wim 39:e9c2319de9c5 1346 break; // case HD66712 Controller
wim 39:e9c2319de9c5 1347
wim 41:111ca62e8a59 1348 case SPLC792A_3V3:
wim 41:111ca62e8a59 1349 // SPLC792A controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 41:111ca62e8a59 1350 // Note very similar to ST7032
wim 41:111ca62e8a59 1351
wim 41:111ca62e8a59 1352 // Initialise Display configuration
wim 41:111ca62e8a59 1353 switch (_type) {
wim 41:111ca62e8a59 1354 case LCD8x1: //8x1 is a regular 1 line display
wim 41:111ca62e8a59 1355 case LCD8x2B: //8x2B is a special case of 16x1
wim 41:111ca62e8a59 1356 // case LCD12x1:
wim 41:111ca62e8a59 1357 case LCD16x1:
wim 41:111ca62e8a59 1358 // case LCD20x1:
wim 41:111ca62e8a59 1359 case LCD24x1:
wim 41:111ca62e8a59 1360 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=0 (1-line display mode), F=0 (5*7dot), 0, IS
wim 41:111ca62e8a59 1361 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 41:111ca62e8a59 1362 // Saved to allow switch between Instruction sets at later time
wim 41:111ca62e8a59 1363 break;
wim 41:111ca62e8a59 1364
wim 41:111ca62e8a59 1365 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 41:111ca62e8a59 1366 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 41:111ca62e8a59 1367 case LCD12x4D: // Special mode for KS0078 and PCF21XX
wim 41:111ca62e8a59 1368 case LCD16x3G: // Special mode for ST7036
wim 41:111ca62e8a59 1369 case LCD24x4D: // Special mode for KS0078
wim 41:111ca62e8a59 1370 error("Error: LCD Controller type does not support this Display type\n\r");
wim 41:111ca62e8a59 1371 break;
wim 41:111ca62e8a59 1372
wim 41:111ca62e8a59 1373 default:
wim 41:111ca62e8a59 1374 // All other LCD types are initialised as 2 Line displays
wim 41:111ca62e8a59 1375 _function = 0x08; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=1 (2-line display mode), F=0 (5*7dot), 0, IS
wim 41:111ca62e8a59 1376 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 41:111ca62e8a59 1377 // Saved to allow switch between Instruction sets at later time
wim 41:111ca62e8a59 1378 break;
wim 41:111ca62e8a59 1379 } // switch type
wim 41:111ca62e8a59 1380
wim 41:111ca62e8a59 1381 // init special features
wim 41:111ca62e8a59 1382 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 41:111ca62e8a59 1383
wim 41:111ca62e8a59 1384 //SPLC792A Does not support Bias and Internal Osc register
wim 41:111ca62e8a59 1385 // _writeCommand(0x1C); // Internal OSC frequency adjustment Framefreq=183HZ, Bias will be 1/4 (Instr Set=1)
wim 41:111ca62e8a59 1386
wim 41:111ca62e8a59 1387 _contrast = LCD_SPLC792A_CONTRAST;
wim 41:111ca62e8a59 1388 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast Low bits, 0 1 1 1 C3 C2 C1 C0 (IS=1)
wim 41:111ca62e8a59 1389
wim 41:111ca62e8a59 1390
wim 41:111ca62e8a59 1391 // _icon_power = 0x04; // Icon display off (Bit3=0), Booster circuit is turned on (Bit2=1) (IS=1)
wim 41:111ca62e8a59 1392 _icon_power = 0x0C; // Icon display on (Bit3=1), Booster circuit is turned on (Bit2=1) (IS=1)
wim 41:111ca62e8a59 1393 // Note: Booster circuit always on for SPLC792A, Bit2 is dont care
wim 41:111ca62e8a59 1394 // Saved to allow contrast change at later time
wim 41:111ca62e8a59 1395
wim 41:111ca62e8a59 1396 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Icon, Booster and Contrast High bits, 0 1 0 1 Ion Bon C5 C4 (IS=1)
wim 41:111ca62e8a59 1397 wait_ms(10); // Wait 10ms to ensure powered up
wim 41:111ca62e8a59 1398
wim 41:111ca62e8a59 1399 _writeCommand(0x68 | (LCD_SPLC792A_RAB & 0x07)); // Voltage follower, 0 1 1 0 FOn=1, Ampl ratio Rab2=1, Rab1=0, Rab0=0 (IS=1)
wim 41:111ca62e8a59 1400 // Note: Follower circuit always on for SPLC792A, Bit3 is dont care
wim 41:111ca62e8a59 1401 wait_ms(10); // Wait 10ms to ensure powered up
wim 41:111ca62e8a59 1402
wim 41:111ca62e8a59 1403 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 41:111ca62e8a59 1404
wim 41:111ca62e8a59 1405 break; // case SPLC792A_3V3 Controller
wim 41:111ca62e8a59 1406
wim 37:ce348c002929 1407 case ST7066_ACM: // ST7066 4/8 bit, I2C on ACM1602 using a PIC
wim 19:c747b9e2e7b8 1408 default:
wim 32:59c4b8f648d4 1409 // Devices fully compatible to HD44780 that do not use any DC/DC Voltage converters but external VLCD, no icons etc
wim 10:dd9b3a696acd 1410
wim 29:a3663151aa65 1411 // Initialise Display configuration
wim 29:a3663151aa65 1412 switch (_type) {
wim 29:a3663151aa65 1413 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 1414 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 1415 // case LCD12x1:
wim 29:a3663151aa65 1416 case LCD16x1:
wim 30:033048611c01 1417 // case LCD20x1:
wim 29:a3663151aa65 1418 case LCD24x1:
wim 30:033048611c01 1419 // case LCD40x1:
wim 32:59c4b8f648d4 1420 _function = 0x00; // Function set 001 DL N F - -
wim 29:a3663151aa65 1421 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1422 // N=0 (1 line)
wim 29:a3663151aa65 1423 // F=0 (5x7 dots font)
wim 29:a3663151aa65 1424 break;
wim 29:a3663151aa65 1425
wim 32:59c4b8f648d4 1426 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1427 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1428 case LCD12x4D: // Special mode for KS0078 and PCF21XX:
wim 33:900a94bc7585 1429 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1430 // case LCD16x3D1: // Special mode for KS0078
wim 30:033048611c01 1431 // case LCD24x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1432 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 1433 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 1434 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 1435 break;
wim 30:033048611c01 1436
wim 30:033048611c01 1437 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 29:a3663151aa65 1438 default:
wim 32:59c4b8f648d4 1439 _function = 0x08; // Function set 001 DL N F - -
wim 29:a3663151aa65 1440 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1441 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 29:a3663151aa65 1442 // N=1 (2 lines)
wim 29:a3663151aa65 1443 // F=0 (5x7 dots font, only option for 2 line display)
wim 32:59c4b8f648d4 1444 // - (Don't care)
wim 29:a3663151aa65 1445 break;
wim 29:a3663151aa65 1446 } // switch type
wim 10:dd9b3a696acd 1447
wim 34:e5a0dcb43ecc 1448 _writeCommand(0x20 | _function);
wim 29:a3663151aa65 1449 break; // case default Controller
wim 29:a3663151aa65 1450
wim 34:e5a0dcb43ecc 1451 } // switch Controller specific initialisations
wim 10:dd9b3a696acd 1452
wim 30:033048611c01 1453 // Controller general initialisations
wim 39:e9c2319de9c5 1454 // _writeCommand(0x01); // Clear Display and set cursor to 0
wim 32:59c4b8f648d4 1455 // wait_ms(10); // The CLS command takes 1.64 ms.
wim 32:59c4b8f648d4 1456 // // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 28:30fa94f7341c 1457
wim 39:e9c2319de9c5 1458 _writeCommand(0x02); // Cursor Home, DDRAM Address to Origin
wim 39:e9c2319de9c5 1459 wait_ms(10); // The Return Home command takes 1.64 ms.
wim 39:e9c2319de9c5 1460 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 28:30fa94f7341c 1461
wim 28:30fa94f7341c 1462 _writeCommand(0x06); // Entry Mode 0000 0 1 I/D S
wim 13:24506ba22480 1463 // Cursor Direction and Display Shift
wim 28:30fa94f7341c 1464 // I/D=1 (Cur incr)
wim 28:30fa94f7341c 1465 // S=0 (No display shift)
wim 10:dd9b3a696acd 1466
wim 29:a3663151aa65 1467 _writeCommand(0x14); // Cursor or Display shift 0001 S/C R/L x x
wim 29:a3663151aa65 1468 // S/C=0 Cursor moves
wim 29:a3663151aa65 1469 // R/L=1 Right
wim 29:a3663151aa65 1470 //
wim 29:a3663151aa65 1471
wim 13:24506ba22480 1472 // _writeCommand(0x0C); // Display Ctrl 0000 1 D C B
wim 17:652ab113bc2e 1473 // // Display On, Cursor Off, Blink Off
wim 36:9f5f86dfd44a 1474
wim 39:e9c2319de9c5 1475 // setCursor(CurOff_BlkOff);
wim 39:e9c2319de9c5 1476 setCursor(CurOn_BlkOff);
wim 21:9eb628d9e164 1477 setMode(DispOn);
simon 1:ac48b187213c 1478 }
simon 1:ac48b187213c 1479
wim 8:03116f75b66e 1480
wim 21:9eb628d9e164 1481 /** Clear the screen, Cursor home.
wim 39:e9c2319de9c5 1482 * Note: The whole display is initialised to charcode 0x20, which may not be a 'space' on some controllers with a
wim 39:e9c2319de9c5 1483 * different fontset such as the PCF2116C or PCF2119R. In this case you should fill the display with 'spaces'.
wim 21:9eb628d9e164 1484 */
wim 21:9eb628d9e164 1485 void TextLCD_Base::cls() {
wim 15:b70ebfffb258 1486
wim 41:111ca62e8a59 1487 #if (LCD_TWO_CTRL == 1)
wim 15:b70ebfffb258 1488 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1489 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1490 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 15:b70ebfffb258 1491
wim 15:b70ebfffb258 1492 // Second LCD controller Cursor always Off
wim 21:9eb628d9e164 1493 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 15:b70ebfffb258 1494
wim 15:b70ebfffb258 1495 // Second LCD controller Clearscreen
wim 27:22d5086f6ba6 1496 _writeCommand(0x01); // cls, and set cursor to 0
wim 39:e9c2319de9c5 1497 wait_ms(20); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1498 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1499
wim 21:9eb628d9e164 1500 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 15:b70ebfffb258 1501 }
wim 41:111ca62e8a59 1502
wim 15:b70ebfffb258 1503
wim 15:b70ebfffb258 1504 // Primary LCD controller Clearscreen
wim 27:22d5086f6ba6 1505 _writeCommand(0x01); // cls, and set cursor to 0
wim 39:e9c2319de9c5 1506 wait_ms(20); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1507 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1508
wim 15:b70ebfffb258 1509 // Restore cursormode on primary LCD controller when needed
wim 15:b70ebfffb258 1510 if(_type==LCD40x4) {
wim 17:652ab113bc2e 1511 _setCursorAndDisplayMode(_currentMode,_currentCursor);
wim 15:b70ebfffb258 1512 }
wim 41:111ca62e8a59 1513
wim 41:111ca62e8a59 1514 #else
wim 41:111ca62e8a59 1515 // Support only one LCD controller
wim 41:111ca62e8a59 1516 _writeCommand(0x01); // cls, and set cursor to 0
wim 41:111ca62e8a59 1517 wait_ms(20); // The CLS command takes 1.64 ms.
wim 41:111ca62e8a59 1518 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 41:111ca62e8a59 1519 #endif
wim 15:b70ebfffb258 1520
wim 29:a3663151aa65 1521 setAddress(0, 0); // Reset Cursor location
wim 32:59c4b8f648d4 1522 // Note: This is needed because some displays (eg PCF21XX) don't use line 0 in the '3 Line' mode.
simon 1:ac48b187213c 1523 }
simon 1:ac48b187213c 1524
wim 29:a3663151aa65 1525 /** Locate cursor to a screen column and row
wim 29:a3663151aa65 1526 *
wim 29:a3663151aa65 1527 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1528 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1529 */
wim 21:9eb628d9e164 1530 void TextLCD_Base::locate(int column, int row) {
wim 15:b70ebfffb258 1531
wim 15:b70ebfffb258 1532 // setAddress() does all the heavy lifting:
wim 15:b70ebfffb258 1533 // check column and row sanity,
wim 15:b70ebfffb258 1534 // switch controllers for LCD40x4 if needed
wim 15:b70ebfffb258 1535 // switch cursor for LCD40x4 if needed
wim 15:b70ebfffb258 1536 // set the new memory address to show cursor at correct location
wim 32:59c4b8f648d4 1537 setAddress(column, row);
wim 15:b70ebfffb258 1538 }
wim 30:033048611c01 1539
wim 15:b70ebfffb258 1540
wim 21:9eb628d9e164 1541 /** Write a single character (Stream implementation)
wim 21:9eb628d9e164 1542 */
wim 21:9eb628d9e164 1543 int TextLCD_Base::_putc(int value) {
wim 15:b70ebfffb258 1544 int addr;
wim 15:b70ebfffb258 1545
wim 15:b70ebfffb258 1546 if (value == '\n') {
wim 15:b70ebfffb258 1547 //No character to write
wim 15:b70ebfffb258 1548
wim 15:b70ebfffb258 1549 //Update Cursor
wim 15:b70ebfffb258 1550 _column = 0;
wim 15:b70ebfffb258 1551 _row++;
wim 15:b70ebfffb258 1552 if (_row >= rows()) {
wim 15:b70ebfffb258 1553 _row = 0;
wim 15:b70ebfffb258 1554 }
wim 15:b70ebfffb258 1555 }
wim 15:b70ebfffb258 1556 else {
wim 37:ce348c002929 1557 //Character to write
wim 41:111ca62e8a59 1558
wim 41:111ca62e8a59 1559 #if (LCD_DEF_FONT == 1) //Default HD44780 font
wim 37:ce348c002929 1560 _writeData(value);
wim 41:111ca62e8a59 1561 #elif (LCD_C_FONT == 1) || (LCD_R_FONT == 1) //PCF21xxC or PCF21xxR font
wim 41:111ca62e8a59 1562 _writeData(ASCII_2_LCD(value));
wim 41:111ca62e8a59 1563 #elif (LCD_UTF8_FONT == 1) // UTF8 2 byte font (eg Cyrillic)
wim 41:111ca62e8a59 1564 // value = UTF_2_LCD(value, utf_seq_rec_first_cyr, utf_seq_recode_cyr, &utf_rnd_recode_cyr[0][0]);
wim 41:111ca62e8a59 1565 value = UTF_2_LCD(value);
wim 41:111ca62e8a59 1566 if (value >= 0) {
wim 41:111ca62e8a59 1567 _writeData(value);
wim 41:111ca62e8a59 1568
wim 41:111ca62e8a59 1569 // Only increment cursor when there is something to write
wim 41:111ca62e8a59 1570 // Continue below to closing bracket...
wim 37:ce348c002929 1571 #else
wim 41:111ca62e8a59 1572 _writeData('?'); //Oops, no font defined
wim 41:111ca62e8a59 1573 #endif
wim 41:111ca62e8a59 1574
wim 15:b70ebfffb258 1575 //Update Cursor
wim 15:b70ebfffb258 1576 _column++;
wim 15:b70ebfffb258 1577 if (_column >= columns()) {
wim 15:b70ebfffb258 1578 _column = 0;
wim 15:b70ebfffb258 1579 _row++;
wim 15:b70ebfffb258 1580 if (_row >= rows()) {
wim 15:b70ebfffb258 1581 _row = 0;
wim 15:b70ebfffb258 1582 }
wim 41:111ca62e8a59 1583 }
wim 41:111ca62e8a59 1584
wim 41:111ca62e8a59 1585 #if (LCD_DEF_FONT == 1) //Default HD44780 font
wim 41:111ca62e8a59 1586
wim 41:111ca62e8a59 1587 #elif (LCD_C_FONT == 1) || (LCD_R_FONT == 1) //PCF21xxC or PCF21xxR font
wim 41:111ca62e8a59 1588
wim 41:111ca62e8a59 1589 #elif (LCD_UTF8_FONT == 1) //UTF8 2 byte font (eg Cyrillic)
wim 41:111ca62e8a59 1590 // Continue code above to close bracket...
wim 41:111ca62e8a59 1591 } // if (value >= 0) {..
wim 41:111ca62e8a59 1592 #else
wim 41:111ca62e8a59 1593
wim 41:111ca62e8a59 1594 #endif
wim 41:111ca62e8a59 1595
wim 15:b70ebfffb258 1596 } //else
wim 15:b70ebfffb258 1597
wim 15:b70ebfffb258 1598 //Set next memoryaddress, make sure cursor blinks at next location
wim 15:b70ebfffb258 1599 addr = getAddress(_column, _row);
wim 15:b70ebfffb258 1600 _writeCommand(0x80 | addr);
wim 15:b70ebfffb258 1601
wim 15:b70ebfffb258 1602 return value;
wim 15:b70ebfffb258 1603 }
wim 15:b70ebfffb258 1604
wim 15:b70ebfffb258 1605
wim 16:c276b75e6585 1606 // get a single character (Stream implementation)
wim 21:9eb628d9e164 1607 int TextLCD_Base::_getc() {
simon 1:ac48b187213c 1608 return -1;
simon 1:ac48b187213c 1609 }
simon 1:ac48b187213c 1610
wim 41:111ca62e8a59 1611
wim 41:111ca62e8a59 1612 #if ((LCD_C_FONT == 1) || (LCD_R_FONT == 1)) //PCF21xxC or PCF21xxR font
wim 37:ce348c002929 1613 /** Convert ASCII character code to the LCD fonttable code
wim 37:ce348c002929 1614 *
wim 37:ce348c002929 1615 * @param c The character to write to the display
wim 37:ce348c002929 1616 * @return The character code for the specific fonttable of the controller
wim 37:ce348c002929 1617 */
wim 37:ce348c002929 1618 int TextLCD_Base::ASCII_2_LCD (int c) {
wim 37:ce348c002929 1619
wim 41:111ca62e8a59 1620 //LCD_C_F0 is default for HD44780 and compatible series
wim 41:111ca62e8a59 1621 // if (_font == LCD_C_F0) return c;
wim 41:111ca62e8a59 1622
wim 41:111ca62e8a59 1623 //LCD_C_FC for PCF21XXC series
wim 41:111ca62e8a59 1624 //LCD_C_FR for PCF21XXR series
wim 39:e9c2319de9c5 1625 //Used code from Suga koubou library for PCF2119K and PCF2119R
wim 37:ce348c002929 1626 if (((c >= ' ') && (c <= '?')) || ((c >= 'A') && (c <= 'Z')) || ((c >= 'a') && (c <= 'z'))) {
wim 37:ce348c002929 1627 c |= 0x80;
wim 39:e9c2319de9c5 1628 } else if (c >= 0xF0 && c <= 0xFF) {
wim 41:111ca62e8a59 1629 c &= 0x0F;
wim 37:ce348c002929 1630 }
wim 37:ce348c002929 1631 return c;
wim 37:ce348c002929 1632 }
wim 41:111ca62e8a59 1633 #endif
wim 41:111ca62e8a59 1634
wim 41:111ca62e8a59 1635 #if(LCD_UTF8_FONT == 1)
wim 41:111ca62e8a59 1636
wim 41:111ca62e8a59 1637 /** Convert UTF8 2-byte character code to the LCD fonttable code
wim 41:111ca62e8a59 1638 * @param c The character to write to the display
wim 41:111ca62e8a59 1639 * @return character code for the specific fonttable of the controller or -1 if UTF8 code is not yet complete or incorrect
wim 41:111ca62e8a59 1640 *
wim 41:111ca62e8a59 1641 * Orig by Andriy, Modified by WH
wim 41:111ca62e8a59 1642 *
wim 41:111ca62e8a59 1643 * Note: The UTF8 decoding table for a specific controller is defined and selected in file TextLCD_UTF8.inc
wim 41:111ca62e8a59 1644 * The table is accessed in this UTF_2_LCD() method through
wim 41:111ca62e8a59 1645 * #define UTF_FIRST, UTF_LAST, UTF_SEQ_REC_FIRST, UTF_SEQ_REC_LAST and
wim 41:111ca62e8a59 1646 * #define UTF_SEQ_RECODE and UTF_RND_RECODE
wim 41:111ca62e8a59 1647 */
wim 41:111ca62e8a59 1648 int TextLCD_Base::UTF_2_LCD (int c) {
wim 41:111ca62e8a59 1649 int utf_code;
wim 41:111ca62e8a59 1650 int utf_low_byte; // Low byte UTF8
wim 41:111ca62e8a59 1651 static int utf_hi_byte = 0; // High byte UTF8
wim 41:111ca62e8a59 1652
wim 41:111ca62e8a59 1653 if (c < 0x80) { // Regular ASCII code, no need to convert
wim 41:111ca62e8a59 1654 return c;
wim 41:111ca62e8a59 1655 }
wim 41:111ca62e8a59 1656 else { // UTF8 handling, See wikipedia.org/wiki/UTF-8 and www.utf8-chartable.de
wim 41:111ca62e8a59 1657 // printf("0x%X ", c);
wim 41:111ca62e8a59 1658
wim 41:111ca62e8a59 1659 if (c >= 0xC0) { // First UTF8 byte should be formatted as 110b bbaa, Do sanity check
wim 41:111ca62e8a59 1660 utf_hi_byte = c & 0x1F; // Mask out significant bits (0x1F) and save high byte
wim 41:111ca62e8a59 1661 return -1; // Nothing to display as yet, wait for second UTF8 byte
wim 41:111ca62e8a59 1662 }
wim 41:111ca62e8a59 1663
wim 41:111ca62e8a59 1664 if (c <= 0xBF) { // Second UTF8 byte should be formatted as 10aa aaaa, Do sanity check
wim 41:111ca62e8a59 1665 utf_low_byte = c & 0x3F; // Mask out significant bits (0x3F)
wim 41:111ca62e8a59 1666
wim 41:111ca62e8a59 1667 // Compose UTF character code from UTF8 bytes. The UTF codes will be between U+0080 and U+07FF
wim 41:111ca62e8a59 1668 utf_code = (utf_hi_byte << 6) | utf_low_byte; // 00000bbb aaaaaaaa
wim 41:111ca62e8a59 1669 // printf("0x%4X ", utf_code);
wim 41:111ca62e8a59 1670
wim 41:111ca62e8a59 1671 // Sanity check on UTF codes
wim 41:111ca62e8a59 1672 // For example Cyrillic characters are UTF encoded between 0x0400 and 0x04FF
wim 41:111ca62e8a59 1673 if ((utf_code < UTF_FIRST) || (utf_code > UTF_LAST)) {
wim 41:111ca62e8a59 1674 return -1; // Invalid UTF8 code
wim 41:111ca62e8a59 1675 };
wim 41:111ca62e8a59 1676
wim 41:111ca62e8a59 1677 //Map some specific UTF codes on a character in LCD fonttable using a special correcting lookup table
wim 41:111ca62e8a59 1678 for (char i=0; UTF_RND_RECODE[i][0]; i++) { // Step through table until endvalue 0 is found or until a match is found
wim 41:111ca62e8a59 1679 if (utf_code == UTF_RND_RECODE[i][0]) { // UTF8 code match is found
wim 41:111ca62e8a59 1680 c = UTF_RND_RECODE[1][1];
wim 41:111ca62e8a59 1681 return c; // found match in correcting random table
wim 41:111ca62e8a59 1682 }
wim 41:111ca62e8a59 1683 }
wim 41:111ca62e8a59 1684
wim 41:111ca62e8a59 1685 //Sanity check on table idx range
wim 41:111ca62e8a59 1686 if ((utf_code < UTF_SEQ_REC_FIRST) || (utf_code > UTF_SEQ_REC_LAST)) {
wim 41:111ca62e8a59 1687 return -1; // Invalid UTF8 code
wim 41:111ca62e8a59 1688 };
wim 41:111ca62e8a59 1689
wim 41:111ca62e8a59 1690 //Map all other UTF codes on a character in LCD fonttable using a sequential lookup table
wim 41:111ca62e8a59 1691 c = UTF_SEQ_RECODE[utf_code - UTF_SEQ_REC_FIRST];
wim 41:111ca62e8a59 1692 return c; // entry in sequential table
wim 41:111ca62e8a59 1693 }
wim 41:111ca62e8a59 1694 else {
wim 41:111ca62e8a59 1695 return -1; // Invalid UTF8 code for second byte
wim 41:111ca62e8a59 1696 }
wim 41:111ca62e8a59 1697 } // End UTF8 handling
wim 41:111ca62e8a59 1698 }
wim 41:111ca62e8a59 1699
wim 41:111ca62e8a59 1700 #endif
wim 41:111ca62e8a59 1701
wim 14:0c32b66b14b8 1702
wim 34:e5a0dcb43ecc 1703 #if(LCD_PRINTF != 1)
wim 34:e5a0dcb43ecc 1704 /** Write a character to the LCD
wim 34:e5a0dcb43ecc 1705 *
wim 34:e5a0dcb43ecc 1706 * @param c The character to write to the display
wim 34:e5a0dcb43ecc 1707 */
wim 34:e5a0dcb43ecc 1708 int TextLCD_Base::putc(int c){
wim 34:e5a0dcb43ecc 1709 return _putc(c);
wim 34:e5a0dcb43ecc 1710 }
wim 34:e5a0dcb43ecc 1711
wim 34:e5a0dcb43ecc 1712
wim 34:e5a0dcb43ecc 1713 /** Write a raw string to the LCD
wim 34:e5a0dcb43ecc 1714 *
wim 34:e5a0dcb43ecc 1715 * @param string text, may be followed by variables to emulate formatting the string.
wim 34:e5a0dcb43ecc 1716 * However, printf formatting is NOT supported and variables will be ignored!
wim 34:e5a0dcb43ecc 1717 */
wim 34:e5a0dcb43ecc 1718 int TextLCD_Base::printf(const char* text, ...) {
wim 34:e5a0dcb43ecc 1719
wim 34:e5a0dcb43ecc 1720 while (*text !=0) {
wim 34:e5a0dcb43ecc 1721 _putc(*text);
wim 34:e5a0dcb43ecc 1722 text++;
wim 34:e5a0dcb43ecc 1723 }
wim 34:e5a0dcb43ecc 1724 return 0;
wim 34:e5a0dcb43ecc 1725 }
wim 34:e5a0dcb43ecc 1726 #endif
wim 34:e5a0dcb43ecc 1727
wim 34:e5a0dcb43ecc 1728
wim 17:652ab113bc2e 1729 // Write a nibble using the 4-bit interface
wim 21:9eb628d9e164 1730 void TextLCD_Base::_writeNibble(int value) {
wim 17:652ab113bc2e 1731
wim 17:652ab113bc2e 1732 // Enable is Low
wim 21:9eb628d9e164 1733 this->_setEnable(true);
wim 38:cbe275b0b647 1734 this->_setData(value); // Low nibble of value on D4..D7
wim 17:652ab113bc2e 1735 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1736 this->_setEnable(false);
wim 17:652ab113bc2e 1737 wait_us(1); // Datahold time
wim 17:652ab113bc2e 1738 // Enable is Low
wim 17:652ab113bc2e 1739 }
wim 17:652ab113bc2e 1740
wim 16:c276b75e6585 1741 // Write a byte using the 4-bit interface
wim 21:9eb628d9e164 1742 void TextLCD_Base::_writeByte(int value) {
wim 15:b70ebfffb258 1743
wim 15:b70ebfffb258 1744 // Enable is Low
wim 21:9eb628d9e164 1745 this->_setEnable(true);
wim 21:9eb628d9e164 1746 this->_setData(value >> 4); // High nibble
wim 15:b70ebfffb258 1747 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1748 this->_setEnable(false);
wim 15:b70ebfffb258 1749 wait_us(1); // Data hold time
wim 15:b70ebfffb258 1750
wim 21:9eb628d9e164 1751 this->_setEnable(true);
wim 37:ce348c002929 1752 this->_setData(value); // Low nibble
wim 15:b70ebfffb258 1753 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1754 this->_setEnable(false);
wim 15:b70ebfffb258 1755 wait_us(1); // Datahold time
wim 15:b70ebfffb258 1756
wim 15:b70ebfffb258 1757 // Enable is Low
simon 1:ac48b187213c 1758 }
simon 1:ac48b187213c 1759
wim 21:9eb628d9e164 1760 // Write a command byte to the LCD controller
wim 21:9eb628d9e164 1761 void TextLCD_Base::_writeCommand(int command) {
wim 15:b70ebfffb258 1762
wim 21:9eb628d9e164 1763 this->_setRS(false);
wim 16:c276b75e6585 1764 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1765
wim 21:9eb628d9e164 1766 this->_writeByte(command);
wim 15:b70ebfffb258 1767 wait_us(40); // most instructions take 40us
simon 1:ac48b187213c 1768 }
simon 1:ac48b187213c 1769
wim 21:9eb628d9e164 1770 // Write a data byte to the LCD controller
wim 21:9eb628d9e164 1771 void TextLCD_Base::_writeData(int data) {
wim 15:b70ebfffb258 1772
wim 21:9eb628d9e164 1773 this->_setRS(true);
wim 16:c276b75e6585 1774 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1775
wim 21:9eb628d9e164 1776 this->_writeByte(data);
wim 15:b70ebfffb258 1777 wait_us(40); // data writes take 40us
simon 1:ac48b187213c 1778 }
simon 1:ac48b187213c 1779
wim 8:03116f75b66e 1780
wim 32:59c4b8f648d4 1781 // This replaces the original _address() method.
wim 8:03116f75b66e 1782 // It is confusing since it returns the memoryaddress or-ed with the set memorycommand 0x80.
wim 8:03116f75b66e 1783 // Left it in here for compatibility with older code. New applications should use getAddress() instead.
wim 21:9eb628d9e164 1784 int TextLCD_Base::_address(int column, int row) {
wim 8:03116f75b66e 1785 return 0x80 | getAddress(column, row);
wim 8:03116f75b66e 1786 }
wim 8:03116f75b66e 1787
wim 30:033048611c01 1788
wim 30:033048611c01 1789 // This is new method to return the memory address based on row, column and displaytype.
wim 30:033048611c01 1790 //
wim 30:033048611c01 1791 /** Return the memoryaddress of screen column and row location
wim 30:033048611c01 1792 *
wim 30:033048611c01 1793 * @param column The horizontal position from the left, indexed from 0
wim 30:033048611c01 1794 * @param row The vertical position from the top, indexed from 0
wim 36:9f5f86dfd44a 1795 * @return The memoryaddress of screen column and row location
wim 30:033048611c01 1796 *
wim 30:033048611c01 1797 */
wim 30:033048611c01 1798 int TextLCD_Base::getAddress(int column, int row) {
wim 30:033048611c01 1799
wim 30:033048611c01 1800 switch (_addr_mode) {
wim 30:033048611c01 1801
wim 30:033048611c01 1802 case LCD_T_A:
wim 30:033048611c01 1803 //Default addressing mode for 1, 2 and 4 rows (except 40x4)
wim 30:033048611c01 1804 //The two available rows are split and stacked on top of eachother. Addressing for 3rd and 4th line continues where lines 1 and 2 were split.
wim 30:033048611c01 1805 //Displays top rows when less than four are used.
wim 30:033048611c01 1806 switch (row) {
wim 30:033048611c01 1807 case 0:
wim 30:033048611c01 1808 return 0x00 + column;
wim 30:033048611c01 1809 case 1:
wim 30:033048611c01 1810 return 0x40 + column;
wim 30:033048611c01 1811 case 2:
wim 30:033048611c01 1812 return 0x00 + _nr_cols + column;
wim 30:033048611c01 1813 case 3:
wim 30:033048611c01 1814 return 0x40 + _nr_cols + column;
wim 30:033048611c01 1815 // Should never get here.
wim 39:e9c2319de9c5 1816 // default:
wim 39:e9c2319de9c5 1817 // return 0x00;
wim 30:033048611c01 1818 }
wim 30:033048611c01 1819
wim 30:033048611c01 1820 case LCD_T_B:
wim 30:033048611c01 1821 // LCD8x2B is a special layout of LCD16x1
wim 30:033048611c01 1822 if (row==0)
wim 30:033048611c01 1823 return 0x00 + column;
wim 30:033048611c01 1824 else
wim 30:033048611c01 1825 // return _nr_cols + column;
wim 30:033048611c01 1826 return 0x08 + column;
wim 30:033048611c01 1827
wim 30:033048611c01 1828 case LCD_T_C:
wim 30:033048611c01 1829 // LCD16x1C is a special layout of LCD8x2
wim 33:900a94bc7585 1830 // LCD32x1C is a special layout of LCD16x2
wim 33:900a94bc7585 1831 // LCD40x1C is a special layout of LCD20x2
wim 33:900a94bc7585 1832 #if(0)
wim 32:59c4b8f648d4 1833 if (column < 8)
wim 30:033048611c01 1834 return 0x00 + column;
wim 30:033048611c01 1835 else
wim 30:033048611c01 1836 return 0x40 + (column - 8);
wim 32:59c4b8f648d4 1837 #else
wim 32:59c4b8f648d4 1838 if (column < (_nr_cols >> 1))
wim 32:59c4b8f648d4 1839 return 0x00 + column;
wim 32:59c4b8f648d4 1840 else
wim 32:59c4b8f648d4 1841 return 0x40 + (column - (_nr_cols >> 1));
wim 32:59c4b8f648d4 1842 #endif
wim 30:033048611c01 1843
wim 30:033048611c01 1844 case LCD_T_D:
wim 36:9f5f86dfd44a 1845 //Alternate addressing mode for 3 and 4 row displays (except 40x4). Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1846 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1847 //Displays top rows when less than four are used.
wim 30:033048611c01 1848 switch (row) {
wim 30:033048611c01 1849 case 0:
wim 30:033048611c01 1850 return 0x00 + column;
wim 30:033048611c01 1851 case 1:
wim 30:033048611c01 1852 return 0x20 + column;
wim 30:033048611c01 1853 case 2:
wim 30:033048611c01 1854 return 0x40 + column;
wim 30:033048611c01 1855 case 3:
wim 30:033048611c01 1856 return 0x60 + column;
wim 30:033048611c01 1857 // Should never get here.
wim 39:e9c2319de9c5 1858 // default:
wim 39:e9c2319de9c5 1859 // return 0x00;
wim 30:033048611c01 1860 }
wim 30:033048611c01 1861
wim 30:033048611c01 1862 case LCD_T_D1:
wim 36:9f5f86dfd44a 1863 //Alternate addressing mode for 3 row displays. Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1864 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1865 //Skips top row of 4 row display and starts display at row 1
wim 30:033048611c01 1866 switch (row) {
wim 30:033048611c01 1867 case 0:
wim 30:033048611c01 1868 return 0x20 + column;
wim 30:033048611c01 1869 case 1:
wim 30:033048611c01 1870 return 0x40 + column;
wim 30:033048611c01 1871 case 2:
wim 30:033048611c01 1872 return 0x60 + column;
wim 30:033048611c01 1873 // Should never get here.
wim 39:e9c2319de9c5 1874 // default:
wim 39:e9c2319de9c5 1875 // return 0x00;
wim 30:033048611c01 1876 }
wim 30:033048611c01 1877
wim 30:033048611c01 1878 case LCD_T_E:
wim 30:033048611c01 1879 // LCD40x4 is a special case since it has 2 controllers.
wim 30:033048611c01 1880 // Each controller is configured as 40x2 (Type A)
wim 30:033048611c01 1881 if (row<2) {
wim 30:033048611c01 1882 // Test to see if we need to switch between controllers
wim 30:033048611c01 1883 if (_ctrl_idx != _LCDCtrl_0) {
wim 30:033048611c01 1884
wim 30:033048611c01 1885 // Second LCD controller Cursor Off
wim 30:033048611c01 1886 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1887
wim 30:033048611c01 1888 // Select primary controller
wim 30:033048611c01 1889 _ctrl_idx = _LCDCtrl_0;
wim 30:033048611c01 1890
wim 30:033048611c01 1891 // Restore cursormode on primary LCD controller
wim 30:033048611c01 1892 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1893 }
wim 30:033048611c01 1894
wim 30:033048611c01 1895 return 0x00 + (row * 0x40) + column;
wim 30:033048611c01 1896 }
wim 30:033048611c01 1897 else {
wim 30:033048611c01 1898
wim 30:033048611c01 1899 // Test to see if we need to switch between controllers
wim 30:033048611c01 1900 if (_ctrl_idx != _LCDCtrl_1) {
wim 30:033048611c01 1901 // Primary LCD controller Cursor Off
wim 30:033048611c01 1902 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1903
wim 30:033048611c01 1904 // Select secondary controller
wim 30:033048611c01 1905 _ctrl_idx = _LCDCtrl_1;
wim 30:033048611c01 1906
wim 30:033048611c01 1907 // Restore cursormode on secondary LCD controller
wim 30:033048611c01 1908 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1909 }
wim 30:033048611c01 1910
wim 30:033048611c01 1911 return 0x00 + ((row-2) * 0x40) + column;
wim 30:033048611c01 1912 }
wim 30:033048611c01 1913
wim 32:59c4b8f648d4 1914 case LCD_T_F:
wim 32:59c4b8f648d4 1915 //Alternate addressing mode for 3 row displays.
wim 32:59c4b8f648d4 1916 //The first half of 3rd row continues from 1st row, the second half continues from 2nd row.
wim 32:59c4b8f648d4 1917 switch (row) {
wim 32:59c4b8f648d4 1918 case 0:
wim 32:59c4b8f648d4 1919 return 0x00 + column;
wim 32:59c4b8f648d4 1920 case 1:
wim 32:59c4b8f648d4 1921 return 0x40 + column;
wim 32:59c4b8f648d4 1922 case 2:
wim 32:59c4b8f648d4 1923 if (column < (_nr_cols >> 1)) // check first or second half of line
wim 32:59c4b8f648d4 1924 return (0x00 + _nr_cols + column);
wim 32:59c4b8f648d4 1925 else
wim 32:59c4b8f648d4 1926 return (0x40 + _nr_cols + (column - (_nr_cols >> 1)));
wim 32:59c4b8f648d4 1927 // Should never get here.
wim 39:e9c2319de9c5 1928 // default:
wim 39:e9c2319de9c5 1929 // return 0x00;
wim 32:59c4b8f648d4 1930 }
wim 32:59c4b8f648d4 1931
wim 32:59c4b8f648d4 1932 case LCD_T_G:
wim 32:59c4b8f648d4 1933 //Alternate addressing mode for 3 row displays. Used by ST7036
wim 32:59c4b8f648d4 1934 switch (row) {
wim 32:59c4b8f648d4 1935 case 0:
wim 32:59c4b8f648d4 1936 return 0x00 + column;
wim 32:59c4b8f648d4 1937 case 1:
wim 32:59c4b8f648d4 1938 return 0x10 + column;
wim 32:59c4b8f648d4 1939 case 2:
wim 32:59c4b8f648d4 1940 return 0x20 + column;
wim 32:59c4b8f648d4 1941 // Should never get here.
wim 39:e9c2319de9c5 1942 // default:
wim 39:e9c2319de9c5 1943 // return 0x00;
wim 32:59c4b8f648d4 1944 }
wim 32:59c4b8f648d4 1945
wim 30:033048611c01 1946 // Should never get here.
wim 30:033048611c01 1947 default:
wim 30:033048611c01 1948 return 0x00;
wim 32:59c4b8f648d4 1949
wim 32:59c4b8f648d4 1950 } // switch _addr_mode
wim 30:033048611c01 1951 }
wim 30:033048611c01 1952
wim 30:033048611c01 1953
wim 29:a3663151aa65 1954 /** Set the memoryaddress of screen column and row location
wim 29:a3663151aa65 1955 *
wim 29:a3663151aa65 1956 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1957 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1958 */
wim 21:9eb628d9e164 1959 void TextLCD_Base::setAddress(int column, int row) {
wim 15:b70ebfffb258 1960
wim 15:b70ebfffb258 1961 // Sanity Check column
wim 15:b70ebfffb258 1962 if (column < 0) {
wim 15:b70ebfffb258 1963 _column = 0;
wim 15:b70ebfffb258 1964 }
wim 36:9f5f86dfd44a 1965 else if (column >= _nr_cols) {
wim 36:9f5f86dfd44a 1966 _column = _nr_cols - 1;
wim 15:b70ebfffb258 1967 } else _column = column;
wim 8:03116f75b66e 1968
wim 15:b70ebfffb258 1969 // Sanity Check row
wim 15:b70ebfffb258 1970 if (row < 0) {
wim 15:b70ebfffb258 1971 _row = 0;
wim 15:b70ebfffb258 1972 }
wim 36:9f5f86dfd44a 1973 else if (row >= _nr_rows) {
wim 36:9f5f86dfd44a 1974 _row = _nr_rows - 1;
wim 15:b70ebfffb258 1975 } else _row = row;
wim 15:b70ebfffb258 1976
wim 15:b70ebfffb258 1977
wim 15:b70ebfffb258 1978 // Compute the memory address
wim 15:b70ebfffb258 1979 // For LCD40x4: switch controllers if needed
wim 15:b70ebfffb258 1980 // switch cursor if needed
wim 15:b70ebfffb258 1981 int addr = getAddress(_column, _row);
wim 8:03116f75b66e 1982
wim 13:24506ba22480 1983 _writeCommand(0x80 | addr);
wim 8:03116f75b66e 1984 }
simon 1:ac48b187213c 1985
wim 29:a3663151aa65 1986
wim 29:a3663151aa65 1987 /** Return the number of columns
wim 29:a3663151aa65 1988 *
wim 36:9f5f86dfd44a 1989 * @return The number of columns
wim 30:033048611c01 1990 *
wim 30:033048611c01 1991 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1992 */
wim 21:9eb628d9e164 1993 int TextLCD_Base::columns() {
wim 30:033048611c01 1994
wim 30:033048611c01 1995 // Columns encoded in b7..b0
wim 30:033048611c01 1996 //return (_type & 0xFF);
wim 31:ef31cd8a00d1 1997 return _nr_cols;
simon 1:ac48b187213c 1998 }
simon 1:ac48b187213c 1999
wim 29:a3663151aa65 2000 /** Return the number of rows
wim 29:a3663151aa65 2001 *
wim 36:9f5f86dfd44a 2002 * @return The number of rows
wim 30:033048611c01 2003 *
wim 30:033048611c01 2004 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 2005 */
wim 21:9eb628d9e164 2006 int TextLCD_Base::rows() {
wim 30:033048611c01 2007
wim 30:033048611c01 2008 // Rows encoded in b15..b8
wim 30:033048611c01 2009 //return ((_type >> 8) & 0xFF);
wim 30:033048611c01 2010 return _nr_rows;
simon 1:ac48b187213c 2011 }
wim 10:dd9b3a696acd 2012
wim 29:a3663151aa65 2013 /** Set the Cursormode
wim 29:a3663151aa65 2014 *
wim 29:a3663151aa65 2015 * @param cursorMode The Cursor mode (CurOff_BlkOff, CurOn_BlkOff, CurOff_BlkOn, CurOn_BlkOn)
wim 29:a3663151aa65 2016 */
wim 21:9eb628d9e164 2017 void TextLCD_Base::setCursor(LCDCursor cursorMode) {
wim 15:b70ebfffb258 2018
wim 17:652ab113bc2e 2019 // Save new cursor mode, needed when 2 controllers are in use or when display is switched off/on
wim 17:652ab113bc2e 2020 _currentCursor = cursorMode;
wim 10:dd9b3a696acd 2021
wim 17:652ab113bc2e 2022 // Configure only current LCD controller
wim 31:ef31cd8a00d1 2023 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 15:b70ebfffb258 2024 }
wim 15:b70ebfffb258 2025
wim 29:a3663151aa65 2026 /** Set the Displaymode
wim 29:a3663151aa65 2027 *
wim 29:a3663151aa65 2028 * @param displayMode The Display mode (DispOff, DispOn)
wim 29:a3663151aa65 2029 */
wim 21:9eb628d9e164 2030 void TextLCD_Base::setMode(LCDMode displayMode) {
wim 17:652ab113bc2e 2031
wim 17:652ab113bc2e 2032 // Save new displayMode, needed when 2 controllers are in use or when cursor is changed
wim 17:652ab113bc2e 2033 _currentMode = displayMode;
wim 41:111ca62e8a59 2034
wim 41:111ca62e8a59 2035 #if (LCD_TWO_CTRL == 1)
wim 17:652ab113bc2e 2036 // Select and configure second LCD controller when needed
wim 17:652ab113bc2e 2037 if(_type==LCD40x4) {
wim 21:9eb628d9e164 2038 if (_ctrl_idx==_LCDCtrl_0) {
wim 17:652ab113bc2e 2039 // Configure primary LCD controller
wim 17:652ab113bc2e 2040 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 11:9ec02df863a1 2041
wim 17:652ab113bc2e 2042 // Select 2nd controller
wim 21:9eb628d9e164 2043 _ctrl_idx=_LCDCtrl_1;
wim 17:652ab113bc2e 2044
wim 17:652ab113bc2e 2045 // Configure secondary LCD controller
wim 21:9eb628d9e164 2046 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 11:9ec02df863a1 2047
wim 17:652ab113bc2e 2048 // Restore current controller
wim 21:9eb628d9e164 2049 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 2050 }
wim 17:652ab113bc2e 2051 else {
wim 17:652ab113bc2e 2052 // Select primary controller
wim 21:9eb628d9e164 2053 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 2054
wim 17:652ab113bc2e 2055 // Configure primary LCD controller
wim 21:9eb628d9e164 2056 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 17:652ab113bc2e 2057
wim 17:652ab113bc2e 2058 // Restore current controller
wim 21:9eb628d9e164 2059 _ctrl_idx=_LCDCtrl_1;
wim 11:9ec02df863a1 2060
wim 17:652ab113bc2e 2061 // Configure secondary LCD controller
wim 17:652ab113bc2e 2062 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 10:dd9b3a696acd 2063 }
wim 17:652ab113bc2e 2064 }
wim 17:652ab113bc2e 2065 else {
wim 17:652ab113bc2e 2066 // Configure primary LCD controller
wim 17:652ab113bc2e 2067 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 2068 }
wim 41:111ca62e8a59 2069 #else
wim 41:111ca62e8a59 2070 // Support only one LCD controller
wim 41:111ca62e8a59 2071 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 41:111ca62e8a59 2072
wim 41:111ca62e8a59 2073 #endif
wim 17:652ab113bc2e 2074 }
wim 17:652ab113bc2e 2075
wim 29:a3663151aa65 2076 /** Low level method to restore the cursortype and display mode for current controller
wim 29:a3663151aa65 2077 */
wim 36:9f5f86dfd44a 2078 void TextLCD_Base::_setCursorAndDisplayMode(LCDMode displayMode, LCDCursor cursorType) {
wim 36:9f5f86dfd44a 2079
wim 36:9f5f86dfd44a 2080 // Configure current LCD controller
wim 36:9f5f86dfd44a 2081 switch (_ctrl) {
wim 36:9f5f86dfd44a 2082 case ST7070:
wim 36:9f5f86dfd44a 2083 //ST7070 does not support Cursorblink. The P bit selects the font instead !
wim 36:9f5f86dfd44a 2084 _writeCommand(0x08 | displayMode | (cursorType & 0x02));
wim 36:9f5f86dfd44a 2085 break;
wim 36:9f5f86dfd44a 2086 default:
wim 36:9f5f86dfd44a 2087 _writeCommand(0x08 | displayMode | cursorType);
wim 36:9f5f86dfd44a 2088 break;
wim 36:9f5f86dfd44a 2089 } //switch
wim 10:dd9b3a696acd 2090 }
wim 10:dd9b3a696acd 2091
wim 29:a3663151aa65 2092 /** Set the Backlight mode
wim 29:a3663151aa65 2093 *
wim 29:a3663151aa65 2094 * @param backlightMode The Backlight mode (LightOff, LightOn)
wim 29:a3663151aa65 2095 */
wim 21:9eb628d9e164 2096 void TextLCD_Base::setBacklight(LCDBacklight backlightMode) {
wim 20:e0da005a777f 2097
wim 35:311be6444a39 2098 #if (BACKLIGHT_INV==0)
wim 35:311be6444a39 2099 // Positive Backlight control pin logic
wim 20:e0da005a777f 2100 if (backlightMode == LightOn) {
wim 35:311be6444a39 2101 this->_setBL(true);
wim 20:e0da005a777f 2102 }
wim 20:e0da005a777f 2103 else {
wim 21:9eb628d9e164 2104 this->_setBL(false);
wim 20:e0da005a777f 2105 }
wim 35:311be6444a39 2106 #else
wim 35:311be6444a39 2107 // Inverted Backlight control pin logic
wim 35:311be6444a39 2108 if (backlightMode == LightOn) {
wim 35:311be6444a39 2109 this->_setBL(false);
wim 35:311be6444a39 2110 }
wim 35:311be6444a39 2111 else {
wim 35:311be6444a39 2112 this->_setBL(true);
wim 35:311be6444a39 2113 }
wim 35:311be6444a39 2114 #endif
wim 20:e0da005a777f 2115 }
wim 20:e0da005a777f 2116
wim 29:a3663151aa65 2117 /** Set User Defined Characters
wim 29:a3663151aa65 2118 *
wim 34:e5a0dcb43ecc 2119 * @param unsigned char c The Index of the UDC (0..7) for HD44780 or clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 2120 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 29:a3663151aa65 2121 */
wim 21:9eb628d9e164 2122 void TextLCD_Base::setUDC(unsigned char c, char *udc_data) {
wim 41:111ca62e8a59 2123
wim 41:111ca62e8a59 2124 #if (LCD_TWO_CTRL == 1)
wim 15:b70ebfffb258 2125 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 2126 if(_type==LCD40x4) {
wim 19:c747b9e2e7b8 2127 _LCDCtrl_Idx current_ctrl_idx = _ctrl_idx; // Temp save current controller
wim 15:b70ebfffb258 2128
wim 15:b70ebfffb258 2129 // Select primary controller
wim 21:9eb628d9e164 2130 _ctrl_idx=_LCDCtrl_0;
wim 15:b70ebfffb258 2131
wim 15:b70ebfffb258 2132 // Configure primary LCD controller
wim 15:b70ebfffb258 2133 _setUDC(c, udc_data);
wim 15:b70ebfffb258 2134
wim 15:b70ebfffb258 2135 // Select 2nd controller
wim 21:9eb628d9e164 2136 _ctrl_idx=_LCDCtrl_1;
wim 15:b70ebfffb258 2137
wim 15:b70ebfffb258 2138 // Configure secondary LCD controller
wim 15:b70ebfffb258 2139 _setUDC(c, udc_data);
wim 11:9ec02df863a1 2140
wim 15:b70ebfffb258 2141 // Restore current controller
wim 19:c747b9e2e7b8 2142 _ctrl_idx=current_ctrl_idx;
wim 15:b70ebfffb258 2143 }
wim 15:b70ebfffb258 2144 else {
wim 15:b70ebfffb258 2145 // Configure primary LCD controller
wim 15:b70ebfffb258 2146 _setUDC(c, udc_data);
wim 34:e5a0dcb43ecc 2147 }
wim 41:111ca62e8a59 2148 #else
wim 41:111ca62e8a59 2149 // Support only one LCD controller
wim 41:111ca62e8a59 2150 _setUDC(c, udc_data);
wim 41:111ca62e8a59 2151 #endif
wim 15:b70ebfffb258 2152 }
wim 15:b70ebfffb258 2153
wim 34:e5a0dcb43ecc 2154 /** Low level method to store user defined characters for current controller
wim 34:e5a0dcb43ecc 2155 *
wim 34:e5a0dcb43ecc 2156 * @param unsigned char c The Index of the UDC (0..7) for HD44780 clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 2157 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 34:e5a0dcb43ecc 2158 */
wim 34:e5a0dcb43ecc 2159 void TextLCD_Base::_setUDC(unsigned char c, char *udc_data) {
wim 34:e5a0dcb43ecc 2160
wim 34:e5a0dcb43ecc 2161 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2162 case PCF2103_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 2163 case PCF2113_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 2164 case PCF2116_3V3 :
wim 34:e5a0dcb43ecc 2165 case PCF2116_5V :
wim 40:d3496c3ea301 2166 case PCF2119_3V3 : // Some UDCs may be used for Icons
wim 40:d3496c3ea301 2167 case PCF2119R_3V3: // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 2168 c = c & 0x0F; // mask down to valid range
wim 34:e5a0dcb43ecc 2169 break;
wim 34:e5a0dcb43ecc 2170
wim 34:e5a0dcb43ecc 2171 default:
wim 34:e5a0dcb43ecc 2172 c = c & 0x07; // mask down to valid range
wim 34:e5a0dcb43ecc 2173 break;
wim 34:e5a0dcb43ecc 2174 } //switch _ctrl
wim 34:e5a0dcb43ecc 2175
wim 34:e5a0dcb43ecc 2176 // Select DD RAM for current LCD controller
wim 34:e5a0dcb43ecc 2177 // This is needed to correctly set Bit 6 of the addresspointer for controllers that support 16 UDCs
wim 34:e5a0dcb43ecc 2178 _writeCommand(0x80 | ((c << 3) & 0x40)) ;
wim 34:e5a0dcb43ecc 2179
wim 34:e5a0dcb43ecc 2180 // Select CG RAM for current LCD controller
wim 34:e5a0dcb43ecc 2181 _writeCommand(0x40 | ((c << 3) & 0x3F)); //Set CG-RAM address, (note that Bit 6 is retained and can not be set by this command !)
wim 34:e5a0dcb43ecc 2182 //8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 2183 // Store UDC pattern
wim 34:e5a0dcb43ecc 2184 for (int i=0; i<8; i++) {
wim 34:e5a0dcb43ecc 2185 _writeData(*udc_data++);
wim 34:e5a0dcb43ecc 2186 }
wim 34:e5a0dcb43ecc 2187
wim 34:e5a0dcb43ecc 2188 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 34:e5a0dcb43ecc 2189 int addr = getAddress(_column, _row);
wim 34:e5a0dcb43ecc 2190 _writeCommand(0x80 | addr);
wim 34:e5a0dcb43ecc 2191 }
wim 32:59c4b8f648d4 2192
wim 39:e9c2319de9c5 2193 #if(LCD_BLINK == 1)
wim 36:9f5f86dfd44a 2194 /** Set UDC Blink and Icon blink
wim 33:900a94bc7585 2195 * setUDCBlink method is supported by some compatible devices (eg SSD1803)
wim 33:900a94bc7585 2196 *
wim 33:900a94bc7585 2197 * @param blinkMode The Blink mode (BlinkOff, BlinkOn)
wim 33:900a94bc7585 2198 */
wim 33:900a94bc7585 2199 void TextLCD_Base::setUDCBlink(LCDBlink blinkMode){
wim 36:9f5f86dfd44a 2200 // Blinking UDCs (and icons) are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 2201 // The blinking pixels in the UDC and icons can be controlled by setting additional bits in the UDC or icon bitpattern.
wim 36:9f5f86dfd44a 2202 // UDCs are defined by an 8 byte bitpattern. The P0..P4 form the character pattern.
wim 33:900a94bc7585 2203 // P7 P6 P5 P4 P3 P2 P1 P0
wim 33:900a94bc7585 2204 // 0 B1 B0 x 0 1 1 1 0
wim 33:900a94bc7585 2205 // 1 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 2206 // .............
wim 33:900a94bc7585 2207 // 7 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 2208 //
wim 33:900a94bc7585 2209 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 33:900a94bc7585 2210 // B1 B0 Mode
wim 33:900a94bc7585 2211 // 0 0 No Blinking in this row of the UDC
wim 33:900a94bc7585 2212 // 0 1 Enabled pixels in P4 will blink
wim 33:900a94bc7585 2213 // 1 x Enabled pixels in P0..P4 will blink
wim 36:9f5f86dfd44a 2214 //
wim 36:9f5f86dfd44a 2215 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2216 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2217 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2218 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2219 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2220 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 33:900a94bc7585 2221 switch (blinkMode) {
wim 33:900a94bc7585 2222 case BlinkOn:
wim 36:9f5f86dfd44a 2223 // Controllers that support UDC/Icon Blink
wim 33:900a94bc7585 2224 switch (_ctrl) {
wim 40:d3496c3ea301 2225 case KS0073 :
wim 40:d3496c3ea301 2226 case KS0078 :
wim 40:d3496c3ea301 2227 case HD66712 :
wim 36:9f5f86dfd44a 2228 _function_1 |= 0x02; // Enable UDC/Icon Blink
wim 36:9f5f86dfd44a 2229 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 2230
wim 33:900a94bc7585 2231 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 40:d3496c3ea301 2232 break; // case KS0073, KS0078, HD66712 Controller
wim 33:900a94bc7585 2233
wim 33:900a94bc7585 2234 case US2066_3V3 :
wim 33:900a94bc7585 2235 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2236 _function_1 |= 0x04; // Enable UDC/Icon Blink
wim 33:900a94bc7585 2237 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2238 // Select Ext Instr Set
wim 33:900a94bc7585 2239
wim 33:900a94bc7585 2240 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2241 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2242 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 2243
wim 36:9f5f86dfd44a 2244 case PCF2103_3V3 :
wim 36:9f5f86dfd44a 2245 case PCF2113_3V3 :
wim 36:9f5f86dfd44a 2246 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2247 case PCF2119R_3V3 :
wim 36:9f5f86dfd44a 2248 // Enable Icon Blink
wim 36:9f5f86dfd44a 2249 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 2250 _writeCommand(0x08 | 0x02); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 2251 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 2252
wim 36:9f5f86dfd44a 2253 break;
wim 33:900a94bc7585 2254
wim 33:900a94bc7585 2255 default:
wim 33:900a94bc7585 2256 //Unsupported feature for other controllers
wim 33:900a94bc7585 2257 break;
wim 33:900a94bc7585 2258 } //switch _ctrl
wim 33:900a94bc7585 2259
wim 36:9f5f86dfd44a 2260 break; // BlinkOn
wim 33:900a94bc7585 2261
wim 33:900a94bc7585 2262 case BlinkOff:
wim 33:900a94bc7585 2263 // Controllers that support UDC Blink
wim 33:900a94bc7585 2264 switch (_ctrl) {
wim 40:d3496c3ea301 2265 case KS0073 :
wim 40:d3496c3ea301 2266 case KS0078 :
wim 40:d3496c3ea301 2267 case HD66712:
wim 36:9f5f86dfd44a 2268 _function_1 &= ~0x02; // Disable UDC/Icon Blink
wim 36:9f5f86dfd44a 2269 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 2270
wim 33:900a94bc7585 2271 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 40:d3496c3ea301 2272 break; // case KS0073, KS0078, HD66712 Controller
wim 33:900a94bc7585 2273
wim 33:900a94bc7585 2274 case US2066_3V3 :
wim 33:900a94bc7585 2275 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2276 _function_1 &= ~0x04; // Disable UDC/Icon Blink
wim 33:900a94bc7585 2277 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2278 // Select Ext Instr Set
wim 33:900a94bc7585 2279
wim 33:900a94bc7585 2280 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2281 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2282 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 2283
wim 36:9f5f86dfd44a 2284 case PCF2103_3V3 :
wim 39:e9c2319de9c5 2285 case PCF2113_3V3 :
wim 39:e9c2319de9c5 2286 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2287 case PCF2119R_3V3 :
wim 36:9f5f86dfd44a 2288 // Disable Icon Blink
wim 36:9f5f86dfd44a 2289 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 2290 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 2291 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 2292
wim 36:9f5f86dfd44a 2293 break;
wim 33:900a94bc7585 2294
wim 33:900a94bc7585 2295 default:
wim 33:900a94bc7585 2296 //Unsupported feature for other controllers
wim 33:900a94bc7585 2297 break;
wim 33:900a94bc7585 2298 } //switch _ctrl
wim 33:900a94bc7585 2299
wim 36:9f5f86dfd44a 2300 break; //BlinkOff
wim 33:900a94bc7585 2301
wim 33:900a94bc7585 2302 default:
wim 33:900a94bc7585 2303 break;
wim 33:900a94bc7585 2304 } // blinkMode
wim 33:900a94bc7585 2305
wim 33:900a94bc7585 2306 } // setUDCBlink()
wim 39:e9c2319de9c5 2307 #endif
wim 33:900a94bc7585 2308
wim 41:111ca62e8a59 2309 #if(LCD_CONTRAST == 1)
wim 32:59c4b8f648d4 2310 /** Set Contrast
wim 32:59c4b8f648d4 2311 * setContrast method is supported by some compatible devices (eg ST7032i) that have onboard LCD voltage generation
wim 32:59c4b8f648d4 2312 * Initial code for ST70XX imported from fork by JH1PJL
wim 32:59c4b8f648d4 2313 *
wim 32:59c4b8f648d4 2314 * @param unsigned char c contrast data (6 significant bits, valid range 0..63, Value 0 will disable the Vgen)
wim 32:59c4b8f648d4 2315 * @return none
wim 32:59c4b8f648d4 2316 */
wim 32:59c4b8f648d4 2317 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2318 void TextLCD_Base::setContrast(unsigned char c) {
wim 32:59c4b8f648d4 2319
wim 32:59c4b8f648d4 2320 // Function set mode stored during Init. Make sure we dont accidentally switch between 1-line and 2-line mode!
wim 32:59c4b8f648d4 2321 // Icon/Booster mode stored during Init. Make sure we dont accidentally change this!
wim 32:59c4b8f648d4 2322
wim 32:59c4b8f648d4 2323 _contrast = c & 0x3F; // Sanity check
wim 32:59c4b8f648d4 2324
wim 33:900a94bc7585 2325 switch (_ctrl) {
wim 32:59c4b8f648d4 2326 case PCF2113_3V3 :
wim 39:e9c2319de9c5 2327 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2328 case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2329 if (_contrast < 5) _contrast = 0; // See datasheet. Sanity check for PCF2113/PCF2119
wim 32:59c4b8f648d4 2330 if (_contrast > 55) _contrast = 55;
wim 32:59c4b8f648d4 2331
wim 32:59c4b8f648d4 2332 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 2333 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 2334 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 2335 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2336 break;
wim 32:59c4b8f648d4 2337
wim 32:59c4b8f648d4 2338 case ST7032_3V3 :
wim 32:59c4b8f648d4 2339 case ST7032_5V :
wim 32:59c4b8f648d4 2340 case ST7036_3V3 :
wim 32:59c4b8f648d4 2341 // case ST7036_5V :
wim 41:111ca62e8a59 2342 case SSD1803_3V3 :
wim 41:111ca62e8a59 2343 case SPLC792A_3V3 :
wim 32:59c4b8f648d4 2344 _writeCommand(0x20 | _function | 0x01); // Select Instruction Set = 1
wim 32:59c4b8f648d4 2345 _writeCommand(0x70 | (_contrast & 0x0F)); // Contrast Low bits
wim 32:59c4b8f648d4 2346 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Contrast High bits
wim 32:59c4b8f648d4 2347 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2348 break;
wim 32:59c4b8f648d4 2349
wim 33:900a94bc7585 2350 case US2066_3V3 :
wim 33:900a94bc7585 2351 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2352 // Select Extended Instruction Set
wim 33:900a94bc7585 2353
wim 33:900a94bc7585 2354 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 2355
wim 33:900a94bc7585 2356 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 2357 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits. Use 6 bits for compatibility
wim 33:900a94bc7585 2358
wim 33:900a94bc7585 2359 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 2360
wim 33:900a94bc7585 2361 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2362 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2363 break;
wim 33:900a94bc7585 2364
wim 34:e5a0dcb43ecc 2365 //not yet tested on hardware
wim 32:59c4b8f648d4 2366 case PT6314 :
wim 32:59c4b8f648d4 2367 // Only 2 significant bits
wim 32:59c4b8f648d4 2368 // 0x00 = 100%
wim 32:59c4b8f648d4 2369 // 0x01 = 75%
wim 32:59c4b8f648d4 2370 // 0x02 = 50%
wim 32:59c4b8f648d4 2371 // 0x03 = 25%
wim 32:59c4b8f648d4 2372 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 32:59c4b8f648d4 2373 break;
wim 32:59c4b8f648d4 2374
wim 32:59c4b8f648d4 2375 default:
wim 32:59c4b8f648d4 2376 //Unsupported feature for other controllers
wim 33:900a94bc7585 2377 break;
wim 33:900a94bc7585 2378 } // end switch
wim 33:900a94bc7585 2379 } // end setContrast()
wim 41:111ca62e8a59 2380 #endif
wim 32:59c4b8f648d4 2381
wim 39:e9c2319de9c5 2382 #if(LCD_POWER == 1)
wim 32:59c4b8f648d4 2383 /** Set Power
wim 32:59c4b8f648d4 2384 * setPower method is supported by some compatible devices (eg SSD1803) that have power down modes
wim 32:59c4b8f648d4 2385 *
wim 32:59c4b8f648d4 2386 * @param bool powerOn Power on/off
wim 32:59c4b8f648d4 2387 * @return none
wim 32:59c4b8f648d4 2388 */
wim 32:59c4b8f648d4 2389 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2390 void TextLCD_Base::setPower(bool powerOn) {
wim 32:59c4b8f648d4 2391
wim 32:59c4b8f648d4 2392 if (powerOn) {
wim 32:59c4b8f648d4 2393 // Switch on
wim 32:59c4b8f648d4 2394 setMode(DispOn);
wim 32:59c4b8f648d4 2395
wim 32:59c4b8f648d4 2396 // Controllers that supports specific Power Down mode
wim 32:59c4b8f648d4 2397 switch (_ctrl) {
wim 32:59c4b8f648d4 2398
wim 32:59c4b8f648d4 2399 // case PCF2113_3V3 :
wim 39:e9c2319de9c5 2400 // case PCF2119_3V3 :
wim 39:e9c2319de9c5 2401 // case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2402 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2403 //@todo
wim 33:900a94bc7585 2404 // enable Booster Bon
wim 33:900a94bc7585 2405
wim 33:900a94bc7585 2406 case WS0010:
wim 33:900a94bc7585 2407 _writeCommand(0x17); // Char mode, DC/DC on
wim 33:900a94bc7585 2408 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 2409 break;
wim 33:900a94bc7585 2410
wim 36:9f5f86dfd44a 2411 case KS0073:
wim 33:900a94bc7585 2412 case KS0078:
wim 32:59c4b8f648d4 2413 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2414 // case SSD1803_5V :
wim 33:900a94bc7585 2415 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2416 _writeCommand(0x02); // Power On
wim 32:59c4b8f648d4 2417 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2418 break;
wim 32:59c4b8f648d4 2419
wim 32:59c4b8f648d4 2420 default:
wim 32:59c4b8f648d4 2421 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2422 break;
wim 32:59c4b8f648d4 2423 } // end switch
wim 32:59c4b8f648d4 2424 }
wim 32:59c4b8f648d4 2425 else {
wim 32:59c4b8f648d4 2426 // Switch off
wim 32:59c4b8f648d4 2427 setMode(DispOff);
wim 32:59c4b8f648d4 2428
wim 32:59c4b8f648d4 2429 // Controllers that support specific Power Down mode
wim 32:59c4b8f648d4 2430 switch (_ctrl) {
wim 32:59c4b8f648d4 2431
wim 32:59c4b8f648d4 2432 // case PCF2113_3V3 :
wim 39:e9c2319de9c5 2433 // case PCF2119_3V3 :
wim 39:e9c2319de9c5 2434 // case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2435 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2436 //@todo
wim 33:900a94bc7585 2437 // disable Booster Bon
wim 33:900a94bc7585 2438
wim 33:900a94bc7585 2439 case WS0010:
wim 33:900a94bc7585 2440 _writeCommand(0x13); // Char mode, DC/DC off
wim 33:900a94bc7585 2441 break;
wim 33:900a94bc7585 2442
wim 36:9f5f86dfd44a 2443 case KS0073:
wim 33:900a94bc7585 2444 case KS0078:
wim 32:59c4b8f648d4 2445 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2446 // case SSD1803_5V :
wim 33:900a94bc7585 2447 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2448 _writeCommand(0x03); // Power Down
wim 32:59c4b8f648d4 2449 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2450 break;
wim 32:59c4b8f648d4 2451
wim 32:59c4b8f648d4 2452 default:
wim 32:59c4b8f648d4 2453 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2454 break;
wim 32:59c4b8f648d4 2455 } // end switch
wim 32:59c4b8f648d4 2456 }
wim 33:900a94bc7585 2457 } // end setPower()
wim 39:e9c2319de9c5 2458 #endif
wim 39:e9c2319de9c5 2459
wim 39:e9c2319de9c5 2460 #if(LCD_ORIENT == 1)
wim 33:900a94bc7585 2461 /** Set Orient
wim 33:900a94bc7585 2462 * setOrient method is supported by some compatible devices (eg SSD1803, US2066) that have top/bottom view modes
wim 33:900a94bc7585 2463 *
wim 33:900a94bc7585 2464 * @param LCDOrient orient Orientation
wim 33:900a94bc7585 2465 * @return none
wim 33:900a94bc7585 2466 */
wim 33:900a94bc7585 2467 void TextLCD_Base::setOrient(LCDOrient orient){
wim 33:900a94bc7585 2468
wim 33:900a94bc7585 2469 switch (orient) {
wim 33:900a94bc7585 2470
wim 33:900a94bc7585 2471 case Top:
wim 33:900a94bc7585 2472 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2473 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2474 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2475 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2476 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2477 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2478 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2479 break;
wim 39:e9c2319de9c5 2480
wim 39:e9c2319de9c5 2481 case PCF2119_3V3:
wim 39:e9c2319de9c5 2482 case PCF2119R_3V3:
wim 39:e9c2319de9c5 2483 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 39:e9c2319de9c5 2484 _writeCommand(0x07); // Display Conf Set 0000 0, 1, P=1, Q=1 (Instr. Set 1)
wim 39:e9c2319de9c5 2485 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 39:e9c2319de9c5 2486 break;
wim 34:e5a0dcb43ecc 2487
wim 33:900a94bc7585 2488 case SSD1803_3V3 :
wim 33:900a94bc7585 2489 // case SSD1803_5V :
wim 33:900a94bc7585 2490 case US2066_3V3 :
wim 33:900a94bc7585 2491 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2492 // Select Extended Instruction Set
wim 33:900a94bc7585 2493 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2494 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2495
wim 33:900a94bc7585 2496 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2497 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2498 break;
wim 36:9f5f86dfd44a 2499
wim 36:9f5f86dfd44a 2500 case ST7070:
wim 36:9f5f86dfd44a 2501 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL, N, EXT=1, x, x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2502
wim 36:9f5f86dfd44a 2503 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2504 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2505 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2506 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2507
wim 36:9f5f86dfd44a 2508 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2509
wim 36:9f5f86dfd44a 2510 break; // case ST7070 Controller
wim 33:900a94bc7585 2511
wim 33:900a94bc7585 2512 default:
wim 33:900a94bc7585 2513 //Unsupported feature for other controllers
wim 33:900a94bc7585 2514 break;
wim 33:900a94bc7585 2515
wim 33:900a94bc7585 2516 } // end switch _ctrl
wim 33:900a94bc7585 2517 break; // end Top
wim 33:900a94bc7585 2518
wim 33:900a94bc7585 2519 case Bottom:
wim 33:900a94bc7585 2520 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2521 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2522 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2523 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2524 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2525 _writeCommand(0x06); // Display Conf Set 0000 0, 1, P=1, Q=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2526 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2527 break;
wim 39:e9c2319de9c5 2528
wim 39:e9c2319de9c5 2529 case PCF2119_3V3:
wim 39:e9c2319de9c5 2530 case PCF2119R_3V3 :
wim 39:e9c2319de9c5 2531 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 39:e9c2319de9c5 2532 _writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim 39:e9c2319de9c5 2533 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 39:e9c2319de9c5 2534 break;
wim 34:e5a0dcb43ecc 2535
wim 33:900a94bc7585 2536 case SSD1803_3V3 :
wim 33:900a94bc7585 2537 // case SSD1803_5V :
wim 33:900a94bc7585 2538 case US2066_3V3 :
wim 33:900a94bc7585 2539 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2540 // Select Extended Instruction Set
wim 33:900a94bc7585 2541 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2542 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2543
wim 33:900a94bc7585 2544 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2545 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2546 break;
wim 36:9f5f86dfd44a 2547
wim 36:9f5f86dfd44a 2548 case ST7070:
wim 36:9f5f86dfd44a 2549 //Note: this does not result in correct top/bottom view.
wim 36:9f5f86dfd44a 2550 //The left and right half of each row are reversed and the addressing of both rows is also incorrect:
wim 36:9f5f86dfd44a 2551 //Top/bottomline when orientation is flipped:
wim 36:9f5f86dfd44a 2552 // 0x48...0x4F 0x40...0x47
wim 36:9f5f86dfd44a 2553 // 0x08...0x0F 0x00...0x07
wim 36:9f5f86dfd44a 2554 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2555
wim 36:9f5f86dfd44a 2556 _writeCommand(0x40 | 0x0F); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2557 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2558 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2559 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2560
wim 36:9f5f86dfd44a 2561 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2562
wim 36:9f5f86dfd44a 2563 break; // case ST7070 Controller
wim 33:900a94bc7585 2564
wim 33:900a94bc7585 2565 default:
wim 33:900a94bc7585 2566 //Unsupported feature for other controllers
wim 33:900a94bc7585 2567 break;
wim 33:900a94bc7585 2568
wim 33:900a94bc7585 2569 } // end switch _ctrl
wim 33:900a94bc7585 2570
wim 33:900a94bc7585 2571 break; // end Bottom
wim 33:900a94bc7585 2572 } // end switch orient
wim 33:900a94bc7585 2573 } // end setOrient()
wim 39:e9c2319de9c5 2574 #endif
wim 39:e9c2319de9c5 2575
wim 39:e9c2319de9c5 2576 #if(LCD_BIGFONT == 1)
wim 34:e5a0dcb43ecc 2577 /** Set Big Font
wim 34:e5a0dcb43ecc 2578 * setBigFont method is supported by some compatible devices (eg SSD1803, US2066)
wim 34:e5a0dcb43ecc 2579 *
wim 34:e5a0dcb43ecc 2580 * @param lines The selected Big Font lines (None, TopLine, CenterLine, BottomLine, TopBottomLine)
wim 34:e5a0dcb43ecc 2581 * Double height characters can be shown on lines 1+2, 2+3, 3+4 or 1+2 and 3+4
wim 34:e5a0dcb43ecc 2582 * Valid double height lines depend on the LCDs number of rows.
wim 34:e5a0dcb43ecc 2583 */
wim 34:e5a0dcb43ecc 2584 void TextLCD_Base::setBigFont(LCDBigFont lines) {
wim 34:e5a0dcb43ecc 2585
wim 34:e5a0dcb43ecc 2586 switch (lines) {
wim 34:e5a0dcb43ecc 2587 case None:
wim 34:e5a0dcb43ecc 2588 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2589 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2590 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2591 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2592 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2593 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2594 // Default
wim 34:e5a0dcb43ecc 2595 _function = _function & ~0x04; // Set function, 0 0 1 DL N DH=0 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2596 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2597 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2598 break; // end US2066
wim 34:e5a0dcb43ecc 2599
wim 34:e5a0dcb43ecc 2600 default:
wim 34:e5a0dcb43ecc 2601 break; // end default
wim 34:e5a0dcb43ecc 2602 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2603 break; // end None
wim 34:e5a0dcb43ecc 2604
wim 34:e5a0dcb43ecc 2605 case TopLine:
wim 34:e5a0dcb43ecc 2606 if (_nr_rows < 2) return; //Sanity check
wim 34:e5a0dcb43ecc 2607
wim 34:e5a0dcb43ecc 2608 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2609 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2610 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2611 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2612 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2613 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2614 // Default
wim 34:e5a0dcb43ecc 2615 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2616 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2617 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2618 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2619
wim 34:e5a0dcb43ecc 2620 default:
wim 34:e5a0dcb43ecc 2621 break; // end default
wim 34:e5a0dcb43ecc 2622 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2623 break; // end TopLine
wim 34:e5a0dcb43ecc 2624
wim 34:e5a0dcb43ecc 2625 case CenterLine:
wim 34:e5a0dcb43ecc 2626 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2627
wim 34:e5a0dcb43ecc 2628 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2629 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2630 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2631 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2632 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2633 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2634 // Default
wim 34:e5a0dcb43ecc 2635 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2636 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2637 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2638 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2639
wim 34:e5a0dcb43ecc 2640 default:
wim 34:e5a0dcb43ecc 2641 break; // end default
wim 34:e5a0dcb43ecc 2642 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2643 break; // end CenterLine
wim 34:e5a0dcb43ecc 2644
wim 34:e5a0dcb43ecc 2645 case BottomLine:
wim 34:e5a0dcb43ecc 2646 if (_nr_rows < 3) return; //Sanity check
wim 34:e5a0dcb43ecc 2647
wim 34:e5a0dcb43ecc 2648 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2649 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2650 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2651 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2652 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2653 if (_nr_rows == 3) {
wim 34:e5a0dcb43ecc 2654 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2655 }
wim 34:e5a0dcb43ecc 2656 else {
wim 34:e5a0dcb43ecc 2657 _writeCommand(0x10); // Double Height, 0 0 0 1 UD2=0, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2658 }
wim 34:e5a0dcb43ecc 2659 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2660 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2661 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2662 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2663
wim 34:e5a0dcb43ecc 2664 default:
wim 34:e5a0dcb43ecc 2665 break; // end default
wim 34:e5a0dcb43ecc 2666 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2667 break; // end BottomLine
wim 34:e5a0dcb43ecc 2668
wim 34:e5a0dcb43ecc 2669 case TopBottomLine:
wim 34:e5a0dcb43ecc 2670 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2671
wim 34:e5a0dcb43ecc 2672 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2673 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2674 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2675 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2676 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2677 _writeCommand(0x18); // Double Height, 0 0 0 1 UD2=1, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2678 // Default
wim 34:e5a0dcb43ecc 2679 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2680 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2681 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2682 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2683
wim 34:e5a0dcb43ecc 2684 default:
wim 34:e5a0dcb43ecc 2685 break; // end default
wim 34:e5a0dcb43ecc 2686 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2687 break; // end TopBottomLine
wim 34:e5a0dcb43ecc 2688
wim 34:e5a0dcb43ecc 2689 } // end switch lines
wim 34:e5a0dcb43ecc 2690
wim 34:e5a0dcb43ecc 2691 } // end setBigFont()
wim 39:e9c2319de9c5 2692 #endif
wim 39:e9c2319de9c5 2693
wim 41:111ca62e8a59 2694
wim 41:111ca62e8a59 2695 #if (LCD_FONTSEL == 1)
wim 41:111ca62e8a59 2696 /** Set Font
wim 41:111ca62e8a59 2697 * setFont method is supported by some compatible devices (eg SSD1803, US2066, ST7070)
wim 41:111ca62e8a59 2698 *
wim 41:111ca62e8a59 2699 * @param LCDFont font The selected Font
wim 41:111ca62e8a59 2700 * @return none
wim 41:111ca62e8a59 2701 *
wim 41:111ca62e8a59 2702 * Note: most controllers support only one font and the hardware specific
wim 41:111ca62e8a59 2703 * fonttable is encoded as part of the controller type number (eg PCF21XXC or PCF21XXR).
wim 41:111ca62e8a59 2704 * Some controllers support multiple tables that can only be selected by logic levels on a few pins.
wim 41:111ca62e8a59 2705 * Some controllers also support runtime fontable switching through a specific instruction
wim 41:111ca62e8a59 2706 */
wim 41:111ca62e8a59 2707 void TextLCD_Base::setFont(LCDFont font) {
wim 41:111ca62e8a59 2708
wim 41:111ca62e8a59 2709 switch (font) {
wim 41:111ca62e8a59 2710 case Font_RA: // UK/EU
wim 41:111ca62e8a59 2711 switch (_ctrl) {
wim 41:111ca62e8a59 2712 case SSD1803_3V3 :
wim 41:111ca62e8a59 2713 case US2066_3V3 :
wim 41:111ca62e8a59 2714 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 41:111ca62e8a59 2715 // Select Extended Instruction Set
wim 41:111ca62e8a59 2716 _writeCommand(0x72); // ROM Select command, 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 41:111ca62e8a59 2717 _writeData(0x00); // ROM_0 Select data, 0 0 0 0 ROM2 ROM1 0 0 (Ext Instr Set)
wim 41:111ca62e8a59 2718
wim 41:111ca62e8a59 2719 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS (Std Instr Set)
wim 41:111ca62e8a59 2720
wim 41:111ca62e8a59 2721 _font = font; // Save active font
wim 41:111ca62e8a59 2722 break; // end SSD1803, US2066
wim 41:111ca62e8a59 2723
wim 41:111ca62e8a59 2724 case ST7070:
wim 41:111ca62e8a59 2725 //ST7070 does not support Cursorblink. The P bit selects the font instead !
wim 41:111ca62e8a59 2726 _writeCommand(0x08 | _currentMode | (_currentCursor & 0x02));
wim 41:111ca62e8a59 2727
wim 41:111ca62e8a59 2728 _font = font; // Save active font
wim 41:111ca62e8a59 2729 break; // end ST7070
wim 41:111ca62e8a59 2730
wim 41:111ca62e8a59 2731 default:
wim 41:111ca62e8a59 2732 break; // end default
wim 41:111ca62e8a59 2733 } // end switch _ctrl
wim 41:111ca62e8a59 2734 break; // end Font_RA
wim 41:111ca62e8a59 2735
wim 41:111ca62e8a59 2736 case Font_RB: // UK/CYR
wim 41:111ca62e8a59 2737 switch (_ctrl) {
wim 41:111ca62e8a59 2738 case SSD1803_3V3 :
wim 41:111ca62e8a59 2739 case US2066_3V3 :
wim 41:111ca62e8a59 2740 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 41:111ca62e8a59 2741 // Select Extended Instruction Set
wim 41:111ca62e8a59 2742 _writeCommand(0x72); // ROM Select command, 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 41:111ca62e8a59 2743 _writeData(0x04); // ROM_0 Select data, 0 0 0 0 ROM2 ROM1 0 0 (Ext Instr Set)
wim 41:111ca62e8a59 2744
wim 41:111ca62e8a59 2745 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS (Std Instr Set)
wim 41:111ca62e8a59 2746
wim 41:111ca62e8a59 2747 _font = font; // Save active font
wim 41:111ca62e8a59 2748 break; // end SSD1803, US2066
wim 41:111ca62e8a59 2749
wim 41:111ca62e8a59 2750 case ST7070:
wim 41:111ca62e8a59 2751 //ST7070 does not support Cursorblink. The P bit selects the font instead !
wim 41:111ca62e8a59 2752 _writeCommand(0x08 | _currentMode | (_currentCursor & 0x02) | 0x01);
wim 41:111ca62e8a59 2753
wim 41:111ca62e8a59 2754 _font = font; // Save active font
wim 41:111ca62e8a59 2755 break; // end ST7070
wim 41:111ca62e8a59 2756
wim 41:111ca62e8a59 2757 default:
wim 41:111ca62e8a59 2758 break; // end default
wim 41:111ca62e8a59 2759 } // end switch _ctrl
wim 41:111ca62e8a59 2760 break; // end Font_RB
wim 41:111ca62e8a59 2761
wim 41:111ca62e8a59 2762 case Font_0: //Font_O is pretty similar to ROM_C
wim 41:111ca62e8a59 2763 case Font_RC: // UK/JAP
wim 41:111ca62e8a59 2764 switch (_ctrl) {
wim 41:111ca62e8a59 2765 case SSD1803_3V3 :
wim 41:111ca62e8a59 2766 case US2066_3V3 :
wim 41:111ca62e8a59 2767 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 41:111ca62e8a59 2768 // Select Extended Instruction Set
wim 41:111ca62e8a59 2769 _writeCommand(0x72); // ROM Select command, 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 41:111ca62e8a59 2770 _writeData(0x08); // ROM_0 Select data, 0 0 0 0 ROM2 ROM1 0 0 (Ext Instr Set)
wim 41:111ca62e8a59 2771
wim 41:111ca62e8a59 2772 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS (Std Instr Set)
wim 41:111ca62e8a59 2773
wim 41:111ca62e8a59 2774 _font = font; // Save active font
wim 41:111ca62e8a59 2775 break; // end SSD1803, US2066
wim 41:111ca62e8a59 2776
wim 41:111ca62e8a59 2777 default:
wim 41:111ca62e8a59 2778 break; // end default
wim 41:111ca62e8a59 2779 } // end switch _ctrl
wim 41:111ca62e8a59 2780 break; // end Font_RC
wim 41:111ca62e8a59 2781 } // end switch font
wim 41:111ca62e8a59 2782
wim 41:111ca62e8a59 2783 //SSD1803 seems to screw up cursor position after selecting new font. Restore to make sure...
wim 41:111ca62e8a59 2784 //Set next memoryaddress, make sure cursor blinks at next location
wim 41:111ca62e8a59 2785 int addr = getAddress(_column, _row);
wim 41:111ca62e8a59 2786 _writeCommand(0x80 | addr);
wim 41:111ca62e8a59 2787
wim 41:111ca62e8a59 2788 }
wim 41:111ca62e8a59 2789 #endif
wim 41:111ca62e8a59 2790
wim 41:111ca62e8a59 2791
wim 39:e9c2319de9c5 2792 #if(LCD_ICON==1)
wim 36:9f5f86dfd44a 2793 /** Set Icons
wim 36:9f5f86dfd44a 2794 *
wim 36:9f5f86dfd44a 2795 * @param unsigned char idx The Index of the icon pattern (0..15) for KS0073 and similar controllers
wim 36:9f5f86dfd44a 2796 * and Index (0..31) for PCF2103 and similar controllers
wim 36:9f5f86dfd44a 2797 * @param unsigned char data The bitpattern for the icons (6 lsb for KS0073 bitpattern (5 lsb for KS0078) and 2 msb for blinkmode)
wim 36:9f5f86dfd44a 2798 * The bitpattern for the PCF2103 icons is 5 lsb (UDC 0..2) and 5 lsb for blinkmode (UDC 4..6)
wim 36:9f5f86dfd44a 2799 */
wim 36:9f5f86dfd44a 2800 void TextLCD_Base::setIcon(unsigned char idx, unsigned char data) {
wim 36:9f5f86dfd44a 2801 // Blinking icons are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 2802 // The blinking pixels in the icons can be controlled by setting additional bits in the icon bitpattern.
wim 36:9f5f86dfd44a 2803 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2804 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2805 // 0 B1 B0 0 0 1 1 1 0
wim 36:9f5f86dfd44a 2806 // 1 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2807 // .............
wim 36:9f5f86dfd44a 2808 // 15 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2809 //
wim 36:9f5f86dfd44a 2810 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2811 // B1 B0 Mode
wim 36:9f5f86dfd44a 2812 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2813 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2814 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2815 //
wim 36:9f5f86dfd44a 2816 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2817 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2818 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2819 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2820 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2821 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2822
wim 36:9f5f86dfd44a 2823 switch (_ctrl) {
wim 36:9f5f86dfd44a 2824 case KS0073:
wim 36:9f5f86dfd44a 2825 case KS0078:
wim 36:9f5f86dfd44a 2826 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2827 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2828 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2829
wim 36:9f5f86dfd44a 2830 _writeData(data); // Set Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2831
wim 36:9f5f86dfd44a 2832 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2833 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2834 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2835
wim 36:9f5f86dfd44a 2836 case ST7032_3V3:
wim 36:9f5f86dfd44a 2837 case ST7032_5V:
wim 41:111ca62e8a59 2838 case SPLC792A_3V3:
wim 36:9f5f86dfd44a 2839 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2840 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2841
wim 36:9f5f86dfd44a 2842 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2843
wim 36:9f5f86dfd44a 2844 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2845 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2846 break; // end ST7032
wim 36:9f5f86dfd44a 2847
wim 36:9f5f86dfd44a 2848 case ST7036_3V3:
wim 36:9f5f86dfd44a 2849 case ST7036_5V:
wim 36:9f5f86dfd44a 2850 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2851 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2852
wim 36:9f5f86dfd44a 2853 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2854
wim 36:9f5f86dfd44a 2855 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2856 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2857 break; // end ST7036
wim 36:9f5f86dfd44a 2858
wim 36:9f5f86dfd44a 2859 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2860 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2861 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2862 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2863 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set = 1)
wim 36:9f5f86dfd44a 2864 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2865
wim 36:9f5f86dfd44a 2866 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2867 // Select IS=0
wim 36:9f5f86dfd44a 2868 break; // end SSD1803
wim 36:9f5f86dfd44a 2869
wim 36:9f5f86dfd44a 2870 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2871 case PCF2113_3V3:
wim 39:e9c2319de9c5 2872 case PCF2119_3V3:
wim 39:e9c2319de9c5 2873 case PCF2119R_3V3:
wim 36:9f5f86dfd44a 2874 // Store UDC/Icon pattern for PCF2103 and PCF2113:
wim 36:9f5f86dfd44a 2875 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2876 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2877 // Store UDC/Icon pattern for PCF2119:
wim 36:9f5f86dfd44a 2878 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2879 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2880 _writeCommand(0x40 | (idx & 0x3F)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2881 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2882 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2883
wim 36:9f5f86dfd44a 2884 default:
wim 36:9f5f86dfd44a 2885 break; // end default
wim 36:9f5f86dfd44a 2886 } // end switch _ctrl
wim 36:9f5f86dfd44a 2887
wim 36:9f5f86dfd44a 2888 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2889 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2890 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2891
wim 36:9f5f86dfd44a 2892 } // end setIcon()
wim 36:9f5f86dfd44a 2893
wim 36:9f5f86dfd44a 2894 /** Clear Icons
wim 36:9f5f86dfd44a 2895 *
wim 36:9f5f86dfd44a 2896 * @param none
wim 36:9f5f86dfd44a 2897 * @return none
wim 36:9f5f86dfd44a 2898 */
wim 36:9f5f86dfd44a 2899 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2900 void TextLCD_Base::clrIcon() {
wim 36:9f5f86dfd44a 2901 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2902 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2903 // 0 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2904 // 1 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2905 // .............
wim 36:9f5f86dfd44a 2906 // 15 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2907 //
wim 36:9f5f86dfd44a 2908 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2909 // B1 B0 Mode
wim 36:9f5f86dfd44a 2910 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2911 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2912 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2913 //
wim 36:9f5f86dfd44a 2914 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2915 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2916 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2917 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2918 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2919 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2920 int idx;
wim 36:9f5f86dfd44a 2921
wim 36:9f5f86dfd44a 2922 switch (_ctrl) {
wim 36:9f5f86dfd44a 2923 case KS0073:
wim 36:9f5f86dfd44a 2924 case KS0078:
wim 36:9f5f86dfd44a 2925 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2926 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2927 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2928 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2929 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2930 }
wim 36:9f5f86dfd44a 2931 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Std Instruction Set
wim 36:9f5f86dfd44a 2932 // Select Std Instr set
wim 36:9f5f86dfd44a 2933 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2934
wim 36:9f5f86dfd44a 2935 case ST7032_3V3:
wim 36:9f5f86dfd44a 2936 case ST7032_5V:
wim 41:111ca62e8a59 2937 case SPLC792A_3V3:
wim 36:9f5f86dfd44a 2938 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2939
wim 36:9f5f86dfd44a 2940 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2941 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2942 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2943 }
wim 36:9f5f86dfd44a 2944
wim 36:9f5f86dfd44a 2945 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2946 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2947 break; // end ST7032
wim 36:9f5f86dfd44a 2948
wim 36:9f5f86dfd44a 2949 case ST7036_3V3:
wim 36:9f5f86dfd44a 2950 case ST7036_5V:
wim 36:9f5f86dfd44a 2951 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2952
wim 36:9f5f86dfd44a 2953 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2954 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2955 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2956 }
wim 36:9f5f86dfd44a 2957
wim 36:9f5f86dfd44a 2958 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2959 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2960 break; // end ST7036
wim 36:9f5f86dfd44a 2961
wim 36:9f5f86dfd44a 2962 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2963 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2964 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2965 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2966 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2967 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2968 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2969 }
wim 36:9f5f86dfd44a 2970 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2971 // Select IS=0
wim 36:9f5f86dfd44a 2972 break; // end SSD1803
wim 36:9f5f86dfd44a 2973
wim 36:9f5f86dfd44a 2974 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2975 case PCF2113_3V3:
wim 36:9f5f86dfd44a 2976 // PCF2103 and PCF2113 use part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2977 // Select CG RAM
wim 36:9f5f86dfd44a 2978
wim 36:9f5f86dfd44a 2979 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2980 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2981 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2982 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2983 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2984 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2985 }
wim 36:9f5f86dfd44a 2986
wim 36:9f5f86dfd44a 2987 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2988 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2989 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2990 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2991 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2992 }
wim 36:9f5f86dfd44a 2993 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2994
wim 39:e9c2319de9c5 2995 case PCF2119_3V3:
wim 39:e9c2319de9c5 2996 case PCF2119R_3V3:
wim 36:9f5f86dfd44a 2997 // PCF2119 uses part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2998 // Select CG RAM
wim 36:9f5f86dfd44a 2999
wim 36:9f5f86dfd44a 3000 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 3001 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 3002 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 3003 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 3004 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 3005 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 3006 }
wim 36:9f5f86dfd44a 3007
wim 36:9f5f86dfd44a 3008 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 3009 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 3010 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 3011 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 3012 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 3013 }
wim 36:9f5f86dfd44a 3014 break; // case PCF2119_3V3 Controller
wim 36:9f5f86dfd44a 3015
wim 36:9f5f86dfd44a 3016 default:
wim 36:9f5f86dfd44a 3017 break; // end default
wim 36:9f5f86dfd44a 3018 } // end switch _ctrl
wim 36:9f5f86dfd44a 3019
wim 36:9f5f86dfd44a 3020 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 3021 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 3022 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 3023 } //end clrIcon()
wim 39:e9c2319de9c5 3024 #endif
wim 39:e9c2319de9c5 3025
wim 39:e9c2319de9c5 3026 #if(LCD_INVERT == 1)
wim 36:9f5f86dfd44a 3027 /** Set Invert
wim 36:9f5f86dfd44a 3028 * setInvert method is supported by some compatible devices (eg KS0073) to swap between black and white
wim 36:9f5f86dfd44a 3029 *
wim 36:9f5f86dfd44a 3030 * @param bool invertOn Invert on/off
wim 36:9f5f86dfd44a 3031 * @return none
wim 36:9f5f86dfd44a 3032 */
wim 36:9f5f86dfd44a 3033 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 3034 void TextLCD_Base::setInvert(bool invertOn) {
wim 36:9f5f86dfd44a 3035
wim 36:9f5f86dfd44a 3036 if (invertOn) {
wim 36:9f5f86dfd44a 3037 // Controllers that support Invert
wim 36:9f5f86dfd44a 3038 switch (_ctrl) {
wim 36:9f5f86dfd44a 3039 case KS0073:
wim 36:9f5f86dfd44a 3040 case KS0078:
wim 36:9f5f86dfd44a 3041 _function = _function | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 3042 _writeCommand(0x20 | _function); // Activate Invert (Std Instr Set)
wim 36:9f5f86dfd44a 3043 break;
wim 36:9f5f86dfd44a 3044 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 3045 // case SSD1803_5V :
wim 36:9f5f86dfd44a 3046 case US2066_3V3:
wim 36:9f5f86dfd44a 3047 // case USS2066_5V:
wim 36:9f5f86dfd44a 3048 _function_1 = _function_1 | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 3049 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 3050 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 3051 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 3052 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 3053 break;
wim 36:9f5f86dfd44a 3054 default:
wim 36:9f5f86dfd44a 3055 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 3056 break;
wim 36:9f5f86dfd44a 3057 } // end switch
wim 36:9f5f86dfd44a 3058 }
wim 36:9f5f86dfd44a 3059 else {
wim 36:9f5f86dfd44a 3060 // Controllers that support Invert
wim 36:9f5f86dfd44a 3061 switch (_ctrl) {
wim 36:9f5f86dfd44a 3062 case KS0073:
wim 36:9f5f86dfd44a 3063 case KS0078:
wim 36:9f5f86dfd44a 3064 _function = _function & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 3065 _writeCommand(0x20 | _function); // Disable Invert (Std Instr Set)
wim 36:9f5f86dfd44a 3066 break;
wim 36:9f5f86dfd44a 3067 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 3068 // case SSD1803_5V :
wim 36:9f5f86dfd44a 3069 case US2066_3V3:
wim 36:9f5f86dfd44a 3070 // case USS2066_5V:
wim 36:9f5f86dfd44a 3071 _function_1 = _function_1 & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 3072 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 3073 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 3074 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 3075 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 3076 break;
wim 36:9f5f86dfd44a 3077
wim 36:9f5f86dfd44a 3078 default:
wim 36:9f5f86dfd44a 3079 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 3080 break;
wim 36:9f5f86dfd44a 3081 } // end switch
wim 36:9f5f86dfd44a 3082 }
wim 36:9f5f86dfd44a 3083 } // end setInvert()
wim 39:e9c2319de9c5 3084 #endif
wim 36:9f5f86dfd44a 3085
wim 23:d47f226efb24 3086 //--------- End TextLCD_Base -----------
wim 21:9eb628d9e164 3087
wim 22:35742ec80c24 3088
wim 23:d47f226efb24 3089 //--------- Start TextLCD Bus -----------
wim 21:9eb628d9e164 3090
wim 21:9eb628d9e164 3091 /* Create a TextLCD interface for using regular mbed pins
wim 21:9eb628d9e164 3092 *
wim 21:9eb628d9e164 3093 * @param rs Instruction/data control line
wim 21:9eb628d9e164 3094 * @param e Enable line (clock)
wim 21:9eb628d9e164 3095 * @param d4-d7 Data lines for using as a 4-bit interface
wim 21:9eb628d9e164 3096 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 3097 * @param bl Backlight control line (optional, default = NC)
wim 21:9eb628d9e164 3098 * @param e2 Enable2 line (clock for second controller, LCD40x4 only)
wim 21:9eb628d9e164 3099 * @param ctrl LCD controller (default = HD44780)
wim 21:9eb628d9e164 3100 */
wim 21:9eb628d9e164 3101 TextLCD::TextLCD(PinName rs, PinName e,
wim 21:9eb628d9e164 3102 PinName d4, PinName d5, PinName d6, PinName d7,
wim 21:9eb628d9e164 3103 LCDType type, PinName bl, PinName e2, LCDCtrl ctrl) :
wim 21:9eb628d9e164 3104 TextLCD_Base(type, ctrl),
wim 22:35742ec80c24 3105 _rs(rs), _e(e), _d(d4, d5, d6, d7) {
wim 22:35742ec80c24 3106
wim 22:35742ec80c24 3107 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 3108 if (bl != NC) {
wim 22:35742ec80c24 3109 _bl = new DigitalOut(bl); //Construct new pin
wim 22:35742ec80c24 3110 _bl->write(0); //Deactivate
wim 22:35742ec80c24 3111 }
wim 22:35742ec80c24 3112 else {
wim 22:35742ec80c24 3113 // No Hardware Backlight pin
wim 22:35742ec80c24 3114 _bl = NULL; //Construct dummy pin
wim 22:35742ec80c24 3115 }
wim 22:35742ec80c24 3116
wim 22:35742ec80c24 3117 // The hardware Enable2 pin is only needed for LCD40x4. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 3118 if (e2 != NC) {
wim 22:35742ec80c24 3119 _e2 = new DigitalOut(e2); //Construct new pin
wim 22:35742ec80c24 3120 _e2->write(0); //Deactivate
wim 22:35742ec80c24 3121 }
wim 22:35742ec80c24 3122 else {
wim 22:35742ec80c24 3123 // No Hardware Enable pin
wim 22:35742ec80c24 3124 _e2 = NULL; //Construct dummy pin
wim 22:35742ec80c24 3125 }
wim 38:cbe275b0b647 3126
wim 38:cbe275b0b647 3127 _init(_LCD_DL_4); // Set Datalength to 4 bit for mbed bus interfaces
wim 21:9eb628d9e164 3128 }
wim 21:9eb628d9e164 3129
wim 29:a3663151aa65 3130 /** Destruct a TextLCD interface for using regular mbed pins
wim 29:a3663151aa65 3131 *
wim 29:a3663151aa65 3132 * @param none
wim 29:a3663151aa65 3133 * @return none
wim 29:a3663151aa65 3134 */
wim 29:a3663151aa65 3135 TextLCD::~TextLCD() {
wim 29:a3663151aa65 3136 if (_bl != NULL) {delete _bl;} // BL pin
wim 29:a3663151aa65 3137 if (_e2 != NULL) {delete _e2;} // E2 pin
wim 29:a3663151aa65 3138 }
wim 29:a3663151aa65 3139
wim 22:35742ec80c24 3140 /** Set E pin (or E2 pin)
wim 22:35742ec80c24 3141 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 3142 * Default PinName value for E2 is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 3143 * @param value true or false
wim 22:35742ec80c24 3144 * @return none
wim 22:35742ec80c24 3145 */
wim 21:9eb628d9e164 3146 void TextLCD::_setEnable(bool value) {
wim 21:9eb628d9e164 3147
wim 22:35742ec80c24 3148 if(_ctrl_idx==_LCDCtrl_0) {
wim 22:35742ec80c24 3149 if (value) {
wim 22:35742ec80c24 3150 _e = 1; // Set E bit
wim 22:35742ec80c24 3151 }
wim 22:35742ec80c24 3152 else {
wim 22:35742ec80c24 3153 _e = 0; // Reset E bit
wim 22:35742ec80c24 3154 }
wim 22:35742ec80c24 3155 }
wim 22:35742ec80c24 3156 else {
wim 22:35742ec80c24 3157 if (value) {
wim 22:35742ec80c24 3158 if (_e2 != NULL) {_e2->write(1);} //Set E2 bit
wim 22:35742ec80c24 3159 }
wim 22:35742ec80c24 3160 else {
wim 22:35742ec80c24 3161 if (_e2 != NULL) {_e2->write(0);} //Reset E2 bit
wim 22:35742ec80c24 3162 }
wim 22:35742ec80c24 3163 }
wim 21:9eb628d9e164 3164 }
wim 21:9eb628d9e164 3165
wim 21:9eb628d9e164 3166 // Set RS pin
wim 21:9eb628d9e164 3167 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3168 void TextLCD::_setRS(bool value) {
wim 21:9eb628d9e164 3169
wim 22:35742ec80c24 3170 if (value) {
wim 21:9eb628d9e164 3171 _rs = 1; // Set RS bit
wim 22:35742ec80c24 3172 }
wim 22:35742ec80c24 3173 else {
wim 21:9eb628d9e164 3174 _rs = 0; // Reset RS bit
wim 22:35742ec80c24 3175 }
wim 21:9eb628d9e164 3176 }
wim 21:9eb628d9e164 3177
wim 22:35742ec80c24 3178 /** Set BL pin
wim 22:35742ec80c24 3179 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 3180 * Default PinName value is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 3181 * @param value true or false
wim 22:35742ec80c24 3182 * @return none
wim 22:35742ec80c24 3183 */
wim 21:9eb628d9e164 3184 void TextLCD::_setBL(bool value) {
wim 21:9eb628d9e164 3185
wim 22:35742ec80c24 3186 if (value) {
wim 22:35742ec80c24 3187 if (_bl != NULL) {_bl->write(1);} //Set BL bit
wim 22:35742ec80c24 3188 }
wim 22:35742ec80c24 3189 else {
wim 22:35742ec80c24 3190 if (_bl != NULL) {_bl->write(0);} //Reset BL bit
wim 22:35742ec80c24 3191 }
wim 21:9eb628d9e164 3192 }
wim 21:9eb628d9e164 3193
wim 21:9eb628d9e164 3194 // Place the 4bit data on the databus
wim 21:9eb628d9e164 3195 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 21:9eb628d9e164 3196 void TextLCD::_setData(int value) {
wim 21:9eb628d9e164 3197 _d = value & 0x0F; // Write Databits
wim 21:9eb628d9e164 3198 }
wim 34:e5a0dcb43ecc 3199
wim 23:d47f226efb24 3200 //----------- End TextLCD ---------------
wim 21:9eb628d9e164 3201
wim 21:9eb628d9e164 3202
wim 23:d47f226efb24 3203 //--------- Start TextLCD_I2C -----------
wim 34:e5a0dcb43ecc 3204 #if(LCD_I2C == 1) /* I2C Expander PCF8574/MCP23008 */
wim 26:bd897a001012 3205 /** Create a TextLCD interface using an I2C PC8574 (or PCF8574A) or MCP23008 portexpander
wim 22:35742ec80c24 3206 *
wim 22:35742ec80c24 3207 * @param i2c I2C Bus
wim 26:bd897a001012 3208 * @param deviceAddress I2C slave address (PCF8574, PCF8574A or MCP23008, default = 0x40)
wim 22:35742ec80c24 3209 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 22:35742ec80c24 3210 * @param ctrl LCD controller (default = HD44780)
wim 22:35742ec80c24 3211 */
wim 21:9eb628d9e164 3212 TextLCD_I2C::TextLCD_I2C(I2C *i2c, char deviceAddress, LCDType type, LCDCtrl ctrl) :
wim 21:9eb628d9e164 3213 TextLCD_Base(type, ctrl),
wim 21:9eb628d9e164 3214 _i2c(i2c){
wim 21:9eb628d9e164 3215
wim 22:35742ec80c24 3216 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 3217
wim 28:30fa94f7341c 3218 // Setup the I2C bus
wim 28:30fa94f7341c 3219 // The max bitrate for PCF8574 is 100kbit, the max bitrate for MCP23008 is 400kbit,
wim 32:59c4b8f648d4 3220 _i2c->frequency(100000);
wim 21:9eb628d9e164 3221
wim 26:bd897a001012 3222 #if (MCP23008==1)
wim 26:bd897a001012 3223 // MCP23008 portexpander Init
wim 37:ce348c002929 3224 _writeRegister(IODIR, 0x00); // All pins are outputs
wim 37:ce348c002929 3225 _writeRegister(IPOL, 0x00); // No reverse polarity on inputs
wim 37:ce348c002929 3226 _writeRegister(GPINTEN, 0x00); // No interrupt on change of input pins
wim 37:ce348c002929 3227 _writeRegister(DEFVAL, 0x00); // Default value to compare against for interrupts
wim 37:ce348c002929 3228 _writeRegister(INTCON, 0x00); // No interrupt on changes, compare against previous pin value
wim 37:ce348c002929 3229 _writeRegister(IOCON, 0x20); // b1=0 - Interrupt polarity active low
wim 37:ce348c002929 3230 // b2=0 - Interrupt pin active driver output
wim 37:ce348c002929 3231 // b4=0 - Slew rate enable on SDA
wim 37:ce348c002929 3232 // b5=0 - Auto-increment on registeraddress
wim 37:ce348c002929 3233 // b5=1 - No auto-increment on registeraddress => needed for performance improved I2C expander mode
wim 37:ce348c002929 3234 _writeRegister(GPPU, 0x00); // No Pullup
wim 37:ce348c002929 3235 // INTF // Interrupt flags read (Read-Only)
wim 37:ce348c002929 3236 // INTCAP // Captured inputpins at time of interrupt (Read-Only)
wim 37:ce348c002929 3237 // _writeRegister(GPIO, 0x00); // Output/Input pins
wim 37:ce348c002929 3238 // _writeRegister(OLAT, 0x00); // Output Latch
wim 26:bd897a001012 3239
wim 21:9eb628d9e164 3240 // Init the portexpander bus
wim 38:cbe275b0b647 3241 _lcd_bus = LCD_BUS_I2C_DEF;
wim 21:9eb628d9e164 3242
wim 21:9eb628d9e164 3243 // write the new data to the portexpander
wim 37:ce348c002929 3244 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3245 #else
wim 26:bd897a001012 3246 // PCF8574 of PCF8574A portexpander
wim 26:bd897a001012 3247
wim 26:bd897a001012 3248 // Init the portexpander bus
wim 38:cbe275b0b647 3249 _lcd_bus = LCD_BUS_I2C_DEF;
wim 26:bd897a001012 3250
wim 26:bd897a001012 3251 // write the new data to the portexpander
wim 21:9eb628d9e164 3252 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 3253 #endif
wim 21:9eb628d9e164 3254
wim 37:ce348c002929 3255 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 21:9eb628d9e164 3256 }
wim 21:9eb628d9e164 3257
wim 37:ce348c002929 3258 // Set E bit (or E2 bit) in the databus shadowvalue
wim 37:ce348c002929 3259 // Used for mbed I2C bus expander
wim 37:ce348c002929 3260 void TextLCD_I2C::_setEnableBit(bool value) {
wim 21:9eb628d9e164 3261
wim 41:111ca62e8a59 3262 #if (LCD_TWO_CTRL == 1)
wim 22:35742ec80c24 3263 if(_ctrl_idx==_LCDCtrl_0) {
wim 26:bd897a001012 3264 if (value) {
wim 38:cbe275b0b647 3265 _lcd_bus |= LCD_BUS_I2C_E; // Set E bit
wim 26:bd897a001012 3266 }
wim 26:bd897a001012 3267 else {
wim 38:cbe275b0b647 3268 _lcd_bus &= ~LCD_BUS_I2C_E; // Reset E bit
wim 26:bd897a001012 3269 }
wim 22:35742ec80c24 3270 }
wim 22:35742ec80c24 3271 else {
wim 26:bd897a001012 3272 if (value) {
wim 38:cbe275b0b647 3273 _lcd_bus |= LCD_BUS_I2C_E2; // Set E2 bit
wim 26:bd897a001012 3274 }
wim 26:bd897a001012 3275 else {
wim 38:cbe275b0b647 3276 _lcd_bus &= ~LCD_BUS_I2C_E2; // Reset E2bit
wim 26:bd897a001012 3277 }
wim 26:bd897a001012 3278 }
wim 41:111ca62e8a59 3279 #else
wim 41:111ca62e8a59 3280 // Support only one controller
wim 41:111ca62e8a59 3281 if (value) {
wim 41:111ca62e8a59 3282 _lcd_bus |= LCD_BUS_I2C_E; // Set E bit
wim 41:111ca62e8a59 3283 }
wim 41:111ca62e8a59 3284 else {
wim 41:111ca62e8a59 3285 _lcd_bus &= ~LCD_BUS_I2C_E; // Reset E bit
wim 41:111ca62e8a59 3286 }
wim 41:111ca62e8a59 3287
wim 41:111ca62e8a59 3288 #endif
wim 37:ce348c002929 3289 }
wim 37:ce348c002929 3290
wim 37:ce348c002929 3291 // Set E pin (or E2 pin)
wim 37:ce348c002929 3292 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3293 void TextLCD_I2C::_setEnable(bool value) {
wim 37:ce348c002929 3294
wim 37:ce348c002929 3295 // Place the E or E2 bit data on the databus shadowvalue
wim 37:ce348c002929 3296 _setEnableBit(value);
wim 26:bd897a001012 3297
wim 26:bd897a001012 3298 #if (MCP23008==1)
wim 26:bd897a001012 3299 // MCP23008 portexpander
wim 26:bd897a001012 3300
wim 26:bd897a001012 3301 // write the new data to the portexpander
wim 37:ce348c002929 3302 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3303 #else
wim 26:bd897a001012 3304 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3305
wim 22:35742ec80c24 3306 // write the new data to the I2C portexpander
wim 22:35742ec80c24 3307 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 3308 #endif
wim 21:9eb628d9e164 3309 }
wim 21:9eb628d9e164 3310
wim 37:ce348c002929 3311
wim 21:9eb628d9e164 3312 // Set RS pin
wim 21:9eb628d9e164 3313 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3314 void TextLCD_I2C::_setRS(bool value) {
wim 21:9eb628d9e164 3315
wim 26:bd897a001012 3316 if (value) {
wim 38:cbe275b0b647 3317 _lcd_bus |= LCD_BUS_I2C_RS; // Set RS bit
wim 26:bd897a001012 3318 }
wim 26:bd897a001012 3319 else {
wim 38:cbe275b0b647 3320 _lcd_bus &= ~LCD_BUS_I2C_RS; // Reset RS bit
wim 26:bd897a001012 3321 }
wim 26:bd897a001012 3322
wim 26:bd897a001012 3323 #if (MCP23008==1)
wim 26:bd897a001012 3324 // MCP23008 portexpander
wim 26:bd897a001012 3325
wim 26:bd897a001012 3326 // write the new data to the portexpander
wim 37:ce348c002929 3327 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3328 #else
wim 26:bd897a001012 3329 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3330
wim 22:35742ec80c24 3331 // write the new data to the I2C portexpander
wim 22:35742ec80c24 3332 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 3333 #endif
wim 21:9eb628d9e164 3334 }
wim 21:9eb628d9e164 3335
wim 21:9eb628d9e164 3336 // Set BL pin
wim 21:9eb628d9e164 3337 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3338 void TextLCD_I2C::_setBL(bool value) {
wim 21:9eb628d9e164 3339
wim 26:bd897a001012 3340 if (value) {
wim 38:cbe275b0b647 3341 _lcd_bus |= LCD_BUS_I2C_BL; // Set BL bit
wim 26:bd897a001012 3342 }
wim 26:bd897a001012 3343 else {
wim 38:cbe275b0b647 3344 _lcd_bus &= ~LCD_BUS_I2C_BL; // Reset BL bit
wim 26:bd897a001012 3345 }
wim 26:bd897a001012 3346
wim 26:bd897a001012 3347 #if (MCP23008==1)
wim 26:bd897a001012 3348 // MCP23008 portexpander
wim 26:bd897a001012 3349
wim 26:bd897a001012 3350 // write the new data to the portexpander
wim 37:ce348c002929 3351 _writeRegister(GPIO, _lcd_bus);
wim 37:ce348c002929 3352 #else
wim 37:ce348c002929 3353 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 3354
wim 37:ce348c002929 3355 // write the new data to the I2C portexpander
wim 37:ce348c002929 3356 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 37:ce348c002929 3357 #endif
wim 37:ce348c002929 3358 }
wim 37:ce348c002929 3359
wim 38:cbe275b0b647 3360 #if(0)
wim 38:cbe275b0b647 3361 // New optimized v018
wim 38:cbe275b0b647 3362 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574), same as v018
wim 38:cbe275b0b647 3363 // Place the 4bit data in the databus shadowvalue
wim 38:cbe275b0b647 3364 // Used for mbed I2C bus expander
wim 38:cbe275b0b647 3365 const char _LCD_DATA_BITS[16] = {
wim 38:cbe275b0b647 3366 0x00,
wim 38:cbe275b0b647 3367 ( LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3368 ( LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3369 ( LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3370 ( LCD_BUS_I2C_D6 ),
wim 38:cbe275b0b647 3371 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3372 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3373 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3374 (LCD_BUS_I2C_D7 ),
wim 38:cbe275b0b647 3375 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3376 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3377 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3378 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 ),
wim 38:cbe275b0b647 3379 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3380 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3381 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4)
wim 38:cbe275b0b647 3382 };
wim 38:cbe275b0b647 3383 void TextLCD_I2C::_setDataBits(int value) {
wim 38:cbe275b0b647 3384
wim 38:cbe275b0b647 3385 //Clear all databits
wim 38:cbe275b0b647 3386 _lcd_bus &= ~LCD_BUS_I2C_MSK;
wim 38:cbe275b0b647 3387
wim 38:cbe275b0b647 3388 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 38:cbe275b0b647 3389 _lcd_bus |= _LCD_DATA_BITS[value & 0x0F];
wim 38:cbe275b0b647 3390 }
wim 39:e9c2319de9c5 3391 #endif
wim 39:e9c2319de9c5 3392
wim 39:e9c2319de9c5 3393 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 39:e9c2319de9c5 3394 // Place the 4bit data in the databus shadowvalue
wim 39:e9c2319de9c5 3395 // Used for mbed I2C bus expander
wim 39:e9c2319de9c5 3396 void TextLCD_I2C::_setDataBits(int value) {
wim 39:e9c2319de9c5 3397
wim 39:e9c2319de9c5 3398 //Clear all databits
wim 39:e9c2319de9c5 3399 _lcd_bus &= ~LCD_BUS_I2C_MSK;
wim 39:e9c2319de9c5 3400
wim 39:e9c2319de9c5 3401 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 39:e9c2319de9c5 3402 if (value & 0x01){
wim 39:e9c2319de9c5 3403 _lcd_bus |= LCD_BUS_I2C_D4; // Set Databit
wim 39:e9c2319de9c5 3404 }
wim 39:e9c2319de9c5 3405
wim 39:e9c2319de9c5 3406 if (value & 0x02){
wim 39:e9c2319de9c5 3407 _lcd_bus |= LCD_BUS_I2C_D5; // Set Databit
wim 39:e9c2319de9c5 3408 }
wim 39:e9c2319de9c5 3409
wim 39:e9c2319de9c5 3410 if (value & 0x04) {
wim 39:e9c2319de9c5 3411 _lcd_bus |= LCD_BUS_I2C_D6; // Set Databit
wim 39:e9c2319de9c5 3412 }
wim 39:e9c2319de9c5 3413
wim 39:e9c2319de9c5 3414 if (value & 0x08) {
wim 39:e9c2319de9c5 3415 _lcd_bus |= LCD_BUS_I2C_D7; // Set Databit
wim 39:e9c2319de9c5 3416 }
wim 39:e9c2319de9c5 3417 }
wim 41:111ca62e8a59 3418
wim 37:ce348c002929 3419
wim 37:ce348c002929 3420 // Place the 4bit data on the databus
wim 37:ce348c002929 3421 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 37:ce348c002929 3422 void TextLCD_I2C::_setData(int value) {
wim 37:ce348c002929 3423
wim 37:ce348c002929 3424 // Place the 4bit data on the databus shadowvalue
wim 37:ce348c002929 3425 _setDataBits(value);
wim 37:ce348c002929 3426
wim 37:ce348c002929 3427 // Place the 4bit data on the databus
wim 37:ce348c002929 3428 #if (MCP23008==1)
wim 37:ce348c002929 3429 // MCP23008 portexpander
wim 37:ce348c002929 3430
wim 37:ce348c002929 3431 // write the new data to the portexpander
wim 37:ce348c002929 3432 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3433 #else
wim 26:bd897a001012 3434 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3435
wim 21:9eb628d9e164 3436 // write the new data to the I2C portexpander
wim 21:9eb628d9e164 3437 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 3438 #endif
wim 21:9eb628d9e164 3439 }
wim 21:9eb628d9e164 3440
wim 37:ce348c002929 3441 // Write data to MCP23008 I2C portexpander
wim 37:ce348c002929 3442 // Used for mbed I2C bus expander
wim 37:ce348c002929 3443 void TextLCD_I2C::_writeRegister (int reg, int value) {
wim 37:ce348c002929 3444 char data[] = {reg, value};
wim 37:ce348c002929 3445
wim 37:ce348c002929 3446 _i2c->write(_slaveAddress, data, 2);
wim 37:ce348c002929 3447 }
wim 37:ce348c002929 3448
wim 37:ce348c002929 3449 //New optimized
wim 37:ce348c002929 3450 //Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 37:ce348c002929 3451 //Test faster _writeByte 0.14s vs 0.34s for a 20x4 fillscreen (MCP23008)
wim 37:ce348c002929 3452
wim 37:ce348c002929 3453 // Write a byte using I2C
wim 37:ce348c002929 3454 void TextLCD_I2C::_writeByte(int value) {
wim 37:ce348c002929 3455 char data[6];
wim 37:ce348c002929 3456
wim 37:ce348c002929 3457 #if (MCP23008==1)
wim 37:ce348c002929 3458 // MCP23008 portexpander
wim 37:ce348c002929 3459
wim 37:ce348c002929 3460 data[0] = GPIO; // set registeraddres
wim 37:ce348c002929 3461 // Note: auto-increment is disabled so all data will go to GPIO register
wim 37:ce348c002929 3462
wim 37:ce348c002929 3463 _setEnableBit(true); // set E
wim 37:ce348c002929 3464 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 3465 data[1] = _lcd_bus;
wim 37:ce348c002929 3466
wim 37:ce348c002929 3467 _setEnableBit(false); // clear E
wim 37:ce348c002929 3468 data[2] = _lcd_bus;
wim 37:ce348c002929 3469
wim 37:ce348c002929 3470 _setEnableBit(true); // set E
wim 37:ce348c002929 3471 _setDataBits(value); // set data low
wim 37:ce348c002929 3472 data[3] = _lcd_bus;
wim 37:ce348c002929 3473
wim 37:ce348c002929 3474 _setEnableBit(false); // clear E
wim 37:ce348c002929 3475 data[4] = _lcd_bus;
wim 37:ce348c002929 3476
wim 37:ce348c002929 3477 // write the packed data to the I2C portexpander
wim 37:ce348c002929 3478 _i2c->write(_slaveAddress, data, 5);
wim 37:ce348c002929 3479 #else
wim 37:ce348c002929 3480 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 3481
wim 37:ce348c002929 3482 _setEnableBit(true); // set E
wim 37:ce348c002929 3483 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 3484 data[0] = _lcd_bus;
wim 37:ce348c002929 3485
wim 37:ce348c002929 3486 _setEnableBit(false); // clear E
wim 37:ce348c002929 3487 data[1] = _lcd_bus;
wim 37:ce348c002929 3488
wim 37:ce348c002929 3489 _setEnableBit(true); // set E
wim 37:ce348c002929 3490 _setDataBits(value); // set data low
wim 37:ce348c002929 3491 data[2] = _lcd_bus;
wim 37:ce348c002929 3492
wim 37:ce348c002929 3493 _setEnableBit(false); // clear E
wim 37:ce348c002929 3494 data[3] = _lcd_bus;
wim 37:ce348c002929 3495
wim 37:ce348c002929 3496 // write the packed data to the I2C portexpander
wim 37:ce348c002929 3497 _i2c->write(_slaveAddress, data, 4);
wim 37:ce348c002929 3498 #endif
wim 37:ce348c002929 3499 }
wim 37:ce348c002929 3500
wim 37:ce348c002929 3501 #endif /* I2C Expander PCF8574/MCP23008 */
wim 37:ce348c002929 3502 //---------- End TextLCD_I2C ------------
wim 37:ce348c002929 3503
wim 37:ce348c002929 3504
wim 37:ce348c002929 3505 //--------- Start TextLCD_SPI -----------
wim 37:ce348c002929 3506 #if(LCD_SPI == 1) /* SPI Expander SN74595 */
wim 37:ce348c002929 3507
wim 37:ce348c002929 3508 /** Create a TextLCD interface using an SPI 74595 portexpander
wim 37:ce348c002929 3509 *
wim 37:ce348c002929 3510 * @param spi SPI Bus
wim 37:ce348c002929 3511 * @param cs chip select pin (active low)
wim 37:ce348c002929 3512 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 37:ce348c002929 3513 * @param ctrl LCD controller (default = HD44780)
wim 37:ce348c002929 3514 */
wim 37:ce348c002929 3515 TextLCD_SPI::TextLCD_SPI(SPI *spi, PinName cs, LCDType type, LCDCtrl ctrl) :
wim 37:ce348c002929 3516 TextLCD_Base(type, ctrl),
wim 37:ce348c002929 3517 _spi(spi),
wim 38:cbe275b0b647 3518 _cs(cs) {
wim 37:ce348c002929 3519 // Init cs
wim 37:ce348c002929 3520 _cs = 1;
wim 37:ce348c002929 3521
wim 37:ce348c002929 3522 // Setup the spi for 8 bit data, low steady state clock,
wim 37:ce348c002929 3523 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 37:ce348c002929 3524 _spi->format(8,0);
wim 37:ce348c002929 3525 _spi->frequency(500000);
wim 37:ce348c002929 3526 //_spi.frequency(1000000);
wim 37:ce348c002929 3527
wim 38:cbe275b0b647 3528 wait_ms(100); // Wait 100ms to ensure LCD powered up
wim 38:cbe275b0b647 3529
wim 37:ce348c002929 3530 // Init the portexpander bus
wim 38:cbe275b0b647 3531 _lcd_bus = LCD_BUS_SPI_DEF;
wim 37:ce348c002929 3532
wim 37:ce348c002929 3533 // write the new data to the portexpander
wim 37:ce348c002929 3534 _cs = 0;
wim 37:ce348c002929 3535 _spi->write(_lcd_bus);
wim 37:ce348c002929 3536 _cs = 1;
wim 37:ce348c002929 3537
wim 37:ce348c002929 3538 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 37:ce348c002929 3539 }
wim 37:ce348c002929 3540
wim 37:ce348c002929 3541 // Set E pin (or E2 pin)
wim 37:ce348c002929 3542 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3543 void TextLCD_SPI::_setEnable(bool value) {
wim 37:ce348c002929 3544
wim 37:ce348c002929 3545 if(_ctrl_idx==_LCDCtrl_0) {
wim 37:ce348c002929 3546 if (value) {
wim 38:cbe275b0b647 3547 _lcd_bus |= LCD_BUS_SPI_E; // Set E bit
wim 37:ce348c002929 3548 }
wim 37:ce348c002929 3549 else {
wim 38:cbe275b0b647 3550 _lcd_bus &= ~LCD_BUS_SPI_E; // Reset E bit
wim 37:ce348c002929 3551 }
wim 37:ce348c002929 3552 }
wim 37:ce348c002929 3553 else {
wim 37:ce348c002929 3554 if (value) {
wim 38:cbe275b0b647 3555 _lcd_bus |= LCD_BUS_SPI_E2; // Set E2 bit
wim 37:ce348c002929 3556 }
wim 37:ce348c002929 3557 else {
wim 38:cbe275b0b647 3558 _lcd_bus &= ~LCD_BUS_SPI_E2; // Reset E2 bit
wim 37:ce348c002929 3559 }
wim 37:ce348c002929 3560 }
wim 37:ce348c002929 3561
wim 37:ce348c002929 3562 // write the new data to the SPI portexpander
wim 37:ce348c002929 3563 _cs = 0;
wim 37:ce348c002929 3564 _spi->write(_lcd_bus);
wim 37:ce348c002929 3565 _cs = 1;
wim 37:ce348c002929 3566 }
wim 37:ce348c002929 3567
wim 37:ce348c002929 3568 // Set RS pin
wim 37:ce348c002929 3569 // Used for mbed pins, I2C bus expander or SPI shiftregister and SPI_N
wim 37:ce348c002929 3570 void TextLCD_SPI::_setRS(bool value) {
wim 37:ce348c002929 3571
wim 37:ce348c002929 3572 if (value) {
wim 38:cbe275b0b647 3573 _lcd_bus |= LCD_BUS_SPI_RS; // Set RS bit
wim 37:ce348c002929 3574 }
wim 37:ce348c002929 3575 else {
wim 38:cbe275b0b647 3576 _lcd_bus &= ~LCD_BUS_SPI_RS; // Reset RS bit
wim 37:ce348c002929 3577 }
wim 37:ce348c002929 3578
wim 37:ce348c002929 3579 // write the new data to the SPI portexpander
wim 37:ce348c002929 3580 _cs = 0;
wim 37:ce348c002929 3581 _spi->write(_lcd_bus);
wim 37:ce348c002929 3582 _cs = 1;
wim 37:ce348c002929 3583 }
wim 37:ce348c002929 3584
wim 37:ce348c002929 3585 // Set BL pin
wim 37:ce348c002929 3586 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3587 void TextLCD_SPI::_setBL(bool value) {
wim 37:ce348c002929 3588
wim 37:ce348c002929 3589 if (value) {
wim 38:cbe275b0b647 3590 _lcd_bus |= LCD_BUS_SPI_BL; // Set BL bit
wim 37:ce348c002929 3591 }
wim 37:ce348c002929 3592 else {
wim 38:cbe275b0b647 3593 _lcd_bus &= ~LCD_BUS_SPI_BL; // Reset BL bit
wim 37:ce348c002929 3594 }
wim 37:ce348c002929 3595
wim 37:ce348c002929 3596 // write the new data to the SPI portexpander
wim 37:ce348c002929 3597 _cs = 0;
wim 37:ce348c002929 3598 _spi->write(_lcd_bus);
wim 37:ce348c002929 3599 _cs = 1;
wim 37:ce348c002929 3600 }
wim 21:9eb628d9e164 3601
wim 21:9eb628d9e164 3602 // Place the 4bit data on the databus
wim 37:ce348c002929 3603 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3604 void TextLCD_SPI::_setData(int value) {
wim 22:35742ec80c24 3605
wim 22:35742ec80c24 3606 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 37:ce348c002929 3607 if (value & 0x01) {
wim 38:cbe275b0b647 3608 _lcd_bus |= LCD_BUS_SPI_D4; // Set Databit
wim 26:bd897a001012 3609 }
wim 37:ce348c002929 3610 else {
wim 38:cbe275b0b647 3611 _lcd_bus &= ~LCD_BUS_SPI_D4; // Reset Databit
wim 37:ce348c002929 3612 }
wim 37:ce348c002929 3613
wim 37:ce348c002929 3614 if (value & 0x02) {
wim 38:cbe275b0b647 3615 _lcd_bus |= LCD_BUS_SPI_D5; // Set Databit
wim 26:bd897a001012 3616 }
wim 26:bd897a001012 3617 else {
wim 38:cbe275b0b647 3618 _lcd_bus &= ~LCD_BUS_SPI_D5; // Reset Databit
wim 37:ce348c002929 3619 }
wim 37:ce348c002929 3620
wim 37:ce348c002929 3621 if (value & 0x04) {
wim 38:cbe275b0b647 3622 _lcd_bus |= LCD_BUS_SPI_D6; // Set Databit
wim 26:bd897a001012 3623 }
wim 37:ce348c002929 3624 else {
wim 38:cbe275b0b647 3625 _lcd_bus &= ~LCD_BUS_SPI_D6; // Reset Databit
wim 37:ce348c002929 3626 }
wim 37:ce348c002929 3627
wim 37:ce348c002929 3628 if (value & 0x08) {
wim 38:cbe275b0b647 3629 _lcd_bus |= LCD_BUS_SPI_D7; // Set Databit
wim 26:bd897a001012 3630 }
wim 26:bd897a001012 3631 else {
wim 38:cbe275b0b647 3632 _lcd_bus &= ~LCD_BUS_SPI_D7; // Reset Databit
wim 26:bd897a001012 3633 }
wim 21:9eb628d9e164 3634
wim 37:ce348c002929 3635 // write the new data to the SPI portexpander
wim 37:ce348c002929 3636 _cs = 0;
wim 37:ce348c002929 3637 _spi->write(_lcd_bus);
wim 37:ce348c002929 3638 _cs = 1;
wim 22:35742ec80c24 3639 }
wim 21:9eb628d9e164 3640
wim 37:ce348c002929 3641 #endif /* SPI Expander SN74595 */
wim 37:ce348c002929 3642 //---------- End TextLCD_SPI ------------
wim 21:9eb628d9e164 3643
wim 21:9eb628d9e164 3644
wim 28:30fa94f7341c 3645 //--------- Start TextLCD_I2C_N ---------
wim 34:e5a0dcb43ecc 3646 #if(LCD_I2C_N == 1) /* Native I2C */
wim 28:30fa94f7341c 3647
wim 28:30fa94f7341c 3648 /** Create a TextLCD interface using a controller with native I2C interface
wim 28:30fa94f7341c 3649 *
wim 28:30fa94f7341c 3650 * @param i2c I2C Bus
wim 28:30fa94f7341c 3651 * @param deviceAddress I2C slave address (default = 0x7C)
wim 28:30fa94f7341c 3652 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 28:30fa94f7341c 3653 * @param bl Backlight control line (optional, default = NC)
wim 28:30fa94f7341c 3654 * @param ctrl LCD controller (default = ST7032_3V3)
wim 28:30fa94f7341c 3655 */
wim 28:30fa94f7341c 3656 TextLCD_I2C_N::TextLCD_I2C_N(I2C *i2c, char deviceAddress, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 28:30fa94f7341c 3657 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3658
wim 33:900a94bc7585 3659 _i2c(i2c){
wim 30:033048611c01 3660
wim 28:30fa94f7341c 3661 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 3662
wim 28:30fa94f7341c 3663 // Setup the I2C bus
wim 29:a3663151aa65 3664 // The max bitrate for ST7032i is 400kbit, lets stick to default here
wim 29:a3663151aa65 3665 _i2c->frequency(100000);
wim 32:59c4b8f648d4 3666
wim 30:033048611c01 3667
wim 28:30fa94f7341c 3668 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 28:30fa94f7341c 3669 if (bl != NC) {
wim 28:30fa94f7341c 3670 _bl = new DigitalOut(bl); //Construct new pin
wim 28:30fa94f7341c 3671 _bl->write(0); //Deactivate
wim 28:30fa94f7341c 3672 }
wim 28:30fa94f7341c 3673 else {
wim 28:30fa94f7341c 3674 // No Hardware Backlight pin
wim 28:30fa94f7341c 3675 _bl = NULL; //Construct dummy pin
wim 28:30fa94f7341c 3676 }
wim 28:30fa94f7341c 3677
wim 30:033048611c01 3678 //Sanity check
wim 30:033048611c01 3679 if (_ctrl & LCD_C_I2C) {
wim 36:9f5f86dfd44a 3680 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3681 }
wim 30:033048611c01 3682 else {
wim 30:033048611c01 3683 error("Error: LCD Controller type does not support native I2C interface\n\r");
wim 30:033048611c01 3684 }
wim 28:30fa94f7341c 3685 }
wim 28:30fa94f7341c 3686
wim 28:30fa94f7341c 3687 TextLCD_I2C_N::~TextLCD_I2C_N() {
wim 28:30fa94f7341c 3688 if (_bl != NULL) {delete _bl;} // BL pin
wim 28:30fa94f7341c 3689 }
wim 28:30fa94f7341c 3690
wim 28:30fa94f7341c 3691 // Not used in this mode
wim 28:30fa94f7341c 3692 void TextLCD_I2C_N::_setEnable(bool value) {
wim 28:30fa94f7341c 3693 }
wim 28:30fa94f7341c 3694
wim 28:30fa94f7341c 3695 // Set RS pin
wim 28:30fa94f7341c 3696 // Used for mbed pins, I2C bus expander or SPI shiftregister and native I2C or SPI
wim 28:30fa94f7341c 3697 void TextLCD_I2C_N::_setRS(bool value) {
wim 30:033048611c01 3698 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3699 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3700 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3701 //
wim 30:033048611c01 3702 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3703 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3704 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3705 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3706 //
wim 30:033048611c01 3707
wim 28:30fa94f7341c 3708 if (value) {
wim 28:30fa94f7341c 3709 _controlbyte = 0x40; // Next byte is data, No more control bytes will follow
wim 28:30fa94f7341c 3710 }
wim 28:30fa94f7341c 3711 else {
wim 28:30fa94f7341c 3712 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 28:30fa94f7341c 3713 }
wim 28:30fa94f7341c 3714 }
wim 28:30fa94f7341c 3715
wim 28:30fa94f7341c 3716 // Set BL pin
wim 28:30fa94f7341c 3717 void TextLCD_I2C_N::_setBL(bool value) {
wim 28:30fa94f7341c 3718 if (_bl) {
wim 28:30fa94f7341c 3719 _bl->write(value);
wim 28:30fa94f7341c 3720 }
wim 28:30fa94f7341c 3721 }
wim 29:a3663151aa65 3722
wim 29:a3663151aa65 3723 // Not used in this mode
wim 29:a3663151aa65 3724 void TextLCD_I2C_N::_setData(int value) {
wim 29:a3663151aa65 3725 }
wim 29:a3663151aa65 3726
wim 28:30fa94f7341c 3727 // Write a byte using I2C
wim 28:30fa94f7341c 3728 void TextLCD_I2C_N::_writeByte(int value) {
wim 30:033048611c01 3729 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3730 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3731 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3732 //
wim 30:033048611c01 3733 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3734 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3735 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3736 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3737 //
wim 28:30fa94f7341c 3738 char data[] = {_controlbyte, value};
wim 28:30fa94f7341c 3739
wim 32:59c4b8f648d4 3740 #if(LCD_I2C_ACK==1)
wim 32:59c4b8f648d4 3741 //Controllers that support ACK
wim 30:033048611c01 3742 _i2c->write(_slaveAddress, data, 2);
wim 32:59c4b8f648d4 3743 #else
wim 32:59c4b8f648d4 3744 //Controllers that dont support ACK
wim 37:ce348c002929 3745 //Note: This may be issue with some mbed platforms that dont fully/correctly support I2C byte operations.
wim 32:59c4b8f648d4 3746 _i2c->start();
wim 32:59c4b8f648d4 3747 _i2c->write(_slaveAddress);
wim 32:59c4b8f648d4 3748 _i2c->write(data[0]);
wim 32:59c4b8f648d4 3749 _i2c->write(data[1]);
wim 32:59c4b8f648d4 3750 _i2c->stop();
wim 32:59c4b8f648d4 3751 #endif
wim 28:30fa94f7341c 3752 }
wim 34:e5a0dcb43ecc 3753 #endif /* Native I2C */
wim 28:30fa94f7341c 3754 //-------- End TextLCD_I2C_N ------------
wim 28:30fa94f7341c 3755
wim 28:30fa94f7341c 3756
wim 25:6162b31128c9 3757 //--------- Start TextLCD_SPI_N ---------
wim 34:e5a0dcb43ecc 3758 #if(LCD_SPI_N == 1) /* Native SPI bus */
wim 30:033048611c01 3759 /** Create a TextLCD interface using a controller with a native SPI4 interface
Sissors 24:fb3399713710 3760 *
Sissors 24:fb3399713710 3761 * @param spi SPI Bus
Sissors 24:fb3399713710 3762 * @param cs chip select pin (active low)
wim 25:6162b31128c9 3763 * @param rs Instruction/data control line
Sissors 24:fb3399713710 3764 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 25:6162b31128c9 3765 * @param bl Backlight control line (optional, default = NC)
wim 26:bd897a001012 3766 * @param ctrl LCD controller (default = ST7032_3V3)
wim 25:6162b31128c9 3767 */
wim 25:6162b31128c9 3768 TextLCD_SPI_N::TextLCD_SPI_N(SPI *spi, PinName cs, PinName rs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 25:6162b31128c9 3769 TextLCD_Base(type, ctrl),
wim 25:6162b31128c9 3770 _spi(spi),
wim 25:6162b31128c9 3771 _cs(cs),
wim 25:6162b31128c9 3772 _rs(rs) {
Sissors 24:fb3399713710 3773
wim 32:59c4b8f648d4 3774 // Init CS
wim 32:59c4b8f648d4 3775 _cs = 1;
wim 32:59c4b8f648d4 3776
wim 36:9f5f86dfd44a 3777 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3778 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3779 // _spi->format(8,3);
wim 37:ce348c002929 3780 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3781 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3782
Sissors 24:fb3399713710 3783 // Setup the spi for 8 bit data, low steady state clock,
Sissors 24:fb3399713710 3784 // rising edge capture, with a 500KHz or 1MHz clock rate
Sissors 24:fb3399713710 3785 _spi->format(8,0);
wim 36:9f5f86dfd44a 3786 // _spi->frequency(500000);
Sissors 24:fb3399713710 3787 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3788
Sissors 24:fb3399713710 3789 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
Sissors 24:fb3399713710 3790 if (bl != NC) {
Sissors 24:fb3399713710 3791 _bl = new DigitalOut(bl); //Construct new pin
Sissors 24:fb3399713710 3792 _bl->write(0); //Deactivate
Sissors 24:fb3399713710 3793 }
Sissors 24:fb3399713710 3794 else {
Sissors 24:fb3399713710 3795 // No Hardware Backlight pin
Sissors 24:fb3399713710 3796 _bl = NULL; //Construct dummy pin
Sissors 24:fb3399713710 3797 }
wim 30:033048611c01 3798
wim 30:033048611c01 3799 //Sanity check
wim 30:033048611c01 3800 if (_ctrl & LCD_C_SPI4) {
wim 36:9f5f86dfd44a 3801 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3802 // ST7070 must set datalength to 8 bits!
wim 30:033048611c01 3803 }
wim 30:033048611c01 3804 else {
wim 30:033048611c01 3805 error("Error: LCD Controller type does not support native SPI4 interface\n\r");
wim 30:033048611c01 3806 }
Sissors 24:fb3399713710 3807 }
Sissors 24:fb3399713710 3808
wim 25:6162b31128c9 3809 TextLCD_SPI_N::~TextLCD_SPI_N() {
Sissors 24:fb3399713710 3810 if (_bl != NULL) {delete _bl;} // BL pin
Sissors 24:fb3399713710 3811 }
Sissors 24:fb3399713710 3812
Sissors 24:fb3399713710 3813 // Not used in this mode
wim 25:6162b31128c9 3814 void TextLCD_SPI_N::_setEnable(bool value) {
Sissors 24:fb3399713710 3815 }
Sissors 24:fb3399713710 3816
Sissors 24:fb3399713710 3817 // Set RS pin
wim 36:9f5f86dfd44a 3818 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 25:6162b31128c9 3819 void TextLCD_SPI_N::_setRS(bool value) {
Sissors 24:fb3399713710 3820 _rs = value;
Sissors 24:fb3399713710 3821 }
Sissors 24:fb3399713710 3822
Sissors 24:fb3399713710 3823 // Set BL pin
wim 25:6162b31128c9 3824 void TextLCD_SPI_N::_setBL(bool value) {
wim 26:bd897a001012 3825 if (_bl) {
Sissors 24:fb3399713710 3826 _bl->write(value);
wim 26:bd897a001012 3827 }
Sissors 24:fb3399713710 3828 }
Sissors 24:fb3399713710 3829
wim 29:a3663151aa65 3830 // Not used in this mode
wim 29:a3663151aa65 3831 void TextLCD_SPI_N::_setData(int value) {
wim 29:a3663151aa65 3832 }
wim 29:a3663151aa65 3833
Sissors 24:fb3399713710 3834 // Write a byte using SPI
wim 25:6162b31128c9 3835 void TextLCD_SPI_N::_writeByte(int value) {
Sissors 24:fb3399713710 3836 _cs = 0;
Sissors 24:fb3399713710 3837 wait_us(1);
Sissors 24:fb3399713710 3838 _spi->write(value);
Sissors 24:fb3399713710 3839 wait_us(1);
Sissors 24:fb3399713710 3840 _cs = 1;
Sissors 24:fb3399713710 3841 }
wim 34:e5a0dcb43ecc 3842 #endif /* Native SPI bus */
wim 25:6162b31128c9 3843 //-------- End TextLCD_SPI_N ------------
wim 21:9eb628d9e164 3844
wim 21:9eb628d9e164 3845
wim 36:9f5f86dfd44a 3846 //-------- Start TextLCD_SPI_N_3_8 --------
wim 36:9f5f86dfd44a 3847 #if(LCD_SPI_N_3_8 == 1) /* Native SPI bus */
wim 36:9f5f86dfd44a 3848
wim 36:9f5f86dfd44a 3849 /** Create a TextLCD interface using a controller with a native SPI3 8 bits interface
wim 36:9f5f86dfd44a 3850 * This mode is supported by ST7070. Note that implementation in TexTLCD is not very efficient due to
wim 36:9f5f86dfd44a 3851 * structure of the TextLCD library: each databyte is written separately and requires a separate 'count command' set to 1 byte.
wim 36:9f5f86dfd44a 3852 *
wim 36:9f5f86dfd44a 3853 * @param spi SPI Bus
wim 36:9f5f86dfd44a 3854 * @param cs chip select pin (active low)
wim 36:9f5f86dfd44a 3855 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 36:9f5f86dfd44a 3856 * @param bl Backlight control line (optional, default = NC)
wim 36:9f5f86dfd44a 3857 * @param ctrl LCD controller (default = ST7070)
wim 36:9f5f86dfd44a 3858 */
wim 36:9f5f86dfd44a 3859 TextLCD_SPI_N_3_8::TextLCD_SPI_N_3_8(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 36:9f5f86dfd44a 3860 TextLCD_Base(type, ctrl),
wim 36:9f5f86dfd44a 3861 _spi(spi),
wim 36:9f5f86dfd44a 3862 _cs(cs) {
wim 36:9f5f86dfd44a 3863
wim 36:9f5f86dfd44a 3864 // Init CS
wim 36:9f5f86dfd44a 3865 _cs = 1;
wim 36:9f5f86dfd44a 3866
wim 36:9f5f86dfd44a 3867 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3868 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3869 // _spi->format(8,3);
wim 37:ce348c002929 3870 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3871 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3872
wim 36:9f5f86dfd44a 3873 // Setup the spi for 8 bit data, low steady state clock,
wim 36:9f5f86dfd44a 3874 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3875 _spi->format(8,0);
wim 36:9f5f86dfd44a 3876 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3877 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3878
wim 36:9f5f86dfd44a 3879
wim 36:9f5f86dfd44a 3880 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 36:9f5f86dfd44a 3881 if (bl != NC) {
wim 36:9f5f86dfd44a 3882 _bl = new DigitalOut(bl); //Construct new pin
wim 36:9f5f86dfd44a 3883 _bl->write(0); //Deactivate
wim 36:9f5f86dfd44a 3884 }
wim 36:9f5f86dfd44a 3885 else {
wim 36:9f5f86dfd44a 3886 // No Hardware Backlight pin
wim 36:9f5f86dfd44a 3887 _bl = NULL; //Construct dummy pin
wim 36:9f5f86dfd44a 3888 }
wim 36:9f5f86dfd44a 3889
wim 36:9f5f86dfd44a 3890 //Sanity check
wim 36:9f5f86dfd44a 3891 if (_ctrl & LCD_C_SPI3_8) {
wim 36:9f5f86dfd44a 3892 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3893 }
wim 36:9f5f86dfd44a 3894 else {
wim 36:9f5f86dfd44a 3895 error("Error: LCD Controller type does not support native SPI3 8 bits interface\n\r");
wim 36:9f5f86dfd44a 3896 }
wim 36:9f5f86dfd44a 3897 }
wim 36:9f5f86dfd44a 3898
wim 36:9f5f86dfd44a 3899 TextLCD_SPI_N_3_8::~TextLCD_SPI_N_3_8() {
wim 36:9f5f86dfd44a 3900 if (_bl != NULL) {delete _bl;} // BL pin
wim 36:9f5f86dfd44a 3901 }
wim 36:9f5f86dfd44a 3902
wim 36:9f5f86dfd44a 3903 // Not used in this mode
wim 36:9f5f86dfd44a 3904 void TextLCD_SPI_N_3_8::_setEnable(bool value) {
wim 36:9f5f86dfd44a 3905 }
wim 36:9f5f86dfd44a 3906
wim 36:9f5f86dfd44a 3907 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 36:9f5f86dfd44a 3908 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 36:9f5f86dfd44a 3909 void TextLCD_SPI_N_3_8::_setRS(bool value) {
wim 36:9f5f86dfd44a 3910
wim 36:9f5f86dfd44a 3911 if (value) {
wim 36:9f5f86dfd44a 3912 _controlbyte = 0x01; // Next byte is data, No more control bytes will follow
wim 36:9f5f86dfd44a 3913 }
wim 36:9f5f86dfd44a 3914 else {
wim 36:9f5f86dfd44a 3915 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 36:9f5f86dfd44a 3916 }
wim 36:9f5f86dfd44a 3917 }
wim 36:9f5f86dfd44a 3918
wim 36:9f5f86dfd44a 3919 // Set BL pin
wim 36:9f5f86dfd44a 3920 void TextLCD_SPI_N_3_8::_setBL(bool value) {
wim 36:9f5f86dfd44a 3921 if (_bl) {
wim 36:9f5f86dfd44a 3922 _bl->write(value);
wim 36:9f5f86dfd44a 3923 }
wim 36:9f5f86dfd44a 3924 }
wim 36:9f5f86dfd44a 3925
wim 36:9f5f86dfd44a 3926 // Not used in this mode
wim 36:9f5f86dfd44a 3927 void TextLCD_SPI_N_3_8::_setData(int value) {
wim 36:9f5f86dfd44a 3928 }
wim 36:9f5f86dfd44a 3929
wim 36:9f5f86dfd44a 3930 // Write a byte using SPI3 8 bits mode (ST7070)
wim 36:9f5f86dfd44a 3931 void TextLCD_SPI_N_3_8::_writeByte(int value) {
wim 36:9f5f86dfd44a 3932
wim 36:9f5f86dfd44a 3933 if (_controlbyte == 0x00) { // Byte is command
wim 36:9f5f86dfd44a 3934 _cs = 0;
wim 36:9f5f86dfd44a 3935 wait_us(1);
wim 36:9f5f86dfd44a 3936 _spi->write(value);
wim 36:9f5f86dfd44a 3937 wait_us(1);
wim 36:9f5f86dfd44a 3938 _cs = 1;
wim 36:9f5f86dfd44a 3939 }
wim 36:9f5f86dfd44a 3940 else { // Byte is data
wim 36:9f5f86dfd44a 3941 // Select Extended Instr Set
wim 36:9f5f86dfd44a 3942 _cs = 0;
wim 36:9f5f86dfd44a 3943 wait_us(1);
wim 36:9f5f86dfd44a 3944 _spi->write(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1));
wim 36:9f5f86dfd44a 3945 wait_us(1);
wim 36:9f5f86dfd44a 3946 _cs = 1;
wim 36:9f5f86dfd44a 3947
wim 36:9f5f86dfd44a 3948 wait_us(40); // Wait until command has finished...
wim 36:9f5f86dfd44a 3949
wim 36:9f5f86dfd44a 3950 // Set Count to 1 databyte
wim 36:9f5f86dfd44a 3951 _cs = 0;
wim 36:9f5f86dfd44a 3952 wait_us(1);
wim 36:9f5f86dfd44a 3953 _spi->write(0x80); // Set display data length, 1 L6 L5 L4 L3 L2 L1 L0 (Instr Set = 1)
wim 36:9f5f86dfd44a 3954 wait_us(1);
wim 36:9f5f86dfd44a 3955 _cs = 1;
wim 36:9f5f86dfd44a 3956
wim 36:9f5f86dfd44a 3957 wait_us(40);
wim 36:9f5f86dfd44a 3958
wim 36:9f5f86dfd44a 3959 // Write 1 databyte
wim 36:9f5f86dfd44a 3960 _cs = 0;
wim 36:9f5f86dfd44a 3961 wait_us(1);
wim 36:9f5f86dfd44a 3962 _spi->write(value); // Write data (Instr Set = 1)
wim 36:9f5f86dfd44a 3963 wait_us(1);
wim 36:9f5f86dfd44a 3964 _cs = 1;
wim 36:9f5f86dfd44a 3965
wim 36:9f5f86dfd44a 3966 wait_us(40);
wim 36:9f5f86dfd44a 3967
wim 36:9f5f86dfd44a 3968 // Select Standard Instr Set
wim 36:9f5f86dfd44a 3969 _cs = 0;
wim 36:9f5f86dfd44a 3970 wait_us(1);
wim 36:9f5f86dfd44a 3971 _spi->write(0x20 | _function); // Set function, 0 0 1 DL N EXT=0 x x (Select Instr Set = 0));
wim 36:9f5f86dfd44a 3972 wait_us(1);
wim 36:9f5f86dfd44a 3973 _cs = 1;
wim 36:9f5f86dfd44a 3974 }
wim 36:9f5f86dfd44a 3975 }
wim 36:9f5f86dfd44a 3976 #endif /* Native SPI bus */
wim 36:9f5f86dfd44a 3977 //------- End TextLCD_SPI_N_3_8 -----------
wim 36:9f5f86dfd44a 3978
wim 36:9f5f86dfd44a 3979
wim 30:033048611c01 3980 //-------- Start TextLCD_SPI_N_3_9 --------
wim 34:e5a0dcb43ecc 3981 #if(LCD_SPI_N_3_9 == 1) /* Native SPI bus */
wim 34:e5a0dcb43ecc 3982 //Code checked out on logic analyser. Not yet tested on hardware..
wim 30:033048611c01 3983
wim 30:033048611c01 3984 /** Create a TextLCD interface using a controller with a native SPI3 9 bits interface
wim 30:033048611c01 3985 *
wim 30:033048611c01 3986 * @param spi SPI Bus
wim 30:033048611c01 3987 * @param cs chip select pin (active low)
wim 30:033048611c01 3988 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3989 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3990 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3991 */
wim 30:033048611c01 3992 TextLCD_SPI_N_3_9::TextLCD_SPI_N_3_9(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3993 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3994 _spi(spi),
wim 33:900a94bc7585 3995 _cs(cs) {
wim 32:59c4b8f648d4 3996
wim 32:59c4b8f648d4 3997 // Init CS
wim 32:59c4b8f648d4 3998 _cs = 1;
wim 32:59c4b8f648d4 3999
wim 34:e5a0dcb43ecc 4000 // Setup the spi for 9 bit data, high steady state clock,
wim 30:033048611c01 4001 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 4002 _spi->format(9,3);
wim 30:033048611c01 4003 _spi->frequency(1000000);
wim 30:033048611c01 4004
wim 30:033048611c01 4005 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 4006 if (bl != NC) {
wim 30:033048611c01 4007 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 4008 _bl->write(0); //Deactivate
wim 30:033048611c01 4009 }
wim 30:033048611c01 4010 else {
wim 30:033048611c01 4011 // No Hardware Backlight pin
wim 30:033048611c01 4012 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 4013 }
wim 30:033048611c01 4014
wim 30:033048611c01 4015 //Sanity check
wim 36:9f5f86dfd44a 4016 if (_ctrl & LCD_C_SPI3_9) {
wim 36:9f5f86dfd44a 4017 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 4018 }
wim 30:033048611c01 4019 else {
wim 30:033048611c01 4020 error("Error: LCD Controller type does not support native SPI3 9 bits interface\n\r");
wim 30:033048611c01 4021 }
wim 30:033048611c01 4022 }
wim 30:033048611c01 4023
wim 30:033048611c01 4024 TextLCD_SPI_N_3_9::~TextLCD_SPI_N_3_9() {
wim 30:033048611c01 4025 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 4026 }
wim 30:033048611c01 4027
wim 30:033048611c01 4028 // Not used in this mode
wim 30:033048611c01 4029 void TextLCD_SPI_N_3_9::_setEnable(bool value) {
wim 30:033048611c01 4030 }
wim 30:033048611c01 4031
wim 30:033048611c01 4032 // Set RS pin
wim 30:033048611c01 4033 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 4034 void TextLCD_SPI_N_3_9::_setRS(bool value) {
wim 30:033048611c01 4035 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 4036 // b8 b7...........b0
wim 30:033048611c01 4037 // RS command or data
wim 30:033048611c01 4038 //
wim 30:033048611c01 4039 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 4040 //
wim 30:033048611c01 4041
wim 30:033048611c01 4042 if (value) {
wim 30:033048611c01 4043 _controlbyte = 0x01; // Next byte is data
wim 30:033048611c01 4044 }
wim 30:033048611c01 4045 else {
wim 30:033048611c01 4046 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 4047 }
wim 30:033048611c01 4048 }
wim 30:033048611c01 4049
wim 30:033048611c01 4050 // Set BL pin
wim 30:033048611c01 4051 void TextLCD_SPI_N_3_9::_setBL(bool value) {
wim 30:033048611c01 4052 if (_bl) {
wim 30:033048611c01 4053 _bl->write(value);
wim 30:033048611c01 4054 }
wim 30:033048611c01 4055 }
wim 30:033048611c01 4056
wim 30:033048611c01 4057 // Not used in this mode
wim 30:033048611c01 4058 void TextLCD_SPI_N_3_9::_setData(int value) {
wim 30:033048611c01 4059 }
wim 30:033048611c01 4060
wim 30:033048611c01 4061 // Write a byte using SPI3 9 bits mode
wim 30:033048611c01 4062 void TextLCD_SPI_N_3_9::_writeByte(int value) {
wim 30:033048611c01 4063 _cs = 0;
wim 30:033048611c01 4064 wait_us(1);
wim 30:033048611c01 4065 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 4066 wait_us(1);
wim 30:033048611c01 4067 _cs = 1;
wim 30:033048611c01 4068 }
wim 34:e5a0dcb43ecc 4069 #endif /* Native SPI bus */
wim 30:033048611c01 4070 //------- End TextLCD_SPI_N_3_9 -----------
wim 34:e5a0dcb43ecc 4071
wim 34:e5a0dcb43ecc 4072
wim 30:033048611c01 4073 //------- Start TextLCD_SPI_N_3_10 --------
wim 34:e5a0dcb43ecc 4074 #if(LCD_SPI_N_3_10 == 1) /* Native SPI bus */
wim 30:033048611c01 4075
wim 30:033048611c01 4076 /** Create a TextLCD interface using a controller with a native SPI3 10 bits interface
wim 30:033048611c01 4077 *
wim 30:033048611c01 4078 * @param spi SPI Bus
wim 30:033048611c01 4079 * @param cs chip select pin (active low)
wim 30:033048611c01 4080 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 4081 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 4082 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 4083 */
wim 30:033048611c01 4084 TextLCD_SPI_N_3_10::TextLCD_SPI_N_3_10(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 4085 TextLCD_Base(type, ctrl),
wim 30:033048611c01 4086 _spi(spi),
wim 30:033048611c01 4087 _cs(cs) {
wim 30:033048611c01 4088
wim 32:59c4b8f648d4 4089 // Init CS
wim 32:59c4b8f648d4 4090 _cs = 1;
wim 32:59c4b8f648d4 4091
wim 30:033048611c01 4092 // Setup the spi for 10 bit data, low steady state clock,
wim 30:033048611c01 4093 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 30:033048611c01 4094 _spi->format(10,0);
wim 30:033048611c01 4095 _spi->frequency(1000000);
wim 30:033048611c01 4096
wim 30:033048611c01 4097 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 4098 if (bl != NC) {
wim 30:033048611c01 4099 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 4100 _bl->write(0); //Deactivate
wim 30:033048611c01 4101 }
wim 30:033048611c01 4102 else {
wim 30:033048611c01 4103 // No Hardware Backlight pin
wim 30:033048611c01 4104 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 4105 }
wim 30:033048611c01 4106
wim 30:033048611c01 4107 //Sanity check
wim 30:033048611c01 4108 if (_ctrl & LCD_C_SPI3_10) {
wim 36:9f5f86dfd44a 4109 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 4110 }
wim 30:033048611c01 4111 else {
wim 30:033048611c01 4112 error("Error: LCD Controller type does not support native SPI3 10 bits interface\n\r");
wim 30:033048611c01 4113 }
wim 30:033048611c01 4114 }
wim 30:033048611c01 4115
wim 30:033048611c01 4116 TextLCD_SPI_N_3_10::~TextLCD_SPI_N_3_10() {
wim 30:033048611c01 4117 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 4118 }
wim 30:033048611c01 4119
wim 30:033048611c01 4120 // Not used in this mode
wim 30:033048611c01 4121 void TextLCD_SPI_N_3_10::_setEnable(bool value) {
wim 30:033048611c01 4122 }
wim 30:033048611c01 4123
wim 30:033048611c01 4124 // Set RS pin
wim 30:033048611c01 4125 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 4126 void TextLCD_SPI_N_3_10::_setRS(bool value) {
wim 30:033048611c01 4127 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 4128 // b9 b8 b7...........b0
wim 30:033048611c01 4129 // RS RW command or data
wim 30:033048611c01 4130 //
wim 30:033048611c01 4131 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 4132 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 30:033048611c01 4133 //
wim 30:033048611c01 4134
wim 30:033048611c01 4135 if (value) {
wim 30:033048611c01 4136 _controlbyte = 0x02; // Next byte is data
wim 30:033048611c01 4137 }
wim 30:033048611c01 4138 else {
wim 30:033048611c01 4139 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 4140 }
wim 30:033048611c01 4141 }
wim 30:033048611c01 4142
wim 30:033048611c01 4143 // Set BL pin
wim 30:033048611c01 4144 void TextLCD_SPI_N_3_10::_setBL(bool value) {
wim 30:033048611c01 4145 if (_bl) {
wim 30:033048611c01 4146 _bl->write(value);
wim 30:033048611c01 4147 }
wim 30:033048611c01 4148 }
wim 30:033048611c01 4149
wim 30:033048611c01 4150 // Not used in this mode
wim 30:033048611c01 4151 void TextLCD_SPI_N_3_10::_setData(int value) {
wim 30:033048611c01 4152 }
wim 30:033048611c01 4153
wim 30:033048611c01 4154 // Write a byte using SPI3 10 bits mode
wim 30:033048611c01 4155 void TextLCD_SPI_N_3_10::_writeByte(int value) {
wim 30:033048611c01 4156 _cs = 0;
wim 30:033048611c01 4157 wait_us(1);
wim 30:033048611c01 4158 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 4159 wait_us(1);
wim 30:033048611c01 4160 _cs = 1;
wim 30:033048611c01 4161 }
wim 34:e5a0dcb43ecc 4162 #endif /* Native SPI bus */
wim 30:033048611c01 4163 //------- End TextLCD_SPI_N_3_10 ----------
wim 34:e5a0dcb43ecc 4164
wim 32:59c4b8f648d4 4165
wim 32:59c4b8f648d4 4166 //------- Start TextLCD_SPI_N_3_16 --------
wim 34:e5a0dcb43ecc 4167 #if(LCD_SPI_N_3_16 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 4168
wim 32:59c4b8f648d4 4169 /** Create a TextLCD interface using a controller with a native SPI3 16 bits interface
wim 32:59c4b8f648d4 4170 *
wim 32:59c4b8f648d4 4171 * @param spi SPI Bus
wim 32:59c4b8f648d4 4172 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 4173 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 4174 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 4175 * @param ctrl LCD controller (default = PT6314)
wim 32:59c4b8f648d4 4176 */
wim 32:59c4b8f648d4 4177 TextLCD_SPI_N_3_16::TextLCD_SPI_N_3_16(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 4178 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 4179 _spi(spi),
wim 32:59c4b8f648d4 4180 _cs(cs) {
wim 32:59c4b8f648d4 4181
wim 32:59c4b8f648d4 4182 // Init CS
wim 32:59c4b8f648d4 4183 _cs = 1;
wim 32:59c4b8f648d4 4184
wim 32:59c4b8f648d4 4185 // Setup the spi for 8 bit data, low steady state clock,
wim 32:59c4b8f648d4 4186 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 4187 _spi->format(8,0);
wim 32:59c4b8f648d4 4188 _spi->frequency(1000000);
wim 32:59c4b8f648d4 4189
wim 32:59c4b8f648d4 4190 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 4191 if (bl != NC) {
wim 32:59c4b8f648d4 4192 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 4193 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 4194 }
wim 32:59c4b8f648d4 4195 else {
wim 32:59c4b8f648d4 4196 // No Hardware Backlight pin
wim 32:59c4b8f648d4 4197 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 4198 }
wim 32:59c4b8f648d4 4199
wim 32:59c4b8f648d4 4200 //Sanity check
wim 32:59c4b8f648d4 4201 if (_ctrl & LCD_C_SPI3_16) {
wim 36:9f5f86dfd44a 4202 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 4203 }
wim 32:59c4b8f648d4 4204 else {
wim 32:59c4b8f648d4 4205 error("Error: LCD Controller type does not support native SPI3 16 bits interface\n\r");
wim 32:59c4b8f648d4 4206 }
wim 32:59c4b8f648d4 4207 }
wim 32:59c4b8f648d4 4208
wim 32:59c4b8f648d4 4209 TextLCD_SPI_N_3_16::~TextLCD_SPI_N_3_16() {
wim 32:59c4b8f648d4 4210 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 4211 }
wim 32:59c4b8f648d4 4212
wim 32:59c4b8f648d4 4213 // Not used in this mode
wim 32:59c4b8f648d4 4214 void TextLCD_SPI_N_3_16::_setEnable(bool value) {
wim 32:59c4b8f648d4 4215 }
wim 32:59c4b8f648d4 4216
wim 32:59c4b8f648d4 4217 // Set RS pin
wim 32:59c4b8f648d4 4218 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 4219 void TextLCD_SPI_N_3_16::_setRS(bool value) {
wim 32:59c4b8f648d4 4220 // The 16bit mode is split in 2 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next byte.
wim 32:59c4b8f648d4 4221 // The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 4222 // b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 4223 // 1 1 1 1 1 RW RS 0 d7 d6 d5 d4 d3 d2 d1 d0
wim 32:59c4b8f648d4 4224 //
wim 32:59c4b8f648d4 4225 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 4226 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 4227 //
wim 32:59c4b8f648d4 4228
wim 32:59c4b8f648d4 4229 if (value) {
wim 32:59c4b8f648d4 4230 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 4231 }
wim 32:59c4b8f648d4 4232 else {
wim 32:59c4b8f648d4 4233 _controlbyte = 0xF8; // Next byte is command
wim 32:59c4b8f648d4 4234 }
wim 32:59c4b8f648d4 4235 }
wim 32:59c4b8f648d4 4236
wim 32:59c4b8f648d4 4237 // Set BL pin
wim 32:59c4b8f648d4 4238 void TextLCD_SPI_N_3_16::_setBL(bool value) {
wim 32:59c4b8f648d4 4239 if (_bl) {
wim 32:59c4b8f648d4 4240 _bl->write(value);
wim 32:59c4b8f648d4 4241 }
wim 32:59c4b8f648d4 4242 }
wim 32:59c4b8f648d4 4243
wim 32:59c4b8f648d4 4244 // Not used in this mode
wim 32:59c4b8f648d4 4245 void TextLCD_SPI_N_3_16::_setData(int value) {
wim 32:59c4b8f648d4 4246 }
wim 34:e5a0dcb43ecc 4247
wim 32:59c4b8f648d4 4248 // Write a byte using SPI3 16 bits mode
wim 32:59c4b8f648d4 4249 void TextLCD_SPI_N_3_16::_writeByte(int value) {
wim 32:59c4b8f648d4 4250 _cs = 0;
wim 32:59c4b8f648d4 4251 wait_us(1);
wim 32:59c4b8f648d4 4252
wim 32:59c4b8f648d4 4253 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 4254
wim 32:59c4b8f648d4 4255 _spi->write(value);
wim 32:59c4b8f648d4 4256
wim 32:59c4b8f648d4 4257 wait_us(1);
wim 32:59c4b8f648d4 4258 _cs = 1;
wim 32:59c4b8f648d4 4259 }
wim 34:e5a0dcb43ecc 4260 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 4261 //------- End TextLCD_SPI_N_3_16 ----------
wim 34:e5a0dcb43ecc 4262
wim 34:e5a0dcb43ecc 4263
wim 32:59c4b8f648d4 4264 //------- Start TextLCD_SPI_N_3_24 --------
wim 34:e5a0dcb43ecc 4265 #if(LCD_SPI_N_3_24 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 4266
wim 32:59c4b8f648d4 4267 /** Create a TextLCD interface using a controller with a native SPI3 24 bits interface
wim 32:59c4b8f648d4 4268 *
wim 32:59c4b8f648d4 4269 * @param spi SPI Bus
wim 32:59c4b8f648d4 4270 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 4271 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 4272 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 4273 * @param ctrl LCD controller (default = SSD1803)
wim 32:59c4b8f648d4 4274 */
wim 32:59c4b8f648d4 4275 TextLCD_SPI_N_3_24::TextLCD_SPI_N_3_24(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 4276 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 4277 _spi(spi),
wim 32:59c4b8f648d4 4278 _cs(cs) {
wim 32:59c4b8f648d4 4279
wim 32:59c4b8f648d4 4280 // Init CS
wim 32:59c4b8f648d4 4281 _cs = 1;
wim 32:59c4b8f648d4 4282
wim 34:e5a0dcb43ecc 4283 // Setup the spi for 8 bit data, high steady state clock,
wim 32:59c4b8f648d4 4284 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 34:e5a0dcb43ecc 4285 _spi->format(8,3);
wim 32:59c4b8f648d4 4286 _spi->frequency(1000000);
wim 32:59c4b8f648d4 4287
wim 32:59c4b8f648d4 4288 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 4289 if (bl != NC) {
wim 32:59c4b8f648d4 4290 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 4291 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 4292 }
wim 32:59c4b8f648d4 4293 else {
wim 32:59c4b8f648d4 4294 // No Hardware Backlight pin
wim 32:59c4b8f648d4 4295 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 4296 }
wim 32:59c4b8f648d4 4297
wim 32:59c4b8f648d4 4298 //Sanity check
wim 32:59c4b8f648d4 4299 if (_ctrl & LCD_C_SPI3_24) {
wim 36:9f5f86dfd44a 4300 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 4301 }
wim 32:59c4b8f648d4 4302 else {
wim 32:59c4b8f648d4 4303 error("Error: LCD Controller type does not support native SPI3 24 bits interface\n\r");
wim 32:59c4b8f648d4 4304 }
wim 32:59c4b8f648d4 4305 }
wim 32:59c4b8f648d4 4306
wim 32:59c4b8f648d4 4307 TextLCD_SPI_N_3_24::~TextLCD_SPI_N_3_24() {
wim 32:59c4b8f648d4 4308 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 4309 }
wim 32:59c4b8f648d4 4310
wim 32:59c4b8f648d4 4311 // Not used in this mode
wim 32:59c4b8f648d4 4312 void TextLCD_SPI_N_3_24::_setEnable(bool value) {
wim 32:59c4b8f648d4 4313 }
wim 32:59c4b8f648d4 4314
wim 32:59c4b8f648d4 4315 // Set RS pin
wim 32:59c4b8f648d4 4316 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 4317 void TextLCD_SPI_N_3_24::_setRS(bool value) {
wim 32:59c4b8f648d4 4318 // The 24bit mode is split in 3 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next two bytes.
wim 32:59c4b8f648d4 4319 // Each byte encodes 4 actual bits. The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 4320 // b23 b22 b21 b20 b19 b18 b17 b16 - b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 4321 // 1 1 1 1 1 RW RS 0 d0 d1 d2 d3 0 0 0 0 d4 d5 d6 d7 0 0 0 0
wim 32:59c4b8f648d4 4322 //
wim 32:59c4b8f648d4 4323 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 4324 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 4325 //
wim 32:59c4b8f648d4 4326 // Note: SPI3_24 expects LSB first. This is inconsistent with regular SPI convention (and hardware) that sends MSB first.
wim 32:59c4b8f648d4 4327
wim 32:59c4b8f648d4 4328 if (value) {
wim 32:59c4b8f648d4 4329 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 4330 }
wim 32:59c4b8f648d4 4331 else {
wim 32:59c4b8f648d4 4332 _controlbyte = 0xF8; // Next byte is command
wim 34:e5a0dcb43ecc 4333 }
wim 32:59c4b8f648d4 4334 }
wim 32:59c4b8f648d4 4335
wim 32:59c4b8f648d4 4336 // Set BL pin
wim 32:59c4b8f648d4 4337 void TextLCD_SPI_N_3_24::_setBL(bool value) {
wim 32:59c4b8f648d4 4338 if (_bl) {
wim 32:59c4b8f648d4 4339 _bl->write(value);
wim 32:59c4b8f648d4 4340 }
wim 32:59c4b8f648d4 4341 }
wim 32:59c4b8f648d4 4342
wim 32:59c4b8f648d4 4343 // Not used in this mode
wim 32:59c4b8f648d4 4344 void TextLCD_SPI_N_3_24::_setData(int value) {
wim 32:59c4b8f648d4 4345 }
wim 32:59c4b8f648d4 4346
wim 32:59c4b8f648d4 4347 //Mapping table to flip the bits around cause SPI3_24 expects LSB first.
wim 32:59c4b8f648d4 4348 const uint8_t map3_24[16] = {0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0};
wim 32:59c4b8f648d4 4349
wim 32:59c4b8f648d4 4350 // Write a byte using SPI3 24 bits mode
wim 32:59c4b8f648d4 4351 void TextLCD_SPI_N_3_24::_writeByte(int value) {
wim 32:59c4b8f648d4 4352 _cs = 0;
wim 32:59c4b8f648d4 4353 wait_us(1);
wim 32:59c4b8f648d4 4354 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 4355
wim 32:59c4b8f648d4 4356 //Map and send the LSB nibble
wim 32:59c4b8f648d4 4357 _spi->write( map3_24[value & 0x0F]);
wim 32:59c4b8f648d4 4358
wim 32:59c4b8f648d4 4359 //Map and send the MSB nibble
wim 32:59c4b8f648d4 4360 _spi->write( map3_24[(value >> 4) & 0x0F]);
wim 32:59c4b8f648d4 4361
wim 32:59c4b8f648d4 4362 wait_us(1);
wim 32:59c4b8f648d4 4363 _cs = 1;
wim 32:59c4b8f648d4 4364 }
wim 34:e5a0dcb43ecc 4365 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 4366 //------- End TextLCD_SPI_N_3_24 ----------