File content as of revision 8:e87027349167:

#include "mbed.h"
#include "DMA_SPI.h"

extern int16_t data_to_transmit[6];
extern int16_t received_data[12];

void initDMA() {
    RCC->AHB1ENR|= (RCC_AHB1ENR_DMA1EN);                                        //Enable the DMA clock
    
    DMA1->DMA1_CSELR |= (
                        (0x01<<(4*(C2S - 1)))                                   //Select SPI1_Rx on DMA1 Channel 2
                        |(0x01<<(4*(C3S - 1)))                                  //Select SPI1_Tx on DMA1 Channel 3
                        );
                    
                    
                        
    DMA1->DMA1_CCR2 &= ~((0x01 << 4));                                           //Clear bit 4 in channel 2 configuration register to set the channel to read from peripheral. Peripheral -> Memory
    DMA1->DMA1_CCR2 |= ((0x01 << 8)                                              //Set peripheral size to 16-bits
                       |(0x01 << 10)                                            //Set memory size to 16-bits
                       |(0x01 << 7)                                             //Set to memory increment mode
                       |(0x01 << 1)                                             //Transfer complete interrupt enable
                       );
                       
    DMA1->DMA1_CNDTR2 = 12;                                                      //number of data to transfer from the peripherla to memory
    DMA1->DMA1_CPAR2 = SPI1->DR;
    DMA1->DMA1_CMAR2 = received_data;
    
    
    DMA1->DMA1_CCR3 |=  ((0x01 << 4));                                           //Clear bit 4 in channel 3 configuration register to set the channel to read from memory.   Memroy -> Peripheral                   
    DMA1->DMA1_CCR3 |= ((0x01 << 8)                                              //Set peripheral size to 16-bits
                      |(0x01 << 10)                                             //Set memory size to 16-bits
                      |(0x01 << 7)                                              //Set to memory increment mode
                      |(0x01 << 1)                                              //Transfer complete interrupt enable
                      );
                      
    DMA1->DMA1_CNDTR3 = 6;                                                       //number of data to transfer from memory to the peripheral
    DMA1->DMA1_CPAR3 = SPI1->DR;
    DMA1->DMA1_CMAR3 = data_to_transmit;
    
    
    DMA1->DMA1_CCR2 |= (0x01<<0);                                                //Enable channel 2. Must be disabled in order to be able to alter DMA
    DMA1->DMA_CCR3 |= (0x01<<0);                                                //Enable channel 3. Must be disabled in order to be able to alter DMA
    
    
    NVIC->ISER[0]|= (1u<<12);                                                   //Enable DMA1 channel 2 interrupt                                                   
    NVIC->ISER[0]|= (1u<<13);                                                   //Enable DMA1 channel 3 interrupt
    //NVIC_EnableIRQ(EXTI15_10_IRQn);                                             //enable the interrupt request
                      
}