Diff: SPI.h

Revision:

11:366f1186c121

Parent:

1:6766e7f4f12f

Child:

13:c7e8e277f884

--- a/SPI.h	Fri Mar 08 01:33:51 2019 +0000
+++ b/SPI.h	Tue Mar 19 01:26:11 2019 +0000
@@ -3,11 +3,35 @@
 #define SCK_slave       5       
 #define MISO_slave      6       
 #define MOSI_slave      7       
-#define CS_slave        8       
+#define CS_slave        8    
+
+
+
+#define CCR_EN      0
+#define CCR_TCIE    1
+#define CCR_HTIE    2
+#define CCR_TEIE    3
+#define CCR_DIR     4
+#define CCR_CIRC    5
+#define CCR_PINC    6
+#define CCR_MINC    7
+#define CCR_PSIZE   8
+#define CCR_MSIZE   10
+#define CCR_PL      12
+#define CCR_MEM2MEM 14   
 
 #define clr_CS()    GPIOA->BSRR=(1u<<(CS_slave+16))
 #define set_CS()    GPIOA->BSRR=(1u<<CS_slave)
 
+#define CLEAR_SPI1_CR2_RXDMAEN_BIT()        SPI1->CR2 &= ~(0x01<<0)
+#define SET_SPI1_CR2_RXDMAEN_BIT()          SPI1->CR2 |=  (0x01<<0)
+
+#define CLEAR_SPI1_CR2_TXDMAEN_BIT()        SPI1->CR2 &= ~(0x01<<1)
+#define SET_SPI1_CR2_TXDMAEN_BIT()          SPI1->CR2 |=  (0x01<<1)
+
+#define DMA1_CH2_DISABLE()                         DMA1_Channel2->CCR &= ~(0x01<<CCR_EN) 
+#define DMA1_CH3_DISABLE()                         DMA1_Channel3->CCR &= ~(0x01<<CCR_EN)
+
 //#include <stm32f4xx.h>
 #include <stm32l4xx.h> //Uncomment this to use the nano board and comment the one above