
SPI slave program to enable communication between the FPGA and the STM32L432 board.
SPI.h@11:366f1186c121, 2019-03-19 (annotated)
- Committer:
- Zbyszek
- Date:
- Tue Mar 19 01:26:11 2019 +0000
- Revision:
- 11:366f1186c121
- Parent:
- 1:6766e7f4f12f
- Child:
- 13:c7e8e277f884
Several IMUs can now be read using STM32L432.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Zbyszek | 0:8e367d6d8f03 | 1 | #ifndef _SPI_H_ |
Zbyszek | 0:8e367d6d8f03 | 2 | #define _SPI_H_ |
Zbyszek | 0:8e367d6d8f03 | 3 | #define SCK_slave 5 |
Zbyszek | 0:8e367d6d8f03 | 4 | #define MISO_slave 6 |
Zbyszek | 0:8e367d6d8f03 | 5 | #define MOSI_slave 7 |
Zbyszek | 11:366f1186c121 | 6 | #define CS_slave 8 |
Zbyszek | 11:366f1186c121 | 7 | |
Zbyszek | 11:366f1186c121 | 8 | |
Zbyszek | 11:366f1186c121 | 9 | |
Zbyszek | 11:366f1186c121 | 10 | #define CCR_EN 0 |
Zbyszek | 11:366f1186c121 | 11 | #define CCR_TCIE 1 |
Zbyszek | 11:366f1186c121 | 12 | #define CCR_HTIE 2 |
Zbyszek | 11:366f1186c121 | 13 | #define CCR_TEIE 3 |
Zbyszek | 11:366f1186c121 | 14 | #define CCR_DIR 4 |
Zbyszek | 11:366f1186c121 | 15 | #define CCR_CIRC 5 |
Zbyszek | 11:366f1186c121 | 16 | #define CCR_PINC 6 |
Zbyszek | 11:366f1186c121 | 17 | #define CCR_MINC 7 |
Zbyszek | 11:366f1186c121 | 18 | #define CCR_PSIZE 8 |
Zbyszek | 11:366f1186c121 | 19 | #define CCR_MSIZE 10 |
Zbyszek | 11:366f1186c121 | 20 | #define CCR_PL 12 |
Zbyszek | 11:366f1186c121 | 21 | #define CCR_MEM2MEM 14 |
Zbyszek | 0:8e367d6d8f03 | 22 | |
Zbyszek | 0:8e367d6d8f03 | 23 | #define clr_CS() GPIOA->BSRR=(1u<<(CS_slave+16)) |
Zbyszek | 0:8e367d6d8f03 | 24 | #define set_CS() GPIOA->BSRR=(1u<<CS_slave) |
Zbyszek | 0:8e367d6d8f03 | 25 | |
Zbyszek | 11:366f1186c121 | 26 | #define CLEAR_SPI1_CR2_RXDMAEN_BIT() SPI1->CR2 &= ~(0x01<<0) |
Zbyszek | 11:366f1186c121 | 27 | #define SET_SPI1_CR2_RXDMAEN_BIT() SPI1->CR2 |= (0x01<<0) |
Zbyszek | 11:366f1186c121 | 28 | |
Zbyszek | 11:366f1186c121 | 29 | #define CLEAR_SPI1_CR2_TXDMAEN_BIT() SPI1->CR2 &= ~(0x01<<1) |
Zbyszek | 11:366f1186c121 | 30 | #define SET_SPI1_CR2_TXDMAEN_BIT() SPI1->CR2 |= (0x01<<1) |
Zbyszek | 11:366f1186c121 | 31 | |
Zbyszek | 11:366f1186c121 | 32 | #define DMA1_CH2_DISABLE() DMA1_Channel2->CCR &= ~(0x01<<CCR_EN) |
Zbyszek | 11:366f1186c121 | 33 | #define DMA1_CH3_DISABLE() DMA1_Channel3->CCR &= ~(0x01<<CCR_EN) |
Zbyszek | 11:366f1186c121 | 34 | |
Zbyszek | 0:8e367d6d8f03 | 35 | //#include <stm32f4xx.h> |
Zbyszek | 0:8e367d6d8f03 | 36 | #include <stm32l4xx.h> //Uncomment this to use the nano board and comment the one above |
Zbyszek | 0:8e367d6d8f03 | 37 | |
Zbyszek | 0:8e367d6d8f03 | 38 | int transfer_spi_slave(unsigned short send_val); |
Zbyszek | 0:8e367d6d8f03 | 39 | int transfer_spi_master(unsigned short send_val); |
Zbyszek | 0:8e367d6d8f03 | 40 | void init_spi1(void); |
Zbyszek | 0:8e367d6d8f03 | 41 | |
Zbyszek | 0:8e367d6d8f03 | 42 | #endif |