Andrew Lindsay / BSP_DISCO_F429ZI

Additional font macro

Dependents:   EspSerial

Components/l3gd20/l3gd20.h@0:e1d164542663, 2015-12-17 (annotated)

Committer:
bcostm
Date:
Thu Dec 17 10:27:15 2015 +0000
Revision:
0:e1d164542663
Initial release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bcostm 0:e1d164542663 1 /**
bcostm 0:e1d164542663 2 ******************************************************************************
bcostm 0:e1d164542663 3 * @file l3gd20.h
bcostm 0:e1d164542663 4 * @author MCD Application Team
bcostm 0:e1d164542663 5 * @version V2.0.0
bcostm 0:e1d164542663 6 * @date 26-June-2015
bcostm 0:e1d164542663 7 * @brief This file contains all the functions prototypes for the l3gd20.c driver.
bcostm 0:e1d164542663 8 ******************************************************************************
bcostm 0:e1d164542663 9 * @attention
bcostm 0:e1d164542663 10 *
bcostm 0:e1d164542663 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bcostm 0:e1d164542663 12 *
bcostm 0:e1d164542663 13 * Redistribution and use in source and binary forms, with or without modification,
bcostm 0:e1d164542663 14 * are permitted provided that the following conditions are met:
bcostm 0:e1d164542663 15 * 1. Redistributions of source code must retain the above copyright notice,
bcostm 0:e1d164542663 16 * this list of conditions and the following disclaimer.
bcostm 0:e1d164542663 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bcostm 0:e1d164542663 18 * this list of conditions and the following disclaimer in the documentation
bcostm 0:e1d164542663 19 * and/or other materials provided with the distribution.
bcostm 0:e1d164542663 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bcostm 0:e1d164542663 21 * may be used to endorse or promote products derived from this software
bcostm 0:e1d164542663 22 * without specific prior written permission.
bcostm 0:e1d164542663 23 *
bcostm 0:e1d164542663 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bcostm 0:e1d164542663 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bcostm 0:e1d164542663 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bcostm 0:e1d164542663 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bcostm 0:e1d164542663 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bcostm 0:e1d164542663 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bcostm 0:e1d164542663 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bcostm 0:e1d164542663 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bcostm 0:e1d164542663 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bcostm 0:e1d164542663 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bcostm 0:e1d164542663 34 *
bcostm 0:e1d164542663 35 ******************************************************************************
bcostm 0:e1d164542663 36 */
bcostm 0:e1d164542663 37
bcostm 0:e1d164542663 38
bcostm 0:e1d164542663 39 /* Define to prevent recursive inclusion -------------------------------------*/
bcostm 0:e1d164542663 40 #ifndef __L3GD20_H
bcostm 0:e1d164542663 41 #define __L3GD20_H
bcostm 0:e1d164542663 42
bcostm 0:e1d164542663 43 #ifdef __cplusplus
bcostm 0:e1d164542663 44 extern "C" {
bcostm 0:e1d164542663 45 #endif
bcostm 0:e1d164542663 46
bcostm 0:e1d164542663 47 /* Includes ------------------------------------------------------------------*/
bcostm 0:e1d164542663 48 #include "../Common/gyro.h"
bcostm 0:e1d164542663 49
bcostm 0:e1d164542663 50 /** @addtogroup BSP
bcostm 0:e1d164542663 51 * @{
bcostm 0:e1d164542663 52 */
bcostm 0:e1d164542663 53
bcostm 0:e1d164542663 54 /** @addtogroup Components
bcostm 0:e1d164542663 55 * @{
bcostm 0:e1d164542663 56 */
bcostm 0:e1d164542663 57
bcostm 0:e1d164542663 58 /** @addtogroup L3GD20
bcostm 0:e1d164542663 59 * @{
bcostm 0:e1d164542663 60 */
bcostm 0:e1d164542663 61
bcostm 0:e1d164542663 62 /** @defgroup L3GD20_Exported_Constants
bcostm 0:e1d164542663 63 * @{
bcostm 0:e1d164542663 64 */
bcostm 0:e1d164542663 65
bcostm 0:e1d164542663 66 /******************************************************************************/
bcostm 0:e1d164542663 67 /*************************** START REGISTER MAPPING **************************/
bcostm 0:e1d164542663 68 /******************************************************************************/
bcostm 0:e1d164542663 69 #define L3GD20_WHO_AM_I_ADDR 0x0F /* device identification register */
bcostm 0:e1d164542663 70 #define L3GD20_CTRL_REG1_ADDR 0x20 /* Control register 1 */
bcostm 0:e1d164542663 71 #define L3GD20_CTRL_REG2_ADDR 0x21 /* Control register 2 */
bcostm 0:e1d164542663 72 #define L3GD20_CTRL_REG3_ADDR 0x22 /* Control register 3 */
bcostm 0:e1d164542663 73 #define L3GD20_CTRL_REG4_ADDR 0x23 /* Control register 4 */
bcostm 0:e1d164542663 74 #define L3GD20_CTRL_REG5_ADDR 0x24 /* Control register 5 */
bcostm 0:e1d164542663 75 #define L3GD20_REFERENCE_REG_ADDR 0x25 /* Reference register */
bcostm 0:e1d164542663 76 #define L3GD20_OUT_TEMP_ADDR 0x26 /* Out temp register */
bcostm 0:e1d164542663 77 #define L3GD20_STATUS_REG_ADDR 0x27 /* Status register */
bcostm 0:e1d164542663 78 #define L3GD20_OUT_X_L_ADDR 0x28 /* Output Register X */
bcostm 0:e1d164542663 79 #define L3GD20_OUT_X_H_ADDR 0x29 /* Output Register X */
bcostm 0:e1d164542663 80 #define L3GD20_OUT_Y_L_ADDR 0x2A /* Output Register Y */
bcostm 0:e1d164542663 81 #define L3GD20_OUT_Y_H_ADDR 0x2B /* Output Register Y */
bcostm 0:e1d164542663 82 #define L3GD20_OUT_Z_L_ADDR 0x2C /* Output Register Z */
bcostm 0:e1d164542663 83 #define L3GD20_OUT_Z_H_ADDR 0x2D /* Output Register Z */
bcostm 0:e1d164542663 84 #define L3GD20_FIFO_CTRL_REG_ADDR 0x2E /* Fifo control Register */
bcostm 0:e1d164542663 85 #define L3GD20_FIFO_SRC_REG_ADDR 0x2F /* Fifo src Register */
bcostm 0:e1d164542663 86
bcostm 0:e1d164542663 87 #define L3GD20_INT1_CFG_ADDR 0x30 /* Interrupt 1 configuration Register */
bcostm 0:e1d164542663 88 #define L3GD20_INT1_SRC_ADDR 0x31 /* Interrupt 1 source Register */
bcostm 0:e1d164542663 89 #define L3GD20_INT1_TSH_XH_ADDR 0x32 /* Interrupt 1 Threshold X register */
bcostm 0:e1d164542663 90 #define L3GD20_INT1_TSH_XL_ADDR 0x33 /* Interrupt 1 Threshold X register */
bcostm 0:e1d164542663 91 #define L3GD20_INT1_TSH_YH_ADDR 0x34 /* Interrupt 1 Threshold Y register */
bcostm 0:e1d164542663 92 #define L3GD20_INT1_TSH_YL_ADDR 0x35 /* Interrupt 1 Threshold Y register */
bcostm 0:e1d164542663 93 #define L3GD20_INT1_TSH_ZH_ADDR 0x36 /* Interrupt 1 Threshold Z register */
bcostm 0:e1d164542663 94 #define L3GD20_INT1_TSH_ZL_ADDR 0x37 /* Interrupt 1 Threshold Z register */
bcostm 0:e1d164542663 95 #define L3GD20_INT1_DURATION_ADDR 0x38 /* Interrupt 1 DURATION register */
bcostm 0:e1d164542663 96
bcostm 0:e1d164542663 97 /******************************************************************************/
bcostm 0:e1d164542663 98 /**************************** END REGISTER MAPPING ***************************/
bcostm 0:e1d164542663 99 /******************************************************************************/
bcostm 0:e1d164542663 100
bcostm 0:e1d164542663 101 #define I_AM_L3GD20 ((uint8_t)0xD4)
bcostm 0:e1d164542663 102 #define I_AM_L3GD20_TR ((uint8_t)0xD5)
bcostm 0:e1d164542663 103
bcostm 0:e1d164542663 104 /** @defgroup Power_Mode_selection
bcostm 0:e1d164542663 105 * @{
bcostm 0:e1d164542663 106 */
bcostm 0:e1d164542663 107 #define L3GD20_MODE_POWERDOWN ((uint8_t)0x00)
bcostm 0:e1d164542663 108 #define L3GD20_MODE_ACTIVE ((uint8_t)0x08)
bcostm 0:e1d164542663 109 /**
bcostm 0:e1d164542663 110 * @}
bcostm 0:e1d164542663 111 */
bcostm 0:e1d164542663 112
bcostm 0:e1d164542663 113 /** @defgroup OutPut_DataRate_Selection
bcostm 0:e1d164542663 114 * @{
bcostm 0:e1d164542663 115 */
bcostm 0:e1d164542663 116 #define L3GD20_OUTPUT_DATARATE_1 ((uint8_t)0x00)
bcostm 0:e1d164542663 117 #define L3GD20_OUTPUT_DATARATE_2 ((uint8_t)0x40)
bcostm 0:e1d164542663 118 #define L3GD20_OUTPUT_DATARATE_3 ((uint8_t)0x80)
bcostm 0:e1d164542663 119 #define L3GD20_OUTPUT_DATARATE_4 ((uint8_t)0xC0)
bcostm 0:e1d164542663 120 /**
bcostm 0:e1d164542663 121 * @}
bcostm 0:e1d164542663 122 */
bcostm 0:e1d164542663 123
bcostm 0:e1d164542663 124 /** @defgroup Axes_Selection
bcostm 0:e1d164542663 125 * @{
bcostm 0:e1d164542663 126 */
bcostm 0:e1d164542663 127 #define L3GD20_X_ENABLE ((uint8_t)0x02)
bcostm 0:e1d164542663 128 #define L3GD20_Y_ENABLE ((uint8_t)0x01)
bcostm 0:e1d164542663 129 #define L3GD20_Z_ENABLE ((uint8_t)0x04)
bcostm 0:e1d164542663 130 #define L3GD20_AXES_ENABLE ((uint8_t)0x07)
bcostm 0:e1d164542663 131 #define L3GD20_AXES_DISABLE ((uint8_t)0x00)
bcostm 0:e1d164542663 132 /**
bcostm 0:e1d164542663 133 * @}
bcostm 0:e1d164542663 134 */
bcostm 0:e1d164542663 135
bcostm 0:e1d164542663 136 /** @defgroup Bandwidth_Selection
bcostm 0:e1d164542663 137 * @{
bcostm 0:e1d164542663 138 */
bcostm 0:e1d164542663 139 #define L3GD20_BANDWIDTH_1 ((uint8_t)0x00)
bcostm 0:e1d164542663 140 #define L3GD20_BANDWIDTH_2 ((uint8_t)0x10)
bcostm 0:e1d164542663 141 #define L3GD20_BANDWIDTH_3 ((uint8_t)0x20)
bcostm 0:e1d164542663 142 #define L3GD20_BANDWIDTH_4 ((uint8_t)0x30)
bcostm 0:e1d164542663 143 /**
bcostm 0:e1d164542663 144 * @}
bcostm 0:e1d164542663 145 */
bcostm 0:e1d164542663 146
bcostm 0:e1d164542663 147 /** @defgroup Full_Scale_Selection
bcostm 0:e1d164542663 148 * @{
bcostm 0:e1d164542663 149 */
bcostm 0:e1d164542663 150 #define L3GD20_FULLSCALE_250 ((uint8_t)0x00)
bcostm 0:e1d164542663 151 #define L3GD20_FULLSCALE_500 ((uint8_t)0x10)
bcostm 0:e1d164542663 152 #define L3GD20_FULLSCALE_2000 ((uint8_t)0x20)
bcostm 0:e1d164542663 153 #define L3GD20_FULLSCALE_SELECTION ((uint8_t)0x30)
bcostm 0:e1d164542663 154 /**
bcostm 0:e1d164542663 155 * @}
bcostm 0:e1d164542663 156 */
bcostm 0:e1d164542663 157
bcostm 0:e1d164542663 158 /** @defgroup Full_Scale_Sensitivity
bcostm 0:e1d164542663 159 * @{
bcostm 0:e1d164542663 160 */
bcostm 0:e1d164542663 161 #define L3GD20_SENSITIVITY_250DPS ((float)8.75f) /*!< gyroscope sensitivity with 250 dps full scale [DPS/LSB] */
bcostm 0:e1d164542663 162 #define L3GD20_SENSITIVITY_500DPS ((float)17.50f) /*!< gyroscope sensitivity with 500 dps full scale [DPS/LSB] */
bcostm 0:e1d164542663 163 #define L3GD20_SENSITIVITY_2000DPS ((float)70.00f) /*!< gyroscope sensitivity with 2000 dps full scale [DPS/LSB] */
bcostm 0:e1d164542663 164 /**
bcostm 0:e1d164542663 165 * @}
bcostm 0:e1d164542663 166 */
bcostm 0:e1d164542663 167
bcostm 0:e1d164542663 168
bcostm 0:e1d164542663 169 /** @defgroup Block_Data_Update
bcostm 0:e1d164542663 170 * @{
bcostm 0:e1d164542663 171 */
bcostm 0:e1d164542663 172 #define L3GD20_BlockDataUpdate_Continous ((uint8_t)0x00)
bcostm 0:e1d164542663 173 #define L3GD20_BlockDataUpdate_Single ((uint8_t)0x80)
bcostm 0:e1d164542663 174 /**
bcostm 0:e1d164542663 175 * @}
bcostm 0:e1d164542663 176 */
bcostm 0:e1d164542663 177
bcostm 0:e1d164542663 178 /** @defgroup Endian_Data_selection
bcostm 0:e1d164542663 179 * @{
bcostm 0:e1d164542663 180 */
bcostm 0:e1d164542663 181 #define L3GD20_BLE_LSB ((uint8_t)0x00)
bcostm 0:e1d164542663 182 #define L3GD20_BLE_MSB ((uint8_t)0x40)
bcostm 0:e1d164542663 183 /**
bcostm 0:e1d164542663 184 * @}
bcostm 0:e1d164542663 185 */
bcostm 0:e1d164542663 186
bcostm 0:e1d164542663 187 /** @defgroup High_Pass_Filter_status
bcostm 0:e1d164542663 188 * @{
bcostm 0:e1d164542663 189 */
bcostm 0:e1d164542663 190 #define L3GD20_HIGHPASSFILTER_DISABLE ((uint8_t)0x00)
bcostm 0:e1d164542663 191 #define L3GD20_HIGHPASSFILTER_ENABLE ((uint8_t)0x10)
bcostm 0:e1d164542663 192 /**
bcostm 0:e1d164542663 193 * @}
bcostm 0:e1d164542663 194 */
bcostm 0:e1d164542663 195
bcostm 0:e1d164542663 196 /** @defgroup INT1_INT2_selection
bcostm 0:e1d164542663 197 * @{
bcostm 0:e1d164542663 198 */
bcostm 0:e1d164542663 199 #define L3GD20_INT1 ((uint8_t)0x00)
bcostm 0:e1d164542663 200 #define L3GD20_INT2 ((uint8_t)0x01)
bcostm 0:e1d164542663 201 /**
bcostm 0:e1d164542663 202 * @}
bcostm 0:e1d164542663 203 */
bcostm 0:e1d164542663 204
bcostm 0:e1d164542663 205 /** @defgroup INT1_Interrupt_status
bcostm 0:e1d164542663 206 * @{
bcostm 0:e1d164542663 207 */
bcostm 0:e1d164542663 208 #define L3GD20_INT1INTERRUPT_DISABLE ((uint8_t)0x00)
bcostm 0:e1d164542663 209 #define L3GD20_INT1INTERRUPT_ENABLE ((uint8_t)0x80)
bcostm 0:e1d164542663 210 /**
bcostm 0:e1d164542663 211 * @}
bcostm 0:e1d164542663 212 */
bcostm 0:e1d164542663 213
bcostm 0:e1d164542663 214 /** @defgroup INT2_Interrupt_status
bcostm 0:e1d164542663 215 * @{
bcostm 0:e1d164542663 216 */
bcostm 0:e1d164542663 217 #define L3GD20_INT2INTERRUPT_DISABLE ((uint8_t)0x00)
bcostm 0:e1d164542663 218 #define L3GD20_INT2INTERRUPT_ENABLE ((uint8_t)0x08)
bcostm 0:e1d164542663 219 /**
bcostm 0:e1d164542663 220 * @}
bcostm 0:e1d164542663 221 */
bcostm 0:e1d164542663 222
bcostm 0:e1d164542663 223 /** @defgroup INT1_Interrupt_ActiveEdge
bcostm 0:e1d164542663 224 * @{
bcostm 0:e1d164542663 225 */
bcostm 0:e1d164542663 226 #define L3GD20_INT1INTERRUPT_LOW_EDGE ((uint8_t)0x20)
bcostm 0:e1d164542663 227 #define L3GD20_INT1INTERRUPT_HIGH_EDGE ((uint8_t)0x00)
bcostm 0:e1d164542663 228 /**
bcostm 0:e1d164542663 229 * @}
bcostm 0:e1d164542663 230 */
bcostm 0:e1d164542663 231
bcostm 0:e1d164542663 232 /** @defgroup Boot_Mode_selection
bcostm 0:e1d164542663 233 * @{
bcostm 0:e1d164542663 234 */
bcostm 0:e1d164542663 235 #define L3GD20_BOOT_NORMALMODE ((uint8_t)0x00)
bcostm 0:e1d164542663 236 #define L3GD20_BOOT_REBOOTMEMORY ((uint8_t)0x80)
bcostm 0:e1d164542663 237 /**
bcostm 0:e1d164542663 238 * @}
bcostm 0:e1d164542663 239 */
bcostm 0:e1d164542663 240
bcostm 0:e1d164542663 241 /** @defgroup High_Pass_Filter_Mode
bcostm 0:e1d164542663 242 * @{
bcostm 0:e1d164542663 243 */
bcostm 0:e1d164542663 244 #define L3GD20_HPM_NORMAL_MODE_RES ((uint8_t)0x00)
bcostm 0:e1d164542663 245 #define L3GD20_HPM_REF_SIGNAL ((uint8_t)0x10)
bcostm 0:e1d164542663 246 #define L3GD20_HPM_NORMAL_MODE ((uint8_t)0x20)
bcostm 0:e1d164542663 247 #define L3GD20_HPM_AUTORESET_INT ((uint8_t)0x30)
bcostm 0:e1d164542663 248 /**
bcostm 0:e1d164542663 249 * @}
bcostm 0:e1d164542663 250 */
bcostm 0:e1d164542663 251
bcostm 0:e1d164542663 252 /** @defgroup High_Pass_CUT OFF_Frequency
bcostm 0:e1d164542663 253 * @{
bcostm 0:e1d164542663 254 */
bcostm 0:e1d164542663 255 #define L3GD20_HPFCF_0 0x00
bcostm 0:e1d164542663 256 #define L3GD20_HPFCF_1 0x01
bcostm 0:e1d164542663 257 #define L3GD20_HPFCF_2 0x02
bcostm 0:e1d164542663 258 #define L3GD20_HPFCF_3 0x03
bcostm 0:e1d164542663 259 #define L3GD20_HPFCF_4 0x04
bcostm 0:e1d164542663 260 #define L3GD20_HPFCF_5 0x05
bcostm 0:e1d164542663 261 #define L3GD20_HPFCF_6 0x06
bcostm 0:e1d164542663 262 #define L3GD20_HPFCF_7 0x07
bcostm 0:e1d164542663 263 #define L3GD20_HPFCF_8 0x08
bcostm 0:e1d164542663 264 #define L3GD20_HPFCF_9 0x09
bcostm 0:e1d164542663 265 /**
bcostm 0:e1d164542663 266 * @}
bcostm 0:e1d164542663 267 */
bcostm 0:e1d164542663 268
bcostm 0:e1d164542663 269 /**
bcostm 0:e1d164542663 270 * @}
bcostm 0:e1d164542663 271 */
bcostm 0:e1d164542663 272 /** @defgroup L3GD20_Exported_Functions
bcostm 0:e1d164542663 273 * @{
bcostm 0:e1d164542663 274 */
bcostm 0:e1d164542663 275 /* Sensor Configuration Functions */
bcostm 0:e1d164542663 276 void L3GD20_Init(uint16_t InitStruct);
bcostm 0:e1d164542663 277 void L3GD20_DeInit(void);
bcostm 0:e1d164542663 278 void L3GD20_LowPower(uint16_t InitStruct);
bcostm 0:e1d164542663 279 uint8_t L3GD20_ReadID(void);
bcostm 0:e1d164542663 280 void L3GD20_RebootCmd(void);
bcostm 0:e1d164542663 281
bcostm 0:e1d164542663 282 /* Interrupt Configuration Functions */
bcostm 0:e1d164542663 283 void L3GD20_INT1InterruptConfig(uint16_t Int1Config);
bcostm 0:e1d164542663 284 void L3GD20_EnableIT(uint8_t IntSel);
bcostm 0:e1d164542663 285 void L3GD20_DisableIT(uint8_t IntSel);
bcostm 0:e1d164542663 286
bcostm 0:e1d164542663 287 /* High Pass Filter Configuration Functions */
bcostm 0:e1d164542663 288 void L3GD20_FilterConfig(uint8_t FilterStruct);
bcostm 0:e1d164542663 289 void L3GD20_FilterCmd(uint8_t HighPassFilterState);
bcostm 0:e1d164542663 290 void L3GD20_ReadXYZAngRate(float *pfData);
bcostm 0:e1d164542663 291 uint8_t L3GD20_GetDataStatus(void);
bcostm 0:e1d164542663 292
bcostm 0:e1d164542663 293 /* Gyroscope IO functions */
bcostm 0:e1d164542663 294 void GYRO_IO_Init(void);
bcostm 0:e1d164542663 295 void GYRO_IO_DeInit(void);
bcostm 0:e1d164542663 296 void GYRO_IO_Write(uint8_t *pBuffer, uint8_t WriteAddr, uint16_t NumByteToWrite);
bcostm 0:e1d164542663 297 void GYRO_IO_Read(uint8_t *pBuffer, uint8_t ReadAddr, uint16_t NumByteToRead);
bcostm 0:e1d164542663 298
bcostm 0:e1d164542663 299 /* Gyroscope driver structure */
bcostm 0:e1d164542663 300 extern GYRO_DrvTypeDef L3gd20Drv;
bcostm 0:e1d164542663 301
bcostm 0:e1d164542663 302 /**
bcostm 0:e1d164542663 303 * @}
bcostm 0:e1d164542663 304 */
bcostm 0:e1d164542663 305
bcostm 0:e1d164542663 306 /**
bcostm 0:e1d164542663 307 * @}
bcostm 0:e1d164542663 308 */
bcostm 0:e1d164542663 309
bcostm 0:e1d164542663 310 /**
bcostm 0:e1d164542663 311 * @}
bcostm 0:e1d164542663 312 */
bcostm 0:e1d164542663 313
bcostm 0:e1d164542663 314 /**
bcostm 0:e1d164542663 315 * @}
bcostm 0:e1d164542663 316 */
bcostm 0:e1d164542663 317
bcostm 0:e1d164542663 318 #ifdef __cplusplus
bcostm 0:e1d164542663 319 }
bcostm 0:e1d164542663 320 #endif
bcostm 0:e1d164542663 321
bcostm 0:e1d164542663 322 #endif /* __L3GD20_H */
bcostm 0:e1d164542663 323
bcostm 0:e1d164542663 324 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/