SCLD peripheral of the KL46Z

Dependents:   FRDM-KL46Z LCD rtc Demo KL46Z EE202A_HW1_MH SignalGenerator ... more

Committer:
star297
Date:
Mon Jan 20 21:08:32 2014 +0000
Revision:
1:1579bcd31410
Parent:
0:d04758e76d5b
Child:
3:f70873bc6121
added functions

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sissors 0:d04758e76d5b 1 #ifndef __FRDM_S401_H_
Sissors 0:d04758e76d5b 2 #define __FRDM_S401_H_
Sissors 0:d04758e76d5b 3 /*^^^^^^^^^^^^^^^^ LCD HARDWARE CONECTION ^^^^^^^^^^^^^^^^^^^^^^^^*/
star297 1:1579bcd31410 4 #define _LCDFRONTPLANES (8) // # of frontPlanes
star297 1:1579bcd31410 5 #define _LCDBACKPLANES (4) // # of backplanes
Sissors 0:d04758e76d5b 6
Sissors 0:d04758e76d5b 7 /*
Sissors 0:d04758e76d5b 8 LCD logical organization definition
Sissors 0:d04758e76d5b 9 This section indicate how the LCD is distributed how many characteres of (7-seg, 14,seg, 16 seg, or colums in case of Dot Matrix) does it contain
Sissors 0:d04758e76d5b 10 First character is forced only one can be written
Sissors 0:d04758e76d5b 11
Sissors 0:d04758e76d5b 12 */
Sissors 0:d04758e76d5b 13 // HARDWARE_CONFIG Changing LCD pins Allows to verify all LCD pins easily
Sissors 0:d04758e76d5b 14 // if HARDWARE_CONFIG == 0 FRDM-KL46 RevB
Sissors 0:d04758e76d5b 15 // if HARDWARE_CONFIG == 1 FRDM-KL46 RevA
Sissors 0:d04758e76d5b 16 #ifdef FRDM_REVA
Sissors 0:d04758e76d5b 17 #define HARDWARE_CONFIG 1
Sissors 0:d04758e76d5b 18 #else
Sissors 0:d04758e76d5b 19 #define HARDWARE_CONFIG 0
Sissors 0:d04758e76d5b 20 #endif
Sissors 0:d04758e76d5b 21
Sissors 0:d04758e76d5b 22 #define _CHARNUM (4) //number of chars that can be written
Sissors 0:d04758e76d5b 23 #define _CHAR_SIZE (2) // Used only when Dot Matrix is used
Sissors 0:d04758e76d5b 24 #define _LCDTYPE (2) //indicate how many LCD_WF are required to write a single Character / or Column in case of DOT matrix LCD
Sissors 0:d04758e76d5b 25
Sissors 0:d04758e76d5b 26 /*
Sissors 0:d04758e76d5b 27 Following definitions indicate how characters are associated to waveform
Sissors 0:d04758e76d5b 28 */
Sissors 0:d04758e76d5b 29 /* Hardware configuration */
Sissors 0:d04758e76d5b 30 #if HARDWARE_CONFIG == 0
Sissors 0:d04758e76d5b 31
Sissors 0:d04758e76d5b 32 // LCD PIN1 to LCDWF0 Rev B
Sissors 0:d04758e76d5b 33 #define CHAR1a 37 // LCD Pin 5
Sissors 0:d04758e76d5b 34 #define CHAR1b 17 // LCD Pin 6
Sissors 0:d04758e76d5b 35 #define CHAR2a 7 // LCD Pin 7
Sissors 0:d04758e76d5b 36 #define CHAR2b 8 // LCD Pin 8
Sissors 0:d04758e76d5b 37 #define CHAR3a 53 // LCD Pin 9
Sissors 0:d04758e76d5b 38 #define CHAR3b 38 // LCD Pin 10
Sissors 0:d04758e76d5b 39 #define CHAR4a 10 // LCD Pin 11
Sissors 0:d04758e76d5b 40 #define CHAR4b 11 // LCD Pin 12
Sissors 0:d04758e76d5b 41 #define CHARCOM0 40 // LCD Pin 1
Sissors 0:d04758e76d5b 42 #define CHARCOM1 52 // LCD Pin 2
Sissors 0:d04758e76d5b 43 #define CHARCOM2 19 // LCD Pin 3
Sissors 0:d04758e76d5b 44 #define CHARCOM3 18 // LCD Pin 4
Sissors 0:d04758e76d5b 45
Sissors 0:d04758e76d5b 46 /*Special Symbols */
Sissors 0:d04758e76d5b 47 #define SPECIAL_SYMBOL_COUNT 4
Sissors 0:d04758e76d5b 48
Sissors 0:d04758e76d5b 49 #define _LCD_DP1_ON() SymbolON(17,0)
Sissors 0:d04758e76d5b 50 #define _LCD_DP2_ON() SymbolON(8,0)
Sissors 0:d04758e76d5b 51 #define _LCD_DP3_ON() SymbolON(38,0)
Sissors 0:d04758e76d5b 52 #define _LCD_COL_ON() SymbolON(11,0)
Sissors 0:d04758e76d5b 53
Sissors 0:d04758e76d5b 54 #define _LCD_DP1_OFF() SymbolOFF(17,0)
Sissors 0:d04758e76d5b 55 #define _LCD_DP2_OFF() SymbolOFF(8,0)
Sissors 0:d04758e76d5b 56 #define _LCD_DP3_OFF() SymbolOFF(38,0)
Sissors 0:d04758e76d5b 57 #define _LCD_COL_OFF() SymbolOFF(11,0)
Sissors 0:d04758e76d5b 58
Sissors 0:d04758e76d5b 59 // LCD PIN1 to LCDWF2 for FRDM-KL46Z
Sissors 0:d04758e76d5b 60 #elif HARDWARE_CONFIG == 1
Sissors 0:d04758e76d5b 61 #define CHAR1a 37 // LCD Pin 5
Sissors 0:d04758e76d5b 62 #define CHAR1b 17 // LCD Pin 6
Sissors 0:d04758e76d5b 63 #define CHAR2a 7 // LCD Pin 7
Sissors 0:d04758e76d5b 64 #define CHAR2b 8 // LCD Pin 8
Sissors 0:d04758e76d5b 65 #define CHAR3a 12 // LCD Pin 9
Sissors 0:d04758e76d5b 66 #define CHAR3b 26 // LCD Pin 10
Sissors 0:d04758e76d5b 67 #define CHAR4a 10 // LCD Pin 11
Sissors 0:d04758e76d5b 68 #define CHAR4b 11 // LCD Pin 12
Sissors 0:d04758e76d5b 69 #define CHARCOM0 51 // LCD Pin 1
Sissors 0:d04758e76d5b 70 #define CHARCOM1 52 // LCD Pin 2
Sissors 0:d04758e76d5b 71 #define CHARCOM2 19 // LCD Pin 3
Sissors 0:d04758e76d5b 72 #define CHARCOM3 16 // LCD Pin 4
Sissors 0:d04758e76d5b 73
Sissors 0:d04758e76d5b 74 #endif
Sissors 0:d04758e76d5b 75
Sissors 0:d04758e76d5b 76
Sissors 0:d04758e76d5b 77 /*Ascii Codification table information */
Sissors 0:d04758e76d5b 78 #define ASCCI_TABLE_START '0' // indicates which is the first Ascii character in the table
Sissors 0:d04758e76d5b 79 #define ASCCI_TABLE_END 'Z' // indicates which is the first Ascii character in the table
Sissors 0:d04758e76d5b 80 #define BLANK_CHARACTER '>' // Indicate which ASCII character is a blank character (depends on ASCII table)
Sissors 0:d04758e76d5b 81
Sissors 0:d04758e76d5b 82 #define _ALLON 0xFF // Used for ALL_on function
Sissors 0:d04758e76d5b 83
Sissors 0:d04758e76d5b 84 #define SEGDP 0x01
Sissors 0:d04758e76d5b 85 #define SEGC 0x02
Sissors 0:d04758e76d5b 86 #define SEGB 0x04
Sissors 0:d04758e76d5b 87 #define SEGA 0x08
Sissors 0:d04758e76d5b 88
Sissors 0:d04758e76d5b 89 #define SEGD 0x01
Sissors 0:d04758e76d5b 90 #define SEGE 0x02
Sissors 0:d04758e76d5b 91 #define SEGG 0x04
Sissors 0:d04758e76d5b 92 #define SEGF 0x08
Sissors 0:d04758e76d5b 93
Sissors 0:d04758e76d5b 94
Sissors 0:d04758e76d5b 95 /* Fault detect initial limits */
Sissors 0:d04758e76d5b 96
Sissors 0:d04758e76d5b 97 /* Fault detect initial parameters and limits */
Sissors 0:d04758e76d5b 98 #define FAULTD_FP_FDPRS FDPRS_32
Sissors 0:d04758e76d5b 99 #define FAULTD_FP_FDSWW FDSWW_128
Sissors 0:d04758e76d5b 100 #define FAULTD_BP_FDPRS FDPRS_64
Sissors 0:d04758e76d5b 101 #define FAULTD_BP_FDSWW FDSWW_128
Sissors 0:d04758e76d5b 102
Sissors 0:d04758e76d5b 103 #define FAULTD_FP_HI 127
Sissors 0:d04758e76d5b 104 #define FAULTD_FP_LO 110
Sissors 0:d04758e76d5b 105 #define FAULTD_BP_HI 127
Sissors 0:d04758e76d5b 106 #define FAULTD_BP_LO 110
Sissors 0:d04758e76d5b 107 #define FAULTD_TIME 6
Sissors 0:d04758e76d5b 108
Sissors 0:d04758e76d5b 109 extern const uint8_t WF_ORDERING_TABLE[]; // Logical Front plane N to LCD_WFx
star297 1:1579bcd31410 110 //extern const char ASCII_TO_WF_CODIFICATION_TABLE[]; // ASCII to 7x5 Dot Matrix
Sissors 0:d04758e76d5b 111
Sissors 0:d04758e76d5b 112 #endif /* __FRDM_S401_H_ */
Sissors 0:d04758e76d5b 113
star297 1:1579bcd31410 114