Revision 1:1579bcd31410, committed 2014-01-20

Comitter:

star297

Date:

Mon Jan 20 21:08:32 2014 +0000

Parent:

0:d04758e76d5b

Child:

2:6a5095c98da1

Child:

3:f70873bc6121

Commit message:

added functions

Changed in this revision

--- a/FRDM-s401.h	Tue Jan 14 07:00:15 2014 +0000
+++ b/FRDM-s401.h	Mon Jan 20 21:08:32 2014 +0000
@@ -1,8 +1,8 @@
 #ifndef __FRDM_S401_H_
 #define __FRDM_S401_H_
 /*^^^^^^^^^^^^^^^^      LCD HARDWARE CONECTION ^^^^^^^^^^^^^^^^^^^^^^^^*/
-#define  _LCDFRONTPLANES   (8)                             // # of frontPlanes
-#define  _LCDBACKPLANES    (4)                              // # of backplanes
+#define  _LCDFRONTPLANES   (8)            // # of frontPlanes
+#define  _LCDBACKPLANES    (4)            // # of backplanes
 
 /*
    LCD logical organization definition
@@ -28,7 +28,6 @@
 */
 /* Hardware configuration  */
 #if HARDWARE_CONFIG == 0
-#undef DOT_MATRIX
 
 // LCD PIN1 to LCDWF0  Rev B
 #define   CHAR1a    37 // LCD Pin 5
@@ -72,21 +71,6 @@
 #define   CHARCOM2    19 // LCD Pin 3
 #define   CHARCOM3    16 // LCD Pin 4
 
-#define SPECIAL_SYMBOL_COUNT   4
-
-
-#define   _LCD_DP1_ON()      SymbolON(17,0)
-#define   _LCD_DP2_ON()      SymbolON(8,0)
-#define   _LCD_DP3_ON()      SymbolON(26,0)
-#define   _LCD_COL_ON()      SymbolON(11,0)
-
-#define   _LCD_DP1_OFF()      SymbolOFF(17,0)
-#define   _LCD_DP2_OFF()      SymbolOFF(8,0)
-#define   _LCD_DP3_OFF()      SymbolOFF(26,0)
-#define   _LCD_COL_OFF()      SymbolOFF(11,0)
-
-
-
 #endif
 
 
@@ -123,7 +107,8 @@
 #define FAULTD_TIME   6
 
 extern const uint8_t  WF_ORDERING_TABLE[];              //   Logical Front plane N to LCD_WFx
-extern const char  ASCII_TO_WF_CODIFICATION_TABLE[]; //   ASCII to 7x5 Dot Matrix
+//extern const char  ASCII_TO_WF_CODIFICATION_TABLE[]; //   ASCII to 7x5 Dot Matrix
 
 #endif /* __FRDM_S401_H_ */
 
+

--- a/LCD_config.h	Tue Jan 14 07:00:15 2014 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,188 +0,0 @@
-#ifndef __LCDConfig_H_
-#define __LCDConfig_H_
-
-#include "FRDM-s401.h"  //  4x7 segdisplay
-
-
-#if 1  // VREF to VLL1
-/* Following configuration is used for LCD default initialization  */
-#define _LCDRVEN          (1)  //
-#define _LCDRVTRIM        (8)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
-#define _LCDCPSEL         (1)          //  charge pump select 0 or 1 
-#define _LCDLOADADJUST    (3)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
-#define _LCDALTDIV        (0)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
-#define _LCDALRCLKSOURCE  (0)         // 0 -- External clock       1 --  Alternate clock
-
-#define _LCDCLKPSL        (0)         //  Clock divider to generate the LCD Waveforms 
-#define _LCDSUPPLY        (1) 
-#define _LCDHREF          (0)          // 0 or 1 
-#define _LCDCLKSOURCE     (1)         // 0 -- External clock       1 --  Alternate clock
-#define _LCDLCK           (1)         //Any number between 0 and 7 
-#define _LCDBLINKRATE     (3)         //Any number between 0 and 7 
-
-
-#else    //VLL3 to VDD internally
-/* Following configuration is used for LCD default initialization  */
-#define _LCDCLKSOURCE     (1)         // 0 -- External clock       1 --  Alternate clock
-#define _LCDALRCLKSOURCE  (0)         // 0 -- External clock       1 --  Alternate clock
-#define _LCDCLKPSL        (0)         //  Clock divider to generate the LCD Waveforms 
-#define _LCDSUPPLY        (0) 
-#define _LCDLOADADJUST    (3)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
-#define _LCDALTDIV        (0)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
-#define _LCDRVTRIM        (0)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
-#define _LCDHREF          (0)          // 0 or 1 
-#define _LCDCPSEL         (1)          // 0 or 1 
-#define _LCDRVEN          (0)  //
-#define _LCDBLINKRATE     (3)         //Any number between 0 and 7 
-#define _LCDLCK           (0)         //Any number between 0 and 7 
-
-#endif
-
-
-
-
-/*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Control Register 0  ~|~|~|~|~|~|~|~|~|~|~|~|~*/
-/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-#define _LCDINTENABLE         (1)    
-
-/*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Control Register 1  ~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-#define _LCDFRAMEINTERRUPT     (0)        //0 Disable Frame Frequency Interrupt
-                                                                       //1 Enable an LCD interrupt that coincides with the LCD frame frequency
-#define _LCDFULLCPLDIRIVE      (0)        // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
-                                                                      // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
-#define _LCDWAITMODE           (0)       // 0 Allows the LCD driver and charge pump to continue running during wait mode
-                                                                     //  1 Disable the LCD when the MCU goes into wait mode
-#define _LCDSTOPMODE           (0)     // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3
-
-                                                                     //  1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3                                                               
-
-/*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Voltage Supply Register  ~|~|~|~|~|~|~|~|~|~|~|~*/
-/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-#define _LCDHIGHREF             (0)      //0 Divide input VIREG=1.0v
-                                                                    //1 Do not divide the input VIREG=1.67v
-#define _LCDBBYPASS             (0)      //Determines whether the internal LCD op amp buffer is bypassed
-                                                                      //0 Buffered mode
-                                                                      //1 Unbuffered mode
-                            
-/*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/
-/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-#define _LCDCONTRAST                    (1)       //Contrast by software   0 -- Disable    1-- Enable
-#define _LVLCONTRAST                    (0)       //Any number between 0  and 15, if the number is bigger the glass get darker
-
-/*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/
-/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-#define _LCDBLINKCONTROL         (0)   //0 Disable blink mode
-                                                                       //1 Enable blink mode
-#define _LCDALTMODE              (0)   //0 Normal display 
-                                                                      //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
-#define _LCDBLANKDISP           (0)  //0 Do not blank display
-                                                                      //1 Blank display if you put it in 0 the text before blank is manteined     
-#define _LCDBLINKMODE           (0)  //0 Display blank during the blink period 
-                                                                     //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
-
-
-//Calculated values
-#define _LCDUSEDPINS   (_LCDFRONTPLANES + _LCDBACKPLANES)
-#define _LCDDUTY       (_LCDBACKPLANES-1)         //Any number between 0 and 7 
-#define  LCD_WF_BASE    LCD_WF3TO0
-
-// General definitions used by the LCD library
-#define  SymbolON(LCDn,bit)     *((uint8 *)&LCD_WF_BASE + LCDn)  |=  (1<<(bit))         
-#define  SymbolOFF(LCDn,bit)    *((uint8 *)&LCD_WF_BASE + LCDn)  &= ~(1<<(bit))         
-//#define  LCD_WF(x)              *((uint8 *)&LCD_WF_BASE + x) 
-
-/*LCD Fault Detections Consts*/
-#define  FP_TYPE  0x00         // pin is a Front Plane
-#define  BP_TYPE  0x80         // pin is Back Plane
-
-// Fault Detect Preescaler Options
-#define FDPRS_1      0
-#define FDPRS_2      1
-#define FDPRS_4      2
-#define FDPRS_8      3
-#define FDPRS_16     4 
-#define FDPRS_32     5
-#define FDPRS_64     6
-#define FDPRS_128    7
-
-// Fault Detect Sample Window Width Values  
-#define FDSWW_4           0
-#define FDSWW_8           1
-#define FDSWW_16          2
-#define FDSWW_32          3
-#define FDSWW_64          4
-#define FDSWW_128         5
-#define FDSWW_256         6
-#define FDSWW_512         7
-
-/*
-  Mask Bit definitions used f
-*/
-#define     mBIT0   1
-#define     mBIT1   2
-#define     mBIT2   4
-#define     mBIT3   8
-#define     mBIT4   16
-#define     mBIT5   32
-#define     mBIT6   64
-#define     mBIT7   128
-#define     mBIT8   256
-#define     mBIT9   512
-#define     mBIT10   1024
-#define     mBIT11   2048
-#define     mBIT12   4096
-#define     mBIT13   8192
-#define     mBIT14   16384
-#define     mBIT15   32768
-#define     mBIT16   65536
-#define     mBIT17   131072
-#define     mBIT18   262144
-#define     mBIT19   524288
-#define     mBIT20   1048576
-#define     mBIT21   2097152
-#define     mBIT22   4194304
-#define     mBIT23   8388608
-#define     mBIT24   16777216
-#define     mBIT25   33554432
-#define     mBIT26   67108864
-#define     mBIT27   134217728
-#define     mBIT28   268435456
-#define     mBIT29   536870912
-#define     mBIT30   1073741824
-#define     mBIT31   2147483648
-
-#define    mBIT32      1
-#define    mBIT33      2
-#define    mBIT34      4
-#define    mBIT35      8
-#define    mBIT36      16
-#define    mBIT37      32
-#define    mBIT38      64
-#define    mBIT39      128
-#define    mBIT40      256
-#define    mBIT41      512
-#define    mBIT42      1024
-#define    mBIT43      2048
-#define    mBIT44      4096
-#define    mBIT45      8192
-#define    mBIT46      16384
-#define    mBIT47      32768
-#define    mBIT48      65536
-#define    mBIT49      131072
-#define    mBIT50      262144
-#define    mBIT51      524288
-#define    mBIT52      1048576
-#define    mBIT53      2097152
-#define    mBIT54      4194304
-#define    mBIT55      8388608
-#define    mBIT56      16777216
-#define    mBIT57      33554432
-#define    mBIT58      67108864
-#define    mBIT59      134217728
-#define    mBIT60      268435456
-#define    mBIT61      536870912
-#define    mBIT62      1073741824
-#define    mBIT63      2147483648
-
-#endif /* __LCDConfig_H_ */

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/LCDconfig.h	Mon Jan 20 21:08:32 2014 +0000
@@ -0,0 +1,189 @@
+#ifndef __LCDConfig_H_
+#define __LCDConfig_H_
+
+#include "FRDM-s401.h"  //  4x7 segdisplay
+
+
+#if 1  // VREF to VLL1
+/* Following configuration is used for LCD default initialization  */
+#define _LCDRVEN          (1)  //
+#define _LCDRVTRIM        (8)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDCPSEL         (1)          //  charge pump select 0 or 1 
+#define _LCDLOADADJUST    (3)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDALTDIV        (0)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDALRCLKSOURCE  (0)         // 0 -- External clock       1 --  Alternate clock
+
+#define _LCDCLKPSL        (0)         //  Clock divider to generate the LCD Waveforms 
+#define _LCDSUPPLY        (1) 
+#define _LCDHREF          (0)          // 0 or 1 
+#define _LCDCLKSOURCE     (1)         // 0 -- External clock       1 --  Alternate clock
+#define _LCDLCK           (1)         //Any number between 0 and 7 
+#define _LCDBLINKRATE     (3)         //Any number between 0 and 7 
+
+
+#else    //VLL3 to VDD internally
+/* Following configuration is used for LCD default initialization  */
+#define _LCDCLKSOURCE     (1)         // 0 -- External clock       1 --  Alternate clock
+#define _LCDALRCLKSOURCE  (0)         // 0 -- External clock       1 --  Alternate clock
+#define _LCDCLKPSL        (0)         //  Clock divider to generate the LCD Waveforms 
+#define _LCDSUPPLY        (0) 
+#define _LCDLOADADJUST    (3)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDALTDIV        (0)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDRVTRIM        (0)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDHREF          (0)          // 0 or 1 
+#define _LCDCPSEL         (1)          // 0 or 1 
+#define _LCDRVEN          (0)  //
+#define _LCDBLINKRATE     (3)         //Any number between 0 and 7 
+#define _LCDLCK           (0)         //Any number between 0 and 7 
+
+#endif
+
+
+
+
+/*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Control Register 0  ~|~|~|~|~|~|~|~|~|~|~|~|~*/
+/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
+#define _LCDINTENABLE         (1)    
+
+/*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Control Register 1  ~|~|~|~|~|~|~|~|~|~|~|~|~|*/
+/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
+#define _LCDFRAMEINTERRUPT     (0)        //0 Disable Frame Frequency Interrupt
+                                                                       //1 Enable an LCD interrupt that coincides with the LCD frame frequency
+#define _LCDFULLCPLDIRIVE      (0)        // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
+                                                                      // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
+#define _LCDWAITMODE           (0)       // 0 Allows the LCD driver and charge pump to continue running during wait mode
+                                                                     //  1 Disable the LCD when the MCU goes into wait mode
+#define _LCDSTOPMODE           (0)     // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3
+
+                                                                     //  1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3                                                               
+
+/*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Voltage Supply Register  ~|~|~|~|~|~|~|~|~|~|~|~*/
+/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
+#define _LCDHIGHREF             (0)      //0 Divide input VIREG=1.0v
+                                                                    //1 Do not divide the input VIREG=1.67v
+#define _LCDBBYPASS             (0)      //Determines whether the internal LCD op amp buffer is bypassed
+                                                                      //0 Buffered mode
+                                                                      //1 Unbuffered mode
+                            
+/*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/
+/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
+#define _LCDCONTRAST                    (1)       //Contrast by software   0 -- Disable    1-- Enable
+#define _LVLCONTRAST                    (0)       //Any number between 0  and 15, if the number is bigger the glass get darker
+
+/*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/
+/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
+#define _LCDBLINKCONTROL         (0)   //0 Disable blink mode
+                                                                       //1 Enable blink mode
+#define _LCDALTMODE              (0)   //0 Normal display 
+                                                                      //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
+#define _LCDBLANKDISP           (0)  //0 Do not blank display
+                                                                      //1 Blank display if you put it in 0 the text before blank is manteined     
+#define _LCDBLINKMODE           (0)  //0 Display blank during the blink period 
+                                                                     //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
+
+
+//Calculated values
+#define _LCDUSEDPINS   (_LCDFRONTPLANES + _LCDBACKPLANES)
+#define _LCDDUTY       (_LCDBACKPLANES-1)         //Any number between 0 and 7 
+#define  LCD_WF_BASE    LCD->WF8B[0]
+
+// General definitions used by the LCD library
+#define  SymbolON(LCDn,bit)     *((uint8 *)&LCD_WF_BASE + LCDn)  |=  (1<<(bit))         
+#define  SymbolOFF(LCDn,bit)    *((uint8 *)&LCD_WF_BASE + LCDn)  &= ~(1<<(bit))         
+#define  LCD_WF(x)              *((uint8 *)&LCD_WF_BASE + x) 
+
+/*LCD Fault Detections Consts*/
+#define  FP_TYPE  0x00         // pin is a Front Plane
+#define  BP_TYPE  0x80         // pin is Back Plane
+
+// Fault Detect Preescaler Options
+#define FDPRS_1      0
+#define FDPRS_2      1
+#define FDPRS_4      2
+#define FDPRS_8      3
+#define FDPRS_16     4 
+#define FDPRS_32     5
+#define FDPRS_64     6
+#define FDPRS_128    7
+
+// Fault Detect Sample Window Width Values  
+#define FDSWW_4           0
+#define FDSWW_8           1
+#define FDSWW_16          2
+#define FDSWW_32          3
+#define FDSWW_64          4
+#define FDSWW_128         5
+#define FDSWW_256         6
+#define FDSWW_512         7
+
+/*
+  Mask Bit definitions used f
+*/
+#define     mBIT0   1
+#define     mBIT1   2
+#define     mBIT2   4
+#define     mBIT3   8
+#define     mBIT4   16
+#define     mBIT5   32
+#define     mBIT6   64
+#define     mBIT7   128
+#define     mBIT8   256
+#define     mBIT9   512
+#define     mBIT10   1024
+#define     mBIT11   2048
+#define     mBIT12   4096
+#define     mBIT13   8192
+#define     mBIT14   16384
+#define     mBIT15   32768
+#define     mBIT16   65536
+#define     mBIT17   131072
+#define     mBIT18   262144
+#define     mBIT19   524288
+#define     mBIT20   1048576
+#define     mBIT21   2097152
+#define     mBIT22   4194304
+#define     mBIT23   8388608
+#define     mBIT24   16777216
+#define     mBIT25   33554432
+#define     mBIT26   67108864
+#define     mBIT27   134217728
+#define     mBIT28   268435456
+#define     mBIT29   536870912
+#define     mBIT30   1073741824
+#define     mBIT31   2147483648
+
+#define    mBIT32      1
+#define    mBIT33      2
+#define    mBIT34      4
+#define    mBIT35      8
+#define    mBIT36      16
+#define    mBIT37      32
+#define    mBIT38      64
+#define    mBIT39      128
+#define    mBIT40      256
+#define    mBIT41      512
+#define    mBIT42      1024
+#define    mBIT43      2048
+#define    mBIT44      4096
+#define    mBIT45      8192
+#define    mBIT46      16384
+#define    mBIT47      32768
+#define    mBIT48      65536
+#define    mBIT49      131072
+#define    mBIT50      262144
+#define    mBIT51      524288
+#define    mBIT52      1048576
+#define    mBIT53      2097152
+#define    mBIT54      4194304
+#define    mBIT55      8388608
+#define    mBIT56      16777216
+#define    mBIT57      33554432
+#define    mBIT58      67108864
+#define    mBIT59      134217728
+#define    mBIT60      268435456
+#define    mBIT61      536870912
+#define    mBIT62      1073741824
+#define    mBIT63      2147483648
+
+#endif /* __LCDConfig_H_ */
+

--- a/SLCD.cpp	Tue Jan 14 07:00:15 2014 +0000
+++ b/SLCD.cpp	Mon Jan 20 21:08:32 2014 +0000
@@ -1,5 +1,5 @@
 #include "SLCD.h"
-#include "LCD_config.h"
+#include "LCDconfig.h"
 
 
 const uint8_t WF_ORDERING_TABLE[ ] =
@@ -9,17 +9,31 @@
    CHAR2a,   // LCD83 --- Pin:7  LCDnAddress=53
    CHAR2b,   // LCD84 --- Pin:8  LCDnAddress=54
    CHAR3a,   // LCD85 --- Pin:9  LCDnAddress=55
-   CHAR3b,   // LCD86 --- Pin:10  LCDnAddress=56
-   CHAR4a,   // LCD87 --- Pin:11  LCDnAddress=57
-   CHAR4b,   // LCD88 --- Pin:12  LCDnAddress=58
-   CHARCOM0,   // LCD77 --- Pin:1  LCDnAddress=4D
-   CHARCOM1,   // LCD78 --- Pin:2  LCDnAddress=4E
-   CHARCOM2,   // LCD79 --- Pin:3  LCDnAddress=4F
-   CHARCOM3,   // LCD80 --- Pin:4  LCDnAddress=50
+   CHAR3b,   // LCD86 --- Pin:10 LCDnAddress=56
+   CHAR4a,   // LCD87 --- Pin:11 LCDnAddress=57
+   CHAR4b,   // LCD88 --- Pin:12 LCDnAddress=58
+   CHARCOM0, // LCD77 --- Pin:1  LCDnAddress=4D
+   CHARCOM1, // LCD78 --- Pin:2  LCDnAddress=4E
+   CHARCOM2, // LCD79 --- Pin:3  LCDnAddress=4F
+   CHARCOM3, // LCD80 --- Pin:4  LCDnAddress=50
 };
 
 const char ASCII_TO_WF_CODIFICATION_TABLE [ ] =
 {
+ 
+ /*
+                segA
+              ________  
+             |        | 
+        segF |        | segB
+             |        |
+              -segG--
+             |        |
+        segE |        | segC
+             |________|
+                segD
+ */   
+    
 ( SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = 0,   offset=0
 (!SEGD+!SEGE+!SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = 1,   offset=4
 ( SEGD+ SEGE+!SEGF+ SEGG) , (!SEGC+ SEGB+ SEGA) ,//Char = 2,   offset=8
@@ -40,29 +54,29 @@
 (!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = A,   offset=68
 ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = B,   offset=72
 ( SEGD+ SEGE+ SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = C,   offset=76
-( SEGD+ SEGE+!SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = D,   offset=80
+( SEGD+ SEGE+!SEGF+ SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = D,   offset=80
 ( SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = E,   offset=84
 (!SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = F,   offset=88
 ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = G,   offset=92
 (!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = H,   offset=96
 (!SEGD+!SEGE+!SEGF+!SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = I,   offset=100
 ( SEGD+ SEGE+!SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = J,   offset=104
-(!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = K,   offset=108
+(!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = K,   offset=108
 ( SEGD+ SEGE+ SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = L,   offset=112
 (!SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = M,   offset=116
 (!SEGD+ SEGE+!SEGF+ SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = N,   offset=120
 ( SEGD+ SEGE+!SEGF+ SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = O,   offset=124
-(!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = P,   offset=128
+(!SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+ SEGB+ SEGA) ,//Char = P,   offset=128
 ( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = Q,   offset=132
-(!SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+ SEGB+ SEGA) ,//Char = R,   offset=136
+(!SEGD+ SEGE+!SEGF+ SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = R,   offset=136
 ( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = S,   offset=140
 ( SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = T,   offset=144
 ( SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = U,   offset=148
-(!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = V,   offset=152
-(!SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = W,   offset=156
-(!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = X,   offset=160
-(!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = Y,   offset=164
-( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = Z,   offset=168
+( SEGD+ SEGE+!SEGF+!SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = V,   offset=152
+( SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = W,   offset=156
+(!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = X,   offset=160
+( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = Y,   offset=164
+( SEGD+!SEGE+!SEGF+ SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = Z,   offset=168
 ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = [,   offset=172
 ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = \,   offset=176
 ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = ],   offset=180
@@ -73,15 +87,18 @@
 
 SLCD::SLCD() {
     init();
-    bLCD_CharPosition = 0;
-    
+    bLCD_CharPosition = 0;    
 }
 
+int SLCD::_putc(int c) {
+    LCD_Write_Char(c);
+    return 0;
+}
 
 void SLCD::init(){
     SIM->SCGC5 |= SIM_SCGC5_SLCD_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK;
      
-     //* configure pins for LCD operation    
+     // configure pins for LCD operation    
   PORTC->PCR[20] = 0x00000000;     //VLL2
   PORTC->PCR[21] = 0x00000000;     //VLL1
   PORTC->PCR[22] = 0x00000000;     //VCAP2
@@ -96,33 +113,33 @@
      LCD->GCR = 0x0;
      LCD->AR  = 0x0;
      
-/* LCD configurartion according to */     
-      LCD->GCR =  (   LCD_GCR_RVEN_MASK*_LCDRVEN  
-                   | LCD_GCR_RVTRIM(_LCDRVTRIM)    //0-15
+// LCD configurartion according to */     
+      LCD->GCR =   ( LCD_GCR_RVEN_MASK*_LCDRVEN  
+                   | LCD_GCR_RVTRIM(_LCDRVTRIM)         //0-15
                    | LCD_GCR_CPSEL_MASK*_LCDCPSEL 
-                   | LCD_GCR_LADJ(_LCDLOADADJUST)     //0-3*/
-                   | LCD_GCR_VSUPPLY_MASK*_LCDSUPPLY  //0-1*/
+                   | LCD_GCR_LADJ(_LCDLOADADJUST)       //0-3
+                   | LCD_GCR_VSUPPLY_MASK*_LCDSUPPLY    //0-1
                    |!LCD_GCR_FDCIEN_MASK
-                   | LCD_GCR_ALTDIV(_LCDALTDIV)  //0-3
+                   | LCD_GCR_ALTDIV(_LCDALTDIV)         //0-3
                    |!LCD_GCR_LCDDOZE_MASK  
                    |!LCD_GCR_LCDSTP_MASK
-                   |!LCD_GCR_LCDEN_MASK    //WILL BE ENABLE ON SUBSEQUENT STEP
+                   |!LCD_GCR_LCDEN_MASK                 //WILL BE ENABLE ON SUBSEQUENT STEP
                    | LCD_GCR_SOURCE_MASK*_LCDCLKSOURCE
                    | LCD_GCR_ALTSOURCE_MASK*_LCDALRCLKSOURCE  
                    | LCD_GCR_LCLK(_LCDLCK)   //0-7
                    | LCD_GCR_DUTY(_LCDDUTY)   //0-7
                  );    
      
-      vfnEnablePins();         // Enable LCD pins and Configure BackPlanes
+      EnablePins();         // Enable LCD pins and Configure BackPlanes
       LCD->GCR |= LCD_GCR_LCDEN_MASK;
 }
 
-void SLCD::vfnEnablePins (void)
+void SLCD::EnablePins (void)
   {
    uint8_t i;
    uint32_t *p_pen;
    uint8_t pen_offset;   // 0 or 1   
-   uint8_t pen_bit;      //0 to 31
+   uint8_t pen_bit;      // 0 to 31
 
    LCD->PEN[0] = 0x0;
    LCD->PEN[1] = 0x0;
@@ -145,7 +162,7 @@
   }
 
 
-void SLCD::vfnLCD_Write_Char (char lbValue) {
+void SLCD::LCD_Write_Char (char lbValue) {
   uint8_t char_val;
   uint8_t temp;
   uint8_t *lbpLCDWF;
@@ -183,8 +200,107 @@
   bLCD_CharPosition++;
 }
 
-int SLCD::_putc(int c) {
-    vfnLCD_Write_Char(c);
-    return 0;
+/*  Fill Backplanes with normal mask for  0x01, 0x02,  according to BP_ORDERING_TABLE;*/
+void SLCD::SetBackplanes(void)
+ {
+   uint8_t i;
+   for (i=0;i<_LCDBACKPLANES;i++)
+   {
+       LCD->WF8B[(uint8_t)WF_ORDERING_TABLE[i+_LCDFRONTPLANES]] = 0x01<<i;
+   }  
+  }
+  
+void SLCD::LCD_Home (void)
+ {
+      bLCD_CharPosition =  0;
+ }
+
+void SLCD::LCD_Contrast (uint8_t lbContrast)
+{
+       lbContrast &= 0x0F;              //Forced to the only values accepted 
+       LCD->GCR |= LCD_GCR_RVTRIM(lbContrast);
+}
+ 
+void SLCD::LCD_All_Segments_ON (void)
+{
+ uint8_t lbTotalBytes = _CHARNUM * _LCDTYPE;              
+ uint8_t lbCounter=0;
+ uint8_t *lbpLCDWF;
+ 
+    lbpLCDWF = (uint8_t *)&LCD->WF8B[0];      
+        while (lbCounter < lbTotalBytes)
+          {
+              lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[lbCounter++]]=_ALLON;
+          }         
+}
+
+void SLCD::LCD_All_Segments_OFF (void)
+{              
+ uint8_t lbTotalBytes = _CHARNUM * _LCDTYPE;              
+ uint8_t lbCounter=0;
+ uint8_t *lbpLCDWF;
+ 
+    lbpLCDWF = (uint8_t *)&LCD->WF8B[0];
+        while (lbCounter < lbTotalBytes)
+          {
+              lbpLCDWF[WF_ORDERING_TABLE[lbCounter++]]=0;
+          }
 }
-    
\ No newline at end of file
+
+void SLCD::DP1_ON (void)
+{
+  uint8_t *lbpLCDWF; 
+    lbpLCDWF = (uint8_t *)&LCD->WF8B[0];       
+              lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[1]]=1;                 
+}
+
+void SLCD::DP1_OFF (void)
+{
+  uint8_t *lbpLCDWF; 
+    lbpLCDWF = (uint8_t *)&LCD->WF8B[0];       
+              lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[1]]=14;                 
+}
+
+void SLCD::DP2_ON (void)
+{
+  uint8_t *lbpLCDWF; 
+    lbpLCDWF = (uint8_t *)&LCD->WF8B[0];       
+              lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[3]]=1;                 
+}
+
+void SLCD::DP2_OFF (void)
+{
+  uint8_t *lbpLCDWF; 
+    lbpLCDWF = (uint8_t *)&LCD->WF8B[0];       
+              lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[3]]=14;                 
+}
+
+void SLCD::DP3_ON (void)
+{
+  uint8_t *lbpLCDWF; 
+    lbpLCDWF = (uint8_t *)&LCD->WF8B[0];       
+              lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[5]]=1;                 
+}
+
+void SLCD::DP3_OFF (void)
+{
+  uint8_t *lbpLCDWF; 
+    lbpLCDWF = (uint8_t *)&LCD->WF8B[0];       
+              lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[5]]=14;                 
+}
+
+void SLCD::COLON_ON (void)
+{
+  uint8_t *lbpLCDWF; 
+    lbpLCDWF = (uint8_t *)&LCD->WF8B[0];      
+              lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[7]]=1;                 
+}
+
+void SLCD::COLON_OFF (void)
+{
+  
+  uint8_t *lbpLCDWF; 
+    lbpLCDWF = (uint8_t *)&LCD->WF8B[0];       
+              lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[7]]=14;                 
+}
+

--- a/SLCD.h	Tue Jan 14 07:00:15 2014 +0000
+++ b/SLCD.h	Mon Jan 20 21:08:32 2014 +0000
@@ -3,24 +3,34 @@
 
 #include "mbed.h"
 
+
 class SLCD : public Stream {
     public:
     SLCD();
     
     void init();
-    void vfnEnablePins();
-    
-    void vfnLCD_Write_Char(char lbValue);
-    
+    void EnablePins();    
+    void LCD_Write_Char(char lbValue);
+    void SetBackplanes(void); // reconfigure COM to default values
+    void LCD_Home (void);
+    void LCD_Contrast (uint8_t lbContrast);
+    void LCD_All_Segments_ON (void);    
+    void LCD_All_Segments_OFF (void);
+    void DP1_ON (void);
+    void DP1_OFF (void);
+    void DP2_ON (void);
+    void DP2_OFF (void);
+    void DP3_ON (void);
+    void DP3_OFF (void);
+    void COLON_ON (void);
+    void COLON_OFF (void);
     
     uint8_t lcd_alternate_mode;
-    
+    uint8_t bLCD_CharPosition;
+         
     virtual int _putc(int c);
     virtual int _getc() {
         return 0;
-    }
-    uint8_t bLCD_CharPosition;
-    
+    }  
 };
-
 #endif
\ No newline at end of file