Sam Berjawi / ADS1015

A library for ADS1015 and ADS1115 from Texas Instruments.

Fork of ADS1015 by Arve Seljebu

v1.3 - Added ADS1115_REG_CONFIG_DR & m_dataRate Jul 21. 2014 - Corrected m_conversionDelay - Now there is readADC() that returns counts and readADC_V() that returns voltage

ADS1x15.h@2:976073ea60df, 2014-07-22 (annotated)

Committer:
Sambo007
Date:
Tue Jul 22 06:04:13 2014 +0000
Revision:
2:976073ea60df
v1.3	- Added ADS1115_REG_CONFIG_DR & m_dataRate 		- Jul 21. 2014; 	- Corrected m_conversionDelay; 	- Now there is readADC() that returns counts and readADC_V() that returns voltage;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sambo007 2:976073ea60df 1 /**************************************************************************/
Sambo007 2:976073ea60df 2 /*!
Sambo007 2:976073ea60df 3 @file ADS1x15.h
Sambo007 2:976073ea60df 4 @author K. Townsend (Adafruit Industries)
Sambo007 2:976073ea60df 5 @license BSD (see LICENSE.txt)
Sambo007 2:976073ea60df 6
Sambo007 2:976073ea60df 7 Ported to mbed by Arve Seljebu - arve0.github.io
Sambo007 2:976073ea60df 8
Sambo007 2:976073ea60df 9 ADS1015 12-bit I2C ADC+PGA and ADS1115 16-bit I2C ADC+PGA
Sambo007 2:976073ea60df 10
Sambo007 2:976073ea60df 11 This is a library for the Adafruit ADS1015 and ADS1015 breakout boards
Sambo007 2:976073ea60df 12 ----> https://www.adafruit.com/products/1083
Sambo007 2:976073ea60df 13
Sambo007 2:976073ea60df 14 Adafruit invests time and resources providing this open source code,
Sambo007 2:976073ea60df 15 please support Adafruit and open-source hardware by purchasing
Sambo007 2:976073ea60df 16 products from Adafruit!
Sambo007 2:976073ea60df 17
Sambo007 2:976073ea60df 18 @section HISTORY
Sambo007 2:976073ea60df 19
Sambo007 2:976073ea60df 20 v1.0 - First release
Sambo007 2:976073ea60df 21 v1.1 - Added ADS1115 support - W. Earl
Sambo007 2:976073ea60df 22 v1.1.1 - Ported to mbed - Arve Seljebu
Sambo007 2:976073ea60df 23 v1.2 - Fixed error in readADC_SingleEnded() sign bit - Sam W Berjawi
Sambo007 2:976073ea60df 24 v1.3 - Added ADS1115_REG_CONFIG_DR & ads1015_DR_t - Sam W Berjawi Jul 21. 2014
Sambo007 2:976073ea60df 25 - Corrected m_conversionDelay
Sambo007 2:976073ea60df 26 - Now there is readADC() that returns counts and readADC_V() that returns voltage
Sambo007 2:976073ea60df 27 */
Sambo007 2:976073ea60df 28 /**************************************************************************/
Sambo007 2:976073ea60df 29
Sambo007 2:976073ea60df 30 #ifndef ADS1015_H
Sambo007 2:976073ea60df 31 #define ADS1015_H
Sambo007 2:976073ea60df 32
Sambo007 2:976073ea60df 33 #include <mbed.h>
Sambo007 2:976073ea60df 34
Sambo007 2:976073ea60df 35 /*=========================================================================
Sambo007 2:976073ea60df 36 I2C ADDRESS/BITS
Sambo007 2:976073ea60df 37 -----------------------------------------------------------------------*/
Sambo007 2:976073ea60df 38 #define ADS1015_ADDRESS (0x48) // 0100 1000 (ADDR = GND)
Sambo007 2:976073ea60df 39 /*=========================================================================*/
Sambo007 2:976073ea60df 40
Sambo007 2:976073ea60df 41 /*=========================================================================
Sambo007 2:976073ea60df 42 CONVERSION DELAY (in mS)
Sambo007 2:976073ea60df 43 -----------------------------------------------------------------------*/
Sambo007 2:976073ea60df 44 // #define ADS1015_CONVERSIONDELAY (1)
Sambo007 2:976073ea60df 45 // #define ADS1115_CONVERSIONDELAY (8)
Sambo007 2:976073ea60df 46 /*=========================================================================*/
Sambo007 2:976073ea60df 47
Sambo007 2:976073ea60df 48 /*=========================================================================
Sambo007 2:976073ea60df 49 POINTER REGISTER
Sambo007 2:976073ea60df 50 -----------------------------------------------------------------------*/
Sambo007 2:976073ea60df 51 #define ADS1015_REG_POINTER_MASK (0x03)
Sambo007 2:976073ea60df 52 #define ADS1015_REG_POINTER_CONVERT (0x00)
Sambo007 2:976073ea60df 53 #define ADS1015_REG_POINTER_CONFIG (0x01)
Sambo007 2:976073ea60df 54 #define ADS1015_REG_POINTER_LOWTHRESH (0x02)
Sambo007 2:976073ea60df 55 #define ADS1015_REG_POINTER_HITHRESH (0x03)
Sambo007 2:976073ea60df 56 /*=========================================================================*/
Sambo007 2:976073ea60df 57
Sambo007 2:976073ea60df 58 /*=========================================================================
Sambo007 2:976073ea60df 59 CONFIG REGISTER
Sambo007 2:976073ea60df 60 -----------------------------------------------------------------------*/
Sambo007 2:976073ea60df 61 #define ADS1015_REG_CONFIG_OS_MASK (0x8000)
Sambo007 2:976073ea60df 62 #define ADS1015_REG_CONFIG_OS_SINGLE (0x8000) // Write: Set to start a single-conversion
Sambo007 2:976073ea60df 63 #define ADS1015_REG_CONFIG_OS_BUSY (0x0000) // Read: Bit = 0 when conversion is in progress
Sambo007 2:976073ea60df 64 #define ADS1015_REG_CONFIG_OS_NOTBUSY (0x8000) // Read: Bit = 1 when device is not performing a conversion
Sambo007 2:976073ea60df 65
Sambo007 2:976073ea60df 66 // #define ADS1015_REG_CONFIG_MUX_MASK (0x7000)
Sambo007 2:976073ea60df 67 // #define ADS1015_REG_CONFIG_MUX_DIFF_0_1 (0x0000) // Differential P = AIN0, N = AIN1 (default)
Sambo007 2:976073ea60df 68 // #define ADS1015_REG_CONFIG_MUX_DIFF_0_3 (0x1000) // Differential P = AIN0, N = AIN3
Sambo007 2:976073ea60df 69 // #define ADS1015_REG_CONFIG_MUX_DIFF_1_3 (0x2000) // Differential P = AIN1, N = AIN3
Sambo007 2:976073ea60df 70 // #define ADS1015_REG_CONFIG_MUX_DIFF_2_3 (0x3000) // Differential P = AIN2, N = AIN3
Sambo007 2:976073ea60df 71 // #define ADS1015_REG_CONFIG_MUX_SINGLE_0 (0x4000) // Single-ended AIN0
Sambo007 2:976073ea60df 72 // #define ADS1015_REG_CONFIG_MUX_SINGLE_1 (0x5000) // Single-ended AIN1
Sambo007 2:976073ea60df 73 // #define ADS1015_REG_CONFIG_MUX_SINGLE_2 (0x6000) // Single-ended AIN2
Sambo007 2:976073ea60df 74 // #define ADS1015_REG_CONFIG_MUX_SINGLE_3 (0x7000) // Single-ended AIN3
Sambo007 2:976073ea60df 75
Sambo007 2:976073ea60df 76 // #define ADS1015_REG_CONFIG_PGA_MASK (0x0E00)
Sambo007 2:976073ea60df 77 // #define ADS1015_REG_CONFIG_PGA_6_144V (0x0000) // +/-6.144V range = Gain 2/3 ADS1015: 1-bit = 3mV ADS1115: 0.1875mV
Sambo007 2:976073ea60df 78 // #define ADS1015_REG_CONFIG_PGA_4_096V (0x0200) // +/-4.096V range = Gain 1 ADS1015: 1-bit = 2mV ADS1115: 0.125mV
Sambo007 2:976073ea60df 79 // #define ADS1015_REG_CONFIG_PGA_2_048V (0x0400) // +/-2.048V range = Gain 2 (default) ADS1015: 1-bit = 1mV ADS1115: 0.0625mV
Sambo007 2:976073ea60df 80 // #define ADS1015_REG_CONFIG_PGA_1_024V (0x0600) // +/-1.024V range = Gain 4 ADS1015: 1-bit = 0.5mV ADS1115: 0.03125mV
Sambo007 2:976073ea60df 81 // #define ADS1015_REG_CONFIG_PGA_0_512V (0x0800) // +/-0.512V range = Gain 8 ADS1015: 1-bit = 0.25mV ADS1115: 0.015625mV
Sambo007 2:976073ea60df 82 // #define ADS1015_REG_CONFIG_PGA_0_256V (0x0A00) // +/-0.256V range = Gain 16 ADS1015: 1-bit = 0.125mV ADS1115: 0.0078125mV
Sambo007 2:976073ea60df 83
Sambo007 2:976073ea60df 84 #define ADS1015_REG_CONFIG_MODE_MASK (0x0100)
Sambo007 2:976073ea60df 85 #define ADS1015_REG_CONFIG_MODE_CONTIN (0x0000) // Continuous conversion mode
Sambo007 2:976073ea60df 86 #define ADS1015_REG_CONFIG_MODE_SINGLE (0x0100) // Power-down single-shot mode (default)
Sambo007 2:976073ea60df 87
Sambo007 2:976073ea60df 88 // #define ADS1015_REG_CONFIG_DR_MASK (0x00E0)
Sambo007 2:976073ea60df 89 // #define ADS1015_REG_CONFIG_DR_128SPS (0x0000) // 128 SPS
Sambo007 2:976073ea60df 90 // #define ADS1015_REG_CONFIG_DR_250SPS (0x0020) // 250 SPS
Sambo007 2:976073ea60df 91 // #define ADS1015_REG_CONFIG_DR_490SPS (0x0040) // 490 SPS
Sambo007 2:976073ea60df 92 // #define ADS1015_REG_CONFIG_DR_920SPS (0x0060) // 920 SPS
Sambo007 2:976073ea60df 93 // #define ADS1015_REG_CONFIG_DR_1600SPS (0x0080) // 1600 SPS (default)
Sambo007 2:976073ea60df 94 // #define ADS1015_REG_CONFIG_DR_2400SPS (0x00A0) // 2400 SPS
Sambo007 2:976073ea60df 95 // #define ADS1015_REG_CONFIG_DR_3300SPS (0x00C0) // 3300 SPS
Sambo007 2:976073ea60df 96 //
Sambo007 2:976073ea60df 97 // #define ADS1115_REG_CONFIG_DR_MASK (0x00E0)
Sambo007 2:976073ea60df 98 // #define ADS1115_REG_CONFIG_DR_8SPS (0x0000) // 8 SPS
Sambo007 2:976073ea60df 99 // #define ADS1115_REG_CONFIG_DR_16SPS (0x0020) // 16 SPS
Sambo007 2:976073ea60df 100 // #define ADS1115_REG_CONFIG_DR_32SPS (0x0040) // 32 SPS
Sambo007 2:976073ea60df 101 // #define ADS1115_REG_CONFIG_DR_64SPS (0x0060) // 64 SPS
Sambo007 2:976073ea60df 102 // #define ADS1115_REG_CONFIG_DR_128SPS (0x0080) // 128 SPS (default)
Sambo007 2:976073ea60df 103 // #define ADS1115_REG_CONFIG_DR_250SPS (0x00A0) // 250 SPS
Sambo007 2:976073ea60df 104 // #define ADS1115_REG_CONFIG_DR_475SPS (0x00C0) // 475 SPS
Sambo007 2:976073ea60df 105 // #define ADS1115_REG_CONFIG_DR_860SPS (0x00E0) // 860 SPS
Sambo007 2:976073ea60df 106
Sambo007 2:976073ea60df 107 #define ADS1015_REG_CONFIG_CMODE_MASK (0x0010)
Sambo007 2:976073ea60df 108 #define ADS1015_REG_CONFIG_CMODE_TRAD (0x0000) // Traditional comparator with hysteresis (default)
Sambo007 2:976073ea60df 109 #define ADS1015_REG_CONFIG_CMODE_WINDOW (0x0010) // Window comparator
Sambo007 2:976073ea60df 110
Sambo007 2:976073ea60df 111 #define ADS1015_REG_CONFIG_CPOL_MASK (0x0008)
Sambo007 2:976073ea60df 112 #define ADS1015_REG_CONFIG_CPOL_ACTVLOW (0x0000) // ALERT/RDY pin is low when active (default)
Sambo007 2:976073ea60df 113 #define ADS1015_REG_CONFIG_CPOL_ACTVHI (0x0008) // ALERT/RDY pin is high when active
Sambo007 2:976073ea60df 114
Sambo007 2:976073ea60df 115 #define ADS1015_REG_CONFIG_CLAT_MASK (0x0004) // Determines if ALERT/RDY pin latches once asserted
Sambo007 2:976073ea60df 116 #define ADS1015_REG_CONFIG_CLAT_NONLAT (0x0000) // Non-latching comparator (default)
Sambo007 2:976073ea60df 117 #define ADS1015_REG_CONFIG_CLAT_LATCH (0x0004) // Latching comparator
Sambo007 2:976073ea60df 118
Sambo007 2:976073ea60df 119 #define ADS1015_REG_CONFIG_CQUE_MASK (0x0003)
Sambo007 2:976073ea60df 120 #define ADS1015_REG_CONFIG_CQUE_1CONV (0x0000) // Assert ALERT/RDY after one conversions
Sambo007 2:976073ea60df 121 #define ADS1015_REG_CONFIG_CQUE_2CONV (0x0001) // Assert ALERT/RDY after two conversions
Sambo007 2:976073ea60df 122 #define ADS1015_REG_CONFIG_CQUE_4CONV (0x0002) // Assert ALERT/RDY after four conversions
Sambo007 2:976073ea60df 123 #define ADS1015_REG_CONFIG_CQUE_NONE (0x0003) // Disable the comparator and put ALERT/RDY in high state (default)
Sambo007 2:976073ea60df 124 /*=========================================================================*/
Sambo007 2:976073ea60df 125
Sambo007 2:976073ea60df 126 typedef enum
Sambo007 2:976073ea60df 127 {
Sambo007 2:976073ea60df 128 chan_0_1 = 0x0000, // Differential P = AIN0, N = AIN1 (default)
Sambo007 2:976073ea60df 129 chan_0_3 = 0x1000, // Differential P = AIN0, N = AIN3
Sambo007 2:976073ea60df 130 chan_1_3 = 0x2000, // Differential P = AIN1, N = AIN3
Sambo007 2:976073ea60df 131 chan_2_3 = 0x3000, // Differential P = AIN2, N = AIN3
Sambo007 2:976073ea60df 132 chan_0 = 0x4000, // Single-ended AIN0
Sambo007 2:976073ea60df 133 chan_1 = 0x5000, // Single-ended AIN1
Sambo007 2:976073ea60df 134 chan_2 = 0x6000, // Single-ended AIN2
Sambo007 2:976073ea60df 135 chan_3 = 0x7000 // Single-ended AIN3
Sambo007 2:976073ea60df 136 } chan_t;
Sambo007 2:976073ea60df 137
Sambo007 2:976073ea60df 138 // The +/-6.144V and +/-4.096V settings express the full-scale range of the ADC scaling.
Sambo007 2:976073ea60df 139 // In no event should more than VDD + 0.3V be applied to this device
Sambo007 2:976073ea60df 140 typedef enum
Sambo007 2:976073ea60df 141 { // ADS1015 ADS1115
Sambo007 2:976073ea60df 142 VR_p_m_6_144V = 0x0000, // +/-6.144V range = Gain 2/3 1-bit = 3mV 0.1875mV
Sambo007 2:976073ea60df 143 VR_p_m_4_096V = 0x0200, // +/-4.096V range = Gain 1 1-bit = 2mV 0.125mV
Sambo007 2:976073ea60df 144 VR_p_m_2_048V = 0x0400, // +/-2.048V range = Gain 2 1-bit = 1mV 0.0625mV
Sambo007 2:976073ea60df 145 VR_p_m_1_024V = 0x0600, // +/-1.024V range = Gain 4 1-bit = 0.5mV 0.03125mV
Sambo007 2:976073ea60df 146 VR_p_m_0_512V = 0x0800, // +/-0.512V range = Gain 8 1-bit = 0.25mV 0.015625mV
Sambo007 2:976073ea60df 147 VR_p_m_0_256V = 0x0A00 // +/-0.256V range = Gain 16 1-bit = 0.125mV 0.0078125mV
Sambo007 2:976073ea60df 148 } adsVR_t; // VR: Voltage Range
Sambo007 2:976073ea60df 149
Sambo007 2:976073ea60df 150 typedef enum
Sambo007 2:976073ea60df 151 {
Sambo007 2:976073ea60df 152 ADS1015_DR_128SPS = 0x0000, // 128 SPS
Sambo007 2:976073ea60df 153 ADS1015_DR_250SPS = 0x0020, // 250 SPS
Sambo007 2:976073ea60df 154 ADS1015_DR_490SPS = 0x0040, // 490 SPS
Sambo007 2:976073ea60df 155 ADS1015_DR_920SPS = 0x0060, // 920 SPS
Sambo007 2:976073ea60df 156 ADS1015_DR_1600SPS = 0x0080, // 1600 SPS
Sambo007 2:976073ea60df 157 ADS1015_DR_2400SPS = 0x00A0, // 2400 SPS
Sambo007 2:976073ea60df 158 ADS1015_DR_3300SPS = 0x00C0, // 3300 SPS
Sambo007 2:976073ea60df 159
Sambo007 2:976073ea60df 160 ADS1115_DR_8SPS = 0x0000, // 8 SPS
Sambo007 2:976073ea60df 161 ADS1115_DR_16SPS = 0x0020, // 16 SPS
Sambo007 2:976073ea60df 162 ADS1115_DR_32SPS = 0x0040, // 32 SPS
Sambo007 2:976073ea60df 163 ADS1115_DR_64SPS = 0x0060, // 64 SPS
Sambo007 2:976073ea60df 164 ADS1115_DR_128SPS = 0x0080, // 128 SPS
Sambo007 2:976073ea60df 165 ADS1115_DR_250SPS = 0x00A0, // 250 SPS
Sambo007 2:976073ea60df 166 ADS1115_DR_475SPS = 0x00C0, // 475 SPS
Sambo007 2:976073ea60df 167 ADS1115_DR_860SPS = 0x00E0 // 860 SPS
Sambo007 2:976073ea60df 168 } adsDR_t; // DR: Data Rate
Sambo007 2:976073ea60df 169
Sambo007 2:976073ea60df 170
Sambo007 2:976073ea60df 171 class ADS1015
Sambo007 2:976073ea60df 172 {
Sambo007 2:976073ea60df 173 protected:
Sambo007 2:976073ea60df 174 // Instance-specific properties
Sambo007 2:976073ea60df 175 uint8_t m_i2cAddress;
Sambo007 2:976073ea60df 176 // ads1015_DR_t m_dataRate;
Sambo007 2:976073ea60df 177 float m_conversionDelay;
Sambo007 2:976073ea60df 178 uint8_t m_bitShift;
Sambo007 2:976073ea60df 179 I2C* m_i2c;
Sambo007 2:976073ea60df 180
Sambo007 2:976073ea60df 181 public:
Sambo007 2:976073ea60df 182 ADS1015(I2C* i2c = 0, uint8_t i2cAddress = ADS1015_ADDRESS); // set i2c ptr = 0 to allow ADS1115 to use this as default constructor
Sambo007 2:976073ea60df 183 int16_t readADC(chan_t chan, adsVR_t voltageRange, adsDR_t dataRate);
Sambo007 2:976073ea60df 184 float readADC_V(chan_t chan, adsVR_t voltageRange, adsDR_t dataRate);
Sambo007 2:976073ea60df 185 void startComparator_SingleEnded(chan_t chan, adsVR_t voltageRange, adsDR_t dataRate, int16_t threshold);
Sambo007 2:976073ea60df 186 int16_t getLastConversionResults();
Sambo007 2:976073ea60df 187
Sambo007 2:976073ea60df 188 private:
Sambo007 2:976073ea60df 189 uint16_t readRegister(uint8_t i2cAddress, uint8_t reg);
Sambo007 2:976073ea60df 190 void writeRegister(uint8_t i2cAddress, uint8_t reg, uint16_t value);
Sambo007 2:976073ea60df 191 };
Sambo007 2:976073ea60df 192
Sambo007 2:976073ea60df 193 // Derive from ADS1015 & override construction to set properties
Sambo007 2:976073ea60df 194 class ADS1115 : public ADS1015
Sambo007 2:976073ea60df 195 {
Sambo007 2:976073ea60df 196 public:
Sambo007 2:976073ea60df 197 ADS1115(I2C* i2c, uint8_t i2cAddress = ADS1015_ADDRESS);
Sambo007 2:976073ea60df 198 };
Sambo007 2:976073ea60df 199
Sambo007 2:976073ea60df 200 #endif