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CHIP: LPC11xx SSP register block and driver
Data Structures | Typedefs | Enumerations | Functions

CHIP: LPC11xx SSP register block and driver

Data Structures

struct  LPC_SSP_T
 SSP register block structure. More...

Typedefs

typedef enum _SSP_STATUS SSP_STATUS_T
 SSP Type of Status.
typedef enum _SSP_INTMASK SSP_INTMASK_T
 SSP Type of Interrupt Mask.
typedef enum _SSP_MASKINTSTATUS SSP_MASKINTSTATUS_T
 SSP Type of Mask Interrupt Status.
typedef enum _SSP_RAWINTSTATUS SSP_RAWINTSTATUS_T
 SSP Type of Raw Interrupt Status.

Enumerations

enum  _SSP_STATUS {
  SSP_STAT_TFE = ((uint32_t)(1 << 0)), SSP_STAT_TNF = ((uint32_t)(1 << 1)), SSP_STAT_RNE = ((uint32_t)(1 << 2)), SSP_STAT_RFF = ((uint32_t)(1 << 3)),
  SSP_STAT_BSY = ((uint32_t)(1 << 4))
}
 

SSP Type of Status.

More...
enum  _SSP_INTMASK { SSP_RORIM = ((uint32_t)(1 << 0)), SSP_RTIM = ((uint32_t)(1 << 1)), SSP_RXIM = ((uint32_t)(1 << 2)), SSP_TXIM = ((uint32_t)(1 << 3)) }
 

SSP Type of Interrupt Mask.

More...
enum  _SSP_MASKINTSTATUS { SSP_RORMIS = ((uint32_t)(1 << 0)), SSP_RTMIS = ((uint32_t)(1 << 1)), SSP_RXMIS = ((uint32_t)(1 << 2)), SSP_TXMIS = ((uint32_t)(1 << 3)) }
 

SSP Type of Mask Interrupt Status.

More...
enum  _SSP_RAWINTSTATUS { SSP_RORRIS = ((uint32_t)(1 << 0)), SSP_RTRIS = ((uint32_t)(1 << 1)), SSP_RXRIS = ((uint32_t)(1 << 2)), SSP_TXRIS = ((uint32_t)(1 << 3)) }
 

SSP Type of Raw Interrupt Status.

More...
enum  CHIP_SSP_CLOCK_FORMAT {
  SSP_CLOCK_CPHA0_CPOL0 = (0 << 6), SSP_CLOCK_CPHA0_CPOL1 = (1u << 6), SSP_CLOCK_CPHA1_CPOL0 = (2u << 6), SSP_CLOCK_CPHA1_CPOL1 = (3u << 6),
  SSP_CLOCK_MODE0 = SSP_CLOCK_CPHA0_CPOL0, SSP_CLOCK_MODE1 = SSP_CLOCK_CPHA1_CPOL0, SSP_CLOCK_MODE2 = SSP_CLOCK_CPHA0_CPOL1, SSP_CLOCK_MODE3 = SSP_CLOCK_CPHA1_CPOL1
}
enum  CHIP_SSP_FRAME_FORMAT { SSP_FRAMEFORMAT_SPI = (0 << 4), CHIP_SSP_FRAME_FORMAT_TI = (1u << 4), SSP_FRAMEFORMAT_MICROWIRE = (2u << 4) }
enum  CHIP_SSP_BITS {
  SSP_BITS_4 = (3u << 0), SSP_BITS_5 = (4u << 0), SSP_BITS_6 = (5u << 0), SSP_BITS_7 = (6u << 0),
  SSP_BITS_8 = (7u << 0), SSP_BITS_9 = (8u << 0), SSP_BITS_10 = (9u << 0), SSP_BITS_11 = (10u << 0),
  SSP_BITS_12 = (11u << 0), SSP_BITS_13 = (12u << 0), SSP_BITS_14 = (13u << 0), SSP_BITS_15 = (14u << 0),
  SSP_BITS_16 = (15u << 0)
}
enum  CHIP_SSP_MODE { SSP_MODE_MASTER = (0 << 2), SSP_MODE_SLAVE = (1u << 2) }

Functions

STATIC INLINE void Chip_SSP_Enable (LPC_SSP_T *pSSP)
 Enable SSP operation.
STATIC INLINE void Chip_SSP_Disable (LPC_SSP_T *pSSP)
 Disable SSP operation.
STATIC INLINE void Chip_SSP_EnableLoopBack (LPC_SSP_T *pSSP)
 Enable loopback mode.
STATIC INLINE void Chip_SSP_DisableLoopBack (LPC_SSP_T *pSSP)
 Disable loopback mode.
STATIC INLINE FlagStatus Chip_SSP_GetStatus (LPC_SSP_T *pSSP, SSP_STATUS_T Stat)
 Get the current status of SSP controller.
STATIC INLINE uint32_t Chip_SSP_GetIntStatus (LPC_SSP_T *pSSP)
 Get the masked interrupt status.
STATIC INLINE IntStatus Chip_SSP_GetRawIntStatus (LPC_SSP_T *pSSP, SSP_RAWINTSTATUS_T RawInt)
 Get the raw interrupt status.
STATIC INLINE uint8_t Chip_SSP_GetDataSize (LPC_SSP_T *pSSP)
 Get the number of bits transferred in each frame.
STATIC INLINE void Chip_SSP_ClearIntPending (LPC_SSP_T *pSSP, SSP_INTCLEAR_T IntClear)
 Clear the corresponding interrupt condition(s) in the SSP controller.
STATIC INLINE void Chip_SSP_Int_Enable (LPC_SSP_T *pSSP)
 Enable interrupt for the SSP.
STATIC INLINE void Chip_SSP_Int_Disable (LPC_SSP_T *pSSP)
 Disable interrupt for the SSP.
STATIC INLINE uint16_t Chip_SSP_ReceiveFrame (LPC_SSP_T *pSSP)
 Get received SSP data.
STATIC INLINE void Chip_SSP_SendFrame (LPC_SSP_T *pSSP, uint16_t tx_data)
 Send SSP 16-bit data.
void Chip_SSP_SetClockRate (LPC_SSP_T *pSSP, uint32_t clk_rate, uint32_t prescale)
 Set up output clocks per bit for SSP bus.
STATIC INLINE void Chip_SSP_SetFormat (LPC_SSP_T *pSSP, uint32_t bits, uint32_t frameFormat, uint32_t clockMode)
 Set up the SSP frame format.
STATIC INLINE void Chip_SSP_Set_Mode (LPC_SSP_T *pSSP, uint32_t mode)
 Set the SSP working as master or slave mode.
void Chip_SSP_Int_FlushData (LPC_SSP_T *pSSP)
 Clean all data in RX FIFO of SSP.
Status Chip_SSP_Int_RWFrames8Bits (LPC_SSP_T *pSSP, Chip_SSP_DATA_SETUP_T *xf_setup)
 SSP Interrupt Read/Write with 8-bit frame width.
Status Chip_SSP_Int_RWFrames16Bits (LPC_SSP_T *pSSP, Chip_SSP_DATA_SETUP_T *xf_setup)
 SSP Interrupt Read/Write with 16-bit frame width.
uint32_t Chip_SSP_RWFrames_Blocking (LPC_SSP_T *pSSP, Chip_SSP_DATA_SETUP_T *xf_setup)
 SSP Polling Read/Write in blocking mode.
uint32_t Chip_SSP_WriteFrames_Blocking (LPC_SSP_T *pSSP, uint8_t *buffer, uint32_t buffer_len)
 SSP Polling Write in blocking mode.
uint32_t Chip_SSP_ReadFrames_Blocking (LPC_SSP_T *pSSP, uint8_t *buffer, uint32_t buffer_len)
 SSP Polling Read in blocking mode.
void Chip_SSP_Init (LPC_SSP_T *pSSP)
 Initialize the SSP.
void Chip_SSP_DeInit (LPC_SSP_T *pSSP)
 Deinitialise the SSP.
void Chip_SSP_SetMaster (LPC_SSP_T *pSSP, bool master)
 Set the SSP operating modes, master or slave.
void Chip_SSP_SetBitRate (LPC_SSP_T *pSSP, uint32_t bitRate)
 Set the clock frequency for SSP interface.

Typedef Documentation

typedef enum _SSP_INTMASK SSP_INTMASK_T

SSP Type of Interrupt Mask.

typedef enum _SSP_MASKINTSTATUS SSP_MASKINTSTATUS_T

SSP Type of Mask Interrupt Status.

typedef enum _SSP_RAWINTSTATUS SSP_RAWINTSTATUS_T

SSP Type of Raw Interrupt Status.

typedef enum _SSP_STATUS SSP_STATUS_T

SSP Type of Status.

Enumeration Type Documentation

enum _SSP_INTMASK

SSP Type of Interrupt Mask.

Enumerator:
SSP_RORIM 

Overun.

SSP_RTIM 

TimeOut.

SSP_RXIM 

Rx FIFO is at least half full.

SSP_TXIM 

Tx FIFO is at least half empty.

Definition at line 140 of file ssp_11xx.h.

enum _SSP_MASKINTSTATUS

SSP Type of Mask Interrupt Status.

Enumerator:
SSP_RORMIS 

Overun.

SSP_RTMIS 

TimeOut.

SSP_RXMIS 

Rx FIFO is at least half full.

SSP_TXMIS 

Tx FIFO is at least half empty.

Definition at line 151 of file ssp_11xx.h.

enum _SSP_RAWINTSTATUS

SSP Type of Raw Interrupt Status.

Enumerator:
SSP_RORRIS 

Overun.

SSP_RTRIS 

TimeOut.

SSP_RXRIS 

Rx FIFO is at least half full.

SSP_TXRIS 

Tx FIFO is at least half empty.

Definition at line 162 of file ssp_11xx.h.

enum _SSP_STATUS

SSP Type of Status.

Enumerator:
SSP_STAT_TFE 

TX FIFO Empty.

SSP_STAT_TNF 

TX FIFO not full.

SSP_STAT_RNE 

RX FIFO not empty.

SSP_STAT_RFF 

RX FIFO full.

SSP_STAT_BSY 

SSP Busy.

Definition at line 129 of file ssp_11xx.h.

enum CHIP_SSP_BITS
Enumerator:
SSP_BITS_4 

4 bits/frame

SSP_BITS_5 

5 bits/frame

SSP_BITS_6 

6 bits/frame

SSP_BITS_7 

7 bits/frame

SSP_BITS_8 

8 bits/frame

SSP_BITS_9 

9 bits/frame

SSP_BITS_10 

10 bits/frame

SSP_BITS_11 

11 bits/frame

SSP_BITS_12 

12 bits/frame

SSP_BITS_13 

13 bits/frame

SSP_BITS_14 

14 bits/frame

SSP_BITS_15 

15 bits/frame

SSP_BITS_16 

16 bits/frame

Definition at line 202 of file ssp_11xx.h.

enum CHIP_SSP_CLOCK_FORMAT
Enumerator:
SSP_CLOCK_CPHA0_CPOL0 

CPHA = 0, CPOL = 0.

SSP_CLOCK_CPHA0_CPOL1 

CPHA = 0, CPOL = 1.

SSP_CLOCK_CPHA1_CPOL0 

CPHA = 1, CPOL = 0.

SSP_CLOCK_CPHA1_CPOL1 

CPHA = 1, CPOL = 1.

SSP_CLOCK_MODE0 

alias

SSP_CLOCK_MODE1 

alias

SSP_CLOCK_MODE2 

alias

SSP_CLOCK_MODE3 

alias

Definition at line 179 of file ssp_11xx.h.

enum CHIP_SSP_FRAME_FORMAT
Enumerator:
SSP_FRAMEFORMAT_SPI 

Frame format: SPI.

CHIP_SSP_FRAME_FORMAT_TI 

Frame format: TI SSI.

SSP_FRAMEFORMAT_MICROWIRE 

Frame format: Microwire.

Definition at line 193 of file ssp_11xx.h.

enum CHIP_SSP_MODE
Enumerator:
SSP_MODE_MASTER 

Master mode.

SSP_MODE_SLAVE 

Slave mode.

Definition at line 427 of file ssp_11xx.h.

Function Documentation

STATIC INLINE void Chip_SSP_ClearIntPending ( LPC_SSP_T *  pSSP,
SSP_INTCLEAR_T  IntClear 
)

Clear the corresponding interrupt condition(s) in the SSP controller.

Parameters:
pSSP: The base of SSP peripheral on the chip
IntClear,:Type of cleared interrupt, should be :

  • SSP_RORIC
  • SSP_RTIC
Returns:
Nothing
Note:
Software can clear one or more interrupt condition(s) in the SSP controller

Definition at line 334 of file ssp_11xx.h.

void Chip_SSP_DeInit ( LPC_SSP_T *  pSSP )

Deinitialise the SSP.

Parameters:
pSSP: The base of SSP peripheral on the chip
Returns:
Nothing
Note:
The SSP controller is disabled
STATIC INLINE void Chip_SSP_Disable ( LPC_SSP_T *  pSSP )

Disable SSP operation.

Parameters:
pSSP: The base of SSP peripheral on the chip
Returns:
Nothing

Definition at line 242 of file ssp_11xx.h.

STATIC INLINE void Chip_SSP_DisableLoopBack ( LPC_SSP_T *  pSSP )

Disable loopback mode.

Parameters:
pSSP: The base of SSP peripheral on the chip
Returns:
Nothing
Note:
Serial input is taken from the serial output (MOSI or MISO) rather than the serial input pin

Definition at line 266 of file ssp_11xx.h.

STATIC INLINE void Chip_SSP_Enable ( LPC_SSP_T *  pSSP )

Enable SSP operation.

Parameters:
pSSP: The base of SSP peripheral on the chip
Returns:
Nothing

Definition at line 232 of file ssp_11xx.h.

STATIC INLINE void Chip_SSP_EnableLoopBack ( LPC_SSP_T *  pSSP )

Enable loopback mode.

Parameters:
pSSP: The base of SSP peripheral on the chip
Returns:
Nothing
Note:
Serial input is taken from the serial output (MOSI or MISO) rather than the serial input pin

Definition at line 254 of file ssp_11xx.h.

STATIC INLINE uint8_t Chip_SSP_GetDataSize ( LPC_SSP_T *  pSSP )

Get the number of bits transferred in each frame.

Parameters:
pSSP: The base of SSP peripheral on the chip
Returns:
the number of bits transferred in each frame minus one
Note:
The return value is 0x03 -> 0xF corresponding to 4bit -> 16bit transfer

Definition at line 320 of file ssp_11xx.h.

STATIC INLINE uint32_t Chip_SSP_GetIntStatus ( LPC_SSP_T *  pSSP )

Get the masked interrupt status.

Parameters:
pSSP: The base of SSP peripheral on the chip
Returns:
SSP Masked Interrupt Status Register value
Note:
The return value contains a 1 for each interrupt condition that is asserted and enabled (masked)

Definition at line 293 of file ssp_11xx.h.

STATIC INLINE IntStatus Chip_SSP_GetRawIntStatus ( LPC_SSP_T *  pSSP,
SSP_RAWINTSTATUS_T  RawInt 
)

Get the raw interrupt status.

Parameters:
pSSP: The base of SSP peripheral on the chip
RawInt: Interrupt condition to be get status, shoud be :

  • SSP_RORRIS
  • SSP_RTRIS
  • SSP_RXRIS
  • SSP_TXRIS
Returns:
Raw interrupt status corresponding to interrupt condition , SET or RESET
Note:
Get the status of each interrupt condition ,regardless of whether or not the interrupt is enabled

Definition at line 309 of file ssp_11xx.h.

STATIC INLINE FlagStatus Chip_SSP_GetStatus ( LPC_SSP_T *  pSSP,
SSP_STATUS_T  Stat 
)

Get the current status of SSP controller.

Parameters:
pSSP: The base of SSP peripheral on the chip
Stat: Type of status, should be :

  • SSP_STAT_TFE
  • SSP_STAT_TNF
  • SSP_STAT_RNE
  • SSP_STAT_RFF
  • SSP_STAT_BSY
Returns:
SSP controller status, SET or RESET

Definition at line 282 of file ssp_11xx.h.

void Chip_SSP_Init ( LPC_SSP_T *  pSSP )

Initialize the SSP.

Parameters:
pSSP: The base SSP peripheral on the chip
Returns:
Nothing
STATIC INLINE void Chip_SSP_Int_Disable ( LPC_SSP_T *  pSSP )

Disable interrupt for the SSP.

Parameters:
pSSP: The base of SSP peripheral on the chip
Returns:
Nothing

Definition at line 354 of file ssp_11xx.h.

STATIC INLINE void Chip_SSP_Int_Enable ( LPC_SSP_T *  pSSP )

Enable interrupt for the SSP.

Parameters:
pSSP: The base of SSP peripheral on the chip
Returns:
Nothing

Definition at line 344 of file ssp_11xx.h.

void Chip_SSP_Int_FlushData ( LPC_SSP_T *  pSSP )

Clean all data in RX FIFO of SSP.

Parameters:
pSSP: The base SSP peripheral on the chip
Returns:
Nothing
Status Chip_SSP_Int_RWFrames16Bits ( LPC_SSP_T *  pSSP,
Chip_SSP_DATA_SETUP_T *  xf_setup 
)

SSP Interrupt Read/Write with 16-bit frame width.

Parameters:
pSSP: The base SSP peripheral on the chip
xf_setup: Pointer to a SSP_DATA_SETUP_T structure that contains specified information about transmit/receive data configuration
Returns:
SUCCESS or ERROR
Status Chip_SSP_Int_RWFrames8Bits ( LPC_SSP_T *  pSSP,
Chip_SSP_DATA_SETUP_T *  xf_setup 
)

SSP Interrupt Read/Write with 8-bit frame width.

Parameters:
pSSP: The base SSP peripheral on the chip
xf_setup: Pointer to a SSP_DATA_SETUP_T structure that contains specified information about transmit/receive data configuration
Returns:
SUCCESS or ERROR
uint32_t Chip_SSP_ReadFrames_Blocking ( LPC_SSP_T *  pSSP,
uint8_t *  buffer,
uint32_t  buffer_len 
)

SSP Polling Read in blocking mode.

Parameters:
pSSP: The base SSP peripheral on the chip
buffer: Buffer address
buffer_len: The length of buffer
Returns:
Actual data length has been transferred
Note:
This function can be used in both master and slave mode. First, a dummy writing operation is generated to clear data buffer. After that, a reading operation will receive the needed data
STATIC INLINE uint16_t Chip_SSP_ReceiveFrame ( LPC_SSP_T *  pSSP )

Get received SSP data.

Parameters:
pSSP: The base of SSP peripheral on the chip
Returns:
SSP 16-bit data received

Definition at line 364 of file ssp_11xx.h.

uint32_t Chip_SSP_RWFrames_Blocking ( LPC_SSP_T *  pSSP,
Chip_SSP_DATA_SETUP_T *  xf_setup 
)

SSP Polling Read/Write in blocking mode.

Parameters:
pSSP: The base SSP peripheral on the chip
xf_setup: Pointer to a SSP_DATA_SETUP_T structure that contains specified information about transmit/receive data configuration
Returns:
Actual data length has been transferred
Note:
This function can be used in both master and slave mode. It starts with writing phase and after that, a reading phase is generated to read any data available in RX_FIFO. All needed information is prepared through xf_setup param.
STATIC INLINE void Chip_SSP_SendFrame ( LPC_SSP_T *  pSSP,
uint16_t  tx_data 
)

Send SSP 16-bit data.

Parameters:
pSSP: The base of SSP peripheral on the chip
tx_data: SSP 16-bit data to be transmited
Returns:
Nothing

Definition at line 375 of file ssp_11xx.h.

STATIC INLINE void Chip_SSP_Set_Mode ( LPC_SSP_T *  pSSP,
uint32_t  mode 
)

Set the SSP working as master or slave mode.

Parameters:
pSSP: The base of SSP peripheral on the chip
mode: Operating mode, should be

  • SSP_MODE_MASTER
  • SSP_MODE_SLAVE
Returns:
Nothing

Definition at line 419 of file ssp_11xx.h.

void Chip_SSP_SetBitRate ( LPC_SSP_T *  pSSP,
uint32_t  bitRate 
)

Set the clock frequency for SSP interface.

Parameters:
pSSP: The base SSP peripheral on the chip
bitRate: The SSP bit rate
Returns:
Nothing
void Chip_SSP_SetClockRate ( LPC_SSP_T *  pSSP,
uint32_t  clk_rate,
uint32_t  prescale 
)

Set up output clocks per bit for SSP bus.

Parameters:
pSSP: The base of SSP peripheral on the chip
clk_ratefs: The number of prescaler-output clocks per bit on the bus, minus one
prescale: The factor by which the Prescaler divides the SSP peripheral clock PCLK
Returns:
Nothing
Note:
The bit frequency is PCLK / (prescale x[clk_rate+1])
STATIC INLINE void Chip_SSP_SetFormat ( LPC_SSP_T *  pSSP,
uint32_t  bits,
uint32_t  frameFormat,
uint32_t  clockMode 
)

Set up the SSP frame format.

Parameters:
pSSP: The base of SSP peripheral on the chip
bits: The number of bits transferred in each frame, should be SSP_BITS_4 to SSP_BITS_16
frameFormat: Frame format, should be :

  • SSP_FRAMEFORMAT_SPI
  • SSP_FRAME_FORMAT_TI
  • SSP_FRAMEFORMAT_MICROWIRE
clockMode: Select Clock polarity and Clock phase, should be :

  • SSP_CLOCK_CPHA0_CPOL0
  • SSP_CLOCK_CPHA0_CPOL1
  • SSP_CLOCK_CPHA1_CPOL0
  • SSP_CLOCK_CPHA1_CPOL1
Returns:
Nothing
Note:
Note: The clockFormat is only used in SPI mode

Definition at line 406 of file ssp_11xx.h.

void Chip_SSP_SetMaster ( LPC_SSP_T *  pSSP,
bool  master 
)

Set the SSP operating modes, master or slave.

Parameters:
pSSP: The base SSP peripheral on the chip
master: 1 to set master, 0 to set slave
Returns:
Nothing
uint32_t Chip_SSP_WriteFrames_Blocking ( LPC_SSP_T *  pSSP,
uint8_t *  buffer,
uint32_t  buffer_len 
)

SSP Polling Write in blocking mode.

Parameters:
pSSP: The base SSP peripheral on the chip
buffer: Buffer address
buffer_len: Buffer length
Returns:
Actual data length has been transferred
Note:
This function can be used in both master and slave mode. First, a writing operation will send the needed data. After that, a dummy reading operation is generated to clear data buffer
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