Driver for TI's CC1200 radio ICs. Forget hardcoded register settings -- this driver calculates everything from scratch!

Dependents:   CC1200-MorseEncoder CC1200-Examples

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CC1200Bits.h

00001 //
00002 // Bit shifts for CC1200 registers
00003 //
00004 
00005 #ifndef LIGHTSPEEDRANGEFINDER_CC1200BITS_H
00006 #define LIGHTSPEEDRANGEFINDER_CC1200BITS_H
00007 
00008 #define PKT_CFG2_BYTE_SWAP_EN 6
00009 #define PKT_CFG2_FG_MODE_EN 5
00010 #define PKT_CFG2_CCA_MODE 2
00011 #define PKT_CFG2_PKT_FORMAT 0
00012 
00013 #define MDMCFG2_ASK_SHAPE 7
00014 #define MDMCFG2_SYMBOL_MAP_CFG 4
00015 #define MDMCFG2_UPSAMPLER_P 1
00016 #define MDMCFG2_CFM_DATA_EN 0
00017 
00018 #define MDMCFG1_CARRIER_SENSE_GATE 7
00019 #define MDMCFG1_FIFO_EN 6
00020 #define MDMCFG1_MANCHESTER_EN 5
00021 #define MDMCFG1_INVERT_DATA_EN 4
00022 #define MDMCFG1_COLLISION_DETECT_EN 3
00023 #define MDMCFG1_DVGA_GAIN 1
00024 #define MDMCFG1_SINGLE_ADC_EN 7
00025 
00026 #define MDMCFG0_TRANSPARENT_MODE_EN 6
00027 #define MDMCFG0_TRANSPARENT_INTFACT 4
00028 #define MDMCFG0_DATA_FILTER_EN 3
00029 #define MDMCFG0_VITERBI_EN 2
00030 
00031 #define MODCFG_DEV_E_MODEM_MODE 6
00032 #define MODCFG_DEV_E_MOD_FORMAT 3
00033 #define MODCFG_DEV_E_DEV_E 0
00034 
00035 #define SYMBOL_RATE2_SRATE_E 4
00036 #define SYMBOL_RATE2_SRATE_M_19_16 0
00037 
00038 #define PA_CFG1_PA_RAMP_SHAPE_EN 6
00039 #define PA_CFG1_PA_POWER_RAMP 0
00040 
00041 #define PA_CFG0_FIRST_IPL 5
00042 #define PA_CFG0_SECOND_IPL 2
00043 #define PA_CFG0_RAMP_SHAPE 0
00044 
00045 #define CHAN_BW_ADC_CIC_DECFACT 6
00046 #define CHAN_BW_BB_CIC_DECFACT 0
00047 
00048 #define DCFILT_CFG_DCFILT_FREEZE_COEFF 6
00049 #define DCFILT_CFG_DCFILT_BW_SETTLE 3
00050 #define DCFILT_CFG_DCFILT_BW 0
00051 
00052 #define PKT_CFG1_FEC_EN 7
00053 #define PKT_CFG1_WHITE_DATA 6
00054 #define PKT_CFG1_PN9_SWAP_EN 5
00055 #define PKT_CFG1_ADDR_CHECK_CFG 3
00056 #define PKT_CFG1_CRC_CFG 1
00057 #define PKT_CFG1_APPEND_STATUS 0
00058 
00059 #define PKT_CFG0_LENGTH_CONFIG 5
00060 #define PKT_CFG0_PKT_BIT_LEN 2
00061 #define PKT_CFG0_UART_MODE_EN 1
00062 #define PKT_CFG0_UART_SWAP_EN 0
00063 
00064 #define RFEND_CFG1_RXOFF_MODE 4
00065 #define RFEND_CFG1_RX_TIME 1
00066 #define RFEND_CFG1_RX_TIME_QUAL 0
00067 
00068 #define RFEND_CFG0_CAL_END_WAKE_UP_EN 6
00069 #define RFEND_CFG0_TXOFF_MODE 4
00070 #define RFEND_CFG0_TERM_ON_BAD_PACKET_EN 3
00071 #define RFEND_CFG0_ANT_DIV_RX_TERM_CFG 0
00072 
00073 #define FS_CFG_FS_LOCK_EN 4
00074 #define FS_CFG_FSD_BANDSELECT 0
00075 
00076 #define FSCAL_CTRL_LOCK 0
00077 
00078 #define IF_MIX_CFG_CMIX_CFG 2
00079 
00080 // bits are the same for all GPIO registers
00081 #define GPIO_ATRAN 7
00082 #define GPIO_INV 6
00083 #define GPIO_CFG 0
00084 
00085 #define IQIC_IQIC_EN 7
00086 #define IQIC_IQIC_UPDATE_COEFF_EN 6
00087 #define IQIC_BLEN_SETTLE 4
00088 #define IQIC_BLEN 2
00089 #define IQIC_IMGCH_LEVEL_THR 0
00090 
00091 #define SYNC_CFG0_AUTO_CLEAR 5
00092 #define SYNC_CFG0_RX_CONFIG_LIMITATION 4
00093 #define SYNC_CFG0_PQT_GATING_EN 3
00094 #define SYNC_CFG0_EXT_SYNC_DETECT 2
00095 #define SYNC_CFG0_STRICT_SYNC_CHECK 0
00096 
00097 #define SYNC_CFG1_SYNC_MODE 5
00098 #define SYNC_CFG1_SYNC_THR 0
00099 
00100 #define SETTLING_CFG_FS_AUTOCAL 3
00101 #define SETTLING_CFG_LOCK_TIME 1
00102 #define SETTLING_CFG_FSREG_TIME 0
00103 
00104 #define PREAMBLE_CFG1_NUM_PREAMBLE 2
00105 #define PREAMBLE_CFG1_PREAMBLE_WORD 0
00106 
00107 #define PREAMBLE_CFG0_PQT_EN 7
00108 #define PREAMBLE_CFG0_PQT_VALID_TIMEOUT 4
00109 #define PREAMBLE_CFG0_PQT 0
00110 
00111 #define AGC_CFG3_AGC_SYNC_BEHAVIOUR 5
00112 #define AGC_CFG3_AGC_MIN_GAIN 0
00113 
00114 #define AGC_CFG2_START_PREVIOUS_GAIN_EN 7
00115 #define AGC_CFG2_FE_PERFORMANCE_MODE 5
00116 #define AGC_CFG2_AGC_MAX_GAIN 0
00117 
00118 #define AGC_CFG1_RSSI_STEP_THR 6
00119 #define AGC_CFG1_AGC_WIN_SIZE 3
00120 #define AGC_CFG1_AGC_SETTLE_WAIT 0
00121 
00122 #define AGC_CFG0_AGC_HYST_LEVEL 6
00123 #define AGC_CFG0_AGC_SLEWRATE_LIMIT 4
00124 #define AGC_CFG0_RSSI_VALID_CNT 2
00125 #define AGC_CFG0_AGC_ASK_DECAY 0
00126 
00127 #define ASK_CFG_AGC_ASK_BW 6
00128 #define ASK_CFG_ASK_DEPTH 0
00129 
00130 #define RSSI0_RSSI_3_0 3
00131 #define RSSI0_CARRIER_SENSE 2
00132 #define RSSI0_CARRIER_SENSE_VALID 1
00133 #define RSSI0_RSSI_VALID 0
00134 
00135 #define AGC_CFG1_RSSI_STEP_THR 6
00136 #define AGC_CFG1_AGC_WIN_SIZE 3
00137 #define AGC_CFG1_AGC_SETTLE_WAIT 0
00138 
00139 #endif //LIGHTSPEEDRANGEFINDER_CC1200BITS_H