Library to access LPC17xx peripherals. It uses static inline functions, constant propagation and dead code elimination to be as fast as possible.
Dependents: Chua-VGA Wolfram-1D-VGA WolframRnd-1D-VGA Basin-VGA ... more
pwm.h@0:7a91348b4a02, 2011-07-03 (annotated)
- Committer:
- Ivop
- Date:
- Sun Jul 03 17:11:55 2011 +0000
- Revision:
- 0:7a91348b4a02
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Ivop | 0:7a91348b4a02 | 1 | /* Copyright (C) 2010, 2011 by Ivo van Poorten <ivop@euronet.nl> |
Ivop | 0:7a91348b4a02 | 2 | * This file is licensed under the terms of the GNU Lesser |
Ivop | 0:7a91348b4a02 | 3 | * General Public License, version 3. |
Ivop | 0:7a91348b4a02 | 4 | */ |
Ivop | 0:7a91348b4a02 | 5 | |
Ivop | 0:7a91348b4a02 | 6 | #ifndef FASTLIB_PWM_H |
Ivop | 0:7a91348b4a02 | 7 | #define FASTLIB_PWM_H |
Ivop | 0:7a91348b4a02 | 8 | |
Ivop | 0:7a91348b4a02 | 9 | #include "fastlib/common.h" |
Ivop | 0:7a91348b4a02 | 10 | |
Ivop | 0:7a91348b4a02 | 11 | #define FL_PWM1IR ((volatile uint32_t *) 0x40018000) |
Ivop | 0:7a91348b4a02 | 12 | |
Ivop | 0:7a91348b4a02 | 13 | #define FL_PWM1TCR ((volatile uint32_t *) 0x40018004) |
Ivop | 0:7a91348b4a02 | 14 | #define FL_PWM1TC ((volatile uint32_t *) 0x40018008) |
Ivop | 0:7a91348b4a02 | 15 | |
Ivop | 0:7a91348b4a02 | 16 | #define FL_PWM1PR ((volatile uint32_t *) 0x4001800C) |
Ivop | 0:7a91348b4a02 | 17 | #define FL_PWM1PC ((volatile uint32_t *) 0x40018010) |
Ivop | 0:7a91348b4a02 | 18 | |
Ivop | 0:7a91348b4a02 | 19 | #define FL_PWM1MCR ((volatile uint32_t *) 0x40018014) |
Ivop | 0:7a91348b4a02 | 20 | #define FL_PWM1MR0 ((volatile uint32_t *) 0x40018018) |
Ivop | 0:7a91348b4a02 | 21 | #define FL_PWM1MR1 ((volatile uint32_t *) 0x4001801C) |
Ivop | 0:7a91348b4a02 | 22 | #define FL_PWM1MR2 ((volatile uint32_t *) 0x40018020) |
Ivop | 0:7a91348b4a02 | 23 | #define FL_PWM1MR3 ((volatile uint32_t *) 0x40018024) |
Ivop | 0:7a91348b4a02 | 24 | #define FL_PWM1MR4 ((volatile uint32_t *) 0x40018040) |
Ivop | 0:7a91348b4a02 | 25 | #define FL_PWM1MR5 ((volatile uint32_t *) 0x40018044) |
Ivop | 0:7a91348b4a02 | 26 | #define FL_PWM1MR6 ((volatile uint32_t *) 0x40018048) |
Ivop | 0:7a91348b4a02 | 27 | |
Ivop | 0:7a91348b4a02 | 28 | #define FL_PWM1CCR ((volatile uint32_t *) 0x40018028) |
Ivop | 0:7a91348b4a02 | 29 | #define FL_PWM1CR0 ((volatile uint32_t *) 0x4001802C) |
Ivop | 0:7a91348b4a02 | 30 | #define FL_PWM1CR1 ((volatile uint32_t *) 0x40018030) |
Ivop | 0:7a91348b4a02 | 31 | #define FL_PWM1CR2 ((volatile uint32_t *) 0x40018034) |
Ivop | 0:7a91348b4a02 | 32 | #define FL_PWM1CR3 ((volatile uint32_t *) 0x40018038) |
Ivop | 0:7a91348b4a02 | 33 | |
Ivop | 0:7a91348b4a02 | 34 | #define FL_PWM1PCR ((volatile uint32_t *) 0x4001804C) |
Ivop | 0:7a91348b4a02 | 35 | #define FL_PWM1LER ((volatile uint32_t *) 0x40018050) |
Ivop | 0:7a91348b4a02 | 36 | #define FL_PWM1CTCR ((volatile uint32_t *) 0x40018070) |
Ivop | 0:7a91348b4a02 | 37 | |
Ivop | 0:7a91348b4a02 | 38 | /* match channel: 0-8 (0-6 pwm, 7-8 cap0-1) |
Ivop | 0:7a91348b4a02 | 39 | * returns 0 or !0 |
Ivop | 0:7a91348b4a02 | 40 | */ |
Ivop | 0:7a91348b4a02 | 41 | static inline int fl_pwm_interrupt_status(const unsigned channel) { |
Ivop | 0:7a91348b4a02 | 42 | int remap; |
Ivop | 0:7a91348b4a02 | 43 | if (channel >= 7) remap = -3; |
Ivop | 0:7a91348b4a02 | 44 | else if (channel >= 4) remap = 4; |
Ivop | 0:7a91348b4a02 | 45 | return *FL_PWM1IR & (1U << (channel+remap)); |
Ivop | 0:7a91348b4a02 | 46 | } |
Ivop | 0:7a91348b4a02 | 47 | |
Ivop | 0:7a91348b4a02 | 48 | static inline void fl_pwm_interrupt_clear(const unsigned channel) { |
Ivop | 0:7a91348b4a02 | 49 | int remap; |
Ivop | 0:7a91348b4a02 | 50 | if (channel >= 7) remap = -3; |
Ivop | 0:7a91348b4a02 | 51 | else if (channel >= 4) remap = 4; |
Ivop | 0:7a91348b4a02 | 52 | *FL_PWM1IR = 1U << (channel+remap); |
Ivop | 0:7a91348b4a02 | 53 | } |
Ivop | 0:7a91348b4a02 | 54 | |
Ivop | 0:7a91348b4a02 | 55 | static inline void fl_pwm_timer_counter_enable(const unsigned state) { |
Ivop | 0:7a91348b4a02 | 56 | if (state) *FL_PWM1TCR |= 1; |
Ivop | 0:7a91348b4a02 | 57 | else *FL_PWM1TCR &= ~1U; |
Ivop | 0:7a91348b4a02 | 58 | } |
Ivop | 0:7a91348b4a02 | 59 | |
Ivop | 0:7a91348b4a02 | 60 | static inline void fl_pwm_timer_counter_reset(const unsigned state) { |
Ivop | 0:7a91348b4a02 | 61 | if (state) *FL_PWM1TCR |= 2; |
Ivop | 0:7a91348b4a02 | 62 | else *FL_PWM1TCR &= ~2U; |
Ivop | 0:7a91348b4a02 | 63 | } |
Ivop | 0:7a91348b4a02 | 64 | |
Ivop | 0:7a91348b4a02 | 65 | static inline void fl_pwm_enable(const unsigned state) { |
Ivop | 0:7a91348b4a02 | 66 | if (state) *FL_PWM1TCR |= 8; |
Ivop | 0:7a91348b4a02 | 67 | else *FL_PWM1TCR &= ~8U; |
Ivop | 0:7a91348b4a02 | 68 | } |
Ivop | 0:7a91348b4a02 | 69 | |
Ivop | 0:7a91348b4a02 | 70 | static inline unsigned fl_pwm_get_timer_counter(void) { |
Ivop | 0:7a91348b4a02 | 71 | return *FL_PWM1TC; |
Ivop | 0:7a91348b4a02 | 72 | } |
Ivop | 0:7a91348b4a02 | 73 | |
Ivop | 0:7a91348b4a02 | 74 | static inline void fl_pwm_set_timer_counter(unsigned value) { |
Ivop | 0:7a91348b4a02 | 75 | *FL_PWM1TC = value; |
Ivop | 0:7a91348b4a02 | 76 | } |
Ivop | 0:7a91348b4a02 | 77 | |
Ivop | 0:7a91348b4a02 | 78 | /* value: 1-... */ |
Ivop | 0:7a91348b4a02 | 79 | static inline void fl_pwm_set_prescale(const unsigned value) { |
Ivop | 0:7a91348b4a02 | 80 | *FL_PWM1PR = value - 1; |
Ivop | 0:7a91348b4a02 | 81 | } |
Ivop | 0:7a91348b4a02 | 82 | |
Ivop | 0:7a91348b4a02 | 83 | static inline unsigned fl_pwm_get_prescale_counter(void) { |
Ivop | 0:7a91348b4a02 | 84 | return *FL_PWM1PR + 1; |
Ivop | 0:7a91348b4a02 | 85 | } |
Ivop | 0:7a91348b4a02 | 86 | |
Ivop | 0:7a91348b4a02 | 87 | static inline void fl_pwm_set_timer_mode(void) { |
Ivop | 0:7a91348b4a02 | 88 | *FL_PWM1CTCR &= ~3U; |
Ivop | 0:7a91348b4a02 | 89 | } |
Ivop | 0:7a91348b4a02 | 90 | |
Ivop | 0:7a91348b4a02 | 91 | /* mode: 1-3 (FL_RISE/FALL/BOTH) pcap1: 0-1 */ |
Ivop | 0:7a91348b4a02 | 92 | static inline void fl_pwm_set_counter_mode(const unsigned mode, const unsigned pcap1n) { |
Ivop | 0:7a91348b4a02 | 93 | *FL_PWM1CTCR = mode | (pcap1n << 2); |
Ivop | 0:7a91348b4a02 | 94 | } |
Ivop | 0:7a91348b4a02 | 95 | |
Ivop | 0:7a91348b4a02 | 96 | /* channel: 0-6 */ |
Ivop | 0:7a91348b4a02 | 97 | static inline void fl_pwm_config_match(const unsigned channel, const unsigned interrupt, const unsigned reset, const unsigned stop) { |
Ivop | 0:7a91348b4a02 | 98 | const unsigned mask = (interrupt | (reset << 1) | (stop << 2)) << ((channel<<1)+channel); |
Ivop | 0:7a91348b4a02 | 99 | *FL_PWM1MCR &= ~mask; |
Ivop | 0:7a91348b4a02 | 100 | *FL_PWM1MCR |= mask; |
Ivop | 0:7a91348b4a02 | 101 | } |
Ivop | 0:7a91348b4a02 | 102 | |
Ivop | 0:7a91348b4a02 | 103 | /* channel: 0-6 */ |
Ivop | 0:7a91348b4a02 | 104 | static inline void fl_pwm_set_match(const unsigned channel, const unsigned value) { |
Ivop | 0:7a91348b4a02 | 105 | if (channel <= 3) *(FL_PWM1MR0+channel) = value; |
Ivop | 0:7a91348b4a02 | 106 | else *(FL_PWM1MR0+channel+0x18) = value; |
Ivop | 0:7a91348b4a02 | 107 | } |
Ivop | 0:7a91348b4a02 | 108 | |
Ivop | 0:7a91348b4a02 | 109 | /* pcap1n: 0-1 */ |
Ivop | 0:7a91348b4a02 | 110 | static inline void fl_pwm_config_capture(const unsigned pcap1n, const unsigned rise, const unsigned fall, const unsigned interrupt) { |
Ivop | 0:7a91348b4a02 | 111 | const unsigned mask = (rise | (fall << 1) | (interrupt << 2)) << ((pcap1n<<1)+pcap1n); |
Ivop | 0:7a91348b4a02 | 112 | *FL_PWM1CCR &= ~mask; |
Ivop | 0:7a91348b4a02 | 113 | *FL_PWM1CCR |= mask; |
Ivop | 0:7a91348b4a02 | 114 | } |
Ivop | 0:7a91348b4a02 | 115 | |
Ivop | 0:7a91348b4a02 | 116 | /* pcap1n: 0-1 (2,3?) */ |
Ivop | 0:7a91348b4a02 | 117 | static inline unsigned fl_pwm_get_capture(const unsigned pcap1n) { |
Ivop | 0:7a91348b4a02 | 118 | return *(FL_PWM1CR0+pcap1n); |
Ivop | 0:7a91348b4a02 | 119 | } |
Ivop | 0:7a91348b4a02 | 120 | |
Ivop | 0:7a91348b4a02 | 121 | /* channel: 2-6 edges: 0-1 (single/double) */ |
Ivop | 0:7a91348b4a02 | 122 | static inline void fl_pwm_config_edges(const unsigned channel, const unsigned edges) { |
Ivop | 0:7a91348b4a02 | 123 | if (edges) *FL_PWM1PCR |= edges << channel ; |
Ivop | 0:7a91348b4a02 | 124 | else *FL_PWM1PCR &= ~(edges << channel); |
Ivop | 0:7a91348b4a02 | 125 | } |
Ivop | 0:7a91348b4a02 | 126 | |
Ivop | 0:7a91348b4a02 | 127 | /* channel: 1-6 state: 0-1 */ |
Ivop | 0:7a91348b4a02 | 128 | static inline void fl_pwm_output_enable(const unsigned channel, const unsigned state) { |
Ivop | 0:7a91348b4a02 | 129 | if (state) *FL_PWM1PCR |= 1U << (channel+8) ; |
Ivop | 0:7a91348b4a02 | 130 | else *FL_PWM1PCR &= ~(1U << (channel+8)); |
Ivop | 0:7a91348b4a02 | 131 | } |
Ivop | 0:7a91348b4a02 | 132 | |
Ivop | 0:7a91348b4a02 | 133 | static inline void fl_pwm_latch_match_channel(const unsigned channel) { |
Ivop | 0:7a91348b4a02 | 134 | *FL_PWM1LER |= 1U << channel; |
Ivop | 0:7a91348b4a02 | 135 | } |
Ivop | 0:7a91348b4a02 | 136 | |
Ivop | 0:7a91348b4a02 | 137 | static inline void fl_pwm_latch_match_mask(const unsigned mask) { |
Ivop | 0:7a91348b4a02 | 138 | *FL_PWM1LER = mask; |
Ivop | 0:7a91348b4a02 | 139 | } |
Ivop | 0:7a91348b4a02 | 140 | |
Ivop | 0:7a91348b4a02 | 141 | static inline void fl_pwm_latch_match_all(void) { |
Ivop | 0:7a91348b4a02 | 142 | fl_pwm_latch_match_mask(0x7f); |
Ivop | 0:7a91348b4a02 | 143 | } |
Ivop | 0:7a91348b4a02 | 144 | |
Ivop | 0:7a91348b4a02 | 145 | #endif |