Callum Ellor / PulseWidthCapture

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Dependents:   PulseWidthCapture_Program

PulseWidthCapture.cpp@1:6bb38ae2e503, 2014-12-10 (annotated)

Committer:
Ellor1
Date:
Wed Dec 10 10:33:32 2014 +0000
Revision:
1:6bb38ae2e503
Parent:
0:7076676dd640
Child:
2:857c3c8e7a2f
Working LCD;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Ellor1 0:7076676dd640 1 #include "mbed.h"
Ellor1 0:7076676dd640 2 #include "TextLCD_16x4.h"
Ellor1 0:7076676dd640 3 #include "USBSerial.h"
Ellor1 1:6bb38ae2e503 4 #include "PulseWidthCapture/PulseWidthCapture.h"
Ellor1 0:7076676dd640 5 #include "rtos.h"
Ellor1 0:7076676dd640 6
Ellor1 0:7076676dd640 7 USBSerial serial;
Ellor1 1:6bb38ae2e503 8 TextLCD lcd(P0_21, P0_20, P1_15, P0_19, P0_5, P0_4, TextLCD::LCD16x4); // rs, e, d4, d5, d6, d7
Ellor1 1:6bb38ae2e503 9
Ellor1 0:7076676dd640 10 DigitalOut led(P0_9);
Ellor1 0:7076676dd640 11 DigitalOut led2(P0_8);
Ellor1 0:7076676dd640 12 DigitalOut led3(P0_7);
Ellor1 0:7076676dd640 13 DigitalOut led4(P0_17);
Ellor1 0:7076676dd640 14
Ellor1 0:7076676dd640 15 //AnalogIn Ain(P0_11);
Ellor1 0:7076676dd640 16
Ellor1 0:7076676dd640 17 Capture *Capture::instance;
Ellor1 0:7076676dd640 18
Ellor1 0:7076676dd640 19 /*********************************************************************//**
Ellor1 0:7076676dd640 20 * @brief Create a Capture object and configure it.
Ellor1 0:7076676dd640 21 * @param None Uses P1_29 as the Capture input (Pin 7)
Ellor1 0:7076676dd640 22 * @param None Uses P0_12 as the Capture input (Pin 16)
Ellor1 0:7076676dd640 23 * @return None
Ellor1 0:7076676dd640 24 **********************************************************************/
Ellor1 0:7076676dd640 25 Capture::Capture(void)
Ellor1 0:7076676dd640 26 {
Ellor1 0:7076676dd640 27 /* Set up clock and power, using default peripheral system clock divider */
Ellor1 0:7076676dd640 28 LPC_SYSCON->SYSAHBCLKCTRL |= CT32B0_CLK_ENABLE; // See page 30 of the 11U24 User Guide
Ellor1 0:7076676dd640 29 // Check the clock divider ratio by reading LPC_SYSCON->SYSAHBCLKDIV ls byte
Ellor1 0:7076676dd640 30
Ellor1 0:7076676dd640 31 LPC_SYSCON->SYSAHBCLKCTRL |= CT32B1_CLK_ENABLE;
Ellor1 0:7076676dd640 32
Ellor1 0:7076676dd640 33 LPC_SYSCON->SYSAHBCLKCTRL |= CT16B0_CLK_ENABLE;
Ellor1 0:7076676dd640 34
Ellor1 0:7076676dd640 35 LPC_CT32B0->PR = 0; // Prescale counter divide by ...
Ellor1 0:7076676dd640 36 LPC_CT32B1->PR = 0;
Ellor1 1:6bb38ae2e503 37 LPC_CT16B0->PR = 1000; //
Ellor1 0:7076676dd640 38
Ellor1 0:7076676dd640 39 /* Configure IOCON for the proper function of the capture pin. Use a pull-up. */
Ellor1 0:7076676dd640 40 LPC_IOCON->PIO1_29 = (CT32B0_CAP1); // See page 125 of the 11U24 User Guide
Ellor1 0:7076676dd640 41
Ellor1 0:7076676dd640 42 LPC_IOCON->TMS_PIO0_12 = CT32B1_CAP0 | ADMODE;
Ellor1 0:7076676dd640 43
Ellor1 0:7076676dd640 44 // Select the capture edge and int mode
Ellor1 0:7076676dd640 45 LPC_CT32B0->CCR = CCR_CAP1RE | CCR_CAP1I; // Select inputs and interrupts.
Ellor1 0:7076676dd640 46
Ellor1 0:7076676dd640 47 LPC_CT32B1->CCR = CCR_CAP0FE | CCR_CAP0I;
Ellor1 0:7076676dd640 48
Ellor1 0:7076676dd640 49 LPC_CT16B0->MCR = CT16B0_MR0I | CT16B0_MR0R;
Ellor1 0:7076676dd640 50
Ellor1 0:7076676dd640 51 // Set up the rising edge clear, using timer mode
Ellor1 0:7076676dd640 52 LPC_CT32B0->CTCR = CT32B0_CTCR_CTM_TIMER | CT32B0_CTCR_ENCC | CT32B0_CTCR_SEICC_CAP1FE;
Ellor1 0:7076676dd640 53
Ellor1 0:7076676dd640 54 // clear timer on falling edge
Ellor1 0:7076676dd640 55 LPC_CT32B1->CTCR = CT32B1_CTCR_CTM_TIMER | CT32B1_CTCR_ENCC | CT32B1_CTCR_SEICC_CAP0RE;
Ellor1 0:7076676dd640 56
Ellor1 0:7076676dd640 57 // Clear interrupt flag
Ellor1 0:7076676dd640 58 LPC_CT32B0->IR = CT32B0_IR_CR1INT;
Ellor1 0:7076676dd640 59
Ellor1 0:7076676dd640 60 LPC_CT32B1->IR = CT32B1_IR_CR0INT;
Ellor1 0:7076676dd640 61
Ellor1 0:7076676dd640 62 LPC_CT16B0->IR = CT16B0_IR_MR0INT;
Ellor1 0:7076676dd640 63
Ellor1 0:7076676dd640 64
Ellor1 0:7076676dd640 65 //* Attach IRQ
Ellor1 0:7076676dd640 66 instance = this;
Ellor1 0:7076676dd640 67 NVIC_SetVector(TIMER_32_0_IRQn, (uint32_t)&_Captureisr1);
Ellor1 0:7076676dd640 68 NVIC_SetVector(TIMER_32_1_IRQn, (uint32_t)&_Captureisr2);
Ellor1 0:7076676dd640 69 NVIC_SetVector(TIMER_16_0_IRQn, (uint32_t)&_Captureisr3);
Ellor1 0:7076676dd640 70
Ellor1 0:7076676dd640 71 }
Ellor1 0:7076676dd640 72
Ellor1 0:7076676dd640 73 /*********************************************************************//**
Ellor1 0:7076676dd640 74 * @brief Start capturing data. Average the specified number of samples.
Ellor1 0:7076676dd640 75 * @param (int) numsamples Log base 2 of the number of samples to be averaged
Ellor1 0:7076676dd640 76 * @return None
Ellor1 0:7076676dd640 77 **********************************************************************/
Ellor1 0:7076676dd640 78 void Capture::Start_1(void) {
Ellor1 0:7076676dd640 79 capturedata = 0; // Clear the accumulator
Ellor1 0:7076676dd640 80 // No data ready
Ellor1 0:7076676dd640 81
Ellor1 0:7076676dd640 82 /* Enable interrupt for CAPTURE */
Ellor1 0:7076676dd640 83 NVIC_EnableIRQ(TIMER_32_0_IRQn);
Ellor1 0:7076676dd640 84
Ellor1 0:7076676dd640 85 // Start the timer
Ellor1 0:7076676dd640 86 LPC_CT32B0->TCR = CT32B0_TCR_CEN; // enable
Ellor1 0:7076676dd640 87
Ellor1 0:7076676dd640 88 }
Ellor1 0:7076676dd640 89
Ellor1 0:7076676dd640 90 void Capture::Start_2(void) {
Ellor1 0:7076676dd640 91 capturedata_2 = 0; // Clear the accumulator
Ellor1 0:7076676dd640 92 // No data ready
Ellor1 0:7076676dd640 93
Ellor1 0:7076676dd640 94 /* Enable interrupt for CAPTURE */
Ellor1 0:7076676dd640 95 NVIC_EnableIRQ(TIMER_32_1_IRQn);
Ellor1 0:7076676dd640 96
Ellor1 0:7076676dd640 97 // Start the timer
Ellor1 0:7076676dd640 98 LPC_CT32B1->TCR = CT32B1_TCR_CEN; // enable
Ellor1 0:7076676dd640 99
Ellor1 0:7076676dd640 100 }
Ellor1 0:7076676dd640 101
Ellor1 0:7076676dd640 102 /*********************************************************************//**
Ellor1 0:7076676dd640 103 * @brief Read (accumulated) sample count.
Ellor1 0:7076676dd640 104 *
Ellor1 0:7076676dd640 105 * @return (unsigned int) Accumulated capture value
Ellor1 0:7076676dd640 106 **********************************************************************/
Ellor1 0:7076676dd640 107
Ellor1 0:7076676dd640 108 unsigned int Capture::Debug(void) {
Ellor1 0:7076676dd640 109
Ellor1 0:7076676dd640 110 debug = LPC_IOCON->TMS_PIO0_12 ; // to check teh values in registers
Ellor1 0:7076676dd640 111
Ellor1 0:7076676dd640 112 return debug;
Ellor1 0:7076676dd640 113
Ellor1 0:7076676dd640 114 }
Ellor1 0:7076676dd640 115
Ellor1 0:7076676dd640 116 //unsigned int Capture::Read_1(void) {
Ellor1 0:7076676dd640 117 void Capture::Read_1(void) {
Ellor1 0:7076676dd640 118
Ellor1 0:7076676dd640 119 // static unsigned int i_1 = 0;
Ellor1 0:7076676dd640 120 i_1 = capturedata;
Ellor1 0:7076676dd640 121 // fall = ((i_1/48003280)*1000000);
Ellor1 0:7076676dd640 122 //test_1 = 101;
Ellor1 0:7076676dd640 123 // i_1 = capturedata_2;
Ellor1 0:7076676dd640 124
Ellor1 0:7076676dd640 125 // return capturedata;
Ellor1 0:7076676dd640 126
Ellor1 0:7076676dd640 127 }
Ellor1 0:7076676dd640 128
Ellor1 0:7076676dd640 129
Ellor1 0:7076676dd640 130 //unsigned int Capture::Read_2(void) {
Ellor1 0:7076676dd640 131 void Capture::Read_2(void) {
Ellor1 0:7076676dd640 132
Ellor1 0:7076676dd640 133 // static unsigned int j_1 = 0;
Ellor1 0:7076676dd640 134 j_1 = capturedata_2;
Ellor1 0:7076676dd640 135 // rise = ((j_1/48003280)*1000000);
Ellor1 0:7076676dd640 136 // test_2 = 105;
Ellor1 0:7076676dd640 137 // j_1 = capturedata_2;
Ellor1 0:7076676dd640 138
Ellor1 0:7076676dd640 139 //return capturedata_2;
Ellor1 0:7076676dd640 140
Ellor1 0:7076676dd640 141 }
Ellor1 0:7076676dd640 142
Ellor1 0:7076676dd640 143
Ellor1 0:7076676dd640 144 void Capture::Wait(void) {
Ellor1 0:7076676dd640 145
Ellor1 0:7076676dd640 146 led3 = !led3;
Ellor1 0:7076676dd640 147
Ellor1 0:7076676dd640 148 //Enable interrupt
Ellor1 0:7076676dd640 149 NVIC_EnableIRQ(TIMER_16_0_IRQn);
Ellor1 0:7076676dd640 150
Ellor1 0:7076676dd640 151 // Start the timer
Ellor1 0:7076676dd640 152 LPC_CT16B0->TCR = CT16B0_TCR_CEN; // enable
Ellor1 0:7076676dd640 153
Ellor1 1:6bb38ae2e503 154 LPC_CT16B0->MR0 = 1000000000;
Ellor1 0:7076676dd640 155
Ellor1 0:7076676dd640 156 }
Ellor1 0:7076676dd640 157
Ellor1 0:7076676dd640 158
Ellor1 0:7076676dd640 159
Ellor1 0:7076676dd640 160 /* Capture isr instantiator */
Ellor1 0:7076676dd640 161 void Capture::_Captureisr1(void)
Ellor1 0:7076676dd640 162 {
Ellor1 0:7076676dd640 163 instance->Captureisr1();
Ellor1 0:7076676dd640 164 }
Ellor1 0:7076676dd640 165
Ellor1 0:7076676dd640 166 /* Capture isr instantiator */
Ellor1 0:7076676dd640 167 void Capture::_Captureisr2(void)
Ellor1 0:7076676dd640 168 {
Ellor1 0:7076676dd640 169 instance->Captureisr2();
Ellor1 0:7076676dd640 170 }
Ellor1 0:7076676dd640 171
Ellor1 0:7076676dd640 172 /* Capture isr instantiator */
Ellor1 0:7076676dd640 173
Ellor1 0:7076676dd640 174
Ellor1 0:7076676dd640 175 void Capture::_Captureisr3(void)
Ellor1 0:7076676dd640 176 {
Ellor1 0:7076676dd640 177 instance->Captureisr3();
Ellor1 0:7076676dd640 178 }
Ellor1 0:7076676dd640 179
Ellor1 0:7076676dd640 180
Ellor1 0:7076676dd640 181 /*********************************************************************//**
Ellor1 0:7076676dd640 182 * @brief Capture interrupt service routine. Handles accumulation.
Ellor1 0:7076676dd640 183 *
Ellor1 0:7076676dd640 184 * @param[in] none
Ellor1 0:7076676dd640 185 *
Ellor1 0:7076676dd640 186 * @return none
Ellor1 0:7076676dd640 187 **********************************************************************/
Ellor1 0:7076676dd640 188 void Capture::Captureisr1(void) {
Ellor1 0:7076676dd640 189
Ellor1 0:7076676dd640 190 static int capturesum = 0; // Accumulates the readings
Ellor1 0:7076676dd640 191
Ellor1 0:7076676dd640 192 led = !led;
Ellor1 0:7076676dd640 193 capturesum = LPC_CT32B0->CR2;
Ellor1 0:7076676dd640 194 rise = (((float)capturesum/48003280)*1000000);
Ellor1 0:7076676dd640 195 // capturedata = 101;
Ellor1 0:7076676dd640 196 capturedata = capturesum;
Ellor1 0:7076676dd640 197 // rise = ((capturedata/48003280)*1000000);
Ellor1 0:7076676dd640 198 //test_1 = 101;
Ellor1 0:7076676dd640 199 LPC_CT32B0->IR |= CT32B0_IR_CR1INT;
Ellor1 0:7076676dd640 200
Ellor1 0:7076676dd640 201 return;
Ellor1 0:7076676dd640 202
Ellor1 0:7076676dd640 203 }
Ellor1 0:7076676dd640 204
Ellor1 0:7076676dd640 205 /*********************************************************************//**
Ellor1 0:7076676dd640 206 * @brief Capture interrupt service routine. Handles accumulation.
Ellor1 0:7076676dd640 207 *
Ellor1 0:7076676dd640 208 * @param[in] none
Ellor1 0:7076676dd640 209 *
Ellor1 0:7076676dd640 210 * @return none
Ellor1 0:7076676dd640 211 **********************************************************************/
Ellor1 0:7076676dd640 212 void Capture::Captureisr2(void) {
Ellor1 0:7076676dd640 213
Ellor1 0:7076676dd640 214 static int capturesum_2 = 0; // Accumulates the readings
Ellor1 0:7076676dd640 215
Ellor1 0:7076676dd640 216 led2 = !led2;
Ellor1 0:7076676dd640 217 capturesum_2 = LPC_CT32B1->CR0;
Ellor1 0:7076676dd640 218 // rise = capturesum_2;
Ellor1 0:7076676dd640 219 // rise_2 = ((rise/48003280)*1000000);
Ellor1 0:7076676dd640 220 //rise = ((capturesum_2/48003280)*1000000);
Ellor1 0:7076676dd640 221 capturedata_2 = capturesum_2;
Ellor1 0:7076676dd640 222
Ellor1 0:7076676dd640 223 fall = (((float)capturesum_2/48003280)*1000000);
Ellor1 0:7076676dd640 224 //test_2 = 105;
Ellor1 0:7076676dd640 225 LPC_CT32B1->IR |= CT32B1_IR_CR0INT;
Ellor1 0:7076676dd640 226
Ellor1 0:7076676dd640 227 return;
Ellor1 0:7076676dd640 228 }
Ellor1 0:7076676dd640 229
Ellor1 0:7076676dd640 230
Ellor1 0:7076676dd640 231
Ellor1 0:7076676dd640 232 void Capture::Captureisr3(void) {
Ellor1 0:7076676dd640 233
Ellor1 0:7076676dd640 234 NVIC_DisableIRQ(TIMER_32_0_IRQn);
Ellor1 0:7076676dd640 235 NVIC_DisableIRQ(TIMER_32_1_IRQn);
Ellor1 0:7076676dd640 236
Ellor1 0:7076676dd640 237 led4 = !led4;
Ellor1 0:7076676dd640 238 //m_1 = i_1 + j_1;
Ellor1 0:7076676dd640 239
Ellor1 0:7076676dd640 240 // ((i_1/48003280)*1000000);
Ellor1 0:7076676dd640 241 //rise = ((capturedata/48003280)*1000000);
Ellor1 0:7076676dd640 242
Ellor1 0:7076676dd640 243
Ellor1 0:7076676dd640 244
Ellor1 0:7076676dd640 245 //serial.printf("rise:%d \n\r", rise);
Ellor1 0:7076676dd640 246
Ellor1 0:7076676dd640 247
Ellor1 0:7076676dd640 248 //serial.printf("test_1:%d \n\r", test_1);
Ellor1 0:7076676dd640 249 // serial.printf("test_2:%d \n\r", test_2);
Ellor1 0:7076676dd640 250
Ellor1 0:7076676dd640 251 // serial.printf("rise:%d \n\r", rise);
Ellor1 0:7076676dd640 252 //serial.printf("rise_2:%d \n\r", rise_2);
Ellor1 0:7076676dd640 253
Ellor1 0:7076676dd640 254 //serial.printf("%.2f \n\r",ADCdata);
Ellor1 0:7076676dd640 255
Ellor1 0:7076676dd640 256 //serial.printf("fall:%d \n\r", fall);
Ellor1 1:6bb38ae2e503 257
Ellor1 1:6bb38ae2e503 258 int x;
Ellor1 1:6bb38ae2e503 259
Ellor1 1:6bb38ae2e503 260 for (x = 0; x<100; x++){
Ellor1 1:6bb38ae2e503 261
Ellor1 1:6bb38ae2e503 262 //if (serial.writeable())
Ellor1 1:6bb38ae2e503 263 //{
Ellor1 1:6bb38ae2e503 264 // if ( x == 99) {
Ellor1 1:6bb38ae2e503 265
Ellor1 1:6bb38ae2e503 266
Ellor1 1:6bb38ae2e503 267 }
Ellor1 1:6bb38ae2e503 268
Ellor1 1:6bb38ae2e503 269 period = rise + fall;
Ellor1 1:6bb38ae2e503 270 freq = (1/(float)period)*1000000;
Ellor1 0:7076676dd640 271
Ellor1 1:6bb38ae2e503 272 lcd.cls();
Ellor1 1:6bb38ae2e503 273 lcd.locate(0,0);
Ellor1 1:6bb38ae2e503 274 // lcd.printf("capturedata:%d \n\r", capturedata);
Ellor1 1:6bb38ae2e503 275 lcd.printf("rise:%.4f", rise);
Ellor1 1:6bb38ae2e503 276 lcd.locate(0,1);
Ellor1 1:6bb38ae2e503 277 lcd.printf("fall:%.4f", fall);
Ellor1 1:6bb38ae2e503 278 lcd.locate(0,2);
Ellor1 1:6bb38ae2e503 279 lcd.printf("period:%.4f", period);
Ellor1 1:6bb38ae2e503 280 lcd.locate(0,3);
Ellor1 1:6bb38ae2e503 281 lcd.printf("freq:%.2f", freq);
Ellor1 1:6bb38ae2e503 282
Ellor1 1:6bb38ae2e503 283
Ellor1 1:6bb38ae2e503 284
Ellor1 1:6bb38ae2e503 285 // serial.printf("capturedata:%d \n\r", capturedata);
Ellor1 1:6bb38ae2e503 286 // serial.printf("fall:%f \n\r", rise);
Ellor1 1:6bb38ae2e503 287 // serial.printf("fall:%f \n\r", fall);
Ellor1 1:6bb38ae2e503 288 // serial.printf("i_1:%.8f \n\r\n", i_1);
Ellor1 1:6bb38ae2e503 289 // serial.printf("i:%.8f \n\r\n", ((i_1/48003280)*1000000));
Ellor1 1:6bb38ae2e503 290
Ellor1 1:6bb38ae2e503 291 x = 0;
Ellor1 1:6bb38ae2e503 292 // }
Ellor1 1:6bb38ae2e503 293
Ellor1 1:6bb38ae2e503 294
Ellor1 1:6bb38ae2e503 295
Ellor1 0:7076676dd640 296 // serial.printf("j:%.8f \n\r\n", ((j_1/48003280)*1000000));
Ellor1 0:7076676dd640 297
Ellor1 0:7076676dd640 298 // serial.printf("i+j:%.8f \n\r\n", m_1);
Ellor1 0:7076676dd640 299
Ellor1 0:7076676dd640 300 NVIC_EnableIRQ(TIMER_32_0_IRQn);
Ellor1 0:7076676dd640 301 NVIC_EnableIRQ(TIMER_32_1_IRQn);
Ellor1 0:7076676dd640 302
Ellor1 0:7076676dd640 303 LPC_CT16B0->IR |= CT16B0_IR_MR0INT;
Ellor1 0:7076676dd640 304
Ellor1 0:7076676dd640 305 return;
Ellor1 0:7076676dd640 306
Ellor1 0:7076676dd640 307 }
Ellor1 0:7076676dd640 308
Ellor1 0:7076676dd640 309