Callum Ellor / PulseWidthCapture

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Dependents:   PulseWidthCapture_Program

PulseWidthCapture.cpp@0:7076676dd640, 2014-12-05 (annotated)

Committer:
Ellor1
Date:
Fri Dec 05 10:49:31 2014 +0000
Revision:
0:7076676dd640
Child:
1:6bb38ae2e503
working;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Ellor1 0:7076676dd640 1 #include "mbed.h"
Ellor1 0:7076676dd640 2 #include "TextLCD_16x4.h"
Ellor1 0:7076676dd640 3 #include "USBSerial.h"
Ellor1 0:7076676dd640 4 #include "PulseWidthCapture.h"
Ellor1 0:7076676dd640 5 #include "rtos.h"
Ellor1 0:7076676dd640 6
Ellor1 0:7076676dd640 7 USBSerial serial;
Ellor1 0:7076676dd640 8 DigitalOut led(P0_9);
Ellor1 0:7076676dd640 9 DigitalOut led2(P0_8);
Ellor1 0:7076676dd640 10 DigitalOut led3(P0_7);
Ellor1 0:7076676dd640 11 DigitalOut led4(P0_17);
Ellor1 0:7076676dd640 12
Ellor1 0:7076676dd640 13 //AnalogIn Ain(P0_11);
Ellor1 0:7076676dd640 14
Ellor1 0:7076676dd640 15 Capture *Capture::instance;
Ellor1 0:7076676dd640 16
Ellor1 0:7076676dd640 17 /*********************************************************************//**
Ellor1 0:7076676dd640 18 * @brief Create a Capture object and configure it.
Ellor1 0:7076676dd640 19 * @param None Uses P1_29 as the Capture input (Pin 7)
Ellor1 0:7076676dd640 20 * @param None Uses P0_12 as the Capture input (Pin 16)
Ellor1 0:7076676dd640 21 * @return None
Ellor1 0:7076676dd640 22 **********************************************************************/
Ellor1 0:7076676dd640 23 Capture::Capture(void)
Ellor1 0:7076676dd640 24 {
Ellor1 0:7076676dd640 25 /* Set up clock and power, using default peripheral system clock divider */
Ellor1 0:7076676dd640 26 LPC_SYSCON->SYSAHBCLKCTRL |= CT32B0_CLK_ENABLE; // See page 30 of the 11U24 User Guide
Ellor1 0:7076676dd640 27 // Check the clock divider ratio by reading LPC_SYSCON->SYSAHBCLKDIV ls byte
Ellor1 0:7076676dd640 28
Ellor1 0:7076676dd640 29 LPC_SYSCON->SYSAHBCLKCTRL |= CT32B1_CLK_ENABLE;
Ellor1 0:7076676dd640 30
Ellor1 0:7076676dd640 31 LPC_SYSCON->SYSAHBCLKCTRL |= CT16B0_CLK_ENABLE;
Ellor1 0:7076676dd640 32
Ellor1 0:7076676dd640 33 LPC_CT32B0->PR = 0; // Prescale counter divide by ...
Ellor1 0:7076676dd640 34 LPC_CT32B1->PR = 0;
Ellor1 0:7076676dd640 35 LPC_CT16B0->PR = 239; //200KHZ
Ellor1 0:7076676dd640 36
Ellor1 0:7076676dd640 37 /* Configure IOCON for the proper function of the capture pin. Use a pull-up. */
Ellor1 0:7076676dd640 38 LPC_IOCON->PIO1_29 = (CT32B0_CAP1); // See page 125 of the 11U24 User Guide
Ellor1 0:7076676dd640 39
Ellor1 0:7076676dd640 40 LPC_IOCON->TMS_PIO0_12 = CT32B1_CAP0 | ADMODE;
Ellor1 0:7076676dd640 41
Ellor1 0:7076676dd640 42 // Select the capture edge and int mode
Ellor1 0:7076676dd640 43 LPC_CT32B0->CCR = CCR_CAP1RE | CCR_CAP1I; // Select inputs and interrupts.
Ellor1 0:7076676dd640 44
Ellor1 0:7076676dd640 45 LPC_CT32B1->CCR = CCR_CAP0FE | CCR_CAP0I;
Ellor1 0:7076676dd640 46
Ellor1 0:7076676dd640 47 LPC_CT16B0->MCR = CT16B0_MR0I | CT16B0_MR0R;
Ellor1 0:7076676dd640 48
Ellor1 0:7076676dd640 49 // Set up the rising edge clear, using timer mode
Ellor1 0:7076676dd640 50 LPC_CT32B0->CTCR = CT32B0_CTCR_CTM_TIMER | CT32B0_CTCR_ENCC | CT32B0_CTCR_SEICC_CAP1FE;
Ellor1 0:7076676dd640 51
Ellor1 0:7076676dd640 52 // clear timer on falling edge
Ellor1 0:7076676dd640 53 LPC_CT32B1->CTCR = CT32B1_CTCR_CTM_TIMER | CT32B1_CTCR_ENCC | CT32B1_CTCR_SEICC_CAP0RE;
Ellor1 0:7076676dd640 54
Ellor1 0:7076676dd640 55 // Clear interrupt flag
Ellor1 0:7076676dd640 56 LPC_CT32B0->IR = CT32B0_IR_CR1INT;
Ellor1 0:7076676dd640 57
Ellor1 0:7076676dd640 58 LPC_CT32B1->IR = CT32B1_IR_CR0INT;
Ellor1 0:7076676dd640 59
Ellor1 0:7076676dd640 60 LPC_CT16B0->IR = CT16B0_IR_MR0INT;
Ellor1 0:7076676dd640 61
Ellor1 0:7076676dd640 62
Ellor1 0:7076676dd640 63 //* Attach IRQ
Ellor1 0:7076676dd640 64 instance = this;
Ellor1 0:7076676dd640 65 NVIC_SetVector(TIMER_32_0_IRQn, (uint32_t)&_Captureisr1);
Ellor1 0:7076676dd640 66 NVIC_SetVector(TIMER_32_1_IRQn, (uint32_t)&_Captureisr2);
Ellor1 0:7076676dd640 67 NVIC_SetVector(TIMER_16_0_IRQn, (uint32_t)&_Captureisr3);
Ellor1 0:7076676dd640 68
Ellor1 0:7076676dd640 69 }
Ellor1 0:7076676dd640 70
Ellor1 0:7076676dd640 71 /*********************************************************************//**
Ellor1 0:7076676dd640 72 * @brief Start capturing data. Average the specified number of samples.
Ellor1 0:7076676dd640 73 * @param (int) numsamples Log base 2 of the number of samples to be averaged
Ellor1 0:7076676dd640 74 * @return None
Ellor1 0:7076676dd640 75 **********************************************************************/
Ellor1 0:7076676dd640 76 void Capture::Start_1(void) {
Ellor1 0:7076676dd640 77 capturedata = 0; // Clear the accumulator
Ellor1 0:7076676dd640 78 // No data ready
Ellor1 0:7076676dd640 79
Ellor1 0:7076676dd640 80 /* Enable interrupt for CAPTURE */
Ellor1 0:7076676dd640 81 NVIC_EnableIRQ(TIMER_32_0_IRQn);
Ellor1 0:7076676dd640 82
Ellor1 0:7076676dd640 83 // Start the timer
Ellor1 0:7076676dd640 84 LPC_CT32B0->TCR = CT32B0_TCR_CEN; // enable
Ellor1 0:7076676dd640 85
Ellor1 0:7076676dd640 86 }
Ellor1 0:7076676dd640 87
Ellor1 0:7076676dd640 88 void Capture::Start_2(void) {
Ellor1 0:7076676dd640 89 capturedata_2 = 0; // Clear the accumulator
Ellor1 0:7076676dd640 90 // No data ready
Ellor1 0:7076676dd640 91
Ellor1 0:7076676dd640 92 /* Enable interrupt for CAPTURE */
Ellor1 0:7076676dd640 93 NVIC_EnableIRQ(TIMER_32_1_IRQn);
Ellor1 0:7076676dd640 94
Ellor1 0:7076676dd640 95 // Start the timer
Ellor1 0:7076676dd640 96 LPC_CT32B1->TCR = CT32B1_TCR_CEN; // enable
Ellor1 0:7076676dd640 97
Ellor1 0:7076676dd640 98 }
Ellor1 0:7076676dd640 99
Ellor1 0:7076676dd640 100 /*********************************************************************//**
Ellor1 0:7076676dd640 101 * @brief Read (accumulated) sample count.
Ellor1 0:7076676dd640 102 *
Ellor1 0:7076676dd640 103 * @return (unsigned int) Accumulated capture value
Ellor1 0:7076676dd640 104 **********************************************************************/
Ellor1 0:7076676dd640 105
Ellor1 0:7076676dd640 106 unsigned int Capture::Debug(void) {
Ellor1 0:7076676dd640 107
Ellor1 0:7076676dd640 108 debug = LPC_IOCON->TMS_PIO0_12 ; // to check teh values in registers
Ellor1 0:7076676dd640 109
Ellor1 0:7076676dd640 110 return debug;
Ellor1 0:7076676dd640 111
Ellor1 0:7076676dd640 112 }
Ellor1 0:7076676dd640 113
Ellor1 0:7076676dd640 114 //unsigned int Capture::Read_1(void) {
Ellor1 0:7076676dd640 115 void Capture::Read_1(void) {
Ellor1 0:7076676dd640 116
Ellor1 0:7076676dd640 117 // static unsigned int i_1 = 0;
Ellor1 0:7076676dd640 118 i_1 = capturedata;
Ellor1 0:7076676dd640 119 // fall = ((i_1/48003280)*1000000);
Ellor1 0:7076676dd640 120 //test_1 = 101;
Ellor1 0:7076676dd640 121 // i_1 = capturedata_2;
Ellor1 0:7076676dd640 122
Ellor1 0:7076676dd640 123 // return capturedata;
Ellor1 0:7076676dd640 124
Ellor1 0:7076676dd640 125 }
Ellor1 0:7076676dd640 126
Ellor1 0:7076676dd640 127
Ellor1 0:7076676dd640 128 //unsigned int Capture::Read_2(void) {
Ellor1 0:7076676dd640 129 void Capture::Read_2(void) {
Ellor1 0:7076676dd640 130
Ellor1 0:7076676dd640 131 // static unsigned int j_1 = 0;
Ellor1 0:7076676dd640 132 j_1 = capturedata_2;
Ellor1 0:7076676dd640 133 // rise = ((j_1/48003280)*1000000);
Ellor1 0:7076676dd640 134 // test_2 = 105;
Ellor1 0:7076676dd640 135 // j_1 = capturedata_2;
Ellor1 0:7076676dd640 136
Ellor1 0:7076676dd640 137 //return capturedata_2;
Ellor1 0:7076676dd640 138
Ellor1 0:7076676dd640 139 }
Ellor1 0:7076676dd640 140
Ellor1 0:7076676dd640 141
Ellor1 0:7076676dd640 142 void Capture::Wait(void) {
Ellor1 0:7076676dd640 143
Ellor1 0:7076676dd640 144 led3 = !led3;
Ellor1 0:7076676dd640 145
Ellor1 0:7076676dd640 146 //Enable interrupt
Ellor1 0:7076676dd640 147 NVIC_EnableIRQ(TIMER_16_0_IRQn);
Ellor1 0:7076676dd640 148
Ellor1 0:7076676dd640 149 // Start the timer
Ellor1 0:7076676dd640 150 LPC_CT16B0->TCR = CT16B0_TCR_CEN; // enable
Ellor1 0:7076676dd640 151
Ellor1 0:7076676dd640 152 LPC_CT16B0->MR0 = 10000000;
Ellor1 0:7076676dd640 153
Ellor1 0:7076676dd640 154 }
Ellor1 0:7076676dd640 155
Ellor1 0:7076676dd640 156
Ellor1 0:7076676dd640 157
Ellor1 0:7076676dd640 158 /* Capture isr instantiator */
Ellor1 0:7076676dd640 159 void Capture::_Captureisr1(void)
Ellor1 0:7076676dd640 160 {
Ellor1 0:7076676dd640 161 instance->Captureisr1();
Ellor1 0:7076676dd640 162 }
Ellor1 0:7076676dd640 163
Ellor1 0:7076676dd640 164 /* Capture isr instantiator */
Ellor1 0:7076676dd640 165 void Capture::_Captureisr2(void)
Ellor1 0:7076676dd640 166 {
Ellor1 0:7076676dd640 167 instance->Captureisr2();
Ellor1 0:7076676dd640 168 }
Ellor1 0:7076676dd640 169
Ellor1 0:7076676dd640 170 /* Capture isr instantiator */
Ellor1 0:7076676dd640 171
Ellor1 0:7076676dd640 172
Ellor1 0:7076676dd640 173 void Capture::_Captureisr3(void)
Ellor1 0:7076676dd640 174 {
Ellor1 0:7076676dd640 175 instance->Captureisr3();
Ellor1 0:7076676dd640 176 }
Ellor1 0:7076676dd640 177
Ellor1 0:7076676dd640 178
Ellor1 0:7076676dd640 179 /*********************************************************************//**
Ellor1 0:7076676dd640 180 * @brief Capture interrupt service routine. Handles accumulation.
Ellor1 0:7076676dd640 181 *
Ellor1 0:7076676dd640 182 * @param[in] none
Ellor1 0:7076676dd640 183 *
Ellor1 0:7076676dd640 184 * @return none
Ellor1 0:7076676dd640 185 **********************************************************************/
Ellor1 0:7076676dd640 186 void Capture::Captureisr1(void) {
Ellor1 0:7076676dd640 187
Ellor1 0:7076676dd640 188 static int capturesum = 0; // Accumulates the readings
Ellor1 0:7076676dd640 189
Ellor1 0:7076676dd640 190 led = !led;
Ellor1 0:7076676dd640 191 capturesum = LPC_CT32B0->CR2;
Ellor1 0:7076676dd640 192 rise = (((float)capturesum/48003280)*1000000);
Ellor1 0:7076676dd640 193 // capturedata = 101;
Ellor1 0:7076676dd640 194 capturedata = capturesum;
Ellor1 0:7076676dd640 195 // rise = ((capturedata/48003280)*1000000);
Ellor1 0:7076676dd640 196 //test_1 = 101;
Ellor1 0:7076676dd640 197 LPC_CT32B0->IR |= CT32B0_IR_CR1INT;
Ellor1 0:7076676dd640 198
Ellor1 0:7076676dd640 199 return;
Ellor1 0:7076676dd640 200
Ellor1 0:7076676dd640 201 }
Ellor1 0:7076676dd640 202
Ellor1 0:7076676dd640 203 /*********************************************************************//**
Ellor1 0:7076676dd640 204 * @brief Capture interrupt service routine. Handles accumulation.
Ellor1 0:7076676dd640 205 *
Ellor1 0:7076676dd640 206 * @param[in] none
Ellor1 0:7076676dd640 207 *
Ellor1 0:7076676dd640 208 * @return none
Ellor1 0:7076676dd640 209 **********************************************************************/
Ellor1 0:7076676dd640 210 void Capture::Captureisr2(void) {
Ellor1 0:7076676dd640 211
Ellor1 0:7076676dd640 212 static int capturesum_2 = 0; // Accumulates the readings
Ellor1 0:7076676dd640 213
Ellor1 0:7076676dd640 214 led2 = !led2;
Ellor1 0:7076676dd640 215 capturesum_2 = LPC_CT32B1->CR0;
Ellor1 0:7076676dd640 216 // rise = capturesum_2;
Ellor1 0:7076676dd640 217 // rise_2 = ((rise/48003280)*1000000);
Ellor1 0:7076676dd640 218 //rise = ((capturesum_2/48003280)*1000000);
Ellor1 0:7076676dd640 219 capturedata_2 = capturesum_2;
Ellor1 0:7076676dd640 220
Ellor1 0:7076676dd640 221 fall = (((float)capturesum_2/48003280)*1000000);
Ellor1 0:7076676dd640 222 //test_2 = 105;
Ellor1 0:7076676dd640 223 LPC_CT32B1->IR |= CT32B1_IR_CR0INT;
Ellor1 0:7076676dd640 224
Ellor1 0:7076676dd640 225 return;
Ellor1 0:7076676dd640 226 }
Ellor1 0:7076676dd640 227
Ellor1 0:7076676dd640 228
Ellor1 0:7076676dd640 229
Ellor1 0:7076676dd640 230 void Capture::Captureisr3(void) {
Ellor1 0:7076676dd640 231
Ellor1 0:7076676dd640 232 NVIC_DisableIRQ(TIMER_32_0_IRQn);
Ellor1 0:7076676dd640 233 NVIC_DisableIRQ(TIMER_32_1_IRQn);
Ellor1 0:7076676dd640 234
Ellor1 0:7076676dd640 235 led4 = !led4;
Ellor1 0:7076676dd640 236 //m_1 = i_1 + j_1;
Ellor1 0:7076676dd640 237
Ellor1 0:7076676dd640 238 // ((i_1/48003280)*1000000);
Ellor1 0:7076676dd640 239 //rise = ((capturedata/48003280)*1000000);
Ellor1 0:7076676dd640 240
Ellor1 0:7076676dd640 241
Ellor1 0:7076676dd640 242
Ellor1 0:7076676dd640 243 //serial.printf("rise:%d \n\r", rise);
Ellor1 0:7076676dd640 244
Ellor1 0:7076676dd640 245
Ellor1 0:7076676dd640 246 //serial.printf("test_1:%d \n\r", test_1);
Ellor1 0:7076676dd640 247 // serial.printf("test_2:%d \n\r", test_2);
Ellor1 0:7076676dd640 248
Ellor1 0:7076676dd640 249 // serial.printf("rise:%d \n\r", rise);
Ellor1 0:7076676dd640 250 //serial.printf("rise_2:%d \n\r", rise_2);
Ellor1 0:7076676dd640 251
Ellor1 0:7076676dd640 252 //serial.printf("%.2f \n\r",ADCdata);
Ellor1 0:7076676dd640 253
Ellor1 0:7076676dd640 254 //serial.printf("fall:%d \n\r", fall);
Ellor1 0:7076676dd640 255 if (serial.writeable())
Ellor1 0:7076676dd640 256 {
Ellor1 0:7076676dd640 257 serial.printf("capturedata:%d \n\r", capturedata);
Ellor1 0:7076676dd640 258 serial.printf("fall:%f \n\r", rise);
Ellor1 0:7076676dd640 259 serial.printf("fall:%f \n\r", fall);
Ellor1 0:7076676dd640 260 serial.printf("i_1:%.8f \n\r\n", i_1);
Ellor1 0:7076676dd640 261 serial.printf("i:%.8f \n\r\n", ((i_1/48003280)*1000000));
Ellor1 0:7076676dd640 262
Ellor1 0:7076676dd640 263 }
Ellor1 0:7076676dd640 264 // serial.printf("j:%.8f \n\r\n", ((j_1/48003280)*1000000));
Ellor1 0:7076676dd640 265
Ellor1 0:7076676dd640 266 // serial.printf("i+j:%.8f \n\r\n", m_1);
Ellor1 0:7076676dd640 267
Ellor1 0:7076676dd640 268 NVIC_EnableIRQ(TIMER_32_0_IRQn);
Ellor1 0:7076676dd640 269 NVIC_EnableIRQ(TIMER_32_1_IRQn);
Ellor1 0:7076676dd640 270
Ellor1 0:7076676dd640 271 LPC_CT16B0->IR |= CT16B0_IR_MR0INT;
Ellor1 0:7076676dd640 272
Ellor1 0:7076676dd640 273 return;
Ellor1 0:7076676dd640 274
Ellor1 0:7076676dd640 275 }
Ellor1 0:7076676dd640 276
Ellor1 0:7076676dd640 277