Callum Ellor / PulseWidthCapture

Library to Capture the +ve and -ve Pulsewidth of a signal

Dependents:   PulseWidthCapture_Program

PulseWidthCapture.cpp@2:857c3c8e7a2f, 2014-12-11 (annotated)

Committer:
Ellor1
Date:
Thu Dec 11 08:59:09 2014 +0000
Revision:
2:857c3c8e7a2f
Parent:
1:6bb38ae2e503 
Pulse Width Capture;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Ellor1 2:857c3c8e7a2f 1 /* mbed Library - PulseWidthCapture
Ellor1 2:857c3c8e7a2f 2 * Copyright (c) 2014
Ellor1 2:857c3c8e7a2f 3 * released under MIT license http://mbed.org/licence/mit
Ellor1 2:857c3c8e7a2f 4 */
Ellor1 2:857c3c8e7a2f 5 /***********************************************************************//**
Ellor1 2:857c3c8e7a2f 6 * @file PulseWidthCapture.cpp
Ellor1 2:857c3c8e7a2f 7 * @brief cpp file for the PulseWidthCapture library.
Ellor1 2:857c3c8e7a2f 8 * @version 0.0
Ellor1 2:857c3c8e7a2f 9 * @date 03 Dec 2014
Ellor1 2:857c3c8e7a2f 10 * @author Callum Ellor
Ellor1 2:857c3c8e7a2f 11 **************************************************************************/
Ellor1 2:857c3c8e7a2f 12 /***************************************************************************
Ellor1 2:857c3c8e7a2f 13 * Revision Date Comments
Ellor1 2:857c3c8e7a2f 14 *---------- -------- -----------------------------------------------
Ellor1 2:857c3c8e7a2f 15 *
Ellor1 2:857c3c8e7a2f 16 * 0.0 03/12/14 Initial creation
Ellor1 2:857c3c8e7a2f 17 ***************************************************************************/
Ellor1 2:857c3c8e7a2f 18
Ellor1 0:7076676dd640 19 #include "mbed.h"
Ellor1 0:7076676dd640 20 #include "TextLCD_16x4.h"
Ellor1 0:7076676dd640 21 #include "USBSerial.h"
Ellor1 2:857c3c8e7a2f 22 #include "PulseWidthCapture.h"
Ellor1 0:7076676dd640 23
Ellor1 2:857c3c8e7a2f 24 //USBSerial serial;
Ellor1 1:6bb38ae2e503 25 TextLCD lcd(P0_21, P0_20, P1_15, P0_19, P0_5, P0_4, TextLCD::LCD16x4); // rs, e, d4, d5, d6, d7
Ellor1 1:6bb38ae2e503 26
Ellor1 2:857c3c8e7a2f 27 /*Status Led's to check that program is entering ISR's */
Ellor1 2:857c3c8e7a2f 28
Ellor1 0:7076676dd640 29 DigitalOut led(P0_9);
Ellor1 0:7076676dd640 30 DigitalOut led2(P0_8);
Ellor1 2:857c3c8e7a2f 31 //DigitalOut led3(P0_7);
Ellor1 0:7076676dd640 32 DigitalOut led4(P0_17);
Ellor1 0:7076676dd640 33
Ellor1 2:857c3c8e7a2f 34 AnalogIn Ain(P0_11);
Ellor1 0:7076676dd640 35
Ellor1 0:7076676dd640 36 Capture *Capture::instance;
Ellor1 0:7076676dd640 37
Ellor1 0:7076676dd640 38 /*********************************************************************//**
Ellor1 0:7076676dd640 39 * @brief Create a Capture object and configure it.
Ellor1 0:7076676dd640 40 * @param None Uses P1_29 as the Capture input (Pin 7)
Ellor1 0:7076676dd640 41 * @param None Uses P0_12 as the Capture input (Pin 16)
Ellor1 0:7076676dd640 42 * @return None
Ellor1 0:7076676dd640 43 **********************************************************************/
Ellor1 2:857c3c8e7a2f 44 Capture::Capture(void) //Capture Constructor
Ellor1 0:7076676dd640 45 {
Ellor1 2:857c3c8e7a2f 46
Ellor1 2:857c3c8e7a2f 47 /* Configure registers */
Ellor1 2:857c3c8e7a2f 48
Ellor1 2:857c3c8e7a2f 49 /* Set up clock and power, using default peripheral system clock divider */ // See page 30 of the 11U24 User Guide
Ellor1 0:7076676dd640 50
Ellor1 2:857c3c8e7a2f 51 LPC_SYSCON->SYSAHBCLKCTRL |= CT32B0_CLK_ENABLE; // setup 32 bit Timer 0 Clock
Ellor1 0:7076676dd640 52
Ellor1 2:857c3c8e7a2f 53 LPC_SYSCON->SYSAHBCLKCTRL |= CT32B1_CLK_ENABLE; // setup 32 bit Timer 1 Clock
Ellor1 2:857c3c8e7a2f 54
Ellor1 2:857c3c8e7a2f 55 LPC_SYSCON->SYSAHBCLKCTRL |= CT16B0_CLK_ENABLE; // setup 16 bit Timer 0 Clock
Ellor1 0:7076676dd640 56
Ellor1 2:857c3c8e7a2f 57 LPC_CT32B0->PR = 0; // set Prescale to 0 to use 48MHz Clock
Ellor1 2:857c3c8e7a2f 58 LPC_CT32B1->PR = 0; // set Prescale to 0 to use 48MHz Clock
Ellor1 2:857c3c8e7a2f 59 LPC_CT16B0->PR = 1000; // set Prescale to 1000 to use 48KHz Clock
Ellor1 2:857c3c8e7a2f 60
Ellor1 2:857c3c8e7a2f 61 /* Configure IOCON for the proper function of the capture pin. Setup PIO1_29 for Capture */
Ellor1 2:857c3c8e7a2f 62 LPC_IOCON->PIO1_29 = (CT32B0_CAP1); // See page 125 of the 11U24 User Guide
Ellor1 2:857c3c8e7a2f 63
Ellor1 2:857c3c8e7a2f 64 /* Configure IOCON. Setup TMS_PIO0_12 for Capture mode, also set up for Digital Function mode */
Ellor1 2:857c3c8e7a2f 65 LPC_IOCON->TMS_PIO0_12 = CT32B1_CAP0 | ADMODE; // See page 94 of the 11U24 User Guide
Ellor1 2:857c3c8e7a2f 66
Ellor1 2:857c3c8e7a2f 67 // Select the capture edge and interrupt mode
Ellor1 2:857c3c8e7a2f 68 /* will start capturing on the rising edge of CT32B0_CAP1 (P1_29) will also generate an interrupt */
Ellor1 2:857c3c8e7a2f 69 LPC_CT32B0->CCR = CCR_CAP1RE | CCR_CAP1I; // See page 357 of the 11U24 User Guide
Ellor1 2:857c3c8e7a2f 70
Ellor1 2:857c3c8e7a2f 71 /* will start capturing on the falling edge of CT32B1_CAP0 (TMS_P0_12) will also generate an interrupt */
Ellor1 2:857c3c8e7a2f 72 LPC_CT32B1->CCR = CCR_CAP0FE | CCR_CAP0I; // See page 356 of the 11U24 User Guide
Ellor1 0:7076676dd640 73
Ellor1 2:857c3c8e7a2f 74 /* Setup match register for 16 bit timer. will interrupt when value in MR0 matches the value in the Timer Counter TC
Ellor1 2:857c3c8e7a2f 75 will also reset the timer TC when the value in MR0 is matched*/
Ellor1 0:7076676dd640 76
Ellor1 2:857c3c8e7a2f 77 LPC_CT16B0->MCR = CT16B0_MR0I | CT16B0_MR0R; // See page 337 of the 11U24 User Guide
Ellor1 2:857c3c8e7a2f 78
Ellor1 2:857c3c8e7a2f 79 // Set up the Count Control Register for Timer mode, and to clear the timer on a falling edge
Ellor1 2:857c3c8e7a2f 80 LPC_CT32B0->CTCR = CT32B0_CTCR_CTM_TIMER | CT32B0_CTCR_ENCC | CT32B0_CTCR_SEICC_CAP1FE; // See page 361 of the 11U24 User Guide
Ellor1 0:7076676dd640 81
Ellor1 2:857c3c8e7a2f 82 // Set up the Count Control Register for Timer mode, and to clear the timer on a rising edge
Ellor1 2:857c3c8e7a2f 83 LPC_CT32B1->CTCR = CT32B1_CTCR_CTM_TIMER | CT32B1_CTCR_ENCC | CT32B1_CTCR_SEICC_CAP0RE;// See page 362 of the 11U24 User Guide
Ellor1 0:7076676dd640 84
Ellor1 2:857c3c8e7a2f 85 // Clear interrupt flags
Ellor1 2:857c3c8e7a2f 86 LPC_CT32B0->IR = CT32B0_IR_CR1INT; // See page 353 of the 11U24 User Guide
Ellor1 0:7076676dd640 87
Ellor1 2:857c3c8e7a2f 88 LPC_CT32B1->IR = CT32B1_IR_CR0INT; // See page 353 of the 11U24 User Guide
Ellor1 0:7076676dd640 89
Ellor1 2:857c3c8e7a2f 90 LPC_CT16B0->IR = CT16B0_IR_MR0INT; // See page 335 of the 11U24 User Guide
Ellor1 0:7076676dd640 91
Ellor1 0:7076676dd640 92
Ellor1 0:7076676dd640 93 //* Attach IRQ
Ellor1 2:857c3c8e7a2f 94 instance = this;
Ellor1 2:857c3c8e7a2f 95 NVIC_SetVector(TIMER_32_0_IRQn, (uint32_t)&_Fall_ISR); //setuip ISR's
Ellor1 2:857c3c8e7a2f 96 NVIC_SetVector(TIMER_32_1_IRQn, (uint32_t)&_Rise_ISR);
Ellor1 2:857c3c8e7a2f 97 NVIC_SetVector(TIMER_16_0_IRQn, (uint32_t)&_Wait_ISR);
Ellor1 0:7076676dd640 98
Ellor1 0:7076676dd640 99 }
Ellor1 0:7076676dd640 100
Ellor1 0:7076676dd640 101 /*********************************************************************//**
Ellor1 2:857c3c8e7a2f 102 * @brief Start capturing data. Enable 32 Bit Timer 0 & Timer 1 for interrupt an start the timer
Ellor1 0:7076676dd640 103 **********************************************************************/
Ellor1 0:7076676dd640 104 void Capture::Start_1(void) {
Ellor1 2:857c3c8e7a2f 105
Ellor1 0:7076676dd640 106 /* Enable interrupt for CAPTURE */
Ellor1 0:7076676dd640 107 NVIC_EnableIRQ(TIMER_32_0_IRQn);
Ellor1 0:7076676dd640 108
Ellor1 0:7076676dd640 109 // Start the timer
Ellor1 2:857c3c8e7a2f 110 LPC_CT32B0->TCR = CT32B0_TCR_CEN; // enable. See page 354 of the 11U24 User Guide
Ellor1 0:7076676dd640 111
Ellor1 0:7076676dd640 112 }
Ellor1 0:7076676dd640 113
Ellor1 0:7076676dd640 114 void Capture::Start_2(void) {
Ellor1 2:857c3c8e7a2f 115
Ellor1 0:7076676dd640 116 /* Enable interrupt for CAPTURE */
Ellor1 0:7076676dd640 117 NVIC_EnableIRQ(TIMER_32_1_IRQn);
Ellor1 0:7076676dd640 118
Ellor1 0:7076676dd640 119 // Start the timer
Ellor1 0:7076676dd640 120 LPC_CT32B1->TCR = CT32B1_TCR_CEN; // enable
Ellor1 0:7076676dd640 121
Ellor1 0:7076676dd640 122 }
Ellor1 0:7076676dd640 123
Ellor1 0:7076676dd640 124 /*********************************************************************//**
Ellor1 2:857c3c8e7a2f 125 Debug code to test what values are in certain registers when writing the program
Ellor1 0:7076676dd640 126 **********************************************************************/
Ellor1 0:7076676dd640 127
Ellor1 0:7076676dd640 128 unsigned int Capture::Debug(void) {
Ellor1 0:7076676dd640 129
Ellor1 2:857c3c8e7a2f 130 debug = LPC_IOCON->TMS_PIO0_12 ; // to check the values in registers (This example checks whats in register the IOCON register for TMS_PIO0_12
Ellor1 0:7076676dd640 131
Ellor1 0:7076676dd640 132 return debug;
Ellor1 0:7076676dd640 133
Ellor1 0:7076676dd640 134 }
Ellor1 0:7076676dd640 135
Ellor1 2:857c3c8e7a2f 136 /*********************************************************************//**
Ellor1 2:857c3c8e7a2f 137 Wait function that interrupts the program once the value in the match register matches whats in the TC register. This then jumps to the
Ellor1 2:857c3c8e7a2f 138 Wait_ISR routine which displays the data to the screen or LCD
Ellor1 2:857c3c8e7a2f 139 **********************************************************************/
Ellor1 0:7076676dd640 140
Ellor1 2:857c3c8e7a2f 141
Ellor1 0:7076676dd640 142 void Capture::Wait(void) {
Ellor1 0:7076676dd640 143
Ellor1 2:857c3c8e7a2f 144 //led3 = !led3;
Ellor1 0:7076676dd640 145
Ellor1 0:7076676dd640 146 //Enable interrupt
Ellor1 2:857c3c8e7a2f 147 NVIC_EnableIRQ(TIMER_16_0_IRQn); //Enable 16 bit timer 0 for interrupt
Ellor1 0:7076676dd640 148
Ellor1 0:7076676dd640 149 // Start the timer
Ellor1 0:7076676dd640 150 LPC_CT16B0->TCR = CT16B0_TCR_CEN; // enable
Ellor1 2:857c3c8e7a2f 151
Ellor1 1:6bb38ae2e503 152 LPC_CT16B0->MR0 = 1000000000;
Ellor1 0:7076676dd640 153
Ellor1 0:7076676dd640 154 }
Ellor1 0:7076676dd640 155
Ellor1 2:857c3c8e7a2f 156 /* Capture Fall_ISR instantiator */
Ellor1 2:857c3c8e7a2f 157 void Capture::_Fall_ISR(void)
Ellor1 0:7076676dd640 158 {
Ellor1 2:857c3c8e7a2f 159 instance->Fall_ISR();
Ellor1 0:7076676dd640 160 }
Ellor1 0:7076676dd640 161
Ellor1 2:857c3c8e7a2f 162 /* Capture Rise_ISR instantiator */
Ellor1 2:857c3c8e7a2f 163 void Capture::_Rise_ISR(void)
Ellor1 0:7076676dd640 164 {
Ellor1 2:857c3c8e7a2f 165 instance->Rise_ISR();
Ellor1 0:7076676dd640 166 }
Ellor1 0:7076676dd640 167
Ellor1 2:857c3c8e7a2f 168 /* Capture Wait_ISR instantiator */
Ellor1 0:7076676dd640 169
Ellor1 2:857c3c8e7a2f 170 void Capture::_Wait_ISR(void)
Ellor1 0:7076676dd640 171 {
Ellor1 2:857c3c8e7a2f 172 instance->Wait_ISR();
Ellor1 0:7076676dd640 173 }
Ellor1 0:7076676dd640 174
Ellor1 0:7076676dd640 175
Ellor1 0:7076676dd640 176 /*********************************************************************//**
Ellor1 2:857c3c8e7a2f 177 * @brief Capture interrupt service routine for falling edge.
Ellor1 0:7076676dd640 178 **********************************************************************/
Ellor1 2:857c3c8e7a2f 179 void Capture::Fall_ISR(void) {
Ellor1 0:7076676dd640 180
Ellor1 2:857c3c8e7a2f 181 static int capturesum = 0; // set variable capturesum to 0
Ellor1 0:7076676dd640 182
Ellor1 2:857c3c8e7a2f 183 led = !led; // status led to check that program has entered ISR
Ellor1 2:857c3c8e7a2f 184 capturesum = LPC_CT32B0->CR2; // read the value in LPC_CT32B0->CR2 and store in variable 'capturesum'
Ellor1 2:857c3c8e7a2f 185 // It is necessary to use "CR2" in order to get the proper
Ellor1 2:857c3c8e7a2f 186 // offset from the base address (an issue with CMSIS)
Ellor1 2:857c3c8e7a2f 187 fall = (((float)capturesum/48003280)*1000000); // Convert the value in the capture register into a value in us. the internal clock
Ellor1 2:857c3c8e7a2f 188 // was measured at 48003280 so this has been used for the calculations.
Ellor1 2:857c3c8e7a2f 189 // It is neccessary to assign the 'float' data type to 'capturesum' at this point
Ellor1 2:857c3c8e7a2f 190 // otherwise the variable fall which has been set to float will return a value of 0.
Ellor1 2:857c3c8e7a2f 191
Ellor1 2:857c3c8e7a2f 192 LPC_CT32B0->IR |= CT32B0_IR_CR1INT; // Clear the interrupt
Ellor1 0:7076676dd640 193
Ellor1 0:7076676dd640 194 return;
Ellor1 0:7076676dd640 195
Ellor1 0:7076676dd640 196 }
Ellor1 0:7076676dd640 197
Ellor1 0:7076676dd640 198 /*********************************************************************//**
Ellor1 2:857c3c8e7a2f 199 * @brief Capture interrupt service routine for rising edge.
Ellor1 0:7076676dd640 200 **********************************************************************/
Ellor1 2:857c3c8e7a2f 201 void Capture::Rise_ISR(void) {
Ellor1 0:7076676dd640 202
Ellor1 0:7076676dd640 203 static int capturesum_2 = 0; // Accumulates the readings
Ellor1 0:7076676dd640 204
Ellor1 0:7076676dd640 205 led2 = !led2;
Ellor1 0:7076676dd640 206 capturesum_2 = LPC_CT32B1->CR0;
Ellor1 2:857c3c8e7a2f 207 rise = (((float)capturesum_2/48003280)*1000000);
Ellor1 0:7076676dd640 208 LPC_CT32B1->IR |= CT32B1_IR_CR0INT;
Ellor1 0:7076676dd640 209
Ellor1 0:7076676dd640 210 return;
Ellor1 0:7076676dd640 211 }
Ellor1 0:7076676dd640 212
Ellor1 2:857c3c8e7a2f 213 /*********************************************************************//**
Ellor1 2:857c3c8e7a2f 214 * @brief Wait interrupt service routine to display the results to a screen/lcd at set intervals
Ellor1 2:857c3c8e7a2f 215 **********************************************************************/
Ellor1 0:7076676dd640 216
Ellor1 2:857c3c8e7a2f 217 void Capture::Wait_ISR(void) {
Ellor1 0:7076676dd640 218
Ellor1 2:857c3c8e7a2f 219 NVIC_DisableIRQ(TIMER_32_0_IRQn); //disable 32 bit timer 0 interrupt so that the Wait_ISR can continue uninterrupted
Ellor1 2:857c3c8e7a2f 220 NVIC_DisableIRQ(TIMER_32_1_IRQn); //disable 32 bit timer 1 interrupt so that the Wait_ISR can continue uninterrupted
Ellor1 0:7076676dd640 221
Ellor1 2:857c3c8e7a2f 222 led4 = !led4; // status led to test that Wait_ISR is being entered
Ellor1 0:7076676dd640 223
Ellor1 2:857c3c8e7a2f 224 period = rise + fall; // calculation for period
Ellor1 2:857c3c8e7a2f 225 // freq = (1/(float)period)*1000000; // calculation for frequency (not required)
Ellor1 2:857c3c8e7a2f 226 ADCdata = Ain * 10; // calculation to convert ADC value to 10V
Ellor1 0:7076676dd640 227
Ellor1 2:857c3c8e7a2f 228 /* if (freq < 1000) { // unit conversion for frequency
Ellor1 2:857c3c8e7a2f 229 freq_unit = "Hz";
Ellor1 2:857c3c8e7a2f 230 freq1 = freq;
Ellor1 2:857c3c8e7a2f 231 }
Ellor1 2:857c3c8e7a2f 232 else if (freq > 1000) {
Ellor1 2:857c3c8e7a2f 233 freq1 = freq/1000;
Ellor1 2:857c3c8e7a2f 234 freq_unit = "KHz";
Ellor1 2:857c3c8e7a2f 235 }
Ellor1 2:857c3c8e7a2f 236 */
Ellor1 2:857c3c8e7a2f 237
Ellor1 2:857c3c8e7a2f 238 if (period < 1000) { // unit conversion for period
Ellor1 2:857c3c8e7a2f 239 per_sec_unit = "us";
Ellor1 2:857c3c8e7a2f 240 period1 = period;
Ellor1 2:857c3c8e7a2f 241 }
Ellor1 2:857c3c8e7a2f 242 else if (period > 1000) {
Ellor1 2:857c3c8e7a2f 243 period1 = period/1000;
Ellor1 2:857c3c8e7a2f 244 per_sec_unit = "ms";
Ellor1 2:857c3c8e7a2f 245 }
Ellor1 2:857c3c8e7a2f 246
Ellor1 2:857c3c8e7a2f 247 if (rise < 1000) { //unit conversion for +ve Pulsewidth
Ellor1 2:857c3c8e7a2f 248 rise_sec_unit = "us";
Ellor1 2:857c3c8e7a2f 249 rise1 = rise;
Ellor1 0:7076676dd640 250
Ellor1 2:857c3c8e7a2f 251 }
Ellor1 2:857c3c8e7a2f 252 else if (rise > 1000) {
Ellor1 2:857c3c8e7a2f 253 rise1 = rise/1000;
Ellor1 2:857c3c8e7a2f 254 rise_sec_unit = "ms";
Ellor1 2:857c3c8e7a2f 255 }
Ellor1 2:857c3c8e7a2f 256
Ellor1 2:857c3c8e7a2f 257 if (fall < 1000) { //unit conversion for -ve Pulsewidth
Ellor1 2:857c3c8e7a2f 258 fall_sec_unit = "us";
Ellor1 2:857c3c8e7a2f 259 fall1 = fall;
Ellor1 2:857c3c8e7a2f 260 }
Ellor1 2:857c3c8e7a2f 261 else if (fall > 1000) {
Ellor1 2:857c3c8e7a2f 262 fall1 = fall/1000;
Ellor1 2:857c3c8e7a2f 263 fall_sec_unit = "ms";
Ellor1 2:857c3c8e7a2f 264 }
Ellor1 2:857c3c8e7a2f 265
Ellor1 2:857c3c8e7a2f 266 /* Display Rise, Fall, Period and Voltage to LCD screen */
Ellor1 2:857c3c8e7a2f 267
Ellor1 2:857c3c8e7a2f 268 lcd.locate(0,0);
Ellor1 2:857c3c8e7a2f 269 lcd.printf("Rise:");
Ellor1 1:6bb38ae2e503 270 lcd.locate(0,1);
Ellor1 2:857c3c8e7a2f 271 lcd.printf("Fall:");
Ellor1 1:6bb38ae2e503 272 lcd.locate(0,2);
Ellor1 2:857c3c8e7a2f 273 lcd.printf("Per:");
Ellor1 1:6bb38ae2e503 274 lcd.locate(0,3);
Ellor1 2:857c3c8e7a2f 275 lcd.printf("Voltage:");
Ellor1 2:857c3c8e7a2f 276 // lcd.printf("Freq:");
Ellor1 1:6bb38ae2e503 277
Ellor1 1:6bb38ae2e503 278
Ellor1 1:6bb38ae2e503 279
Ellor1 2:857c3c8e7a2f 280 /* These values are the ones that change over the course of the program so they have been put seprately to the values above
Ellor1 2:857c3c8e7a2f 281 Because individual lines on the LCD can't be cleared due to limitaions of the hardware to clear an individual line write blanks to the display
Ellor1 2:857c3c8e7a2f 282 for eg. lcd.printf(" ");
Ellor1 2:857c3c8e7a2f 283 */
Ellor1 2:857c3c8e7a2f 284
Ellor1 2:857c3c8e7a2f 285
Ellor1 2:857c3c8e7a2f 286 lcd.locate(5,0);
Ellor1 2:857c3c8e7a2f 287 lcd.printf("%.2f", rise1);
Ellor1 2:857c3c8e7a2f 288 lcd.locate(14,0);
Ellor1 2:857c3c8e7a2f 289 lcd.printf("%s", rise_sec_unit);
Ellor1 2:857c3c8e7a2f 290 lcd.locate(5,1);
Ellor1 2:857c3c8e7a2f 291 lcd.printf("%.2f", fall1);
Ellor1 2:857c3c8e7a2f 292 lcd.locate(14,1);
Ellor1 2:857c3c8e7a2f 293 lcd.printf("%s", fall_sec_unit);
Ellor1 2:857c3c8e7a2f 294 lcd.locate(4,2);
Ellor1 2:857c3c8e7a2f 295 lcd.printf("%.2f", period1);
Ellor1 2:857c3c8e7a2f 296 lcd.locate(14,2);
Ellor1 2:857c3c8e7a2f 297 lcd.printf("%s", per_sec_unit);
Ellor1 2:857c3c8e7a2f 298 lcd.locate(8,3);
Ellor1 2:857c3c8e7a2f 299 lcd.printf("%.2f", ADCdata);
Ellor1 2:857c3c8e7a2f 300 lcd.locate(15,3);
Ellor1 2:857c3c8e7a2f 301 lcd.printf("V");
Ellor1 2:857c3c8e7a2f 302 //lcd.printf("%.2f %s", freq1, freq_unit);
Ellor1 1:6bb38ae2e503 303
Ellor1 0:7076676dd640 304
Ellor1 2:857c3c8e7a2f 305
Ellor1 2:857c3c8e7a2f 306 //if (serial.writeable()) // write values to serial (some issues seen with serial where the serial port hangs causing
Ellor1 2:857c3c8e7a2f 307 // the program not to work. Sometimes works and sometimes it doesn't
Ellor1 2:857c3c8e7a2f 308 //{
Ellor1 2:857c3c8e7a2f 309
Ellor1 2:857c3c8e7a2f 310 //serial.printf("rise:%f \n\r", rise);
Ellor1 2:857c3c8e7a2f 311 // serial.printf("fall:%f \n\r", fall);
Ellor1 2:857c3c8e7a2f 312 // serial.printf("period:%f \n\r", period);
Ellor1 2:857c3c8e7a2f 313 //serial.printf("freq:%f \n\r", freq);
Ellor1 2:857c3c8e7a2f 314 //serial.printf("ADC:%f \n\r", ADCdata);
Ellor1 2:857c3c8e7a2f 315 //serial.printf("hello");
Ellor1 2:857c3c8e7a2f 316 // }
Ellor1 2:857c3c8e7a2f 317
Ellor1 2:857c3c8e7a2f 318 NVIC_EnableIRQ(TIMER_32_0_IRQn); //re-enable 32 bit timer 0 for interrupts
Ellor1 2:857c3c8e7a2f 319 NVIC_EnableIRQ(TIMER_32_1_IRQn); //re-enable 32 bit timer 1 for interrupts
Ellor1 2:857c3c8e7a2f 320
Ellor1 2:857c3c8e7a2f 321 LPC_CT16B0->IR |= CT16B0_IR_MR0INT; // Clear the interrupt
Ellor1 0:7076676dd640 322
Ellor1 0:7076676dd640 323 return;
Ellor1 0:7076676dd640 324
Ellor1 0:7076676dd640 325 }
Ellor1 0:7076676dd640 326
Ellor1 0:7076676dd640 327