Vekatech / VK_RZ_A1H_LCD_demo

Lcd companion boards support (VKLCD50RTA & VKLCD70RT)

What is this ?

This is a demo program using Renesas RGA library & USB Camera to demonstrate VK-RZ/A1H's companion boards workability.

Supported companion Boards:

VKLCD50RTA

/media/uploads/tvendov/front_view_hmi_50.png /media/uploads/tvendov/side_view_hmi_50.png

VKLCD70RT

/media/uploads/tvendov/front_view_hmi_70.png/media/uploads/tvendov/side_view_hmi_70.png /media/uploads/tvendov/front_view_lvds.png/media/uploads/tvendov/back_view_lvds.png

How to Configure ?

You can choose which display is installed by altering the lcd_panel.h file

Leave the active one & comment out the others:

#define     LCD_VDC5_CH0_PANEL                  LCD_CH0_PANEL_VKLCD50RTA
//#define     LCD_VDC5_CH0_PANEL                  LCD_CH0_PANEL_VKLCD70RT

You can alter the whole demo with your pictures if you like:

How to compile ?

  • The Demo can be compiled in 3 modes:
    • I. Execution from the internal 10-MB on-chip SRAM.
      • After import in the online compiler just leave only the VKRZA1H_RAM.sct & delete all others linker files in the TOOLCHAIN_ARM_STD folder.
      • Save the result binary in the SD Card (<SD>:\vkrza1\lcd_sample ), altering vkrza1h.ini by this way
    • II. Execution from the on-board serial FALSH in dual (32-MB) mode.
      • After import in the online compiler just leave only the VKRZA1H_DOUBLE.sct & delete all others linker files in the TOOLCHAIN_ARM_STD folder.
      • Drag & drop the result binary in MBED disk, (previously inited in double flash mode)
    • III. Execution from the on-board serial FALSH in single (16-MB) mode.
      • After import in the online compiler just leave only the VKRZA1H_SINGLE.sct & delete all others linker files in the TOOLCHAIN_ARM_STD folder.
      • Drag & drop the result binary in MBED disk, (previously inited in single flash mode )

Quick presentation:

Other demos ?

More demos you can find on our FTP

RGA/video/DisplayBase.cpp@0:6435b67ad23c, 2017-02-16 (annotated)

Committer:
tvendov
Date:
Thu Feb 16 10:23:48 2017 +0000
Revision:
0:6435b67ad23c
Initial lcd support (VKLCD50RTA & VKLCD70RT companion boards)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tvendov 0:6435b67ad23c 1 /*******************************************************************************
tvendov 0:6435b67ad23c 2 * DISCLAIMER
tvendov 0:6435b67ad23c 3 * This software is supplied by Renesas Electronics Corporation and is only
tvendov 0:6435b67ad23c 4 * intended for use with Renesas products. No other uses are authorized. This
tvendov 0:6435b67ad23c 5 * software is owned by Renesas Electronics Corporation and is protected under
tvendov 0:6435b67ad23c 6 * all applicable laws, including copyright laws.
tvendov 0:6435b67ad23c 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
tvendov 0:6435b67ad23c 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
tvendov 0:6435b67ad23c 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
tvendov 0:6435b67ad23c 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
tvendov 0:6435b67ad23c 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
tvendov 0:6435b67ad23c 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
tvendov 0:6435b67ad23c 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
tvendov 0:6435b67ad23c 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
tvendov 0:6435b67ad23c 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
tvendov 0:6435b67ad23c 16 * Renesas reserves the right, without notice, to make changes to this software
tvendov 0:6435b67ad23c 17 * and to discontinue the availability of this software. By using this software,
tvendov 0:6435b67ad23c 18 * you agree to the additional terms and conditions found by accessing the
tvendov 0:6435b67ad23c 19 * following link:
tvendov 0:6435b67ad23c 20 * http://www.renesas.com/disclaimer
tvendov 0:6435b67ad23c 21 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved.
tvendov 0:6435b67ad23c 22 *******************************************************************************/
tvendov 0:6435b67ad23c 23 #include <string.h>
tvendov 0:6435b67ad23c 24 #include "DisplayBace.h"
tvendov 0:6435b67ad23c 25 #include "vdc5.h"
tvendov 0:6435b67ad23c 26
tvendov 0:6435b67ad23c 27 /**************************************************************************//**
tvendov 0:6435b67ad23c 28 * @brief Constructor of the DisplayBase class
tvendov 0:6435b67ad23c 29 * @param[in] None
tvendov 0:6435b67ad23c 30 * @retval None
tvendov 0:6435b67ad23c 31 ******************************************************************************/
tvendov 0:6435b67ad23c 32 DisplayBase::DisplayBase( void )
tvendov 0:6435b67ad23c 33 {
tvendov 0:6435b67ad23c 34 /* Lcd setting (default) */
tvendov 0:6435b67ad23c 35 _lcd_config.lcd_type = LCD_TYPE_PARALLEL_RGB; /* LVDS or Pararel RGB */
tvendov 0:6435b67ad23c 36 _lcd_config.intputClock = 66.67f; /* P1 clk [MHz] ex. 66.67 */
tvendov 0:6435b67ad23c 37 _lcd_config.outputClock = 40.00f; /* LCD clk [MHz] ex. 33.33 */
tvendov 0:6435b67ad23c 38
tvendov 0:6435b67ad23c 39 _lcd_config.lcd_outformat = LCD_OUTFORMAT_RGB888; /* Output format select */
tvendov 0:6435b67ad23c 40 _lcd_config.lcd_edge = EDGE_FALLING; /* Output phase control of LCD_DATA23 to LCD_DATA0 pin */
tvendov 0:6435b67ad23c 41
tvendov 0:6435b67ad23c 42 _lcd_config.h_toatal_period = (800u + 40u + 128u+ 88u); /* Free-running Hsync period */
tvendov 0:6435b67ad23c 43 _lcd_config.v_toatal_period = (600u + 1u + 4u + 23u); /* Free-running Vsync period */
tvendov 0:6435b67ad23c 44 _lcd_config.h_disp_widht = 800u; /* LCD display area size, horizontal width */
tvendov 0:6435b67ad23c 45 _lcd_config.v_disp_widht = 600u; /* LCD display area size, vertical width */
tvendov 0:6435b67ad23c 46 _lcd_config.h_back_porch = (128u+ 88u); /* LCD display horizontal back porch period */
tvendov 0:6435b67ad23c 47 _lcd_config.v_back_porch = (4u + 23u); /* LCD display vertical back porch period */
tvendov 0:6435b67ad23c 48
tvendov 0:6435b67ad23c 49 _lcd_config.h_sync_port = LCD_TCON_PIN_0; /* TCONn or Not use(-1) */
tvendov 0:6435b67ad23c 50 _lcd_config.h_sync_port_polarity = SIG_POL_NOT_INVERTED; /* Polarity inversion control of signal */
tvendov 0:6435b67ad23c 51 _lcd_config.h_sync_width = 128u; /* Hsync width */
tvendov 0:6435b67ad23c 52
tvendov 0:6435b67ad23c 53 _lcd_config.v_sync_port = LCD_TCON_PIN_1; /* TCONn or Not use(-1) */
tvendov 0:6435b67ad23c 54 _lcd_config.v_sync_port_polarity = SIG_POL_NOT_INVERTED; /* Polarity inversion control of signal */
tvendov 0:6435b67ad23c 55 _lcd_config.v_sync_width = 4u; /* Vsync width */
tvendov 0:6435b67ad23c 56
tvendov 0:6435b67ad23c 57 _lcd_config.de_port = LCD_TCON_PIN_NON; /* TCONn or Not use(-1) */
tvendov 0:6435b67ad23c 58 _lcd_config.de_port_polarity = SIG_POL_NOT_INVERTED; /* Polarity inversion control of signal */
tvendov 0:6435b67ad23c 59
tvendov 0:6435b67ad23c 60 /* Digital video input setting (default) */
tvendov 0:6435b67ad23c 61 _video_input_sel = INPUT_SEL_VDEC; /* Video decoder output signals */
tvendov 0:6435b67ad23c 62 _video_ext_in_config.inp_format = VIDEO_EXTIN_FORMAT_BT601;
tvendov 0:6435b67ad23c 63 _video_ext_in_config.inp_pxd_edge = EDGE_RISING; /* Clock edge select for capturing data */
tvendov 0:6435b67ad23c 64 _video_ext_in_config.inp_vs_edge = EDGE_RISING; /* Clock edge select for capturing Vsync signals */
tvendov 0:6435b67ad23c 65 _video_ext_in_config.inp_hs_edge = EDGE_RISING; /* Clock edge select for capturing Hsync signals */
tvendov 0:6435b67ad23c 66 _video_ext_in_config.inp_endian_on = OFF; /* External input bit endian change on/off */
tvendov 0:6435b67ad23c 67 _video_ext_in_config.inp_swap_on = OFF; /* External input B/R signal swap on/off */
tvendov 0:6435b67ad23c 68 _video_ext_in_config.inp_vs_inv = SIG_POL_NOT_INVERTED; /* External input DV_VSYNC inversion control */
tvendov 0:6435b67ad23c 69 _video_ext_in_config.inp_hs_inv = SIG_POL_INVERTED; /* External input DV_HSYNC inversion control */
tvendov 0:6435b67ad23c 70 _video_ext_in_config.inp_f525_625 = EXTIN_LINE_525; /* Number of lines for BT.656 external input */
tvendov 0:6435b67ad23c 71 _video_ext_in_config.inp_h_pos = EXTIN_H_POS_CRYCBY; /* Y/Cb/Y/Cr data string start timing to Hsync reference */
tvendov 0:6435b67ad23c 72 _video_ext_in_config.cap_vs_pos = 6u; /* Capture start position from Vsync */
tvendov 0:6435b67ad23c 73 _video_ext_in_config.cap_hs_pos = 302u; /* Capture start position form Hsync */
tvendov 0:6435b67ad23c 74 _video_ext_in_config.cap_width = 640u; /* Capture width */
tvendov 0:6435b67ad23c 75 _video_ext_in_config.cap_height = 468u; /* Capture height should be a multiple of 4 */
tvendov 0:6435b67ad23c 76 } /* End of constructor method () */
tvendov 0:6435b67ad23c 77
tvendov 0:6435b67ad23c 78 /**************************************************************************//**
tvendov 0:6435b67ad23c 79 * @brief Graphics initialization processing
tvendov 0:6435b67ad23c 80 * @param[in] lcd_config : LCD configuration
tvendov 0:6435b67ad23c 81 * @retval error code
tvendov 0:6435b67ad23c 82 ******************************************************************************/
tvendov 0:6435b67ad23c 83 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 84 DisplayBase::Graphics_init( lcd_config_t * lcd_config )
tvendov 0:6435b67ad23c 85 {
tvendov 0:6435b67ad23c 86 if( lcd_config != NULL ) {
tvendov 0:6435b67ad23c 87 _lcd_config.lcd_type = lcd_config->lcd_type; /* LVDS or Pararel RGB */
tvendov 0:6435b67ad23c 88 _lcd_config.intputClock = lcd_config->intputClock; /* P1 clk [MHz] ex. 66.67 */
tvendov 0:6435b67ad23c 89 _lcd_config.outputClock = lcd_config->outputClock; /* LCD clk [MHz] ex. 33.33 */
tvendov 0:6435b67ad23c 90
tvendov 0:6435b67ad23c 91 _lcd_config.lcd_outformat = lcd_config->lcd_outformat; /* Output format select */
tvendov 0:6435b67ad23c 92 _lcd_config.lcd_edge = lcd_config->lcd_edge; /* Output phase control of LCD_DATA23 to LCD_DATA0 pin */
tvendov 0:6435b67ad23c 93
tvendov 0:6435b67ad23c 94 _lcd_config.h_toatal_period = lcd_config->h_toatal_period; /* Free-running Hsync period */
tvendov 0:6435b67ad23c 95 _lcd_config.v_toatal_period = lcd_config->v_toatal_period; /* Free-running Vsync period */
tvendov 0:6435b67ad23c 96 _lcd_config.h_disp_widht = lcd_config->h_disp_widht; /* LCD display area size, horizontal width */
tvendov 0:6435b67ad23c 97 _lcd_config.v_disp_widht = lcd_config->v_disp_widht; /* LCD display area size, vertical width */
tvendov 0:6435b67ad23c 98 _lcd_config.h_back_porch = lcd_config->h_back_porch; /* LCD display horizontal back porch period */
tvendov 0:6435b67ad23c 99 _lcd_config.v_back_porch = lcd_config->v_back_porch; /* LCD display vertical back porch period */
tvendov 0:6435b67ad23c 100
tvendov 0:6435b67ad23c 101 _lcd_config.h_sync_port = lcd_config->h_sync_port; /* TCONn or Not use(-1) */
tvendov 0:6435b67ad23c 102 _lcd_config.h_sync_port_polarity = lcd_config->h_sync_port_polarity;/* Polarity inversion control of signal */
tvendov 0:6435b67ad23c 103 _lcd_config.h_sync_width = lcd_config->h_sync_width; /* Hsync width */
tvendov 0:6435b67ad23c 104
tvendov 0:6435b67ad23c 105 _lcd_config.v_sync_port = lcd_config->v_sync_port; /* TCONn or Not use(-1) */
tvendov 0:6435b67ad23c 106 _lcd_config.v_sync_port_polarity = lcd_config->v_sync_port_polarity;/* Polarity inversion control of signal */
tvendov 0:6435b67ad23c 107 _lcd_config.v_sync_width = lcd_config->v_sync_width; /* Vsync width */
tvendov 0:6435b67ad23c 108
tvendov 0:6435b67ad23c 109 _lcd_config.de_port = lcd_config->de_port; /* TCONn or Not use(-1) */
tvendov 0:6435b67ad23c 110 _lcd_config.de_port_polarity = lcd_config->de_port_polarity; /* Polarity inversion control of signal */
tvendov 0:6435b67ad23c 111 }
tvendov 0:6435b67ad23c 112
tvendov 0:6435b67ad23c 113 return (graphics_error_t)DRV_Graphics_Init( (drv_lcd_config_t *)&_lcd_config );
tvendov 0:6435b67ad23c 114 } /* End of method Graphics_init() */
tvendov 0:6435b67ad23c 115
tvendov 0:6435b67ad23c 116 /**************************************************************************//**
tvendov 0:6435b67ad23c 117 * @brief Graphics Video initialization processing
tvendov 0:6435b67ad23c 118 * @param[in] video_input_sel : Input select
tvendov 0:6435b67ad23c 119 * @param[in] video_ext_in_config : Digtal video input configuration
tvendov 0:6435b67ad23c 120 * @retval error code
tvendov 0:6435b67ad23c 121 ******************************************************************************/
tvendov 0:6435b67ad23c 122 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 123 DisplayBase::Graphics_Video_init( video_input_sel_t video_input_sel, video_ext_in_config_t * video_ext_in_config )
tvendov 0:6435b67ad23c 124 {
tvendov 0:6435b67ad23c 125 graphics_error_t error = GRAPHICS_OK;
tvendov 0:6435b67ad23c 126
tvendov 0:6435b67ad23c 127 if( _video_input_sel == INPUT_SEL_VDEC || _video_input_sel == INPUT_SEL_EXT ) {
tvendov 0:6435b67ad23c 128 _video_input_sel = video_input_sel;
tvendov 0:6435b67ad23c 129 } else {
tvendov 0:6435b67ad23c 130 error = GRAPHICS_PARAM_RANGE_ERR;
tvendov 0:6435b67ad23c 131 }
tvendov 0:6435b67ad23c 132
tvendov 0:6435b67ad23c 133 if( error == GRAPHICS_OK ) {
tvendov 0:6435b67ad23c 134 if( video_ext_in_config != NULL ) {
tvendov 0:6435b67ad23c 135 /* Signals supplied via the external input pins */
tvendov 0:6435b67ad23c 136 /* if using Video decoder output signals, not using value. */
tvendov 0:6435b67ad23c 137 _video_ext_in_config.inp_format = video_ext_in_config->inp_format;
tvendov 0:6435b67ad23c 138 _video_ext_in_config.inp_pxd_edge = video_ext_in_config->inp_pxd_edge;
tvendov 0:6435b67ad23c 139 _video_ext_in_config.inp_vs_edge = video_ext_in_config->inp_vs_edge;
tvendov 0:6435b67ad23c 140 _video_ext_in_config.inp_hs_edge = video_ext_in_config->inp_hs_edge;
tvendov 0:6435b67ad23c 141 _video_ext_in_config.inp_endian_on = video_ext_in_config->inp_endian_on;
tvendov 0:6435b67ad23c 142 _video_ext_in_config.inp_swap_on = video_ext_in_config->inp_swap_on;
tvendov 0:6435b67ad23c 143 _video_ext_in_config.inp_vs_inv = video_ext_in_config->inp_vs_inv;
tvendov 0:6435b67ad23c 144 _video_ext_in_config.inp_hs_inv = video_ext_in_config->inp_hs_inv;
tvendov 0:6435b67ad23c 145 _video_ext_in_config.inp_f525_625 = video_ext_in_config->inp_f525_625;
tvendov 0:6435b67ad23c 146 _video_ext_in_config.inp_h_pos = video_ext_in_config->inp_h_pos;
tvendov 0:6435b67ad23c 147 _video_ext_in_config.cap_vs_pos = video_ext_in_config->cap_vs_pos;
tvendov 0:6435b67ad23c 148 _video_ext_in_config.cap_hs_pos = video_ext_in_config->cap_hs_pos;
tvendov 0:6435b67ad23c 149 _video_ext_in_config.cap_width = video_ext_in_config->cap_width;
tvendov 0:6435b67ad23c 150 _video_ext_in_config.cap_height = video_ext_in_config->cap_height;
tvendov 0:6435b67ad23c 151 }
tvendov 0:6435b67ad23c 152 }
tvendov 0:6435b67ad23c 153 return (graphics_error_t)DRV_Graphics_Video_init( (drv_video_input_sel_t)video_input_sel,
tvendov 0:6435b67ad23c 154 (drv_video_ext_in_config_t *)&_video_ext_in_config );
tvendov 0:6435b67ad23c 155 } /* End of method Graphics_Video_init() */
tvendov 0:6435b67ad23c 156
tvendov 0:6435b67ad23c 157 /**************************************************************************//**
tvendov 0:6435b67ad23c 158 * @brief LCD I/O initialization processing
tvendov 0:6435b67ad23c 159 * @param[in] pin : Pointer of the pin assignment
tvendov 0:6435b67ad23c 160 * @param[in] pin_count : Total number of the pin assignment
tvendov 0:6435b67ad23c 161 * @retval error code
tvendov 0:6435b67ad23c 162 ******************************************************************************/
tvendov 0:6435b67ad23c 163 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 164 DisplayBase::Graphics_Lcd_Port_Init( PinName *pin, unsigned int pin_count )
tvendov 0:6435b67ad23c 165 {
tvendov 0:6435b67ad23c 166 return (graphics_error_t)DRV_Graphics_Lcd_Port_Init( pin, pin_count );
tvendov 0:6435b67ad23c 167 } /* End of method Graphics_Lcd_Port_Init() */
tvendov 0:6435b67ad23c 168
tvendov 0:6435b67ad23c 169 /**************************************************************************//**
tvendov 0:6435b67ad23c 170 * @brief LVDS I/O port initialization processing
tvendov 0:6435b67ad23c 171 * @param[in] pin : Pointer of the pin assignment
tvendov 0:6435b67ad23c 172 * @param[in] pin_count : Total number of the pin assignment
tvendov 0:6435b67ad23c 173 * @retval error code
tvendov 0:6435b67ad23c 174 ******************************************************************************/
tvendov 0:6435b67ad23c 175 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 176 DisplayBase::Graphics_Lvds_Port_Init( PinName *pin, unsigned int pin_count )
tvendov 0:6435b67ad23c 177 {
tvendov 0:6435b67ad23c 178 return (graphics_error_t)DRV_Graphics_Lvds_Port_Init( pin, pin_count );
tvendov 0:6435b67ad23c 179 } /* End of method Graphics_Lvds_Port_Init() */
tvendov 0:6435b67ad23c 180
tvendov 0:6435b67ad23c 181 /**************************************************************************//**
tvendov 0:6435b67ad23c 182 * @brief Digital video input I/O port initialization processing
tvendov 0:6435b67ad23c 183 * @param[in] pin : Pointer of the pin assignment
tvendov 0:6435b67ad23c 184 * @param[in] pin_count : Total number of the pin assignment
tvendov 0:6435b67ad23c 185 * @retval error code
tvendov 0:6435b67ad23c 186 ******************************************************************************/
tvendov 0:6435b67ad23c 187 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 188 DisplayBase::Graphics_Dvinput_Port_Init( PinName *pin, unsigned int pin_count )
tvendov 0:6435b67ad23c 189 {
tvendov 0:6435b67ad23c 190 return (graphics_error_t)DRV_Graphics_Dvinput_Port_Init( pin, pin_count );
tvendov 0:6435b67ad23c 191 } /* End of method Graphics_Dvinput_Port_Init() */
tvendov 0:6435b67ad23c 192
tvendov 0:6435b67ad23c 193 /**************************************************************************//**
tvendov 0:6435b67ad23c 194 * @brief IRQ interrupt handler setting
tvendov 0:6435b67ad23c 195 * @param[in] irq : VDC5 interrupt type
tvendov 0:6435b67ad23c 196 * @param[in] num : Interrupt line number
tvendov 0:6435b67ad23c 197 * @param[in] * callback : Interrupt callback function pointer
tvendov 0:6435b67ad23c 198 * @retval error code
tvendov 0:6435b67ad23c 199 ******************************************************************************/
tvendov 0:6435b67ad23c 200 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 201 DisplayBase::Graphics_Irq_Handler_Set( int_type_t irq, unsigned short num, void (* callback)(int_type_t) )
tvendov 0:6435b67ad23c 202 {
tvendov 0:6435b67ad23c 203 return (graphics_error_t)DRV_Graphics_Irq_Handler_Set( (vdc5_int_type_t)irq, num, (void (*)(vdc5_int_type_t))callback );
tvendov 0:6435b67ad23c 204 } /* End of method Graphics_Irq_Handler_Set() */
tvendov 0:6435b67ad23c 205
tvendov 0:6435b67ad23c 206 /**************************************************************************//**
tvendov 0:6435b67ad23c 207 * @brief Graphics surface read start processing
tvendov 0:6435b67ad23c 208 * @param[in] layer_id : Graphics layer ID
tvendov 0:6435b67ad23c 209 * @retval error code
tvendov 0:6435b67ad23c 210 ******************************************************************************/
tvendov 0:6435b67ad23c 211 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 212 DisplayBase::Graphics_Start( graphics_layer_t layer_id )
tvendov 0:6435b67ad23c 213 {
tvendov 0:6435b67ad23c 214 return (graphics_error_t)DRV_Graphics_Start( (drv_graphics_layer_t)layer_id );
tvendov 0:6435b67ad23c 215 } /* End of method Graphics_Start() */
tvendov 0:6435b67ad23c 216
tvendov 0:6435b67ad23c 217 /**************************************************************************//**
tvendov 0:6435b67ad23c 218 * @brief Graphics surface read stop processing
tvendov 0:6435b67ad23c 219 * @param[in] layer_id : Graphics layer ID
tvendov 0:6435b67ad23c 220 * @retval error code
tvendov 0:6435b67ad23c 221 ******************************************************************************/
tvendov 0:6435b67ad23c 222 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 223 DisplayBase::Graphics_Stop( graphics_layer_t layer_id )
tvendov 0:6435b67ad23c 224 {
tvendov 0:6435b67ad23c 225 return (graphics_error_t)DRV_Graphics_Stop( (drv_graphics_layer_t)layer_id );
tvendov 0:6435b67ad23c 226 } /* End of method Graphics_Stop() */
tvendov 0:6435b67ad23c 227
tvendov 0:6435b67ad23c 228 /**************************************************************************//**
tvendov 0:6435b67ad23c 229 * @brief Video surface write start processing
tvendov 0:6435b67ad23c 230 * @param[in] video_input_channel : Video input channel
tvendov 0:6435b67ad23c 231 * @retval error code
tvendov 0:6435b67ad23c 232 ******************************************************************************/
tvendov 0:6435b67ad23c 233 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 234 DisplayBase::Video_Start( video_input_channel_t video_input_channel )
tvendov 0:6435b67ad23c 235 {
tvendov 0:6435b67ad23c 236 graphics_error_t error = GRAPHICS_OK;
tvendov 0:6435b67ad23c 237
tvendov 0:6435b67ad23c 238 /* Digital video inputs : supporting video_input_channel 0 only. */
tvendov 0:6435b67ad23c 239 if( _video_input_sel == INPUT_SEL_EXT && video_input_channel == VIDEO_INPUT_CHANNEL_1 ) {
tvendov 0:6435b67ad23c 240 error = GRAPHICS_PARAM_RANGE_ERR;
tvendov 0:6435b67ad23c 241 }
tvendov 0:6435b67ad23c 242
tvendov 0:6435b67ad23c 243 if( error == GRAPHICS_OK ) {
tvendov 0:6435b67ad23c 244 error = (graphics_error_t)DRV_Video_Start( (drv_video_input_channel_t)video_input_channel );
tvendov 0:6435b67ad23c 245 }
tvendov 0:6435b67ad23c 246 return error;
tvendov 0:6435b67ad23c 247 } /* End of method Video_Start() */
tvendov 0:6435b67ad23c 248
tvendov 0:6435b67ad23c 249 /**************************************************************************//**
tvendov 0:6435b67ad23c 250 * @brief Video surface write stop processing
tvendov 0:6435b67ad23c 251 * @param[in] video_input_channel : Video input channel
tvendov 0:6435b67ad23c 252 * @retval error code
tvendov 0:6435b67ad23c 253 ******************************************************************************/
tvendov 0:6435b67ad23c 254 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 255 DisplayBase::Video_Stop( video_input_channel_t video_input_channel )
tvendov 0:6435b67ad23c 256 {
tvendov 0:6435b67ad23c 257 graphics_error_t error = GRAPHICS_OK;
tvendov 0:6435b67ad23c 258
tvendov 0:6435b67ad23c 259 /* Digital video inputs : supporting video_input_channel 0 only. */
tvendov 0:6435b67ad23c 260 if( _video_input_sel == INPUT_SEL_EXT && video_input_channel == VIDEO_INPUT_CHANNEL_1 ) {
tvendov 0:6435b67ad23c 261 error = GRAPHICS_PARAM_RANGE_ERR;
tvendov 0:6435b67ad23c 262 }
tvendov 0:6435b67ad23c 263
tvendov 0:6435b67ad23c 264 if( error == GRAPHICS_OK ) {
tvendov 0:6435b67ad23c 265 error = (graphics_error_t)DRV_Video_Stop(
tvendov 0:6435b67ad23c 266 (drv_video_input_channel_t)video_input_channel );
tvendov 0:6435b67ad23c 267 }
tvendov 0:6435b67ad23c 268 return error;
tvendov 0:6435b67ad23c 269 } /* End of method Video_Stop() */
tvendov 0:6435b67ad23c 270
tvendov 0:6435b67ad23c 271 /**************************************************************************//**
tvendov 0:6435b67ad23c 272 * @brief Graphics surface read process setting
tvendov 0:6435b67ad23c 273 *
tvendov 0:6435b67ad23c 274 * Description:<br>
tvendov 0:6435b67ad23c 275 * This function supports the following 4 image format.
tvendov 0:6435b67ad23c 276 * YCbCr422, RGB565, RGB888, ARGB8888
tvendov 0:6435b67ad23c 277 * @param[in] layer_id : Graphics layer ID
tvendov 0:6435b67ad23c 278 * @param[in] framebuff : Base address of the frame buffer
tvendov 0:6435b67ad23c 279 * @param[in] fb_stride : Line offset address of the frame buffer
tvendov 0:6435b67ad23c 280 * @param[in] gr_format : Format of the frame buffer read signal
tvendov 0:6435b67ad23c 281 * @param[in] wr_rd_swa : frame buffer swap setting
tvendov 0:6435b67ad23c 282 * - WR_RD_WRSWA_NON : Not swapped: 1-2-3-4-5-6-7-8
tvendov 0:6435b67ad23c 283 * - WR_RD_WRSWA_8BIT : Swapped in 8-bit units: 2-1-4-3-6-5-8-7
tvendov 0:6435b67ad23c 284 * - WR_RD_WRSWA_16BIT : Swapped in 16-bit units: 3-4-1-2-7-8-5-6
tvendov 0:6435b67ad23c 285 * - WR_RD_WRSWA_16_8BIT : Swapped in 16-bit units + 8-bit units: 4-3-2-1-8-7-6-5
tvendov 0:6435b67ad23c 286 * - WR_RD_WRSWA_32BIT : Swapped in 32-bit units: 5-6-7-8-1-2-3-4
tvendov 0:6435b67ad23c 287 * - WR_RD_WRSWA_32_8BIT : Swapped in 32-bit units + 8-bit units: 6-5-8-7-2-1-4-3
tvendov 0:6435b67ad23c 288 * - WR_RD_WRSWA_32_16BIT : Swapped in 32-bit units + 16-bit units: 7-8-5-6-3-4-1-2
tvendov 0:6435b67ad23c 289 * - WR_RD_WRSWA_32_16_8BIT : Swapped in 32-bit units + 16-bit units + 8-bit units: 8-7-6-5-4-3-2-1
tvendov 0:6435b67ad23c 290 * @param[in] gr_rect : Graphics display area
tvendov 0:6435b67ad23c 291 * @retval Error code
tvendov 0:6435b67ad23c 292 ******************************************************************************/
tvendov 0:6435b67ad23c 293 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 294 DisplayBase::Graphics_Read_Setting(
tvendov 0:6435b67ad23c 295 graphics_layer_t layer_id,
tvendov 0:6435b67ad23c 296 void * framebuff,
tvendov 0:6435b67ad23c 297 unsigned int fb_stride,
tvendov 0:6435b67ad23c 298 graphics_format_t gr_format,
tvendov 0:6435b67ad23c 299 wr_rd_swa_t wr_rd_swa,
tvendov 0:6435b67ad23c 300 rect_t * gr_rect )
tvendov 0:6435b67ad23c 301 {
tvendov 0:6435b67ad23c 302 rect_t rect;
tvendov 0:6435b67ad23c 303
tvendov 0:6435b67ad23c 304 rect.hs = gr_rect->hs + _lcd_config.h_back_porch;
tvendov 0:6435b67ad23c 305 rect.vs = gr_rect->vs + _lcd_config.v_back_porch;
tvendov 0:6435b67ad23c 306 rect.hw = gr_rect->hw;
tvendov 0:6435b67ad23c 307 rect.vw = gr_rect->vw;
tvendov 0:6435b67ad23c 308
tvendov 0:6435b67ad23c 309 return (graphics_error_t)DRV_Graphics_Read_Setting(
tvendov 0:6435b67ad23c 310 (drv_graphics_layer_t)layer_id,
tvendov 0:6435b67ad23c 311 framebuff,
tvendov 0:6435b67ad23c 312 fb_stride,
tvendov 0:6435b67ad23c 313 (drv_graphics_format_t)gr_format,
tvendov 0:6435b67ad23c 314 (drv_wr_rd_swa_t)wr_rd_swa,
tvendov 0:6435b67ad23c 315 (drv_rect_t *)&rect );
tvendov 0:6435b67ad23c 316 } /* End of method Graphics_Read_Setting() */
tvendov 0:6435b67ad23c 317
tvendov 0:6435b67ad23c 318 /**************************************************************************//**
tvendov 0:6435b67ad23c 319 * @brief Graphics surface read process changing
tvendov 0:6435b67ad23c 320 *
tvendov 0:6435b67ad23c 321 * Description:<br>
tvendov 0:6435b67ad23c 322 * This function is used to swap buffers.
tvendov 0:6435b67ad23c 323 *
tvendov 0:6435b67ad23c 324 * @param[in] layer_id : Graphics layer ID
tvendov 0:6435b67ad23c 325 * @param[in] framebuff : Base address of the frame buffer
tvendov 0:6435b67ad23c 326 * @retval Error code
tvendov 0:6435b67ad23c 327 ******************************************************************************/
tvendov 0:6435b67ad23c 328 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 329 DisplayBase::Graphics_Read_Change ( graphics_layer_t layer_id, void * framebuff)
tvendov 0:6435b67ad23c 330 {
tvendov 0:6435b67ad23c 331 return (graphics_error_t)DRV_Graphics_Read_Change(
tvendov 0:6435b67ad23c 332 (drv_graphics_layer_t)layer_id, framebuff );
tvendov 0:6435b67ad23c 333 } /* End of method Graphics_Read_Change() */
tvendov 0:6435b67ad23c 334
tvendov 0:6435b67ad23c 335 /**************************************************************************//**
tvendov 0:6435b67ad23c 336 * @brief Graphics surface read process changing
tvendov 0:6435b67ad23c 337 *
tvendov 0:6435b67ad23c 338 * Description:<br>
tvendov 0:6435b67ad23c 339 * This function is used to swap buffers.
tvendov 0:6435b67ad23c 340 *
tvendov 0:6435b67ad23c 341 * @param[in] layer_id : Graphics layer ID
tvendov 0:6435b67ad23c 342 * @param[in] framebuff : Base address of the frame buffer
tvendov 0:6435b67ad23c 343 * @param[in] fb_stride : stride of the framebuff
tvendov 0:6435b67ad23c 344 * @param[in] slide_dir : slide direction
tvendov 0:6435b67ad23c 345 * @retval Error code
tvendov 0:6435b67ad23c 346 ******************************************************************************/
tvendov 0:6435b67ad23c 347 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 348 DisplayBase::Graphics_Read_Change_More ( graphics_layer_t layer_id, void * framebuff, unsigned int fb_stride, slide_t* slide_dir)
tvendov 0:6435b67ad23c 349 {
tvendov 0:6435b67ad23c 350 return (graphics_error_t)DRV_Graphics_Read_Change_More(
tvendov 0:6435b67ad23c 351 (drv_graphics_layer_t)layer_id, framebuff, fb_stride, (void *) slide_dir);
tvendov 0:6435b67ad23c 352 } /* End of method Graphics_Read_Change_More() */
tvendov 0:6435b67ad23c 353
tvendov 0:6435b67ad23c 354 /**************************************************************************//**
tvendov 0:6435b67ad23c 355 * @brief Video surface write process setting
tvendov 0:6435b67ad23c 356 * This function set the video write process. Input form is weave
tvendov 0:6435b67ad23c 357 * (progressive) mode fixed.
tvendov 0:6435b67ad23c 358 * This function supports the following 3 image format.
tvendov 0:6435b67ad23c 359 * YCbCr422, RGB565, RGB888
tvendov 0:6435b67ad23c 360 * @param[in] video_input_ch : Video input channel
tvendov 0:6435b67ad23c 361 * @param[in] col_sys : Analog video signal color system
tvendov 0:6435b67ad23c 362 * @param[in] adc_vinsel : Video input pin
tvendov 0:6435b67ad23c 363 * @param[in] framebuff : Base address of the frame buffer
tvendov 0:6435b67ad23c 364 * @param[in] fb_stride [byte] : Line offset address of the frame buffer
tvendov 0:6435b67ad23c 365 * @param[in] video_format : Frame buffer video-signal writing format
tvendov 0:6435b67ad23c 366 * - VIDEO_FORMAT_YCBCR422 : YCBCR422 (2byte/px)
tvendov 0:6435b67ad23c 367 * - VIDEO_FORMAT_RGB565 : RGB565 (2byte/px)
tvendov 0:6435b67ad23c 368 * - VIDEO_FORMAT_RGB888 : RGB888 (4byte/px)
tvendov 0:6435b67ad23c 369 * @param[in] wr_rd_swa : frame buffer swap setting
tvendov 0:6435b67ad23c 370 * - WR_RD_WRSWA_NON : Not swapped: 1-2-3-4-5-6-7-8
tvendov 0:6435b67ad23c 371 * - WR_RD_WRSWA_8BIT : Swapped in 8-bit units: 2-1-4-3-6-5-8-7
tvendov 0:6435b67ad23c 372 * - WR_RD_WRSWA_16BIT : Swapped in 16-bit units: 3-4-1-2-7-8-5-6
tvendov 0:6435b67ad23c 373 * - WR_RD_WRSWA_16_8BIT : Swapped in 16-bit units + 8-bit units: 4-3-2-1-8-7-6-5
tvendov 0:6435b67ad23c 374 * - WR_RD_WRSWA_32BIT : Swapped in 32-bit units: 5-6-7-8-1-2-3-4
tvendov 0:6435b67ad23c 375 * - WR_RD_WRSWA_32_8BIT : Swapped in 32-bit units + 8-bit units: 6-5-8-7-2-1-4-3
tvendov 0:6435b67ad23c 376 * - WR_RD_WRSWA_32_16BIT : Swapped in 32-bit units + 16-bit units: 7-8-5-6-3-4-1-2
tvendov 0:6435b67ad23c 377 * - WR_RD_WRSWA_32_16_8BIT : Swapped in 32-bit units + 16-bit units + 8-bit units: 8-7-6-5-4-3-2-1
tvendov 0:6435b67ad23c 378 * @param[in] video_write_size_vw [px]: output v width
tvendov 0:6435b67ad23c 379 * @param[in] video_write_size_hw [px]: output h width
tvendov 0:6435b67ad23c 380 * @param[in] video_adc_vinsel : Input pin control
tvendov 0:6435b67ad23c 381 * @retval Error code
tvendov 0:6435b67ad23c 382 ******************************************************************************/
tvendov 0:6435b67ad23c 383 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 384 DisplayBase::Video_Write_Setting(
tvendov 0:6435b67ad23c 385 video_input_channel_t video_input_channel,
tvendov 0:6435b67ad23c 386 graphics_video_col_sys_t col_sys,
tvendov 0:6435b67ad23c 387 void * framebuff,
tvendov 0:6435b67ad23c 388 unsigned int fb_stride,
tvendov 0:6435b67ad23c 389 video_format_t video_format,
tvendov 0:6435b67ad23c 390 wr_rd_swa_t wr_rd_swa,
tvendov 0:6435b67ad23c 391 unsigned short write_buff_vw,
tvendov 0:6435b67ad23c 392 unsigned short write_buff_hw,
tvendov 0:6435b67ad23c 393 video_adc_vinsel_t video_adc_vinsel )
tvendov 0:6435b67ad23c 394
tvendov 0:6435b67ad23c 395 {
tvendov 0:6435b67ad23c 396 graphics_error_t error = GRAPHICS_OK;
tvendov 0:6435b67ad23c 397
tvendov 0:6435b67ad23c 398 if( _video_input_sel == INPUT_SEL_VDEC ) {
tvendov 0:6435b67ad23c 399 #ifdef NO_SCALE_UP
tvendov 0:6435b67ad23c 400 if( col_sys == COL_SYS_NTSC_358 || col_sys == COL_SYS_NTSC_443 || col_sys == COL_SYS_NTSC_443_60 ) {
tvendov 0:6435b67ad23c 401 if( (write_buff_vw / 2u) > 240u ) {
tvendov 0:6435b67ad23c 402 error = GRAPHICS_VIDEO_NTSC_SIZE_ERR;
tvendov 0:6435b67ad23c 403 }
tvendov 0:6435b67ad23c 404 } else {
tvendov 0:6435b67ad23c 405 if( (write_buff_vw / 2u) > 280u ) {
tvendov 0:6435b67ad23c 406 error = GRAPHICS_VIDEO_PAL_SIZE_ERR;
tvendov 0:6435b67ad23c 407 }
tvendov 0:6435b67ad23c 408 }
tvendov 0:6435b67ad23c 409
tvendov 0:6435b67ad23c 410 if( write_buff_hw > 800u ) {
tvendov 0:6435b67ad23c 411 error = GRAPHICS_PARAM_RANGE_ERR;
tvendov 0:6435b67ad23c 412 }
tvendov 0:6435b67ad23c 413 #endif
tvendov 0:6435b67ad23c 414 if( error == GRAPHICS_OK ) {
tvendov 0:6435b67ad23c 415 error = (graphics_error_t)DRV_Video_Write_Setting(
tvendov 0:6435b67ad23c 416 (drv_video_input_channel_t)video_input_channel,
tvendov 0:6435b67ad23c 417 (drv_graphics_video_col_sys_t)col_sys,
tvendov 0:6435b67ad23c 418 framebuff,
tvendov 0:6435b67ad23c 419 fb_stride,
tvendov 0:6435b67ad23c 420 (drv_video_format_t)video_format,
tvendov 0:6435b67ad23c 421 (drv_wr_rd_swa_t)wr_rd_swa,
tvendov 0:6435b67ad23c 422 write_buff_vw,
tvendov 0:6435b67ad23c 423 write_buff_hw,
tvendov 0:6435b67ad23c 424 (drv_video_adc_vinsel_t)video_adc_vinsel);
tvendov 0:6435b67ad23c 425 }
tvendov 0:6435b67ad23c 426 } else if( _video_input_sel == INPUT_SEL_EXT ) {
tvendov 0:6435b67ad23c 427 rect_t cap_area;
tvendov 0:6435b67ad23c 428
tvendov 0:6435b67ad23c 429 cap_area.hs = _video_ext_in_config.cap_hs_pos * 2;
tvendov 0:6435b67ad23c 430 cap_area.hw = _video_ext_in_config.cap_width * 2;
tvendov 0:6435b67ad23c 431 cap_area.vs = _video_ext_in_config.cap_vs_pos;
tvendov 0:6435b67ad23c 432 cap_area.vw = _video_ext_in_config.cap_height;
tvendov 0:6435b67ad23c 433
tvendov 0:6435b67ad23c 434 error = (graphics_error_t) DRV_Video_Write_Setting_Digital(
tvendov 0:6435b67ad23c 435 framebuff,
tvendov 0:6435b67ad23c 436 fb_stride,
tvendov 0:6435b67ad23c 437 (drv_video_format_t)video_format,
tvendov 0:6435b67ad23c 438 (drv_wr_rd_swa_t)wr_rd_swa,
tvendov 0:6435b67ad23c 439 write_buff_vw,
tvendov 0:6435b67ad23c 440 write_buff_hw,
tvendov 0:6435b67ad23c 441 (drv_rect_t *)&cap_area );
tvendov 0:6435b67ad23c 442 } else {
tvendov 0:6435b67ad23c 443 error = GRAPHICS_PARAM_RANGE_ERR;
tvendov 0:6435b67ad23c 444 }
tvendov 0:6435b67ad23c 445 return error;
tvendov 0:6435b67ad23c 446 } /* End of method Video_Write_Setting() */
tvendov 0:6435b67ad23c 447
tvendov 0:6435b67ad23c 448 /**************************************************************************//**
tvendov 0:6435b67ad23c 449 * @brief Graphics surface write process changing
tvendov 0:6435b67ad23c 450 * This function is used to swap buffers of the weave write processing.
tvendov 0:6435b67ad23c 451 * @param[in] video_input_ch : Video input channle
tvendov 0:6435b67ad23c 452 * @param[in] framebuff : Base address of the frame buffer
tvendov 0:6435b67ad23c 453 * @param[in] fb_stride : Line offset address of the frame buffer
tvendov 0:6435b67ad23c 454 * @retval Error code
tvendov 0:6435b67ad23c 455 ******************************************************************************/
tvendov 0:6435b67ad23c 456 DisplayBase::graphics_error_t
tvendov 0:6435b67ad23c 457 DisplayBase::Video_Write_Change (
tvendov 0:6435b67ad23c 458 video_input_channel_t video_input_channel, void * framebuff, uint32_t fb_stride )
tvendov 0:6435b67ad23c 459 {
tvendov 0:6435b67ad23c 460 return (graphics_error_t)DRV_Video_Write_Change(
tvendov 0:6435b67ad23c 461 (drv_video_input_channel_t)video_input_channel, framebuff, fb_stride );
tvendov 0:6435b67ad23c 462 } /* End of method Video_Write_Change() */
tvendov 0:6435b67ad23c 463
tvendov 0:6435b67ad23c 464 /* End of file */
tvendov 0:6435b67ad23c 465