Šolski center Kranj
This program demonstrates the usage of the PWM. Program sets PWM0 chanel 1 and outputs it to the pin P1.2 where we get a PWM signal with a constant working cycle.
Dependencies: mbed
Revision 0:c1305ab902af, committed 2015-05-02
- Comitter:
- 71GA
- Date:
- Sat May 02 17:29:12 2015 +0000
- Commit message:
- First commit of this program.
Changed in this revision
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/LPC4088-gpio.h Sat May 02 17:29:12 2015 +0000 @@ -0,0 +1,52 @@ +//definicija registrov za periferijo GPIO + +//GPIO +#define DIR0 (*((volatile unsigned int *) 0x20098000)) //Port0 +#define MASK0 (*((volatile unsigned int *) 0x20098010)) +#define PIN0 (*((volatile unsigned int *) 0x20098014)) +#define SET0 (*((volatile unsigned int *) 0x20098018)) +#define CLR0 (*((volatile unsigned int *) 0x2009801C)) + +#define DIR1 (*((volatile unsigned int *) 0x20098020)) //Port1 +#define MASK1 (*((volatile unsigned int *) 0x20098030)) +#define PIN1 (*((volatile unsigned int *) 0x20098034)) +#define SET1 (*((volatile unsigned int *) 0x20098038)) +#define CLR1 (*((volatile unsigned int *) 0x2009803C)) + +#define DIR2 (*((volatile unsigned int *) 0x20098040)) //Port2 +#define MASK2 (*((volatile unsigned int *) 0x20098050)) +#define PIN2 (*((volatile unsigned int *) 0x20098054)) +#define SET2 (*((volatile unsigned int *) 0x20098058)) +#define CLR2 (*((volatile unsigned int *) 0x2009805C)) + +#define DIR3 (*((volatile unsigned int *) 0x20098060)) //Port3 +#define MASK3 (*((volatile unsigned int *) 0x20098070)) +#define PIN3 (*((volatile unsigned int *) 0x20098074)) +#define SET3 (*((volatile unsigned int *) 0x20098078)) +#define CLR3 (*((volatile unsigned int *) 0x2009807C)) + +#define DIR4 (*((volatile unsigned int *) 0x20098080)) //Port4 +#define MASK4 (*((volatile unsigned int *) 0x20098090)) +#define PIN4 (*((volatile unsigned int *) 0x20098094)) +#define SET4 (*((volatile unsigned int *) 0x20098098)) +#define CLR4 (*((volatile unsigned int *) 0x2009809C)) + +#define DIR5 (*((volatile unsigned int *) 0x200980A0)) //Port5 +#define MASK5 (*((volatile unsigned int *) 0x200980B0)) +#define PIN5 (*((volatile unsigned int *) 0x200980B4)) +#define SET5 (*((volatile unsigned int *) 0x200980B8)) +#define CLR5 (*((volatile unsigned int *) 0x200980BC)) + + +//GPIO interrupts +#define int_STATUS (*((volatile unsigned int *) 0x40028080)) +#define int_STATR0 (*((volatile unsigned int *) 0x40028084)) +#define int_STATF0 (*((volatile unsigned int *) 0x40028088)) +#define int_CLR0 (*((volatile unsigned int *) 0x4002808C)) +#define int_ENR0 (*((volatile unsigned int *) 0x40028090)) +#define int_ENF0 (*((volatile unsigned int *) 0x40028094)) +#define int_STATR2 (*((volatile unsigned int *) 0x400280A4)) +#define int_STATF2 (*((volatile unsigned int *) 0x400280A8)) +#define int_CLR2 (*((volatile unsigned int *) 0x400280AC)) +#define int_ENR2 (*((volatile unsigned int *) 0x400280B0)) +#define int_ENF2 (*((volatile unsigned int *) 0x400280B4))
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/LPC4088-ioconfig.h Sat May 02 17:29:12 2015 +0000 @@ -0,0 +1,178 @@ +//Definicije registrov za periferijo IOCONFIG + +//Port 0 +#define IOCON_P0_0 (*((volatile unsigned int *) 0x4002C000)) //D (IOCON type) +#define IOCON_P0_1 (*((volatile unsigned int *) 0x4002C004)) //D +#define IOCON_P0_2 (*((volatile unsigned int *) 0x4002C008)) //D +#define IOCON_P0_3 (*((volatile unsigned int *) 0x4002C00C)) //D +#define IOCON_P0_4 (*((volatile unsigned int *) 0x4002C010)) //D +#define IOCON_P0_5 (*((volatile unsigned int *) 0x4002C014)) //D +#define IOCON_P0_6 (*((volatile unsigned int *) 0x4002C018)) //D +#define IOCON_P0_7 (*((volatile unsigned int *) 0x4002C01C)) //W +#define IOCON_P0_8 (*((volatile unsigned int *) 0x4002C020)) //W +#define IOCON_P0_9 (*((volatile unsigned int *) 0x4002C024)) //W +#define IOCON_P0_10 (*((volatile unsigned int *) 0x4002C028)) //D +#define IOCON_P0_11 (*((volatile unsigned int *) 0x4002C02C)) //D +#define IOCON_P0_12 (*((volatile unsigned int *) 0x4002C030)) //A +#define IOCON_P0_13 (*((volatile unsigned int *) 0x4002C034)) //A +#define IOCON_P0_14 (*((volatile unsigned int *) 0x4002C038)) //D +#define IOCON_P0_15 (*((volatile unsigned int *) 0x4002C03C)) //D +#define IOCON_P0_16 (*((volatile unsigned int *) 0x4002C040)) //D +#define IOCON_P0_17 (*((volatile unsigned int *) 0x4002C044)) //D +#define IOCON_P0_18 (*((volatile unsigned int *) 0x4002C048)) //D +#define IOCON_P0_19 (*((volatile unsigned int *) 0x4002C04C)) //D +#define IOCON_P0_20 (*((volatile unsigned int *) 0x4002C050)) //D +#define IOCON_P0_21 (*((volatile unsigned int *) 0x4002C054)) //D +#define IOCON_P0_22 (*((volatile unsigned int *) 0x4002C058)) //D +#define IOCON_P0_23 (*((volatile unsigned int *) 0x4002C05C)) //A +#define IOCON_P0_24 (*((volatile unsigned int *) 0x4002C060)) //A +#define IOCON_P0_25 (*((volatile unsigned int *) 0x4002C064)) //A +#define IOCON_P0_26 (*((volatile unsigned int *) 0x4002C068)) //A +#define IOCON_P0_27 (*((volatile unsigned int *) 0x4002C06C)) //I +#define IOCON_P0_28 (*((volatile unsigned int *) 0x4002C070)) //I +#define IOCON_P0_29 (*((volatile unsigned int *) 0x4002C074)) //U +#define IOCON_P0_30 (*((volatile unsigned int *) 0x4002C078)) //U +#define IOCON_P0_31 (*((volatile unsigned int *) 0x4002C07C)) //U + +//Port 1 +#define IOCON_P1_0 (*((volatile unsigned int *) 0x4002C080)) //D (IOCON type) +#define IOCON_P1_1 (*((volatile unsigned int *) 0x4002C084)) //D +#define IOCON_P1_2 (*((volatile unsigned int *) 0x4002C088)) //D +#define IOCON_P1_3 (*((volatile unsigned int *) 0x4002C08C)) //D +#define IOCON_P1_4 (*((volatile unsigned int *) 0x4002C090)) //D +#define IOCON_P1_5 (*((volatile unsigned int *) 0x4002C094)) //W +#define IOCON_P1_6 (*((volatile unsigned int *) 0x4002C098)) //W +#define IOCON_P1_7 (*((volatile unsigned int *) 0x4002C09C)) //W +#define IOCON_P1_8 (*((volatile unsigned int *) 0x4002C0A0)) //D +#define IOCON_P1_9 (*((volatile unsigned int *) 0x4002C0A4)) //D +#define IOCON_P1_10 (*((volatile unsigned int *) 0x4002C0A8)) //D +#define IOCON_P1_11 (*((volatile unsigned int *) 0x4002C0AC)) //D +#define IOCON_P1_12 (*((volatile unsigned int *) 0x4002C0B0)) //D +#define IOCON_P1_13 (*((volatile unsigned int *) 0x4002C0B4)) //D +#define IOCON_P1_14 (*((volatile unsigned int *) 0x4002C0B8)) //W +#define IOCON_P1_15 (*((volatile unsigned int *) 0x4002C0BC)) //D +#define IOCON_P1_16 (*((volatile unsigned int *) 0x4002C0C0)) //W +#define IOCON_P1_17 (*((volatile unsigned int *) 0x4002C0C4)) //W +#define IOCON_P1_18 (*((volatile unsigned int *) 0x4002C0C8)) //D +#define IOCON_P1_19 (*((volatile unsigned int *) 0x4002C0CC)) //D +#define IOCON_P1_20 (*((volatile unsigned int *) 0x4002C0D0)) //D +#define IOCON_P1_21 (*((volatile unsigned int *) 0x4002C0D4)) //D +#define IOCON_P1_22 (*((volatile unsigned int *) 0x4002C0D8)) //D +#define IOCON_P1_23 (*((volatile unsigned int *) 0x4002C0DC)) //D +#define IOCON_P1_24 (*((volatile unsigned int *) 0x4002C0E0)) //D +#define IOCON_P1_25 (*((volatile unsigned int *) 0x4002C0E4)) //D +#define IOCON_P1_26 (*((volatile unsigned int *) 0x4002C0E8)) //D +#define IOCON_P1_27 (*((volatile unsigned int *) 0x4002C0EC)) //D +#define IOCON_P1_28 (*((volatile unsigned int *) 0x4002C0F0)) //D +#define IOCON_P1_29 (*((volatile unsigned int *) 0x4002C0F4)) //D +#define IOCON_P1_30 (*((volatile unsigned int *) 0x4002C0F8)) //A +#define IOCON_P1_31 (*((volatile unsigned int *) 0x4002C0FC)) //A + +//Port 2 +#define IOCON_P2_0 (*((volatile unsigned int *) 0x4002C100)) //D (IOCON type) +#define IOCON_P2_1 (*((volatile unsigned int *) 0x4002C104)) //D +#define IOCON_P2_2 (*((volatile unsigned int *) 0x4002C108)) //D +#define IOCON_P2_3 (*((volatile unsigned int *) 0x4002C10C)) //D +#define IOCON_P2_4 (*((volatile unsigned int *) 0x4002C110)) //D +#define IOCON_P2_5 (*((volatile unsigned int *) 0x4002C114)) //D +#define IOCON_P2_6 (*((volatile unsigned int *) 0x4002C118)) //D +#define IOCON_P2_7 (*((volatile unsigned int *) 0x4002C11C)) //D +#define IOCON_P2_8 (*((volatile unsigned int *) 0x4002C120)) //D +#define IOCON_P2_9 (*((volatile unsigned int *) 0x4002C124)) //D +#define IOCON_P2_10 (*((volatile unsigned int *) 0x4002C128)) //D +#define IOCON_P2_11 (*((volatile unsigned int *) 0x4002C12C)) //D +#define IOCON_P2_12 (*((volatile unsigned int *) 0x4002C130)) //D +#define IOCON_P2_13 (*((volatile unsigned int *) 0x4002C134)) //D +#define IOCON_P2_14 (*((volatile unsigned int *) 0x4002C138)) //D +#define IOCON_P2_15 (*((volatile unsigned int *) 0x4002C13C)) //D +#define IOCON_P2_16 (*((volatile unsigned int *) 0x4002C140)) //D +#define IOCON_P2_17 (*((volatile unsigned int *) 0x4002C144)) //D +#define IOCON_P2_18 (*((volatile unsigned int *) 0x4002C148)) //D +#define IOCON_P2_19 (*((volatile unsigned int *) 0x4002C14C)) //D +#define IOCON_P2_20 (*((volatile unsigned int *) 0x4002C150)) //D +#define IOCON_P2_21 (*((volatile unsigned int *) 0x4002C154)) //D +#define IOCON_P2_22 (*((volatile unsigned int *) 0x4002C158)) //D +#define IOCON_P2_23 (*((volatile unsigned int *) 0x4002C15C)) //D +#define IOCON_P2_24 (*((volatile unsigned int *) 0x4002C160)) //D +#define IOCON_P2_25 (*((volatile unsigned int *) 0x4002C164)) //D +#define IOCON_P2_26 (*((volatile unsigned int *) 0x4002C168)) //D +#define IOCON_P2_27 (*((volatile unsigned int *) 0x4002C16C)) //D +#define IOCON_P2_28 (*((volatile unsigned int *) 0x4002C170)) //D +#define IOCON_P2_29 (*((volatile unsigned int *) 0x4002C174)) //D +#define IOCON_P2_30 (*((volatile unsigned int *) 0x4002C178)) //D +#define IOCON_P2_31 (*((volatile unsigned int *) 0x4002C17C)) //D + +//Port 3 +#define IOCON_P3_0 (*((volatile unsigned int *) 0x4002C180)) //D (IOCON type) +#define IOCON_P3_1 (*((volatile unsigned int *) 0x4002C184)) //D +#define IOCON_P3_2 (*((volatile unsigned int *) 0x4002C188)) //D +#define IOCON_P3_3 (*((volatile unsigned int *) 0x4002C18C)) //D +#define IOCON_P3_4 (*((volatile unsigned int *) 0x4002C190)) //D +#define IOCON_P3_5 (*((volatile unsigned int *) 0x4002C194)) //D +#define IOCON_P3_6 (*((volatile unsigned int *) 0x4002C198)) //D +#define IOCON_P3_7 (*((volatile unsigned int *) 0x4002C19C)) //D +#define IOCON_P3_8 (*((volatile unsigned int *) 0x4002C1A0)) //D +#define IOCON_P3_9 (*((volatile unsigned int *) 0x4002C1A4)) //D +#define IOCON_P3_10 (*((volatile unsigned int *) 0x4002C1A8)) //D +#define IOCON_P3_11 (*((volatile unsigned int *) 0x4002C1AC)) //D +#define IOCON_P3_12 (*((volatile unsigned int *) 0x4002C1B0)) //D +#define IOCON_P3_13 (*((volatile unsigned int *) 0x4002C1B4)) //D +#define IOCON_P3_14 (*((volatile unsigned int *) 0x4002C1B8)) //D +#define IOCON_P3_15 (*((volatile unsigned int *) 0x4002C1BC)) //D +#define IOCON_P3_16 (*((volatile unsigned int *) 0x4002C1C0)) //D +#define IOCON_P3_17 (*((volatile unsigned int *) 0x4002C1C4)) //D +#define IOCON_P3_18 (*((volatile unsigned int *) 0x4002C1C8)) //D +#define IOCON_P3_19 (*((volatile unsigned int *) 0x4002C1CC)) //D +#define IOCON_P3_20 (*((volatile unsigned int *) 0x4002C1D0)) //D +#define IOCON_P3_21 (*((volatile unsigned int *) 0x4002C1D4)) //D +#define IOCON_P3_22 (*((volatile unsigned int *) 0x4002C1D8)) //D +#define IOCON_P3_23 (*((volatile unsigned int *) 0x4002C1DC)) //D +#define IOCON_P3_24 (*((volatile unsigned int *) 0x4002C1E0)) //D +#define IOCON_P3_25 (*((volatile unsigned int *) 0x4002C1E4)) //D +#define IOCON_P3_26 (*((volatile unsigned int *) 0x4002C1E8)) //D +#define IOCON_P3_27 (*((volatile unsigned int *) 0x4002C1EC)) //D +#define IOCON_P3_28 (*((volatile unsigned int *) 0x4002C1F0)) //D +#define IOCON_P3_29 (*((volatile unsigned int *) 0x4002C1F4)) //D +#define IOCON_P3_30 (*((volatile unsigned int *) 0x4002C1F8)) //D +#define IOCON_P3_31 (*((volatile unsigned int *) 0x4002C1FC)) //D + +//Port 4 +#define IOCON_P4_0 (*((volatile unsigned int *) 0x4002C200)) //D (IOCON type) +#define IOCON_P4_1 (*((volatile unsigned int *) 0x4002C204)) //D +#define IOCON_P4_2 (*((volatile unsigned int *) 0x4002C208)) //D +#define IOCON_P4_3 (*((volatile unsigned int *) 0x4002C20C)) //D +#define IOCON_P4_4 (*((volatile unsigned int *) 0x4002C210)) //D +#define IOCON_P4_5 (*((volatile unsigned int *) 0x4002C214)) //D +#define IOCON_P4_6 (*((volatile unsigned int *) 0x4002C218)) //D +#define IOCON_P4_7 (*((volatile unsigned int *) 0x4002C21C)) //D +#define IOCON_P4_8 (*((volatile unsigned int *) 0x4002C220)) //D +#define IOCON_P4_9 (*((volatile unsigned int *) 0x4002C224)) //D +#define IOCON_P4_10 (*((volatile unsigned int *) 0x4002C228)) //D +#define IOCON_P4_11 (*((volatile unsigned int *) 0x4002C22C)) //D +#define IOCON_P4_12 (*((volatile unsigned int *) 0x4002C230)) //D +#define IOCON_P4_13 (*((volatile unsigned int *) 0x4002C234)) //D +#define IOCON_P4_14 (*((volatile unsigned int *) 0x4002C238)) //D +#define IOCON_P4_15 (*((volatile unsigned int *) 0x4002C23C)) //D +#define IOCON_P4_16 (*((volatile unsigned int *) 0x4002C240)) //D +#define IOCON_P4_17 (*((volatile unsigned int *) 0x4002C244)) //D +#define IOCON_P4_18 (*((volatile unsigned int *) 0x4002C248)) //D +#define IOCON_P4_19 (*((volatile unsigned int *) 0x4002C24C)) //D +#define IOCON_P4_20 (*((volatile unsigned int *) 0x4002C250)) //D +#define IOCON_P4_21 (*((volatile unsigned int *) 0x4002C254)) //D +#define IOCON_P4_22 (*((volatile unsigned int *) 0x4002C258)) //D +#define IOCON_P4_23 (*((volatile unsigned int *) 0x4002C25C)) //D +#define IOCON_P4_24 (*((volatile unsigned int *) 0x4002C260)) //D +#define IOCON_P4_25 (*((volatile unsigned int *) 0x4002C264)) //D +#define IOCON_P4_26 (*((volatile unsigned int *) 0x4002C268)) //D +#define IOCON_P4_27 (*((volatile unsigned int *) 0x4002C26C)) //D +#define IOCON_P4_28 (*((volatile unsigned int *) 0x4002C270)) //D +#define IOCON_P4_29 (*((volatile unsigned int *) 0x4002C274)) //D +#define IOCON_P4_30 (*((volatile unsigned int *) 0x4002C278)) //D +#define IOCON_P4_31 (*((volatile unsigned int *) 0x4002C27C)) //D + +//Port 5 +#define IOCON_P5_0 (*((volatile unsigned int *) 0x4002C280)) //D (IOCON type) +#define IOCON_P5_1 (*((volatile unsigned int *) 0x4002C284)) //D +#define IOCON_P5_2 (*((volatile unsigned int *) 0x4002C288)) //I +#define IOCON_P5_3 (*((volatile unsigned int *) 0x4002C28C)) //I +#define IOCON_P5_4 (*((volatile unsigned int *) 0x4002C290)) //D \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/LPC4088-pwm.h Sat May 02 17:29:12 2015 +0000 @@ -0,0 +1,51 @@ +//definicije registrov za periferijo PWM + +//PWM0 +#define IR (*((volatile unsigned int *) 0x40014000)) +#define TCR (*((volatile unsigned int *) 0x40014004)) +#define TC (*((volatile unsigned int *) 0x40014008)) +#define PR (*((volatile unsigned int *) 0x4001400C)) +#define PC (*((volatile unsigned int *) 0x40014010)) + +#define MCR (*((volatile unsigned int *) 0x40014014)) +#define MR0 (*((volatile unsigned int *) 0x40014018)) +#define MR1 (*((volatile unsigned int *) 0x4001401C)) +#define MR2 (*((volatile unsigned int *) 0x40014020)) +#define MR3 (*((volatile unsigned int *) 0x40014024)) +#define MR4 (*((volatile unsigned int *) 0x40014040)) +#define MR5 (*((volatile unsigned int *) 0x40014044)) +#define MR6 (*((volatile unsigned int *) 0x40014048)) + +#define CCR (*((volatile unsigned int *) 0x40014028)) +#define CR0 (*((volatile unsigned int *) 0x4001402C)) +#define CR1 (*((volatile unsigned int *) 0x40014030)) + +#define PCR (*((volatile unsigned int *) 0x4001404C)) +#define LER (*((volatile unsigned int *) 0x40014050)) +#define CTCR (*((volatile unsigned int *) 0x40014070)) + +/* +//PWM1 +#define IR (*((volatile unsigned int *) 0x40018000)) +#define TCR (*((volatile unsigned int *) 0x40018004)) +#define TC (*((volatile unsigned int *) 0x40018008)) +#define PR (*((volatile unsigned int *) 0x4001800C)) +#define PC (*((volatile unsigned int *) 0x40018010)) + +#define MCR (*((volatile unsigned int *) 0x40018014)) +#define MR0 (*((volatile unsigned int *) 0x40018018)) +#define MR1 (*((volatile unsigned int *) 0x4001801C)) +#define MR2 (*((volatile unsigned int *) 0x40018020)) +#define MR3 (*((volatile unsigned int *) 0x40018024)) +#define MR4 (*((volatile unsigned int *) 0x40018040)) +#define MR5 (*((volatile unsigned int *) 0x40018044)) +#define MR6 (*((volatile unsigned int *) 0x40018048)) + +#define CCR (*((volatile unsigned int *) 0x40018028)) +#define CR0 (*((volatile unsigned int *) 0x4001802C)) +#define CR1 (*((volatile unsigned int *) 0x40018030)) + +#define PCR (*((volatile unsigned int *) 0x4001804C)) +#define LER (*((volatile unsigned int *) 0x40018050)) +#define CTCR (*((volatile unsigned int *) 0x40018070)) +*/ \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/LPC4088-system.h Sat May 02 17:29:12 2015 +0000 @@ -0,0 +1,3 @@ +//LPC4088 sistemski in clock registri + +#define PCONP (*((volatile unsigned int *) 0x400FC0C4)) \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/LPC4088-timer.h Sat May 02 17:29:12 2015 +0000 @@ -0,0 +1,76 @@ +//definicije registrov za periferijo TIMER + +//timer 0 +/* +#define IR (*((volatile unsigned int *) 0x40004000)) +#define TCR (*((volatile unsigned int *) 0x40004004)) +#define TC (*((volatile unsigned int *) 0x40004008)) +#define PR (*((volatile unsigned int *) 0x4000400C)) +#define PC (*((volatile unsigned int *) 0x40004010)) +#define MCR (*((volatile unsigned int *) 0x40004014)) +#define MR0 (*((volatile unsigned int *) 0x40004018)) +#define MR1 (*((volatile unsigned int *) 0x4000401C)) +#define MR2 (*((volatile unsigned int *) 0x40004020)) +#define MR3 (*((volatile unsigned int *) 0x40004024)) +#define CCR (*((volatile unsigned int *) 0x40004028)) +#define CR0 (*((volatile unsigned int *) 0x4000402C)) +#define CR1 (*((volatile unsigned int *) 0x40004030)) +#define EMR (*((volatile unsigned int *) 0x4000403C)) +#define CTCR (*((volatile unsigned int *) 0x40004070)) +*/ + +//timer 1 +/* +#define IR (*((volatile unsigned int *) 0x40008000)) +#define TCR (*((volatile unsigned int *) 0x40008004)) +#define TC (*((volatile unsigned int *) 0x40008008)) +#define PR (*((volatile unsigned int *) 0x4000800C)) +#define PC (*((volatile unsigned int *) 0x40008010)) +#define MCR (*((volatile unsigned int *) 0x40008014)) +#define MR0 (*((volatile unsigned int *) 0x40008018)) +#define MR1 (*((volatile unsigned int *) 0x4000801C)) +#define MR2 (*((volatile unsigned int *) 0x40008020)) +#define MR3 (*((volatile unsigned int *) 0x40008024)) +#define CCR (*((volatile unsigned int *) 0x40008028)) +#define CR0 (*((volatile unsigned int *) 0x4000802C)) +#define CR1 (*((volatile unsigned int *) 0x40008030)) +#define EMR (*((volatile unsigned int *) 0x4000803C)) +#define CTCR (*((volatile unsigned int *) 0x40008070)) +*/ + +//timer 2 +#define IR (*((volatile unsigned int *) 0x40090000)) +#define TCR (*((volatile unsigned int *) 0x40090004)) +#define TC (*((volatile unsigned int *) 0x40090008)) +#define PR (*((volatile unsigned int *) 0x4009000C)) +#define PC (*((volatile unsigned int *) 0x40090010)) +#define MCR (*((volatile unsigned int *) 0x40090014)) +#define MR0 (*((volatile unsigned int *) 0x40090018)) +#define MR1 (*((volatile unsigned int *) 0x4009001C)) +#define MR2 (*((volatile unsigned int *) 0x40090020)) +#define MR3 (*((volatile unsigned int *) 0x40090024)) +#define CCR (*((volatile unsigned int *) 0x40090028)) +#define CR0 (*((volatile unsigned int *) 0x4009002C)) +#define CR1 (*((volatile unsigned int *) 0x40090030)) +#define EMR (*((volatile unsigned int *) 0x4009003C)) +#define CTCR (*((volatile unsigned int *) 0x40090070)) + + +//timer 3 +/* +#define IR (*((volatile unsigned int *) 0x40094000)) +#define TCR (*((volatile unsigned int *) 0x40094004)) +#define TC (*((volatile unsigned int *) 0x40094008)) +#define PR (*((volatile unsigned int *) 0x4009400C)) +#define PC (*((volatile unsigned int *) 0x40094010)) +#define MCR (*((volatile unsigned int *) 0x40094014)) +#define MR0 (*((volatile unsigned int *) 0x40094018)) +#define MR1 (*((volatile unsigned int *) 0x4009401C)) +#define MR2 (*((volatile unsigned int *) 0x40094020)) +#define MR3 (*((volatile unsigned int *) 0x40094024)) +#define CCR (*((volatile unsigned int *) 0x40094028)) +#define CR0 (*((volatile unsigned int *) 0x4009402C)) +#define CR1 (*((volatile unsigned int *) 0x40094030)) +#define EMR (*((volatile unsigned int *) 0x4009403C)) +#define CTCR (*((volatile unsigned int *) 0x40094070)) +*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/main.c Sat May 02 17:29:12 2015 +0000
@@ -0,0 +1,53 @@
+#include "LPC4088-ioconfig.h"
+#include "LPC4088-system.h"
+#include "LPC4088-pwm.h"
+
+int main(){
+
+ //omogocimo PWM0, ki ob zagonu ni prizgan
+ PCONP = PCONP | (0x1<<5);
+
+ //resetiranje PWM0
+ //RSTCON0 = RSTCON0 | (0x1<<5);
+
+ //nastavitev pina P1.2 kot izhoda PWM0_1 - v headerju zakomentiramo timer PWM1
+ IOCON_P1_2 = IOCON_P1_2 & !(0x67F);
+ IOCON_P1_2 = IOCON_P1_2 | 0x3;
+
+ //nastavitev pina P1.18 kot izhoda PWM1_1 - v headerju zakomentiramo timer PWM0
+ //IOCON_P1_18 = IOCON_P1_18 & !(0x67F);
+ //IOCON_P1_18 = IOCON_P1_18 | 0b010;
+
+ //pocistimo interrupte za PWM0
+ IR = IR | 0x73F;
+
+ //nastavimo "individual use"
+ TCR = TCR & !(1<<4);
+
+ //nastavimo "Timer mode"
+ CTCR = CTCR & !(0x3);
+
+ //omogočimo PWMx_1 kanal (izhod)
+ PCR = PCR | (1<<9);
+
+ //nastavimo match register R0 tako, da ob TC == MR0 resetira
+ //celotni PWM0. Uporabili bomo kanal PWM0_1 in tega setamo in
+ //resetamo z MR0 in MR1 (UM, tabela 556). 1
+ MCR = MCR | (1<<1);
+ MR0 = 0x7FFFF;
+ MR1 = 0x0FFFF;
+
+ //ko so vrednosti vpisane v MR0 in MR1, obe vrednosti omogočimo (istočasno)
+ LER = LER | 0x3;
+
+ //nastavimo "timer mode" in ne "PWM mode" (ne deluje)
+ //POZOR! Mora biti za nastavitvijo MR0/MR1
+ TCR = TCR & !(1<<3);
+
+ //vklopimo PWM0 - mora biti za nastavitvijo MR0/MR1
+ //POZOR! Mora biti za nastavitvijo MR0/MR1
+ TCR = TCR | (1<<0);
+
+ while(1);
+
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/mbed.bld Sat May 02 17:29:12 2015 +0000 @@ -0,0 +1,1 @@ +http://mbed.org/users/mbed_official/code/mbed/builds/8ab26030e058 \ No newline at end of file