This program demonstrates the usage of the PWM. Program sets PWM0 chanel 1 and outputs it to the pin P1.2 where we get a PWM signal with a constant working cycle.
Dependencies: mbed
LPC4088-ioconfig.h@0:c1305ab902af, 2015-05-02 (annotated)
- Committer:
- 71GA
- Date:
- Sat May 02 17:29:12 2015 +0000
- Revision:
- 0:c1305ab902af
First commit of this program.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
71GA | 0:c1305ab902af | 1 | //Definicije registrov za periferijo IOCONFIG |
71GA | 0:c1305ab902af | 2 | |
71GA | 0:c1305ab902af | 3 | //Port 0 |
71GA | 0:c1305ab902af | 4 | #define IOCON_P0_0 (*((volatile unsigned int *) 0x4002C000)) //D (IOCON type) |
71GA | 0:c1305ab902af | 5 | #define IOCON_P0_1 (*((volatile unsigned int *) 0x4002C004)) //D |
71GA | 0:c1305ab902af | 6 | #define IOCON_P0_2 (*((volatile unsigned int *) 0x4002C008)) //D |
71GA | 0:c1305ab902af | 7 | #define IOCON_P0_3 (*((volatile unsigned int *) 0x4002C00C)) //D |
71GA | 0:c1305ab902af | 8 | #define IOCON_P0_4 (*((volatile unsigned int *) 0x4002C010)) //D |
71GA | 0:c1305ab902af | 9 | #define IOCON_P0_5 (*((volatile unsigned int *) 0x4002C014)) //D |
71GA | 0:c1305ab902af | 10 | #define IOCON_P0_6 (*((volatile unsigned int *) 0x4002C018)) //D |
71GA | 0:c1305ab902af | 11 | #define IOCON_P0_7 (*((volatile unsigned int *) 0x4002C01C)) //W |
71GA | 0:c1305ab902af | 12 | #define IOCON_P0_8 (*((volatile unsigned int *) 0x4002C020)) //W |
71GA | 0:c1305ab902af | 13 | #define IOCON_P0_9 (*((volatile unsigned int *) 0x4002C024)) //W |
71GA | 0:c1305ab902af | 14 | #define IOCON_P0_10 (*((volatile unsigned int *) 0x4002C028)) //D |
71GA | 0:c1305ab902af | 15 | #define IOCON_P0_11 (*((volatile unsigned int *) 0x4002C02C)) //D |
71GA | 0:c1305ab902af | 16 | #define IOCON_P0_12 (*((volatile unsigned int *) 0x4002C030)) //A |
71GA | 0:c1305ab902af | 17 | #define IOCON_P0_13 (*((volatile unsigned int *) 0x4002C034)) //A |
71GA | 0:c1305ab902af | 18 | #define IOCON_P0_14 (*((volatile unsigned int *) 0x4002C038)) //D |
71GA | 0:c1305ab902af | 19 | #define IOCON_P0_15 (*((volatile unsigned int *) 0x4002C03C)) //D |
71GA | 0:c1305ab902af | 20 | #define IOCON_P0_16 (*((volatile unsigned int *) 0x4002C040)) //D |
71GA | 0:c1305ab902af | 21 | #define IOCON_P0_17 (*((volatile unsigned int *) 0x4002C044)) //D |
71GA | 0:c1305ab902af | 22 | #define IOCON_P0_18 (*((volatile unsigned int *) 0x4002C048)) //D |
71GA | 0:c1305ab902af | 23 | #define IOCON_P0_19 (*((volatile unsigned int *) 0x4002C04C)) //D |
71GA | 0:c1305ab902af | 24 | #define IOCON_P0_20 (*((volatile unsigned int *) 0x4002C050)) //D |
71GA | 0:c1305ab902af | 25 | #define IOCON_P0_21 (*((volatile unsigned int *) 0x4002C054)) //D |
71GA | 0:c1305ab902af | 26 | #define IOCON_P0_22 (*((volatile unsigned int *) 0x4002C058)) //D |
71GA | 0:c1305ab902af | 27 | #define IOCON_P0_23 (*((volatile unsigned int *) 0x4002C05C)) //A |
71GA | 0:c1305ab902af | 28 | #define IOCON_P0_24 (*((volatile unsigned int *) 0x4002C060)) //A |
71GA | 0:c1305ab902af | 29 | #define IOCON_P0_25 (*((volatile unsigned int *) 0x4002C064)) //A |
71GA | 0:c1305ab902af | 30 | #define IOCON_P0_26 (*((volatile unsigned int *) 0x4002C068)) //A |
71GA | 0:c1305ab902af | 31 | #define IOCON_P0_27 (*((volatile unsigned int *) 0x4002C06C)) //I |
71GA | 0:c1305ab902af | 32 | #define IOCON_P0_28 (*((volatile unsigned int *) 0x4002C070)) //I |
71GA | 0:c1305ab902af | 33 | #define IOCON_P0_29 (*((volatile unsigned int *) 0x4002C074)) //U |
71GA | 0:c1305ab902af | 34 | #define IOCON_P0_30 (*((volatile unsigned int *) 0x4002C078)) //U |
71GA | 0:c1305ab902af | 35 | #define IOCON_P0_31 (*((volatile unsigned int *) 0x4002C07C)) //U |
71GA | 0:c1305ab902af | 36 | |
71GA | 0:c1305ab902af | 37 | //Port 1 |
71GA | 0:c1305ab902af | 38 | #define IOCON_P1_0 (*((volatile unsigned int *) 0x4002C080)) //D (IOCON type) |
71GA | 0:c1305ab902af | 39 | #define IOCON_P1_1 (*((volatile unsigned int *) 0x4002C084)) //D |
71GA | 0:c1305ab902af | 40 | #define IOCON_P1_2 (*((volatile unsigned int *) 0x4002C088)) //D |
71GA | 0:c1305ab902af | 41 | #define IOCON_P1_3 (*((volatile unsigned int *) 0x4002C08C)) //D |
71GA | 0:c1305ab902af | 42 | #define IOCON_P1_4 (*((volatile unsigned int *) 0x4002C090)) //D |
71GA | 0:c1305ab902af | 43 | #define IOCON_P1_5 (*((volatile unsigned int *) 0x4002C094)) //W |
71GA | 0:c1305ab902af | 44 | #define IOCON_P1_6 (*((volatile unsigned int *) 0x4002C098)) //W |
71GA | 0:c1305ab902af | 45 | #define IOCON_P1_7 (*((volatile unsigned int *) 0x4002C09C)) //W |
71GA | 0:c1305ab902af | 46 | #define IOCON_P1_8 (*((volatile unsigned int *) 0x4002C0A0)) //D |
71GA | 0:c1305ab902af | 47 | #define IOCON_P1_9 (*((volatile unsigned int *) 0x4002C0A4)) //D |
71GA | 0:c1305ab902af | 48 | #define IOCON_P1_10 (*((volatile unsigned int *) 0x4002C0A8)) //D |
71GA | 0:c1305ab902af | 49 | #define IOCON_P1_11 (*((volatile unsigned int *) 0x4002C0AC)) //D |
71GA | 0:c1305ab902af | 50 | #define IOCON_P1_12 (*((volatile unsigned int *) 0x4002C0B0)) //D |
71GA | 0:c1305ab902af | 51 | #define IOCON_P1_13 (*((volatile unsigned int *) 0x4002C0B4)) //D |
71GA | 0:c1305ab902af | 52 | #define IOCON_P1_14 (*((volatile unsigned int *) 0x4002C0B8)) //W |
71GA | 0:c1305ab902af | 53 | #define IOCON_P1_15 (*((volatile unsigned int *) 0x4002C0BC)) //D |
71GA | 0:c1305ab902af | 54 | #define IOCON_P1_16 (*((volatile unsigned int *) 0x4002C0C0)) //W |
71GA | 0:c1305ab902af | 55 | #define IOCON_P1_17 (*((volatile unsigned int *) 0x4002C0C4)) //W |
71GA | 0:c1305ab902af | 56 | #define IOCON_P1_18 (*((volatile unsigned int *) 0x4002C0C8)) //D |
71GA | 0:c1305ab902af | 57 | #define IOCON_P1_19 (*((volatile unsigned int *) 0x4002C0CC)) //D |
71GA | 0:c1305ab902af | 58 | #define IOCON_P1_20 (*((volatile unsigned int *) 0x4002C0D0)) //D |
71GA | 0:c1305ab902af | 59 | #define IOCON_P1_21 (*((volatile unsigned int *) 0x4002C0D4)) //D |
71GA | 0:c1305ab902af | 60 | #define IOCON_P1_22 (*((volatile unsigned int *) 0x4002C0D8)) //D |
71GA | 0:c1305ab902af | 61 | #define IOCON_P1_23 (*((volatile unsigned int *) 0x4002C0DC)) //D |
71GA | 0:c1305ab902af | 62 | #define IOCON_P1_24 (*((volatile unsigned int *) 0x4002C0E0)) //D |
71GA | 0:c1305ab902af | 63 | #define IOCON_P1_25 (*((volatile unsigned int *) 0x4002C0E4)) //D |
71GA | 0:c1305ab902af | 64 | #define IOCON_P1_26 (*((volatile unsigned int *) 0x4002C0E8)) //D |
71GA | 0:c1305ab902af | 65 | #define IOCON_P1_27 (*((volatile unsigned int *) 0x4002C0EC)) //D |
71GA | 0:c1305ab902af | 66 | #define IOCON_P1_28 (*((volatile unsigned int *) 0x4002C0F0)) //D |
71GA | 0:c1305ab902af | 67 | #define IOCON_P1_29 (*((volatile unsigned int *) 0x4002C0F4)) //D |
71GA | 0:c1305ab902af | 68 | #define IOCON_P1_30 (*((volatile unsigned int *) 0x4002C0F8)) //A |
71GA | 0:c1305ab902af | 69 | #define IOCON_P1_31 (*((volatile unsigned int *) 0x4002C0FC)) //A |
71GA | 0:c1305ab902af | 70 | |
71GA | 0:c1305ab902af | 71 | //Port 2 |
71GA | 0:c1305ab902af | 72 | #define IOCON_P2_0 (*((volatile unsigned int *) 0x4002C100)) //D (IOCON type) |
71GA | 0:c1305ab902af | 73 | #define IOCON_P2_1 (*((volatile unsigned int *) 0x4002C104)) //D |
71GA | 0:c1305ab902af | 74 | #define IOCON_P2_2 (*((volatile unsigned int *) 0x4002C108)) //D |
71GA | 0:c1305ab902af | 75 | #define IOCON_P2_3 (*((volatile unsigned int *) 0x4002C10C)) //D |
71GA | 0:c1305ab902af | 76 | #define IOCON_P2_4 (*((volatile unsigned int *) 0x4002C110)) //D |
71GA | 0:c1305ab902af | 77 | #define IOCON_P2_5 (*((volatile unsigned int *) 0x4002C114)) //D |
71GA | 0:c1305ab902af | 78 | #define IOCON_P2_6 (*((volatile unsigned int *) 0x4002C118)) //D |
71GA | 0:c1305ab902af | 79 | #define IOCON_P2_7 (*((volatile unsigned int *) 0x4002C11C)) //D |
71GA | 0:c1305ab902af | 80 | #define IOCON_P2_8 (*((volatile unsigned int *) 0x4002C120)) //D |
71GA | 0:c1305ab902af | 81 | #define IOCON_P2_9 (*((volatile unsigned int *) 0x4002C124)) //D |
71GA | 0:c1305ab902af | 82 | #define IOCON_P2_10 (*((volatile unsigned int *) 0x4002C128)) //D |
71GA | 0:c1305ab902af | 83 | #define IOCON_P2_11 (*((volatile unsigned int *) 0x4002C12C)) //D |
71GA | 0:c1305ab902af | 84 | #define IOCON_P2_12 (*((volatile unsigned int *) 0x4002C130)) //D |
71GA | 0:c1305ab902af | 85 | #define IOCON_P2_13 (*((volatile unsigned int *) 0x4002C134)) //D |
71GA | 0:c1305ab902af | 86 | #define IOCON_P2_14 (*((volatile unsigned int *) 0x4002C138)) //D |
71GA | 0:c1305ab902af | 87 | #define IOCON_P2_15 (*((volatile unsigned int *) 0x4002C13C)) //D |
71GA | 0:c1305ab902af | 88 | #define IOCON_P2_16 (*((volatile unsigned int *) 0x4002C140)) //D |
71GA | 0:c1305ab902af | 89 | #define IOCON_P2_17 (*((volatile unsigned int *) 0x4002C144)) //D |
71GA | 0:c1305ab902af | 90 | #define IOCON_P2_18 (*((volatile unsigned int *) 0x4002C148)) //D |
71GA | 0:c1305ab902af | 91 | #define IOCON_P2_19 (*((volatile unsigned int *) 0x4002C14C)) //D |
71GA | 0:c1305ab902af | 92 | #define IOCON_P2_20 (*((volatile unsigned int *) 0x4002C150)) //D |
71GA | 0:c1305ab902af | 93 | #define IOCON_P2_21 (*((volatile unsigned int *) 0x4002C154)) //D |
71GA | 0:c1305ab902af | 94 | #define IOCON_P2_22 (*((volatile unsigned int *) 0x4002C158)) //D |
71GA | 0:c1305ab902af | 95 | #define IOCON_P2_23 (*((volatile unsigned int *) 0x4002C15C)) //D |
71GA | 0:c1305ab902af | 96 | #define IOCON_P2_24 (*((volatile unsigned int *) 0x4002C160)) //D |
71GA | 0:c1305ab902af | 97 | #define IOCON_P2_25 (*((volatile unsigned int *) 0x4002C164)) //D |
71GA | 0:c1305ab902af | 98 | #define IOCON_P2_26 (*((volatile unsigned int *) 0x4002C168)) //D |
71GA | 0:c1305ab902af | 99 | #define IOCON_P2_27 (*((volatile unsigned int *) 0x4002C16C)) //D |
71GA | 0:c1305ab902af | 100 | #define IOCON_P2_28 (*((volatile unsigned int *) 0x4002C170)) //D |
71GA | 0:c1305ab902af | 101 | #define IOCON_P2_29 (*((volatile unsigned int *) 0x4002C174)) //D |
71GA | 0:c1305ab902af | 102 | #define IOCON_P2_30 (*((volatile unsigned int *) 0x4002C178)) //D |
71GA | 0:c1305ab902af | 103 | #define IOCON_P2_31 (*((volatile unsigned int *) 0x4002C17C)) //D |
71GA | 0:c1305ab902af | 104 | |
71GA | 0:c1305ab902af | 105 | //Port 3 |
71GA | 0:c1305ab902af | 106 | #define IOCON_P3_0 (*((volatile unsigned int *) 0x4002C180)) //D (IOCON type) |
71GA | 0:c1305ab902af | 107 | #define IOCON_P3_1 (*((volatile unsigned int *) 0x4002C184)) //D |
71GA | 0:c1305ab902af | 108 | #define IOCON_P3_2 (*((volatile unsigned int *) 0x4002C188)) //D |
71GA | 0:c1305ab902af | 109 | #define IOCON_P3_3 (*((volatile unsigned int *) 0x4002C18C)) //D |
71GA | 0:c1305ab902af | 110 | #define IOCON_P3_4 (*((volatile unsigned int *) 0x4002C190)) //D |
71GA | 0:c1305ab902af | 111 | #define IOCON_P3_5 (*((volatile unsigned int *) 0x4002C194)) //D |
71GA | 0:c1305ab902af | 112 | #define IOCON_P3_6 (*((volatile unsigned int *) 0x4002C198)) //D |
71GA | 0:c1305ab902af | 113 | #define IOCON_P3_7 (*((volatile unsigned int *) 0x4002C19C)) //D |
71GA | 0:c1305ab902af | 114 | #define IOCON_P3_8 (*((volatile unsigned int *) 0x4002C1A0)) //D |
71GA | 0:c1305ab902af | 115 | #define IOCON_P3_9 (*((volatile unsigned int *) 0x4002C1A4)) //D |
71GA | 0:c1305ab902af | 116 | #define IOCON_P3_10 (*((volatile unsigned int *) 0x4002C1A8)) //D |
71GA | 0:c1305ab902af | 117 | #define IOCON_P3_11 (*((volatile unsigned int *) 0x4002C1AC)) //D |
71GA | 0:c1305ab902af | 118 | #define IOCON_P3_12 (*((volatile unsigned int *) 0x4002C1B0)) //D |
71GA | 0:c1305ab902af | 119 | #define IOCON_P3_13 (*((volatile unsigned int *) 0x4002C1B4)) //D |
71GA | 0:c1305ab902af | 120 | #define IOCON_P3_14 (*((volatile unsigned int *) 0x4002C1B8)) //D |
71GA | 0:c1305ab902af | 121 | #define IOCON_P3_15 (*((volatile unsigned int *) 0x4002C1BC)) //D |
71GA | 0:c1305ab902af | 122 | #define IOCON_P3_16 (*((volatile unsigned int *) 0x4002C1C0)) //D |
71GA | 0:c1305ab902af | 123 | #define IOCON_P3_17 (*((volatile unsigned int *) 0x4002C1C4)) //D |
71GA | 0:c1305ab902af | 124 | #define IOCON_P3_18 (*((volatile unsigned int *) 0x4002C1C8)) //D |
71GA | 0:c1305ab902af | 125 | #define IOCON_P3_19 (*((volatile unsigned int *) 0x4002C1CC)) //D |
71GA | 0:c1305ab902af | 126 | #define IOCON_P3_20 (*((volatile unsigned int *) 0x4002C1D0)) //D |
71GA | 0:c1305ab902af | 127 | #define IOCON_P3_21 (*((volatile unsigned int *) 0x4002C1D4)) //D |
71GA | 0:c1305ab902af | 128 | #define IOCON_P3_22 (*((volatile unsigned int *) 0x4002C1D8)) //D |
71GA | 0:c1305ab902af | 129 | #define IOCON_P3_23 (*((volatile unsigned int *) 0x4002C1DC)) //D |
71GA | 0:c1305ab902af | 130 | #define IOCON_P3_24 (*((volatile unsigned int *) 0x4002C1E0)) //D |
71GA | 0:c1305ab902af | 131 | #define IOCON_P3_25 (*((volatile unsigned int *) 0x4002C1E4)) //D |
71GA | 0:c1305ab902af | 132 | #define IOCON_P3_26 (*((volatile unsigned int *) 0x4002C1E8)) //D |
71GA | 0:c1305ab902af | 133 | #define IOCON_P3_27 (*((volatile unsigned int *) 0x4002C1EC)) //D |
71GA | 0:c1305ab902af | 134 | #define IOCON_P3_28 (*((volatile unsigned int *) 0x4002C1F0)) //D |
71GA | 0:c1305ab902af | 135 | #define IOCON_P3_29 (*((volatile unsigned int *) 0x4002C1F4)) //D |
71GA | 0:c1305ab902af | 136 | #define IOCON_P3_30 (*((volatile unsigned int *) 0x4002C1F8)) //D |
71GA | 0:c1305ab902af | 137 | #define IOCON_P3_31 (*((volatile unsigned int *) 0x4002C1FC)) //D |
71GA | 0:c1305ab902af | 138 | |
71GA | 0:c1305ab902af | 139 | //Port 4 |
71GA | 0:c1305ab902af | 140 | #define IOCON_P4_0 (*((volatile unsigned int *) 0x4002C200)) //D (IOCON type) |
71GA | 0:c1305ab902af | 141 | #define IOCON_P4_1 (*((volatile unsigned int *) 0x4002C204)) //D |
71GA | 0:c1305ab902af | 142 | #define IOCON_P4_2 (*((volatile unsigned int *) 0x4002C208)) //D |
71GA | 0:c1305ab902af | 143 | #define IOCON_P4_3 (*((volatile unsigned int *) 0x4002C20C)) //D |
71GA | 0:c1305ab902af | 144 | #define IOCON_P4_4 (*((volatile unsigned int *) 0x4002C210)) //D |
71GA | 0:c1305ab902af | 145 | #define IOCON_P4_5 (*((volatile unsigned int *) 0x4002C214)) //D |
71GA | 0:c1305ab902af | 146 | #define IOCON_P4_6 (*((volatile unsigned int *) 0x4002C218)) //D |
71GA | 0:c1305ab902af | 147 | #define IOCON_P4_7 (*((volatile unsigned int *) 0x4002C21C)) //D |
71GA | 0:c1305ab902af | 148 | #define IOCON_P4_8 (*((volatile unsigned int *) 0x4002C220)) //D |
71GA | 0:c1305ab902af | 149 | #define IOCON_P4_9 (*((volatile unsigned int *) 0x4002C224)) //D |
71GA | 0:c1305ab902af | 150 | #define IOCON_P4_10 (*((volatile unsigned int *) 0x4002C228)) //D |
71GA | 0:c1305ab902af | 151 | #define IOCON_P4_11 (*((volatile unsigned int *) 0x4002C22C)) //D |
71GA | 0:c1305ab902af | 152 | #define IOCON_P4_12 (*((volatile unsigned int *) 0x4002C230)) //D |
71GA | 0:c1305ab902af | 153 | #define IOCON_P4_13 (*((volatile unsigned int *) 0x4002C234)) //D |
71GA | 0:c1305ab902af | 154 | #define IOCON_P4_14 (*((volatile unsigned int *) 0x4002C238)) //D |
71GA | 0:c1305ab902af | 155 | #define IOCON_P4_15 (*((volatile unsigned int *) 0x4002C23C)) //D |
71GA | 0:c1305ab902af | 156 | #define IOCON_P4_16 (*((volatile unsigned int *) 0x4002C240)) //D |
71GA | 0:c1305ab902af | 157 | #define IOCON_P4_17 (*((volatile unsigned int *) 0x4002C244)) //D |
71GA | 0:c1305ab902af | 158 | #define IOCON_P4_18 (*((volatile unsigned int *) 0x4002C248)) //D |
71GA | 0:c1305ab902af | 159 | #define IOCON_P4_19 (*((volatile unsigned int *) 0x4002C24C)) //D |
71GA | 0:c1305ab902af | 160 | #define IOCON_P4_20 (*((volatile unsigned int *) 0x4002C250)) //D |
71GA | 0:c1305ab902af | 161 | #define IOCON_P4_21 (*((volatile unsigned int *) 0x4002C254)) //D |
71GA | 0:c1305ab902af | 162 | #define IOCON_P4_22 (*((volatile unsigned int *) 0x4002C258)) //D |
71GA | 0:c1305ab902af | 163 | #define IOCON_P4_23 (*((volatile unsigned int *) 0x4002C25C)) //D |
71GA | 0:c1305ab902af | 164 | #define IOCON_P4_24 (*((volatile unsigned int *) 0x4002C260)) //D |
71GA | 0:c1305ab902af | 165 | #define IOCON_P4_25 (*((volatile unsigned int *) 0x4002C264)) //D |
71GA | 0:c1305ab902af | 166 | #define IOCON_P4_26 (*((volatile unsigned int *) 0x4002C268)) //D |
71GA | 0:c1305ab902af | 167 | #define IOCON_P4_27 (*((volatile unsigned int *) 0x4002C26C)) //D |
71GA | 0:c1305ab902af | 168 | #define IOCON_P4_28 (*((volatile unsigned int *) 0x4002C270)) //D |
71GA | 0:c1305ab902af | 169 | #define IOCON_P4_29 (*((volatile unsigned int *) 0x4002C274)) //D |
71GA | 0:c1305ab902af | 170 | #define IOCON_P4_30 (*((volatile unsigned int *) 0x4002C278)) //D |
71GA | 0:c1305ab902af | 171 | #define IOCON_P4_31 (*((volatile unsigned int *) 0x4002C27C)) //D |
71GA | 0:c1305ab902af | 172 | |
71GA | 0:c1305ab902af | 173 | //Port 5 |
71GA | 0:c1305ab902af | 174 | #define IOCON_P5_0 (*((volatile unsigned int *) 0x4002C280)) //D (IOCON type) |
71GA | 0:c1305ab902af | 175 | #define IOCON_P5_1 (*((volatile unsigned int *) 0x4002C284)) //D |
71GA | 0:c1305ab902af | 176 | #define IOCON_P5_2 (*((volatile unsigned int *) 0x4002C288)) //I |
71GA | 0:c1305ab902af | 177 | #define IOCON_P5_3 (*((volatile unsigned int *) 0x4002C28C)) //I |
71GA | 0:c1305ab902af | 178 | #define IOCON_P5_4 (*((volatile unsigned int *) 0x4002C290)) //D |