Driver for the SX1280 RF Transceiver
Dependents: SX1280PingPong RangignMaster RangingSlave MSNV2-Terminal_V1-6 ... more
sx1280.cpp@7:88669efa3779, 2017-05-23 (annotated)
- Committer:
- Matthieu Verdy
- Date:
- Tue May 23 18:22:42 2017 +0200
- Revision:
- 7:88669efa3779
- Parent:
- 6:057a5290df98
- Child:
- 9:3e5535d2cc1c
Rename AUTORX to AUTOFS
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
GregCr | 0:03ec2f3bde8c | 1 | /* |
GregCr | 0:03ec2f3bde8c | 2 | ______ _ |
GregCr | 0:03ec2f3bde8c | 3 | / _____) _ | | |
GregCr | 0:03ec2f3bde8c | 4 | ( (____ _____ ____ _| |_ _____ ____| |__ |
GregCr | 0:03ec2f3bde8c | 5 | \____ \| ___ | (_ _) ___ |/ ___) _ \ |
GregCr | 0:03ec2f3bde8c | 6 | _____) ) ____| | | || |_| ____( (___| | | | |
GregCr | 0:03ec2f3bde8c | 7 | (______/|_____)_|_|_| \__)_____)\____)_| |_| |
GregCr | 0:03ec2f3bde8c | 8 | (C)2016 Semtech |
GregCr | 0:03ec2f3bde8c | 9 | |
GregCr | 0:03ec2f3bde8c | 10 | Description: Driver for SX1280 devices |
GregCr | 0:03ec2f3bde8c | 11 | |
GregCr | 0:03ec2f3bde8c | 12 | License: Revised BSD License, see LICENSE.TXT file include in the project |
GregCr | 0:03ec2f3bde8c | 13 | |
GregCr | 0:03ec2f3bde8c | 14 | Maintainer: Miguel Luis, Gregory Cristian and Matthieu Verdy |
GregCr | 0:03ec2f3bde8c | 15 | */ |
GregCr | 0:03ec2f3bde8c | 16 | #include "mbed.h" |
GregCr | 0:03ec2f3bde8c | 17 | #include "sx1280.h" |
GregCr | 0:03ec2f3bde8c | 18 | #include "sx1280-hal.h" |
GregCr | 0:03ec2f3bde8c | 19 | |
GregCr | 0:03ec2f3bde8c | 20 | /*! |
GregCr | 0:03ec2f3bde8c | 21 | * \brief ContinuousMode and SingleMode are two particular values for TickTime. |
GregCr | 0:03ec2f3bde8c | 22 | * The ContinuousMode keeps the radio in Rx or Tx mode, even after successfull reception |
GregCr | 0:03ec2f3bde8c | 23 | * or transmission. It should never generate Timeout interrupt. |
GregCr | 0:03ec2f3bde8c | 24 | * The SingleMode lets the radio enought time to make one reception or transmission. |
GregCr | 0:03ec2f3bde8c | 25 | * No Timeout interrupt is generated, and the radio fall in StandBy mode after |
GregCr | 0:03ec2f3bde8c | 26 | * reception or transmission. |
GregCr | 0:03ec2f3bde8c | 27 | */ |
GregCr | 0:03ec2f3bde8c | 28 | TickTime_t ContinuousMode = { RADIO_TICK_SIZE_0015_US, 0xFFFF }; |
GregCr | 0:03ec2f3bde8c | 29 | TickTime_t SingleMode = { RADIO_TICK_SIZE_0015_US, 0xFFFF }; |
GregCr | 0:03ec2f3bde8c | 30 | |
GregCr | 0:03ec2f3bde8c | 31 | /*! |
GregCr | 0:03ec2f3bde8c | 32 | * \brief Radio registers definition |
GregCr | 0:03ec2f3bde8c | 33 | * |
GregCr | 0:03ec2f3bde8c | 34 | */ |
GregCr | 0:03ec2f3bde8c | 35 | typedef struct |
GregCr | 0:03ec2f3bde8c | 36 | { |
GregCr | 0:03ec2f3bde8c | 37 | uint16_t Addr; //!< The address of the register |
GregCr | 0:03ec2f3bde8c | 38 | uint8_t Value; //!< The value of the register |
GregCr | 0:03ec2f3bde8c | 39 | }RadioRegisters_t; |
GregCr | 0:03ec2f3bde8c | 40 | |
GregCr | 0:03ec2f3bde8c | 41 | /*! |
GregCr | 0:03ec2f3bde8c | 42 | * \brief Radio hardware registers initialization definition |
GregCr | 0:03ec2f3bde8c | 43 | */ |
GregCr | 0:03ec2f3bde8c | 44 | #define RADIO_INIT_REGISTERS_VALUE { } |
GregCr | 0:03ec2f3bde8c | 45 | |
GregCr | 0:03ec2f3bde8c | 46 | /*! |
GregCr | 0:03ec2f3bde8c | 47 | * \brief Radio hardware registers initialization |
GregCr | 0:03ec2f3bde8c | 48 | */ |
GregCr | 0:03ec2f3bde8c | 49 | const RadioRegisters_t RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE; |
GregCr | 0:03ec2f3bde8c | 50 | |
GregCr | 0:03ec2f3bde8c | 51 | void SX1280::Init( void ) |
GregCr | 0:03ec2f3bde8c | 52 | { |
GregCr | 0:03ec2f3bde8c | 53 | Reset( ); |
GregCr | 0:03ec2f3bde8c | 54 | IoIrqInit( dioIrq ); |
GregCr | 0:03ec2f3bde8c | 55 | Wakeup( ); |
GregCr | 0:03ec2f3bde8c | 56 | SetRegistersDefault( ); |
GregCr | 0:03ec2f3bde8c | 57 | } |
GregCr | 0:03ec2f3bde8c | 58 | |
GregCr | 0:03ec2f3bde8c | 59 | void SX1280::SetRegistersDefault( void ) |
GregCr | 0:03ec2f3bde8c | 60 | { |
GregCr | 0:03ec2f3bde8c | 61 | for( int16_t i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ ) |
GregCr | 0:03ec2f3bde8c | 62 | { |
GregCr | 0:03ec2f3bde8c | 63 | WriteRegister( RadioRegsInit[i].Addr, RadioRegsInit[i].Value ); |
GregCr | 0:03ec2f3bde8c | 64 | } |
GregCr | 0:03ec2f3bde8c | 65 | } |
GregCr | 0:03ec2f3bde8c | 66 | |
GregCr | 0:03ec2f3bde8c | 67 | uint16_t SX1280::GetFirmwareVersion( void ) |
GregCr | 0:03ec2f3bde8c | 68 | { |
GregCr | 4:abf14b677777 | 69 | return( ( ( ReadRegister( 0xA8 ) ) << 8 ) | ( ReadRegister( 0xA9 ) ) ); |
GregCr | 0:03ec2f3bde8c | 70 | } |
GregCr | 0:03ec2f3bde8c | 71 | |
GregCr | 0:03ec2f3bde8c | 72 | RadioStatus_t SX1280::GetStatus( void ) |
GregCr | 0:03ec2f3bde8c | 73 | { |
GregCr | 0:03ec2f3bde8c | 74 | uint8_t stat = 0; |
GregCr | 0:03ec2f3bde8c | 75 | RadioStatus_t status; |
GregCr | 0:03ec2f3bde8c | 76 | |
GregCr | 0:03ec2f3bde8c | 77 | ReadCommand( RADIO_GET_STATUS, ( uint8_t * )&stat, 1 ); |
GregCr | 0:03ec2f3bde8c | 78 | status.Value = stat; |
GregCr | 0:03ec2f3bde8c | 79 | return( status ); |
GregCr | 0:03ec2f3bde8c | 80 | } |
GregCr | 0:03ec2f3bde8c | 81 | |
GregCr | 0:03ec2f3bde8c | 82 | RadioOperatingModes_t SX1280::GetOpMode( void ) |
GregCr | 0:03ec2f3bde8c | 83 | { |
GregCr | 0:03ec2f3bde8c | 84 | return( OperatingMode ); |
GregCr | 0:03ec2f3bde8c | 85 | } |
GregCr | 0:03ec2f3bde8c | 86 | |
GregCr | 0:03ec2f3bde8c | 87 | void SX1280::SetSleep( SleepParams_t sleepConfig ) |
GregCr | 0:03ec2f3bde8c | 88 | { |
GregCr | 0:03ec2f3bde8c | 89 | uint8_t sleep = ( sleepConfig.WakeUpRTC << 3 ) | |
GregCr | 0:03ec2f3bde8c | 90 | ( sleepConfig.InstructionRamRetention << 2 ) | |
GregCr | 0:03ec2f3bde8c | 91 | ( sleepConfig.DataBufferRetention << 1 ) | |
GregCr | 0:03ec2f3bde8c | 92 | ( sleepConfig.DataRamRetention ); |
GregCr | 0:03ec2f3bde8c | 93 | |
GregCr | 0:03ec2f3bde8c | 94 | OperatingMode = MODE_SLEEP; |
GregCr | 0:03ec2f3bde8c | 95 | WriteCommand( RADIO_SET_SLEEP, &sleep, 1 ); |
GregCr | 0:03ec2f3bde8c | 96 | } |
GregCr | 0:03ec2f3bde8c | 97 | |
GregCr | 0:03ec2f3bde8c | 98 | void SX1280::SetStandby( RadioStandbyModes_t standbyConfig ) |
GregCr | 0:03ec2f3bde8c | 99 | { |
GregCr | 0:03ec2f3bde8c | 100 | WriteCommand( RADIO_SET_STANDBY, ( uint8_t* )&standbyConfig, 1 ); |
GregCr | 0:03ec2f3bde8c | 101 | if( standbyConfig == STDBY_RC ) |
GregCr | 0:03ec2f3bde8c | 102 | { |
GregCr | 0:03ec2f3bde8c | 103 | OperatingMode = MODE_STDBY_RC; |
GregCr | 0:03ec2f3bde8c | 104 | } |
GregCr | 0:03ec2f3bde8c | 105 | else |
GregCr | 0:03ec2f3bde8c | 106 | { |
GregCr | 0:03ec2f3bde8c | 107 | OperatingMode = MODE_STDBY_XOSC; |
GregCr | 0:03ec2f3bde8c | 108 | } |
GregCr | 0:03ec2f3bde8c | 109 | } |
GregCr | 0:03ec2f3bde8c | 110 | |
GregCr | 0:03ec2f3bde8c | 111 | void SX1280::SetFs( void ) |
GregCr | 0:03ec2f3bde8c | 112 | { |
GregCr | 0:03ec2f3bde8c | 113 | WriteCommand( RADIO_SET_FS, 0, 0 ); |
GregCr | 0:03ec2f3bde8c | 114 | OperatingMode = MODE_FS; |
GregCr | 0:03ec2f3bde8c | 115 | } |
GregCr | 0:03ec2f3bde8c | 116 | |
GregCr | 0:03ec2f3bde8c | 117 | void SX1280::SetTx( TickTime_t timeout ) |
GregCr | 0:03ec2f3bde8c | 118 | { |
GregCr | 0:03ec2f3bde8c | 119 | uint8_t buf[3]; |
GregCr | 4:abf14b677777 | 120 | buf[0] = timeout.PeriodBase; |
GregCr | 4:abf14b677777 | 121 | buf[1] = ( uint8_t )( ( timeout.PeriodBaseCount >> 8 ) & 0x00FF ); |
GregCr | 4:abf14b677777 | 122 | buf[2] = ( uint8_t )( timeout.PeriodBaseCount & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 123 | |
GregCr | 0:03ec2f3bde8c | 124 | ClearIrqStatus( IRQ_RADIO_ALL ); |
GregCr | 4:abf14b677777 | 125 | |
GregCr | 0:03ec2f3bde8c | 126 | // If the radio is doing ranging operations, then apply the specific calls |
GregCr | 0:03ec2f3bde8c | 127 | // prior to SetTx |
GregCr | 4:abf14b677777 | 128 | if( GetPacketType( true ) == PACKET_TYPE_RANGING ) |
GregCr | 0:03ec2f3bde8c | 129 | { |
GregCr | 0:03ec2f3bde8c | 130 | SetRangingRole( RADIO_RANGING_ROLE_MASTER ); |
GregCr | 0:03ec2f3bde8c | 131 | } |
GregCr | 0:03ec2f3bde8c | 132 | WriteCommand( RADIO_SET_TX, buf, 3 ); |
GregCr | 0:03ec2f3bde8c | 133 | OperatingMode = MODE_TX; |
GregCr | 0:03ec2f3bde8c | 134 | } |
GregCr | 0:03ec2f3bde8c | 135 | |
GregCr | 0:03ec2f3bde8c | 136 | void SX1280::SetRx( TickTime_t timeout ) |
GregCr | 0:03ec2f3bde8c | 137 | { |
GregCr | 0:03ec2f3bde8c | 138 | uint8_t buf[3]; |
GregCr | 4:abf14b677777 | 139 | buf[0] = timeout.PeriodBase; |
GregCr | 4:abf14b677777 | 140 | buf[1] = ( uint8_t )( ( timeout.PeriodBaseCount >> 8 ) & 0x00FF ); |
GregCr | 4:abf14b677777 | 141 | buf[2] = ( uint8_t )( timeout.PeriodBaseCount & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 142 | |
GregCr | 0:03ec2f3bde8c | 143 | ClearIrqStatus( IRQ_RADIO_ALL ); |
GregCr | 4:abf14b677777 | 144 | |
GregCr | 0:03ec2f3bde8c | 145 | // If the radio is doing ranging operations, then apply the specific calls |
GregCr | 0:03ec2f3bde8c | 146 | // prior to SetRx |
GregCr | 4:abf14b677777 | 147 | if( GetPacketType( true ) == PACKET_TYPE_RANGING ) |
GregCr | 0:03ec2f3bde8c | 148 | { |
GregCr | 0:03ec2f3bde8c | 149 | SetRangingRole( RADIO_RANGING_ROLE_SLAVE ); |
GregCr | 0:03ec2f3bde8c | 150 | } |
GregCr | 0:03ec2f3bde8c | 151 | WriteCommand( RADIO_SET_RX, buf, 3 ); |
GregCr | 0:03ec2f3bde8c | 152 | OperatingMode = MODE_RX; |
GregCr | 0:03ec2f3bde8c | 153 | } |
GregCr | 0:03ec2f3bde8c | 154 | |
GregCr | 4:abf14b677777 | 155 | void SX1280::SetRxDutyCycle( RadioTickSizes_t periodBase, uint16_t periodBaseCountRx, uint16_t periodBaseCountSleep ) |
GregCr | 0:03ec2f3bde8c | 156 | { |
GregCr | 0:03ec2f3bde8c | 157 | uint8_t buf[5]; |
GregCr | 0:03ec2f3bde8c | 158 | |
GregCr | 4:abf14b677777 | 159 | buf[0] = periodBase; |
GregCr | 4:abf14b677777 | 160 | buf[1] = ( uint8_t )( ( periodBaseCountRx >> 8 ) & 0x00FF ); |
GregCr | 4:abf14b677777 | 161 | buf[2] = ( uint8_t )( periodBaseCountRx & 0x00FF ); |
GregCr | 4:abf14b677777 | 162 | buf[3] = ( uint8_t )( ( periodBaseCountSleep >> 8 ) & 0x00FF ); |
GregCr | 4:abf14b677777 | 163 | buf[4] = ( uint8_t )( periodBaseCountSleep & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 164 | WriteCommand( RADIO_SET_RXDUTYCYCLE, buf, 5 ); |
GregCr | 0:03ec2f3bde8c | 165 | OperatingMode = MODE_RX; |
GregCr | 0:03ec2f3bde8c | 166 | } |
GregCr | 0:03ec2f3bde8c | 167 | |
GregCr | 0:03ec2f3bde8c | 168 | void SX1280::SetCad( void ) |
GregCr | 0:03ec2f3bde8c | 169 | { |
GregCr | 0:03ec2f3bde8c | 170 | WriteCommand( RADIO_SET_CAD, 0, 0 ); |
GregCr | 0:03ec2f3bde8c | 171 | OperatingMode = MODE_CAD; |
GregCr | 0:03ec2f3bde8c | 172 | } |
GregCr | 0:03ec2f3bde8c | 173 | |
GregCr | 0:03ec2f3bde8c | 174 | void SX1280::SetTxContinuousWave( void ) |
GregCr | 0:03ec2f3bde8c | 175 | { |
GregCr | 0:03ec2f3bde8c | 176 | WriteCommand( RADIO_SET_TXCONTINUOUSWAVE, 0, 0 ); |
GregCr | 0:03ec2f3bde8c | 177 | } |
GregCr | 0:03ec2f3bde8c | 178 | |
GregCr | 0:03ec2f3bde8c | 179 | void SX1280::SetTxContinuousPreamble( void ) |
GregCr | 0:03ec2f3bde8c | 180 | { |
GregCr | 0:03ec2f3bde8c | 181 | WriteCommand( RADIO_SET_TXCONTINUOUSPREAMBLE, 0, 0 ); |
GregCr | 0:03ec2f3bde8c | 182 | } |
GregCr | 0:03ec2f3bde8c | 183 | |
GregCr | 0:03ec2f3bde8c | 184 | void SX1280::SetPacketType( RadioPacketTypes_t packetType ) |
GregCr | 0:03ec2f3bde8c | 185 | { |
GregCr | 0:03ec2f3bde8c | 186 | // Save packet type internally to avoid questioning the radio |
GregCr | 0:03ec2f3bde8c | 187 | this->PacketType = packetType; |
GregCr | 0:03ec2f3bde8c | 188 | |
GregCr | 0:03ec2f3bde8c | 189 | WriteCommand( RADIO_SET_PACKETTYPE, ( uint8_t* )&packetType, 1 ); |
GregCr | 0:03ec2f3bde8c | 190 | } |
GregCr | 0:03ec2f3bde8c | 191 | |
GregCr | 5:b4014e8b7be1 | 192 | RadioPacketTypes_t SX1280::GetPacketType( bool returnLocalCopy ) |
GregCr | 0:03ec2f3bde8c | 193 | { |
GregCr | 4:abf14b677777 | 194 | RadioPacketTypes_t packetType = PACKET_TYPE_NONE; |
GregCr | 5:b4014e8b7be1 | 195 | if( returnLocalCopy == false ) |
GregCr | 4:abf14b677777 | 196 | { |
GregCr | 4:abf14b677777 | 197 | ReadCommand( RADIO_GET_PACKETTYPE, ( uint8_t* )&packetType, 1 ); |
GregCr | 4:abf14b677777 | 198 | if( this->PacketType != packetType ) |
GregCr | 4:abf14b677777 | 199 | { |
GregCr | 4:abf14b677777 | 200 | this->PacketType = packetType; |
GregCr | 4:abf14b677777 | 201 | } |
GregCr | 4:abf14b677777 | 202 | } |
GregCr | 4:abf14b677777 | 203 | else |
GregCr | 4:abf14b677777 | 204 | { |
GregCr | 4:abf14b677777 | 205 | packetType = this->PacketType; |
GregCr | 4:abf14b677777 | 206 | } |
GregCr | 4:abf14b677777 | 207 | return packetType; |
GregCr | 0:03ec2f3bde8c | 208 | } |
GregCr | 0:03ec2f3bde8c | 209 | |
GregCr | 4:abf14b677777 | 210 | void SX1280::SetRfFrequency( uint32_t rfFrequency ) |
GregCr | 0:03ec2f3bde8c | 211 | { |
GregCr | 0:03ec2f3bde8c | 212 | uint8_t buf[3]; |
GregCr | 0:03ec2f3bde8c | 213 | uint32_t freq = 0; |
GregCr | 0:03ec2f3bde8c | 214 | |
GregCr | 4:abf14b677777 | 215 | freq = ( uint32_t )( ( double )rfFrequency / ( double )FREQ_STEP ); |
GregCr | 0:03ec2f3bde8c | 216 | buf[0] = ( uint8_t )( ( freq >> 16 ) & 0xFF ); |
GregCr | 0:03ec2f3bde8c | 217 | buf[1] = ( uint8_t )( ( freq >> 8 ) & 0xFF ); |
GregCr | 0:03ec2f3bde8c | 218 | buf[2] = ( uint8_t )( freq & 0xFF ); |
GregCr | 0:03ec2f3bde8c | 219 | WriteCommand( RADIO_SET_RFFREQUENCY, buf, 3 ); |
GregCr | 0:03ec2f3bde8c | 220 | } |
GregCr | 0:03ec2f3bde8c | 221 | |
GregCr | 0:03ec2f3bde8c | 222 | void SX1280::SetTxParams( int8_t power, RadioRampTimes_t rampTime ) |
GregCr | 0:03ec2f3bde8c | 223 | { |
GregCr | 0:03ec2f3bde8c | 224 | uint8_t buf[2]; |
GregCr | 0:03ec2f3bde8c | 225 | |
GregCr | 0:03ec2f3bde8c | 226 | // The power value to send on SPI/UART is in the range [0..31] and the |
GregCr | 0:03ec2f3bde8c | 227 | // physical output power is in the range [-18..13]dBm |
GregCr | 0:03ec2f3bde8c | 228 | buf[0] = power + 18; |
GregCr | 0:03ec2f3bde8c | 229 | buf[1] = ( uint8_t )rampTime; |
GregCr | 0:03ec2f3bde8c | 230 | WriteCommand( RADIO_SET_TXPARAMS, buf, 2 ); |
GregCr | 0:03ec2f3bde8c | 231 | } |
GregCr | 0:03ec2f3bde8c | 232 | |
GregCr | 0:03ec2f3bde8c | 233 | void SX1280::SetCadParams( RadioLoRaCadSymbols_t cadSymbolNum ) |
GregCr | 0:03ec2f3bde8c | 234 | { |
GregCr | 0:03ec2f3bde8c | 235 | WriteCommand( RADIO_SET_CADPARAMS, ( uint8_t* )&cadSymbolNum, 1 ); |
GregCr | 0:03ec2f3bde8c | 236 | OperatingMode = MODE_CAD; |
GregCr | 0:03ec2f3bde8c | 237 | } |
GregCr | 0:03ec2f3bde8c | 238 | |
GregCr | 0:03ec2f3bde8c | 239 | void SX1280::SetBufferBaseAddresses( uint8_t txBaseAddress, uint8_t rxBaseAddress ) |
GregCr | 0:03ec2f3bde8c | 240 | { |
GregCr | 0:03ec2f3bde8c | 241 | uint8_t buf[2]; |
GregCr | 0:03ec2f3bde8c | 242 | |
GregCr | 0:03ec2f3bde8c | 243 | buf[0] = txBaseAddress; |
GregCr | 0:03ec2f3bde8c | 244 | buf[1] = rxBaseAddress; |
GregCr | 0:03ec2f3bde8c | 245 | WriteCommand( RADIO_SET_BUFFERBASEADDRESS, buf, 2 ); |
GregCr | 0:03ec2f3bde8c | 246 | } |
GregCr | 0:03ec2f3bde8c | 247 | |
GregCr | 4:abf14b677777 | 248 | void SX1280::SetModulationParams( ModulationParams_t *modParams ) |
GregCr | 0:03ec2f3bde8c | 249 | { |
GregCr | 0:03ec2f3bde8c | 250 | uint8_t buf[3]; |
GregCr | 0:03ec2f3bde8c | 251 | |
GregCr | 0:03ec2f3bde8c | 252 | // Check if required configuration corresponds to the stored packet type |
GregCr | 0:03ec2f3bde8c | 253 | // If not, silently update radio packet type |
GregCr | 4:abf14b677777 | 254 | if( this->PacketType != modParams->PacketType ) |
GregCr | 0:03ec2f3bde8c | 255 | { |
GregCr | 4:abf14b677777 | 256 | this->SetPacketType( modParams->PacketType ); |
GregCr | 0:03ec2f3bde8c | 257 | } |
GregCr | 0:03ec2f3bde8c | 258 | |
GregCr | 4:abf14b677777 | 259 | switch( modParams->PacketType ) |
GregCr | 0:03ec2f3bde8c | 260 | { |
GregCr | 0:03ec2f3bde8c | 261 | case PACKET_TYPE_GFSK: |
GregCr | 4:abf14b677777 | 262 | buf[0] = modParams->Params.Gfsk.BitrateBandwidth; |
GregCr | 4:abf14b677777 | 263 | buf[1] = modParams->Params.Gfsk.ModulationIndex; |
GregCr | 4:abf14b677777 | 264 | buf[2] = modParams->Params.Gfsk.ModulationShaping; |
GregCr | 0:03ec2f3bde8c | 265 | break; |
GregCr | 0:03ec2f3bde8c | 266 | case PACKET_TYPE_LORA: |
GregCr | 0:03ec2f3bde8c | 267 | case PACKET_TYPE_RANGING: |
GregCr | 4:abf14b677777 | 268 | buf[0] = modParams->Params.LoRa.SpreadingFactor; |
GregCr | 4:abf14b677777 | 269 | buf[1] = modParams->Params.LoRa.Bandwidth; |
GregCr | 4:abf14b677777 | 270 | buf[2] = modParams->Params.LoRa.CodingRate; |
GregCr | 4:abf14b677777 | 271 | this->LoRaBandwidth = modParams->Params.LoRa.Bandwidth; |
GregCr | 0:03ec2f3bde8c | 272 | break; |
GregCr | 0:03ec2f3bde8c | 273 | case PACKET_TYPE_FLRC: |
GregCr | 4:abf14b677777 | 274 | buf[0] = modParams->Params.Flrc.BitrateBandwidth; |
GregCr | 4:abf14b677777 | 275 | buf[1] = modParams->Params.Flrc.CodingRate; |
GregCr | 4:abf14b677777 | 276 | buf[2] = modParams->Params.Flrc.ModulationShaping; |
GregCr | 0:03ec2f3bde8c | 277 | break; |
GregCr | 0:03ec2f3bde8c | 278 | case PACKET_TYPE_BLE: |
GregCr | 4:abf14b677777 | 279 | buf[0] = modParams->Params.Ble.BitrateBandwidth; |
GregCr | 4:abf14b677777 | 280 | buf[1] = modParams->Params.Ble.ModulationIndex; |
GregCr | 4:abf14b677777 | 281 | buf[2] = modParams->Params.Ble.ModulationShaping; |
GregCr | 0:03ec2f3bde8c | 282 | break; |
GregCr | 0:03ec2f3bde8c | 283 | case PACKET_TYPE_NONE: |
GregCr | 0:03ec2f3bde8c | 284 | buf[0] = NULL; |
GregCr | 0:03ec2f3bde8c | 285 | buf[1] = NULL; |
GregCr | 0:03ec2f3bde8c | 286 | buf[2] = NULL; |
GregCr | 0:03ec2f3bde8c | 287 | break; |
GregCr | 0:03ec2f3bde8c | 288 | } |
GregCr | 0:03ec2f3bde8c | 289 | WriteCommand( RADIO_SET_MODULATIONPARAMS, buf, 3 ); |
GregCr | 0:03ec2f3bde8c | 290 | } |
GregCr | 0:03ec2f3bde8c | 291 | |
GregCr | 0:03ec2f3bde8c | 292 | void SX1280::SetPacketParams( PacketParams_t *packetParams ) |
GregCr | 0:03ec2f3bde8c | 293 | { |
GregCr | 0:03ec2f3bde8c | 294 | uint8_t buf[7]; |
GregCr | 0:03ec2f3bde8c | 295 | // Check if required configuration corresponds to the stored packet type |
GregCr | 0:03ec2f3bde8c | 296 | // If not, silently update radio packet type |
GregCr | 0:03ec2f3bde8c | 297 | if( this->PacketType != packetParams->PacketType ) |
GregCr | 0:03ec2f3bde8c | 298 | { |
GregCr | 0:03ec2f3bde8c | 299 | this->SetPacketType( packetParams->PacketType ); |
GregCr | 0:03ec2f3bde8c | 300 | } |
GregCr | 0:03ec2f3bde8c | 301 | |
GregCr | 0:03ec2f3bde8c | 302 | switch( packetParams->PacketType ) |
GregCr | 0:03ec2f3bde8c | 303 | { |
GregCr | 0:03ec2f3bde8c | 304 | case PACKET_TYPE_GFSK: |
GregCr | 0:03ec2f3bde8c | 305 | buf[0] = packetParams->Params.Gfsk.PreambleLength; |
GregCr | 0:03ec2f3bde8c | 306 | buf[1] = packetParams->Params.Gfsk.SyncWordLength; |
GregCr | 0:03ec2f3bde8c | 307 | buf[2] = packetParams->Params.Gfsk.SyncWordMatch; |
GregCr | 0:03ec2f3bde8c | 308 | buf[3] = packetParams->Params.Gfsk.HeaderType; |
GregCr | 0:03ec2f3bde8c | 309 | buf[4] = packetParams->Params.Gfsk.PayloadLength; |
GregCr | 0:03ec2f3bde8c | 310 | buf[5] = packetParams->Params.Gfsk.CrcLength; |
GregCr | 0:03ec2f3bde8c | 311 | buf[6] = packetParams->Params.Gfsk.Whitening; |
GregCr | 0:03ec2f3bde8c | 312 | break; |
GregCr | 0:03ec2f3bde8c | 313 | case PACKET_TYPE_LORA: |
GregCr | 0:03ec2f3bde8c | 314 | case PACKET_TYPE_RANGING: |
GregCr | 0:03ec2f3bde8c | 315 | buf[0] = packetParams->Params.LoRa.PreambleLength; |
GregCr | 0:03ec2f3bde8c | 316 | buf[1] = packetParams->Params.LoRa.HeaderType; |
GregCr | 0:03ec2f3bde8c | 317 | buf[2] = packetParams->Params.LoRa.PayloadLength; |
GregCr | 4:abf14b677777 | 318 | buf[3] = packetParams->Params.LoRa.Crc; |
GregCr | 0:03ec2f3bde8c | 319 | buf[4] = packetParams->Params.LoRa.InvertIQ; |
GregCr | 0:03ec2f3bde8c | 320 | buf[5] = NULL; |
GregCr | 0:03ec2f3bde8c | 321 | buf[6] = NULL; |
GregCr | 0:03ec2f3bde8c | 322 | break; |
GregCr | 0:03ec2f3bde8c | 323 | case PACKET_TYPE_FLRC: |
GregCr | 0:03ec2f3bde8c | 324 | buf[0] = packetParams->Params.Flrc.PreambleLength; |
GregCr | 0:03ec2f3bde8c | 325 | buf[1] = packetParams->Params.Flrc.SyncWordLength; |
GregCr | 0:03ec2f3bde8c | 326 | buf[2] = packetParams->Params.Flrc.SyncWordMatch; |
GregCr | 0:03ec2f3bde8c | 327 | buf[3] = packetParams->Params.Flrc.HeaderType; |
GregCr | 0:03ec2f3bde8c | 328 | buf[4] = packetParams->Params.Flrc.PayloadLength; |
GregCr | 0:03ec2f3bde8c | 329 | buf[5] = packetParams->Params.Flrc.CrcLength; |
GregCr | 0:03ec2f3bde8c | 330 | buf[6] = packetParams->Params.Flrc.Whitening; |
GregCr | 0:03ec2f3bde8c | 331 | break; |
GregCr | 0:03ec2f3bde8c | 332 | case PACKET_TYPE_BLE: |
GregCr | 0:03ec2f3bde8c | 333 | buf[0] = packetParams->Params.Ble.ConnectionState; |
GregCr | 4:abf14b677777 | 334 | buf[1] = packetParams->Params.Ble.CrcLength; |
GregCr | 4:abf14b677777 | 335 | buf[2] = packetParams->Params.Ble.BleTestPayload; |
GregCr | 0:03ec2f3bde8c | 336 | buf[3] = packetParams->Params.Ble.Whitening; |
GregCr | 0:03ec2f3bde8c | 337 | buf[4] = NULL; |
GregCr | 0:03ec2f3bde8c | 338 | buf[5] = NULL; |
GregCr | 0:03ec2f3bde8c | 339 | buf[6] = NULL; |
GregCr | 0:03ec2f3bde8c | 340 | break; |
GregCr | 0:03ec2f3bde8c | 341 | case PACKET_TYPE_NONE: |
GregCr | 0:03ec2f3bde8c | 342 | buf[0] = NULL; |
GregCr | 0:03ec2f3bde8c | 343 | buf[1] = NULL; |
GregCr | 0:03ec2f3bde8c | 344 | buf[2] = NULL; |
GregCr | 0:03ec2f3bde8c | 345 | buf[3] = NULL; |
GregCr | 0:03ec2f3bde8c | 346 | buf[4] = NULL; |
GregCr | 0:03ec2f3bde8c | 347 | buf[5] = NULL; |
GregCr | 0:03ec2f3bde8c | 348 | buf[6] = NULL; |
GregCr | 0:03ec2f3bde8c | 349 | break; |
GregCr | 0:03ec2f3bde8c | 350 | } |
GregCr | 0:03ec2f3bde8c | 351 | WriteCommand( RADIO_SET_PACKETPARAMS, buf, 7 ); |
GregCr | 0:03ec2f3bde8c | 352 | } |
GregCr | 0:03ec2f3bde8c | 353 | |
GregCr | 4:abf14b677777 | 354 | void SX1280::ForcePreambleLength( RadioPreambleLengths_t preambleLength ) |
GregCr | 4:abf14b677777 | 355 | { |
GregCr | 4:abf14b677777 | 356 | this->WriteRegister( REG_LR_PREAMBLELENGTH, ( this->ReadRegister( REG_LR_PREAMBLELENGTH ) & MASK_FORCE_PREAMBLELENGTH ) | preambleLength ); |
GregCr | 4:abf14b677777 | 357 | } |
GregCr | 4:abf14b677777 | 358 | |
GregCr | 4:abf14b677777 | 359 | void SX1280::GetRxBufferStatus( uint8_t *rxPayloadLength, uint8_t *rxStartBufferPointer ) |
GregCr | 0:03ec2f3bde8c | 360 | { |
GregCr | 0:03ec2f3bde8c | 361 | uint8_t status[2]; |
GregCr | 0:03ec2f3bde8c | 362 | |
GregCr | 0:03ec2f3bde8c | 363 | ReadCommand( RADIO_GET_RXBUFFERSTATUS, status, 2 ); |
GregCr | 0:03ec2f3bde8c | 364 | |
GregCr | 4:abf14b677777 | 365 | // In case of LORA fixed header, the rxPayloadLength is obtained by reading |
GregCr | 0:03ec2f3bde8c | 366 | // the register REG_LR_PAYLOADLENGTH |
GregCr | 4:abf14b677777 | 367 | if( ( this -> GetPacketType( true ) == PACKET_TYPE_LORA ) && ( ReadRegister( REG_LR_PACKETPARAMS ) >> 7 == 1 ) ) |
GregCr | 0:03ec2f3bde8c | 368 | { |
GregCr | 4:abf14b677777 | 369 | *rxPayloadLength = ReadRegister( REG_LR_PAYLOADLENGTH ); |
GregCr | 0:03ec2f3bde8c | 370 | } |
GregCr | 0:03ec2f3bde8c | 371 | else |
GregCr | 0:03ec2f3bde8c | 372 | { |
GregCr | 4:abf14b677777 | 373 | *rxPayloadLength = status[0]; |
GregCr | 0:03ec2f3bde8c | 374 | } |
GregCr | 0:03ec2f3bde8c | 375 | |
GregCr | 0:03ec2f3bde8c | 376 | *rxStartBufferPointer = status[1]; |
GregCr | 0:03ec2f3bde8c | 377 | } |
GregCr | 0:03ec2f3bde8c | 378 | |
GregCr | 4:abf14b677777 | 379 | void SX1280::GetPacketStatus( PacketStatus_t *packetStatus ) |
GregCr | 0:03ec2f3bde8c | 380 | { |
GregCr | 0:03ec2f3bde8c | 381 | uint8_t status[5]; |
GregCr | 0:03ec2f3bde8c | 382 | |
GregCr | 0:03ec2f3bde8c | 383 | ReadCommand( RADIO_GET_PACKETSTATUS, status, 5 ); |
GregCr | 0:03ec2f3bde8c | 384 | |
GregCr | 4:abf14b677777 | 385 | packetStatus->packetType = this -> GetPacketType( true ); |
GregCr | 4:abf14b677777 | 386 | switch( packetStatus->packetType ) |
GregCr | 0:03ec2f3bde8c | 387 | { |
GregCr | 0:03ec2f3bde8c | 388 | case PACKET_TYPE_GFSK: |
GregCr | 4:abf14b677777 | 389 | packetStatus->Gfsk.RssiSync = -( status[1] / 2 ); |
GregCr | 0:03ec2f3bde8c | 390 | |
GregCr | 4:abf14b677777 | 391 | packetStatus->Gfsk.ErrorStatus.SyncError = ( status[2] >> 6 ) & 0x01; |
GregCr | 4:abf14b677777 | 392 | packetStatus->Gfsk.ErrorStatus.LengthError = ( status[2] >> 5 ) & 0x01; |
GregCr | 4:abf14b677777 | 393 | packetStatus->Gfsk.ErrorStatus.CrcError = ( status[2] >> 4 ) & 0x01; |
GregCr | 4:abf14b677777 | 394 | packetStatus->Gfsk.ErrorStatus.AbortError = ( status[2] >> 3 ) & 0x01; |
GregCr | 4:abf14b677777 | 395 | packetStatus->Gfsk.ErrorStatus.HeaderReceived = ( status[2] >> 2 ) & 0x01; |
GregCr | 4:abf14b677777 | 396 | packetStatus->Gfsk.ErrorStatus.PacketReceived = ( status[2] >> 1 ) & 0x01; |
GregCr | 4:abf14b677777 | 397 | packetStatus->Gfsk.ErrorStatus.PacketControlerBusy = status[2] & 0x01; |
GregCr | 0:03ec2f3bde8c | 398 | |
GregCr | 4:abf14b677777 | 399 | packetStatus->Gfsk.TxRxStatus.RxNoAck = ( status[3] >> 5 ) & 0x01; |
GregCr | 4:abf14b677777 | 400 | packetStatus->Gfsk.TxRxStatus.PacketSent = status[3] & 0x01; |
GregCr | 0:03ec2f3bde8c | 401 | |
GregCr | 4:abf14b677777 | 402 | packetStatus->Gfsk.SyncAddrStatus = status[4] & 0x07; |
GregCr | 0:03ec2f3bde8c | 403 | break; |
GregCr | 0:03ec2f3bde8c | 404 | |
GregCr | 0:03ec2f3bde8c | 405 | case PACKET_TYPE_LORA: |
GregCr | 0:03ec2f3bde8c | 406 | case PACKET_TYPE_RANGING: |
GregCr | 4:abf14b677777 | 407 | packetStatus->LoRa.RssiPkt = -( status[0] / 2 ); |
GregCr | 4:abf14b677777 | 408 | ( status[1] < 128 ) ? ( packetStatus->LoRa.SnrPkt = status[1] / 4 ) : ( packetStatus->LoRa.SnrPkt = ( ( status[1] - 256 ) /4 ) ); |
GregCr | 0:03ec2f3bde8c | 409 | break; |
GregCr | 0:03ec2f3bde8c | 410 | |
GregCr | 0:03ec2f3bde8c | 411 | case PACKET_TYPE_FLRC: |
GregCr | 4:abf14b677777 | 412 | packetStatus->Flrc.RssiSync = -( status[1] / 2 ); |
GregCr | 0:03ec2f3bde8c | 413 | |
GregCr | 4:abf14b677777 | 414 | packetStatus->Flrc.ErrorStatus.SyncError = ( status[2] >> 6 ) & 0x01; |
GregCr | 4:abf14b677777 | 415 | packetStatus->Flrc.ErrorStatus.LengthError = ( status[2] >> 5 ) & 0x01; |
GregCr | 4:abf14b677777 | 416 | packetStatus->Flrc.ErrorStatus.CrcError = ( status[2] >> 4 ) & 0x01; |
GregCr | 4:abf14b677777 | 417 | packetStatus->Flrc.ErrorStatus.AbortError = ( status[2] >> 3 ) & 0x01; |
GregCr | 4:abf14b677777 | 418 | packetStatus->Flrc.ErrorStatus.HeaderReceived = ( status[2] >> 2 ) & 0x01; |
GregCr | 4:abf14b677777 | 419 | packetStatus->Flrc.ErrorStatus.PacketReceived = ( status[2] >> 1 ) & 0x01; |
GregCr | 4:abf14b677777 | 420 | packetStatus->Flrc.ErrorStatus.PacketControlerBusy = status[2] & 0x01; |
GregCr | 0:03ec2f3bde8c | 421 | |
GregCr | 4:abf14b677777 | 422 | packetStatus->Flrc.TxRxStatus.RxPid = ( status[3] >> 6 ) & 0x03; |
GregCr | 4:abf14b677777 | 423 | packetStatus->Flrc.TxRxStatus.RxNoAck = ( status[3] >> 5 ) & 0x01; |
GregCr | 4:abf14b677777 | 424 | packetStatus->Flrc.TxRxStatus.RxPidErr = ( status[3] >> 4 ) & 0x01; |
GregCr | 4:abf14b677777 | 425 | packetStatus->Flrc.TxRxStatus.PacketSent = status[3] & 0x01; |
GregCr | 0:03ec2f3bde8c | 426 | |
GregCr | 4:abf14b677777 | 427 | packetStatus->Flrc.SyncAddrStatus = status[4] & 0x07; |
GregCr | 0:03ec2f3bde8c | 428 | break; |
GregCr | 0:03ec2f3bde8c | 429 | |
GregCr | 0:03ec2f3bde8c | 430 | case PACKET_TYPE_BLE: |
GregCr | 4:abf14b677777 | 431 | packetStatus->Ble.RssiSync = -( status[1] / 2 ); |
GregCr | 0:03ec2f3bde8c | 432 | |
GregCr | 4:abf14b677777 | 433 | packetStatus->Ble.ErrorStatus.SyncError = ( status[2] >> 6 ) & 0x01; |
GregCr | 4:abf14b677777 | 434 | packetStatus->Ble.ErrorStatus.LengthError = ( status[2] >> 5 ) & 0x01; |
GregCr | 4:abf14b677777 | 435 | packetStatus->Ble.ErrorStatus.CrcError = ( status[2] >> 4 ) & 0x01; |
GregCr | 4:abf14b677777 | 436 | packetStatus->Ble.ErrorStatus.AbortError = ( status[2] >> 3 ) & 0x01; |
GregCr | 4:abf14b677777 | 437 | packetStatus->Ble.ErrorStatus.HeaderReceived = ( status[2] >> 2 ) & 0x01; |
GregCr | 4:abf14b677777 | 438 | packetStatus->Ble.ErrorStatus.PacketReceived = ( status[2] >> 1 ) & 0x01; |
GregCr | 4:abf14b677777 | 439 | packetStatus->Ble.ErrorStatus.PacketControlerBusy = status[2] & 0x01; |
GregCr | 0:03ec2f3bde8c | 440 | |
GregCr | 4:abf14b677777 | 441 | packetStatus->Ble.TxRxStatus.PacketSent = status[3] & 0x01; |
GregCr | 0:03ec2f3bde8c | 442 | |
GregCr | 4:abf14b677777 | 443 | packetStatus->Ble.SyncAddrStatus = status[4] & 0x07; |
GregCr | 0:03ec2f3bde8c | 444 | break; |
GregCr | 0:03ec2f3bde8c | 445 | |
GregCr | 0:03ec2f3bde8c | 446 | case PACKET_TYPE_NONE: |
GregCr | 4:abf14b677777 | 447 | // In that specific case, we set everything in the packetStatus to zeros |
GregCr | 0:03ec2f3bde8c | 448 | // and reset the packet type accordingly |
GregCr | 4:abf14b677777 | 449 | memset( packetStatus, 0, sizeof( PacketStatus_t ) ); |
GregCr | 4:abf14b677777 | 450 | packetStatus->packetType = PACKET_TYPE_NONE; |
GregCr | 0:03ec2f3bde8c | 451 | break; |
GregCr | 0:03ec2f3bde8c | 452 | } |
GregCr | 0:03ec2f3bde8c | 453 | } |
GregCr | 0:03ec2f3bde8c | 454 | |
GregCr | 0:03ec2f3bde8c | 455 | int8_t SX1280::GetRssiInst( void ) |
GregCr | 0:03ec2f3bde8c | 456 | { |
GregCr | 0:03ec2f3bde8c | 457 | uint8_t raw = 0; |
GregCr | 0:03ec2f3bde8c | 458 | |
GregCr | 0:03ec2f3bde8c | 459 | ReadCommand( RADIO_GET_RSSIINST, &raw, 1 ); |
GregCr | 0:03ec2f3bde8c | 460 | |
GregCr | 0:03ec2f3bde8c | 461 | return ( int8_t ) ( -raw / 2 ); |
GregCr | 0:03ec2f3bde8c | 462 | } |
GregCr | 0:03ec2f3bde8c | 463 | |
GregCr | 0:03ec2f3bde8c | 464 | void SX1280::SetDioIrqParams( uint16_t irqMask, uint16_t dio1Mask, uint16_t dio2Mask, uint16_t dio3Mask ) |
GregCr | 0:03ec2f3bde8c | 465 | { |
GregCr | 0:03ec2f3bde8c | 466 | uint8_t buf[8]; |
GregCr | 0:03ec2f3bde8c | 467 | |
GregCr | 0:03ec2f3bde8c | 468 | buf[0] = ( uint8_t )( ( irqMask >> 8 ) & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 469 | buf[1] = ( uint8_t )( irqMask & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 470 | buf[2] = ( uint8_t )( ( dio1Mask >> 8 ) & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 471 | buf[3] = ( uint8_t )( dio1Mask & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 472 | buf[4] = ( uint8_t )( ( dio2Mask >> 8 ) & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 473 | buf[5] = ( uint8_t )( dio2Mask & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 474 | buf[6] = ( uint8_t )( ( dio3Mask >> 8 ) & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 475 | buf[7] = ( uint8_t )( dio3Mask & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 476 | WriteCommand( RADIO_SET_DIOIRQPARAMS, buf, 8 ); |
GregCr | 0:03ec2f3bde8c | 477 | } |
GregCr | 0:03ec2f3bde8c | 478 | |
GregCr | 0:03ec2f3bde8c | 479 | uint16_t SX1280::GetIrqStatus( void ) |
GregCr | 0:03ec2f3bde8c | 480 | { |
GregCr | 0:03ec2f3bde8c | 481 | uint8_t irqStatus[2]; |
GregCr | 0:03ec2f3bde8c | 482 | ReadCommand( RADIO_GET_IRQSTATUS, irqStatus, 2 ); |
GregCr | 0:03ec2f3bde8c | 483 | return ( irqStatus[0] << 8 ) | irqStatus[1]; |
GregCr | 0:03ec2f3bde8c | 484 | } |
GregCr | 0:03ec2f3bde8c | 485 | |
GregCr | 4:abf14b677777 | 486 | void SX1280::ClearIrqStatus( uint16_t irqMask ) |
GregCr | 0:03ec2f3bde8c | 487 | { |
GregCr | 0:03ec2f3bde8c | 488 | uint8_t buf[2]; |
GregCr | 0:03ec2f3bde8c | 489 | |
GregCr | 4:abf14b677777 | 490 | buf[0] = ( uint8_t )( ( ( uint16_t )irqMask >> 8 ) & 0x00FF ); |
GregCr | 4:abf14b677777 | 491 | buf[1] = ( uint8_t )( ( uint16_t )irqMask & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 492 | WriteCommand( RADIO_CLR_IRQSTATUS, buf, 2 ); |
GregCr | 0:03ec2f3bde8c | 493 | } |
GregCr | 0:03ec2f3bde8c | 494 | |
GregCr | 0:03ec2f3bde8c | 495 | void SX1280::Calibrate( CalibrationParams_t calibParam ) |
GregCr | 0:03ec2f3bde8c | 496 | { |
GregCr | 0:03ec2f3bde8c | 497 | uint8_t cal = ( calibParam.ADCBulkPEnable << 5 ) | |
GregCr | 0:03ec2f3bde8c | 498 | ( calibParam.ADCBulkNEnable << 4 ) | |
GregCr | 0:03ec2f3bde8c | 499 | ( calibParam.ADCPulseEnable << 3 ) | |
GregCr | 0:03ec2f3bde8c | 500 | ( calibParam.PLLEnable << 2 ) | |
GregCr | 0:03ec2f3bde8c | 501 | ( calibParam.RC13MEnable << 1 ) | |
GregCr | 0:03ec2f3bde8c | 502 | ( calibParam.RC64KEnable ); |
GregCr | 0:03ec2f3bde8c | 503 | WriteCommand( RADIO_CALIBRATE, &cal, 1 ); |
GregCr | 0:03ec2f3bde8c | 504 | } |
GregCr | 0:03ec2f3bde8c | 505 | |
GregCr | 0:03ec2f3bde8c | 506 | void SX1280::SetRegulatorMode( RadioRegulatorModes_t mode ) |
GregCr | 0:03ec2f3bde8c | 507 | { |
GregCr | 0:03ec2f3bde8c | 508 | WriteCommand( RADIO_SET_REGULATORMODE, ( uint8_t* )&mode, 1 ); |
GregCr | 0:03ec2f3bde8c | 509 | } |
GregCr | 0:03ec2f3bde8c | 510 | |
GregCr | 0:03ec2f3bde8c | 511 | void SX1280::SetSaveContext( void ) |
GregCr | 0:03ec2f3bde8c | 512 | { |
GregCr | 0:03ec2f3bde8c | 513 | WriteCommand( RADIO_SET_SAVECONTEXT, 0, 0 ); |
GregCr | 0:03ec2f3bde8c | 514 | } |
GregCr | 0:03ec2f3bde8c | 515 | |
GregCr | 0:03ec2f3bde8c | 516 | void SX1280::SetAutoTx( uint16_t time ) |
GregCr | 0:03ec2f3bde8c | 517 | { |
GregCr | 0:03ec2f3bde8c | 518 | uint16_t compensatedTime = time - ( uint16_t )AUTO_TX_OFFSET; |
GregCr | 0:03ec2f3bde8c | 519 | uint8_t buf[2]; |
GregCr | 0:03ec2f3bde8c | 520 | |
GregCr | 0:03ec2f3bde8c | 521 | buf[0] = ( uint8_t )( ( compensatedTime >> 8 ) & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 522 | buf[1] = ( uint8_t )( compensatedTime & 0x00FF ); |
GregCr | 0:03ec2f3bde8c | 523 | WriteCommand( RADIO_SET_AUTOTX, buf, 2 ); |
GregCr | 0:03ec2f3bde8c | 524 | } |
GregCr | 0:03ec2f3bde8c | 525 | |
GregCr | 0:03ec2f3bde8c | 526 | void SX1280::SetAutoFs( bool enableAutoFs ) |
GregCr | 0:03ec2f3bde8c | 527 | { |
Matthieu Verdy |
7:88669efa3779 | 528 | WriteCommand( RADIO_SET_AUTOFS, ( uint8_t * )&enableAutoFs, 1 ); |
GregCr | 0:03ec2f3bde8c | 529 | } |
GregCr | 0:03ec2f3bde8c | 530 | |
GregCr | 0:03ec2f3bde8c | 531 | void SX1280::SetLongPreamble( bool enable ) |
GregCr | 0:03ec2f3bde8c | 532 | { |
GregCr | 0:03ec2f3bde8c | 533 | WriteCommand( RADIO_SET_LONGPREAMBLE, ( uint8_t * )&enable, 1 ); |
GregCr | 0:03ec2f3bde8c | 534 | } |
GregCr | 0:03ec2f3bde8c | 535 | |
GregCr | 0:03ec2f3bde8c | 536 | void SX1280::SetPayload( uint8_t *buffer, uint8_t size, uint8_t offset ) |
GregCr | 0:03ec2f3bde8c | 537 | { |
GregCr | 2:62b6e0f59f0f | 538 | WriteBuffer( offset, buffer, size ); |
GregCr | 0:03ec2f3bde8c | 539 | } |
GregCr | 0:03ec2f3bde8c | 540 | |
GregCr | 0:03ec2f3bde8c | 541 | uint8_t SX1280::GetPayload( uint8_t *buffer, uint8_t *size , uint8_t maxSize ) |
GregCr | 0:03ec2f3bde8c | 542 | { |
GregCr | 0:03ec2f3bde8c | 543 | uint8_t offset; |
GregCr | 0:03ec2f3bde8c | 544 | |
GregCr | 0:03ec2f3bde8c | 545 | GetRxBufferStatus( size, &offset ); |
GregCr | 0:03ec2f3bde8c | 546 | if( *size > maxSize ) |
GregCr | 0:03ec2f3bde8c | 547 | { |
GregCr | 0:03ec2f3bde8c | 548 | return 1; |
GregCr | 0:03ec2f3bde8c | 549 | } |
GregCr | 0:03ec2f3bde8c | 550 | ReadBuffer( offset, buffer, *size ); |
GregCr | 0:03ec2f3bde8c | 551 | return 0; |
GregCr | 0:03ec2f3bde8c | 552 | } |
GregCr | 0:03ec2f3bde8c | 553 | |
GregCr | 0:03ec2f3bde8c | 554 | void SX1280::SendPayload( uint8_t *payload, uint8_t size, TickTime_t timeout, uint8_t offset ) |
GregCr | 0:03ec2f3bde8c | 555 | { |
GregCr | 0:03ec2f3bde8c | 556 | SetPayload( payload, size, offset ); |
GregCr | 0:03ec2f3bde8c | 557 | SetTx( timeout ); |
GregCr | 0:03ec2f3bde8c | 558 | } |
GregCr | 0:03ec2f3bde8c | 559 | |
GregCr | 0:03ec2f3bde8c | 560 | uint8_t SX1280::SetSyncWord( uint8_t syncWordIdx, uint8_t *syncWord ) |
GregCr | 0:03ec2f3bde8c | 561 | { |
GregCr | 0:03ec2f3bde8c | 562 | uint16_t addr; |
GregCr | 0:03ec2f3bde8c | 563 | uint8_t syncwordSize = 0; |
GregCr | 0:03ec2f3bde8c | 564 | |
GregCr | 4:abf14b677777 | 565 | switch( GetPacketType( true ) ) |
GregCr | 0:03ec2f3bde8c | 566 | { |
GregCr | 0:03ec2f3bde8c | 567 | case PACKET_TYPE_GFSK: |
GregCr | 0:03ec2f3bde8c | 568 | syncwordSize = 5; |
GregCr | 0:03ec2f3bde8c | 569 | switch( syncWordIdx ) |
GregCr | 0:03ec2f3bde8c | 570 | { |
GregCr | 0:03ec2f3bde8c | 571 | case 1: |
GregCr | 0:03ec2f3bde8c | 572 | addr = REG_LR_SYNCWORDBASEADDRESS1; |
GregCr | 0:03ec2f3bde8c | 573 | break; |
GregCr | 0:03ec2f3bde8c | 574 | case 2: |
GregCr | 0:03ec2f3bde8c | 575 | addr = REG_LR_SYNCWORDBASEADDRESS2; |
GregCr | 0:03ec2f3bde8c | 576 | break; |
GregCr | 0:03ec2f3bde8c | 577 | case 3: |
GregCr | 0:03ec2f3bde8c | 578 | addr = REG_LR_SYNCWORDBASEADDRESS3; |
GregCr | 0:03ec2f3bde8c | 579 | break; |
GregCr | 0:03ec2f3bde8c | 580 | default: |
GregCr | 0:03ec2f3bde8c | 581 | return 1; |
GregCr | 0:03ec2f3bde8c | 582 | } |
GregCr | 0:03ec2f3bde8c | 583 | break; |
GregCr | 0:03ec2f3bde8c | 584 | case PACKET_TYPE_FLRC: |
GregCr | 0:03ec2f3bde8c | 585 | // For FLRC packet type, the SyncWord is one byte shorter and |
GregCr | 0:03ec2f3bde8c | 586 | // the base address is shifted by one byte |
GregCr | 0:03ec2f3bde8c | 587 | syncwordSize = 4; |
GregCr | 0:03ec2f3bde8c | 588 | switch( syncWordIdx ) |
GregCr | 0:03ec2f3bde8c | 589 | { |
GregCr | 0:03ec2f3bde8c | 590 | case 1: |
GregCr | 0:03ec2f3bde8c | 591 | addr = REG_LR_SYNCWORDBASEADDRESS1 + 1; |
GregCr | 0:03ec2f3bde8c | 592 | break; |
GregCr | 0:03ec2f3bde8c | 593 | case 2: |
GregCr | 0:03ec2f3bde8c | 594 | addr = REG_LR_SYNCWORDBASEADDRESS2 + 1; |
GregCr | 0:03ec2f3bde8c | 595 | break; |
GregCr | 0:03ec2f3bde8c | 596 | case 3: |
GregCr | 0:03ec2f3bde8c | 597 | addr = REG_LR_SYNCWORDBASEADDRESS3 + 1; |
GregCr | 0:03ec2f3bde8c | 598 | break; |
GregCr | 0:03ec2f3bde8c | 599 | default: |
GregCr | 0:03ec2f3bde8c | 600 | return 1; |
GregCr | 0:03ec2f3bde8c | 601 | } |
GregCr | 0:03ec2f3bde8c | 602 | break; |
GregCr | 0:03ec2f3bde8c | 603 | case PACKET_TYPE_BLE: |
GregCr | 0:03ec2f3bde8c | 604 | // For Ble packet type, only the first SyncWord is used and its |
GregCr | 0:03ec2f3bde8c | 605 | // address is shifted by one byte |
GregCr | 0:03ec2f3bde8c | 606 | syncwordSize = 4; |
GregCr | 0:03ec2f3bde8c | 607 | switch( syncWordIdx ) |
GregCr | 0:03ec2f3bde8c | 608 | { |
GregCr | 0:03ec2f3bde8c | 609 | case 1: |
GregCr | 0:03ec2f3bde8c | 610 | addr = REG_LR_SYNCWORDBASEADDRESS1 + 1; |
GregCr | 0:03ec2f3bde8c | 611 | break; |
GregCr | 0:03ec2f3bde8c | 612 | default: |
GregCr | 0:03ec2f3bde8c | 613 | return 1; |
GregCr | 0:03ec2f3bde8c | 614 | } |
GregCr | 0:03ec2f3bde8c | 615 | break; |
GregCr | 0:03ec2f3bde8c | 616 | default: |
GregCr | 0:03ec2f3bde8c | 617 | return 1; |
GregCr | 0:03ec2f3bde8c | 618 | } |
GregCr | 0:03ec2f3bde8c | 619 | WriteRegister( addr, syncWord, syncwordSize ); |
GregCr | 0:03ec2f3bde8c | 620 | return 0; |
GregCr | 0:03ec2f3bde8c | 621 | } |
GregCr | 0:03ec2f3bde8c | 622 | |
GregCr | 0:03ec2f3bde8c | 623 | void SX1280::SetSyncWordErrorTolerance( uint8_t ErrorBits ) |
GregCr | 0:03ec2f3bde8c | 624 | { |
GregCr | 0:03ec2f3bde8c | 625 | ErrorBits = ( ReadRegister( REG_LR_SYNCWORDTOLERANCE ) & 0xF0 ) | ( ErrorBits & 0x0F ); |
GregCr | 0:03ec2f3bde8c | 626 | WriteRegister( REG_LR_SYNCWORDTOLERANCE, ErrorBits ); |
GregCr | 0:03ec2f3bde8c | 627 | } |
GregCr | 0:03ec2f3bde8c | 628 | |
GregCr | 4:abf14b677777 | 629 | uint8_t SX1280::SetCrcSeed( uint8_t *seed ) |
GregCr | 0:03ec2f3bde8c | 630 | { |
GregCr | 4:abf14b677777 | 631 | uint8_t updated = 0; |
GregCr | 4:abf14b677777 | 632 | switch( GetPacketType( true ) ) |
GregCr | 0:03ec2f3bde8c | 633 | { |
GregCr | 0:03ec2f3bde8c | 634 | case PACKET_TYPE_GFSK: |
GregCr | 0:03ec2f3bde8c | 635 | case PACKET_TYPE_FLRC: |
GregCr | 4:abf14b677777 | 636 | WriteRegister( REG_LR_CRCSEEDBASEADDR, seed, 2 ); |
GregCr | 4:abf14b677777 | 637 | updated = 1; |
GregCr | 4:abf14b677777 | 638 | break; |
GregCr | 4:abf14b677777 | 639 | case PACKET_TYPE_BLE: |
GregCr | 4:abf14b677777 | 640 | this->WriteRegister(0x9c7, seed[2] ); |
GregCr | 4:abf14b677777 | 641 | this->WriteRegister(0x9c8, seed[1] ); |
GregCr | 4:abf14b677777 | 642 | this->WriteRegister(0x9c9, seed[0] ); |
GregCr | 4:abf14b677777 | 643 | updated = 1; |
GregCr | 0:03ec2f3bde8c | 644 | break; |
GregCr | 0:03ec2f3bde8c | 645 | default: |
GregCr | 0:03ec2f3bde8c | 646 | break; |
GregCr | 0:03ec2f3bde8c | 647 | } |
GregCr | 4:abf14b677777 | 648 | return updated; |
GregCr | 0:03ec2f3bde8c | 649 | } |
GregCr | 0:03ec2f3bde8c | 650 | |
GregCr | 0:03ec2f3bde8c | 651 | void SX1280::SetCrcPolynomial( uint16_t polynomial ) |
GregCr | 0:03ec2f3bde8c | 652 | { |
GregCr | 0:03ec2f3bde8c | 653 | uint8_t val[2]; |
GregCr | 0:03ec2f3bde8c | 654 | |
GregCr | 0:03ec2f3bde8c | 655 | val[0] = ( uint8_t )( polynomial >> 8 ) & 0xFF; |
GregCr | 0:03ec2f3bde8c | 656 | val[1] = ( uint8_t )( polynomial & 0xFF ); |
GregCr | 0:03ec2f3bde8c | 657 | |
GregCr | 4:abf14b677777 | 658 | switch( GetPacketType( true ) ) |
GregCr | 0:03ec2f3bde8c | 659 | { |
GregCr | 0:03ec2f3bde8c | 660 | case PACKET_TYPE_GFSK: |
GregCr | 0:03ec2f3bde8c | 661 | case PACKET_TYPE_FLRC: |
GregCr | 0:03ec2f3bde8c | 662 | WriteRegister( REG_LR_CRCPOLYBASEADDR, val, 2 ); |
GregCr | 0:03ec2f3bde8c | 663 | break; |
GregCr | 0:03ec2f3bde8c | 664 | default: |
GregCr | 0:03ec2f3bde8c | 665 | break; |
GregCr | 0:03ec2f3bde8c | 666 | } |
GregCr | 0:03ec2f3bde8c | 667 | } |
GregCr | 0:03ec2f3bde8c | 668 | |
GregCr | 0:03ec2f3bde8c | 669 | void SX1280::SetWhiteningSeed( uint8_t seed ) |
GregCr | 0:03ec2f3bde8c | 670 | { |
GregCr | 4:abf14b677777 | 671 | switch( GetPacketType( true ) ) |
GregCr | 0:03ec2f3bde8c | 672 | { |
GregCr | 0:03ec2f3bde8c | 673 | case PACKET_TYPE_GFSK: |
GregCr | 0:03ec2f3bde8c | 674 | case PACKET_TYPE_FLRC: |
GregCr | 0:03ec2f3bde8c | 675 | case PACKET_TYPE_BLE: |
GregCr | 0:03ec2f3bde8c | 676 | WriteRegister( REG_LR_WHITSEEDBASEADDR, seed ); |
GregCr | 0:03ec2f3bde8c | 677 | break; |
GregCr | 0:03ec2f3bde8c | 678 | default: |
GregCr | 0:03ec2f3bde8c | 679 | break; |
GregCr | 0:03ec2f3bde8c | 680 | } |
GregCr | 0:03ec2f3bde8c | 681 | } |
GregCr | 0:03ec2f3bde8c | 682 | |
GregCr | 0:03ec2f3bde8c | 683 | void SX1280::SetRangingIdLength( RadioRangingIdCheckLengths_t length ) |
GregCr | 0:03ec2f3bde8c | 684 | { |
GregCr | 4:abf14b677777 | 685 | switch( GetPacketType( true ) ) |
GregCr | 0:03ec2f3bde8c | 686 | { |
GregCr | 0:03ec2f3bde8c | 687 | case PACKET_TYPE_RANGING: |
GregCr | 0:03ec2f3bde8c | 688 | WriteRegister( REG_LR_RANGINGIDCHECKLENGTH, ( ( ( ( uint8_t )length ) & 0x03 ) << 6 ) | ( ReadRegister( REG_LR_RANGINGIDCHECKLENGTH ) & 0x3F ) ); |
GregCr | 0:03ec2f3bde8c | 689 | break; |
GregCr | 0:03ec2f3bde8c | 690 | default: |
GregCr | 0:03ec2f3bde8c | 691 | break; |
GregCr | 0:03ec2f3bde8c | 692 | } |
GregCr | 0:03ec2f3bde8c | 693 | } |
GregCr | 0:03ec2f3bde8c | 694 | |
GregCr | 0:03ec2f3bde8c | 695 | void SX1280::SetDeviceRangingAddress( uint32_t address ) |
GregCr | 0:03ec2f3bde8c | 696 | { |
GregCr | 0:03ec2f3bde8c | 697 | uint8_t addrArray[] = { address >> 24, address >> 16, address >> 8, address }; |
GregCr | 0:03ec2f3bde8c | 698 | |
GregCr | 4:abf14b677777 | 699 | switch( GetPacketType( true ) ) |
GregCr | 0:03ec2f3bde8c | 700 | { |
GregCr | 0:03ec2f3bde8c | 701 | case PACKET_TYPE_RANGING: |
GregCr | 0:03ec2f3bde8c | 702 | WriteRegister( REG_LR_DEVICERANGINGADDR, addrArray, 4 ); |
GregCr | 0:03ec2f3bde8c | 703 | break; |
GregCr | 0:03ec2f3bde8c | 704 | default: |
GregCr | 0:03ec2f3bde8c | 705 | break; |
GregCr | 0:03ec2f3bde8c | 706 | } |
GregCr | 0:03ec2f3bde8c | 707 | } |
GregCr | 0:03ec2f3bde8c | 708 | |
GregCr | 0:03ec2f3bde8c | 709 | void SX1280::SetRangingRequestAddress( uint32_t address ) |
GregCr | 0:03ec2f3bde8c | 710 | { |
GregCr | 0:03ec2f3bde8c | 711 | uint8_t addrArray[] = { address >> 24, address >> 16, address >> 8, address }; |
GregCr | 0:03ec2f3bde8c | 712 | |
GregCr | 4:abf14b677777 | 713 | switch( GetPacketType( true ) ) |
GregCr | 0:03ec2f3bde8c | 714 | { |
GregCr | 0:03ec2f3bde8c | 715 | case PACKET_TYPE_RANGING: |
GregCr | 0:03ec2f3bde8c | 716 | WriteRegister( REG_LR_REQUESTRANGINGADDR, addrArray, 4 ); |
GregCr | 0:03ec2f3bde8c | 717 | break; |
GregCr | 0:03ec2f3bde8c | 718 | default: |
GregCr | 0:03ec2f3bde8c | 719 | break; |
GregCr | 0:03ec2f3bde8c | 720 | } |
GregCr | 0:03ec2f3bde8c | 721 | } |
GregCr | 0:03ec2f3bde8c | 722 | |
GregCr | 0:03ec2f3bde8c | 723 | double SX1280::GetRangingResult( RadioRangingResultTypes_t resultType ) |
GregCr | 0:03ec2f3bde8c | 724 | { |
GregCr | 0:03ec2f3bde8c | 725 | uint32_t valLsb = 0; |
GregCr | 0:03ec2f3bde8c | 726 | double val = 0.0; |
GregCr | 0:03ec2f3bde8c | 727 | |
GregCr | 4:abf14b677777 | 728 | switch( GetPacketType( true ) ) |
GregCr | 0:03ec2f3bde8c | 729 | { |
GregCr | 0:03ec2f3bde8c | 730 | case PACKET_TYPE_RANGING: |
GregCr | 0:03ec2f3bde8c | 731 | this->SetStandby( STDBY_XOSC ); |
GregCr | 0:03ec2f3bde8c | 732 | this->WriteRegister( 0x97F, this->ReadRegister( 0x97F ) | ( 1 << 1 ) ); // enable LORA modem clock |
GregCr | 0:03ec2f3bde8c | 733 | WriteRegister( REG_LR_RANGINGRESULTCONFIG, ( ReadRegister( REG_LR_RANGINGRESULTCONFIG ) & MASK_RANGINGMUXSEL ) | ( ( ( ( uint8_t )resultType ) & 0x03 ) << 4 ) ); |
GregCr | 0:03ec2f3bde8c | 734 | valLsb = ( ( ReadRegister( REG_LR_RANGINGRESULTBASEADDR ) << 16 ) | ( ReadRegister( REG_LR_RANGINGRESULTBASEADDR + 1 ) << 8 ) | ( ReadRegister( REG_LR_RANGINGRESULTBASEADDR + 2 ) ) ); |
GregCr | 0:03ec2f3bde8c | 735 | this->SetStandby( STDBY_RC ); |
GregCr | 0:03ec2f3bde8c | 736 | |
GregCr | 0:03ec2f3bde8c | 737 | // Convertion from LSB to distance. For explanation on the formula, refer to Datasheet of SX1280 |
GregCr | 0:03ec2f3bde8c | 738 | switch( resultType ) |
GregCr | 0:03ec2f3bde8c | 739 | { |
GregCr | 0:03ec2f3bde8c | 740 | case RANGING_RESULT_RAW: |
GregCr | 0:03ec2f3bde8c | 741 | // Convert the ranging LSB to distance in meter |
GregCr | 0:03ec2f3bde8c | 742 | // The theoretical conversion from register value to distance [m] is given by: |
GregCr | 6:057a5290df98 | 743 | // distance [m] = ( complement2( register ) * 150 ) / ( 2^12 * bandwidth[MHz] ) ) |
GregCr | 0:03ec2f3bde8c | 744 | // The API provide BW in [Hz] so the implemented formula is complement2( register ) / bandwidth[Hz] * A, |
GregCr | 0:03ec2f3bde8c | 745 | // where A = 150 / (2^12 / 1e6) = 36621.09 |
GregCr | 0:03ec2f3bde8c | 746 | val = ( double )complement2( valLsb, 24 ) / ( double )this->GetLoRaBandwidth( ) * 36621.09375; |
GregCr | 0:03ec2f3bde8c | 747 | break; |
GregCr | 0:03ec2f3bde8c | 748 | |
GregCr | 0:03ec2f3bde8c | 749 | case RANGING_RESULT_AVERAGED: |
GregCr | 0:03ec2f3bde8c | 750 | case RANGING_RESULT_DEBIASED: |
GregCr | 0:03ec2f3bde8c | 751 | case RANGING_RESULT_FILTERED: |
GregCr | 0:03ec2f3bde8c | 752 | val = ( double )valLsb * 20.0 / 100.0; |
GregCr | 0:03ec2f3bde8c | 753 | break; |
GregCr | 0:03ec2f3bde8c | 754 | default: |
GregCr | 0:03ec2f3bde8c | 755 | val = 0.0; |
GregCr | 0:03ec2f3bde8c | 756 | } |
GregCr | 0:03ec2f3bde8c | 757 | break; |
GregCr | 0:03ec2f3bde8c | 758 | default: |
GregCr | 0:03ec2f3bde8c | 759 | break; |
GregCr | 0:03ec2f3bde8c | 760 | } |
GregCr | 0:03ec2f3bde8c | 761 | return val; |
GregCr | 0:03ec2f3bde8c | 762 | } |
GregCr | 0:03ec2f3bde8c | 763 | |
GregCr | 0:03ec2f3bde8c | 764 | void SX1280::SetRangingCalibration( uint16_t cal ) |
GregCr | 0:03ec2f3bde8c | 765 | { |
GregCr | 4:abf14b677777 | 766 | switch( GetPacketType( true ) ) |
GregCr | 0:03ec2f3bde8c | 767 | { |
GregCr | 0:03ec2f3bde8c | 768 | case PACKET_TYPE_RANGING: |
GregCr | 0:03ec2f3bde8c | 769 | WriteRegister( REG_LR_RANGINGRERXTXDELAYCAL, ( uint8_t )( ( cal >> 8 ) & 0xFF ) ); |
GregCr | 0:03ec2f3bde8c | 770 | WriteRegister( REG_LR_RANGINGRERXTXDELAYCAL + 1, ( uint8_t )( ( cal ) & 0xFF ) ); |
GregCr | 0:03ec2f3bde8c | 771 | break; |
GregCr | 0:03ec2f3bde8c | 772 | default: |
GregCr | 0:03ec2f3bde8c | 773 | break; |
GregCr | 0:03ec2f3bde8c | 774 | } |
GregCr | 0:03ec2f3bde8c | 775 | } |
GregCr | 0:03ec2f3bde8c | 776 | |
GregCr | 0:03ec2f3bde8c | 777 | void SX1280::RangingClearFilterResult( void ) |
GregCr | 0:03ec2f3bde8c | 778 | { |
GregCr | 0:03ec2f3bde8c | 779 | uint8_t regVal = ReadRegister( REG_LR_RANGINGRESULTCLEARREG ); |
GregCr | 0:03ec2f3bde8c | 780 | |
GregCr | 0:03ec2f3bde8c | 781 | // To clear result, set bit 5 to 1 then to 0 |
GregCr | 0:03ec2f3bde8c | 782 | WriteRegister( REG_LR_RANGINGRESULTCLEARREG, regVal | ( 1 << 5 ) ); |
GregCr | 0:03ec2f3bde8c | 783 | WriteRegister( REG_LR_RANGINGRESULTCLEARREG, regVal & ( ~( 1 << 5 ) ) ); |
GregCr | 0:03ec2f3bde8c | 784 | } |
GregCr | 0:03ec2f3bde8c | 785 | |
GregCr | 0:03ec2f3bde8c | 786 | void SX1280::RangingSetFilterNumSamples( uint8_t num ) |
GregCr | 0:03ec2f3bde8c | 787 | { |
GregCr | 0:03ec2f3bde8c | 788 | // Silently set 8 as minimum value |
GregCr | 0:03ec2f3bde8c | 789 | WriteRegister( REG_LR_RANGINGFILTERWINDOWSIZE, ( num < DEFAULT_RANGING_FILTER_SIZE ) ? DEFAULT_RANGING_FILTER_SIZE : num ); |
GregCr | 0:03ec2f3bde8c | 790 | } |
GregCr | 0:03ec2f3bde8c | 791 | |
GregCr | 0:03ec2f3bde8c | 792 | void SX1280::SetRangingRole( RadioRangingRoles_t role ) |
GregCr | 0:03ec2f3bde8c | 793 | { |
GregCr | 0:03ec2f3bde8c | 794 | uint8_t buf[1]; |
GregCr | 0:03ec2f3bde8c | 795 | |
GregCr | 0:03ec2f3bde8c | 796 | buf[0] = role; |
GregCr | 0:03ec2f3bde8c | 797 | WriteCommand( RADIO_SET_RANGING_ROLE, &buf[0], 1 ); |
GregCr | 0:03ec2f3bde8c | 798 | } |
GregCr | 0:03ec2f3bde8c | 799 | |
GregCr | 0:03ec2f3bde8c | 800 | double SX1280::GetFrequencyError( ) |
GregCr | 0:03ec2f3bde8c | 801 | { |
GregCr | 0:03ec2f3bde8c | 802 | uint8_t efeRaw[3] = {0}; |
GregCr | 0:03ec2f3bde8c | 803 | uint32_t efe = 0; |
GregCr | 0:03ec2f3bde8c | 804 | double efeHz = 0.0; |
GregCr | 0:03ec2f3bde8c | 805 | |
GregCr | 4:abf14b677777 | 806 | switch( this->GetPacketType( true ) ) |
GregCr | 0:03ec2f3bde8c | 807 | { |
GregCr | 0:03ec2f3bde8c | 808 | case PACKET_TYPE_LORA: |
GregCr | 0:03ec2f3bde8c | 809 | case PACKET_TYPE_RANGING: |
GregCr | 0:03ec2f3bde8c | 810 | efeRaw[0] = this->ReadRegister( REG_LR_ESTIMATED_FREQUENCY_ERROR_MSB ); |
GregCr | 0:03ec2f3bde8c | 811 | efeRaw[1] = this->ReadRegister( REG_LR_ESTIMATED_FREQUENCY_ERROR_MSB + 1 ); |
GregCr | 0:03ec2f3bde8c | 812 | efeRaw[2] = this->ReadRegister( REG_LR_ESTIMATED_FREQUENCY_ERROR_MSB + 2 ); |
GregCr | 0:03ec2f3bde8c | 813 | efe = ( efeRaw[0]<<16 ) | ( efeRaw[1]<<8 ) | efeRaw[2]; |
GregCr | 0:03ec2f3bde8c | 814 | efe &= REG_LR_ESTIMATED_FREQUENCY_ERROR_MASK; |
GregCr | 0:03ec2f3bde8c | 815 | |
GregCr | 0:03ec2f3bde8c | 816 | efeHz = 1.55 * ( double )complement2( efe, 20 ) / ( 1600.0 / ( double )this->GetLoRaBandwidth( ) * 1000.0 ); |
GregCr | 0:03ec2f3bde8c | 817 | break; |
GregCr | 0:03ec2f3bde8c | 818 | |
GregCr | 0:03ec2f3bde8c | 819 | case PACKET_TYPE_NONE: |
GregCr | 0:03ec2f3bde8c | 820 | case PACKET_TYPE_BLE: |
GregCr | 0:03ec2f3bde8c | 821 | case PACKET_TYPE_FLRC: |
GregCr | 0:03ec2f3bde8c | 822 | case PACKET_TYPE_GFSK: |
GregCr | 0:03ec2f3bde8c | 823 | break; |
GregCr | 0:03ec2f3bde8c | 824 | } |
GregCr | 0:03ec2f3bde8c | 825 | |
GregCr | 0:03ec2f3bde8c | 826 | return efeHz; |
GregCr | 0:03ec2f3bde8c | 827 | } |
GregCr | 0:03ec2f3bde8c | 828 | |
GregCr | 0:03ec2f3bde8c | 829 | void SX1280::SetPollingMode( void ) |
GregCr | 0:03ec2f3bde8c | 830 | { |
GregCr | 0:03ec2f3bde8c | 831 | this->PollingMode = true; |
GregCr | 0:03ec2f3bde8c | 832 | } |
GregCr | 0:03ec2f3bde8c | 833 | |
GregCr | 0:03ec2f3bde8c | 834 | int32_t SX1280::complement2( const uint32_t num, const uint8_t bitCnt ) |
GregCr | 0:03ec2f3bde8c | 835 | { |
GregCr | 0:03ec2f3bde8c | 836 | int32_t retVal = ( int32_t )num; |
GregCr | 0:03ec2f3bde8c | 837 | if( num >= 2<<( bitCnt - 2 ) ) |
GregCr | 0:03ec2f3bde8c | 838 | { |
GregCr | 0:03ec2f3bde8c | 839 | retVal -= 2<<( bitCnt - 1 ); |
GregCr | 0:03ec2f3bde8c | 840 | } |
GregCr | 0:03ec2f3bde8c | 841 | return retVal; |
GregCr | 0:03ec2f3bde8c | 842 | } |
GregCr | 0:03ec2f3bde8c | 843 | |
GregCr | 0:03ec2f3bde8c | 844 | int32_t SX1280::GetLoRaBandwidth( ) |
GregCr | 0:03ec2f3bde8c | 845 | { |
GregCr | 0:03ec2f3bde8c | 846 | int32_t bwValue = 0; |
GregCr | 0:03ec2f3bde8c | 847 | |
GregCr | 0:03ec2f3bde8c | 848 | switch( this->LoRaBandwidth ) |
GregCr | 0:03ec2f3bde8c | 849 | { |
GregCr | 0:03ec2f3bde8c | 850 | case LORA_BW_0200: |
GregCr | 0:03ec2f3bde8c | 851 | bwValue = 203125; |
GregCr | 0:03ec2f3bde8c | 852 | break; |
GregCr | 0:03ec2f3bde8c | 853 | case LORA_BW_0400: |
GregCr | 0:03ec2f3bde8c | 854 | bwValue = 406250; |
GregCr | 0:03ec2f3bde8c | 855 | break; |
GregCr | 0:03ec2f3bde8c | 856 | case LORA_BW_0800: |
GregCr | 0:03ec2f3bde8c | 857 | bwValue = 812500; |
GregCr | 0:03ec2f3bde8c | 858 | break; |
GregCr | 0:03ec2f3bde8c | 859 | case LORA_BW_1600: |
GregCr | 0:03ec2f3bde8c | 860 | bwValue = 1625000; |
GregCr | 0:03ec2f3bde8c | 861 | break; |
GregCr | 0:03ec2f3bde8c | 862 | default: |
GregCr | 0:03ec2f3bde8c | 863 | bwValue = 0; |
GregCr | 0:03ec2f3bde8c | 864 | } |
GregCr | 0:03ec2f3bde8c | 865 | return bwValue; |
GregCr | 0:03ec2f3bde8c | 866 | } |
GregCr | 0:03ec2f3bde8c | 867 | |
GregCr | 0:03ec2f3bde8c | 868 | void SX1280::SetInterruptMode( void ) |
GregCr | 0:03ec2f3bde8c | 869 | { |
GregCr | 0:03ec2f3bde8c | 870 | this->PollingMode = false; |
GregCr | 0:03ec2f3bde8c | 871 | } |
GregCr | 0:03ec2f3bde8c | 872 | |
GregCr | 0:03ec2f3bde8c | 873 | void SX1280::OnDioIrq( void ) |
GregCr | 0:03ec2f3bde8c | 874 | { |
GregCr | 0:03ec2f3bde8c | 875 | /* |
GregCr | 0:03ec2f3bde8c | 876 | * When polling mode is activated, it is up to the application to call |
GregCr | 0:03ec2f3bde8c | 877 | * ProcessIrqs( ). Otherwise, the driver automatically calls ProcessIrqs( ) |
GregCr | 0:03ec2f3bde8c | 878 | * on radio interrupt. |
GregCr | 0:03ec2f3bde8c | 879 | */ |
GregCr | 0:03ec2f3bde8c | 880 | if( this->PollingMode == true ) |
GregCr | 0:03ec2f3bde8c | 881 | { |
GregCr | 0:03ec2f3bde8c | 882 | this->IrqState = true; |
GregCr | 0:03ec2f3bde8c | 883 | } |
GregCr | 0:03ec2f3bde8c | 884 | else |
GregCr | 0:03ec2f3bde8c | 885 | { |
GregCr | 0:03ec2f3bde8c | 886 | this->ProcessIrqs( ); |
GregCr | 0:03ec2f3bde8c | 887 | } |
GregCr | 0:03ec2f3bde8c | 888 | } |
GregCr | 0:03ec2f3bde8c | 889 | |
GregCr | 0:03ec2f3bde8c | 890 | void SX1280::ProcessIrqs( void ) |
GregCr | 0:03ec2f3bde8c | 891 | { |
GregCr | 0:03ec2f3bde8c | 892 | RadioPacketTypes_t packetType = PACKET_TYPE_NONE; |
GregCr | 0:03ec2f3bde8c | 893 | |
GregCr | 0:03ec2f3bde8c | 894 | if( this->PollingMode == true ) |
GregCr | 0:03ec2f3bde8c | 895 | { |
GregCr | 0:03ec2f3bde8c | 896 | if( this->IrqState == true ) |
GregCr | 0:03ec2f3bde8c | 897 | { |
GregCr | 0:03ec2f3bde8c | 898 | __disable_irq( ); |
GregCr | 0:03ec2f3bde8c | 899 | this->IrqState = false; |
GregCr | 0:03ec2f3bde8c | 900 | __enable_irq( ); |
GregCr | 0:03ec2f3bde8c | 901 | } |
GregCr | 0:03ec2f3bde8c | 902 | else |
GregCr | 0:03ec2f3bde8c | 903 | { |
GregCr | 0:03ec2f3bde8c | 904 | return; |
GregCr | 0:03ec2f3bde8c | 905 | } |
GregCr | 0:03ec2f3bde8c | 906 | } |
GregCr | 0:03ec2f3bde8c | 907 | |
GregCr | 4:abf14b677777 | 908 | packetType = GetPacketType( true ); |
GregCr | 0:03ec2f3bde8c | 909 | uint16_t irqRegs = GetIrqStatus( ); |
GregCr | 0:03ec2f3bde8c | 910 | ClearIrqStatus( IRQ_RADIO_ALL ); |
GregCr | 0:03ec2f3bde8c | 911 | |
GregCr | 0:03ec2f3bde8c | 912 | #if( SX1280_DEBUG == 1 ) |
GregCr | 0:03ec2f3bde8c | 913 | DigitalOut TEST_PIN_1( D14 ); |
GregCr | 0:03ec2f3bde8c | 914 | DigitalOut TEST_PIN_2( D15 ); |
GregCr | 0:03ec2f3bde8c | 915 | for( int i = 0x8000; i != 0; i >>= 1 ) |
GregCr | 0:03ec2f3bde8c | 916 | { |
GregCr | 0:03ec2f3bde8c | 917 | TEST_PIN_2 = 0; |
GregCr | 0:03ec2f3bde8c | 918 | TEST_PIN_1 = ( ( irqRegs & i ) != 0 ) ? 1 : 0; |
GregCr | 0:03ec2f3bde8c | 919 | TEST_PIN_2 = 1; |
GregCr | 0:03ec2f3bde8c | 920 | } |
GregCr | 0:03ec2f3bde8c | 921 | TEST_PIN_1 = 0; |
GregCr | 0:03ec2f3bde8c | 922 | TEST_PIN_2 = 0; |
GregCr | 0:03ec2f3bde8c | 923 | #endif |
GregCr | 0:03ec2f3bde8c | 924 | |
GregCr | 0:03ec2f3bde8c | 925 | switch( packetType ) |
GregCr | 0:03ec2f3bde8c | 926 | { |
GregCr | 0:03ec2f3bde8c | 927 | case PACKET_TYPE_GFSK: |
GregCr | 0:03ec2f3bde8c | 928 | case PACKET_TYPE_FLRC: |
GregCr | 0:03ec2f3bde8c | 929 | case PACKET_TYPE_BLE: |
GregCr | 0:03ec2f3bde8c | 930 | switch( OperatingMode ) |
GregCr | 0:03ec2f3bde8c | 931 | { |
GregCr | 0:03ec2f3bde8c | 932 | case MODE_RX: |
GregCr | 0:03ec2f3bde8c | 933 | if( ( irqRegs & IRQ_RX_DONE ) == IRQ_RX_DONE ) |
GregCr | 0:03ec2f3bde8c | 934 | { |
GregCr | 0:03ec2f3bde8c | 935 | if( ( irqRegs & IRQ_CRC_ERROR ) == IRQ_CRC_ERROR ) |
GregCr | 0:03ec2f3bde8c | 936 | { |
GregCr | 0:03ec2f3bde8c | 937 | if( rxError != NULL ) |
GregCr | 0:03ec2f3bde8c | 938 | { |
GregCr | 0:03ec2f3bde8c | 939 | rxError( IRQ_CRC_ERROR_CODE ); |
GregCr | 0:03ec2f3bde8c | 940 | } |
GregCr | 0:03ec2f3bde8c | 941 | } |
GregCr | 0:03ec2f3bde8c | 942 | else if( ( irqRegs & IRQ_SYNCWORD_ERROR ) == IRQ_SYNCWORD_ERROR ) |
GregCr | 0:03ec2f3bde8c | 943 | { |
GregCr | 0:03ec2f3bde8c | 944 | if( rxError != NULL ) |
GregCr | 0:03ec2f3bde8c | 945 | { |
GregCr | 0:03ec2f3bde8c | 946 | rxError( IRQ_SYNCWORD_ERROR_CODE ); |
GregCr | 0:03ec2f3bde8c | 947 | } |
GregCr | 0:03ec2f3bde8c | 948 | } |
GregCr | 0:03ec2f3bde8c | 949 | else |
GregCr | 0:03ec2f3bde8c | 950 | { |
GregCr | 0:03ec2f3bde8c | 951 | if( rxDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 952 | { |
GregCr | 0:03ec2f3bde8c | 953 | rxDone( ); |
GregCr | 0:03ec2f3bde8c | 954 | } |
GregCr | 0:03ec2f3bde8c | 955 | } |
GregCr | 0:03ec2f3bde8c | 956 | } |
GregCr | 0:03ec2f3bde8c | 957 | if( ( irqRegs & IRQ_SYNCWORD_VALID ) == IRQ_SYNCWORD_VALID ) |
GregCr | 0:03ec2f3bde8c | 958 | { |
GregCr | 0:03ec2f3bde8c | 959 | if( rxSyncWordDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 960 | { |
GregCr | 0:03ec2f3bde8c | 961 | rxSyncWordDone( ); |
GregCr | 0:03ec2f3bde8c | 962 | } |
GregCr | 0:03ec2f3bde8c | 963 | } |
GregCr | 0:03ec2f3bde8c | 964 | if( ( irqRegs & IRQ_SYNCWORD_ERROR ) == IRQ_SYNCWORD_ERROR ) |
GregCr | 0:03ec2f3bde8c | 965 | { |
GregCr | 0:03ec2f3bde8c | 966 | if( rxError != NULL ) |
GregCr | 0:03ec2f3bde8c | 967 | { |
GregCr | 0:03ec2f3bde8c | 968 | rxError( IRQ_SYNCWORD_ERROR_CODE ); |
GregCr | 0:03ec2f3bde8c | 969 | } |
GregCr | 0:03ec2f3bde8c | 970 | } |
GregCr | 0:03ec2f3bde8c | 971 | if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) |
GregCr | 0:03ec2f3bde8c | 972 | { |
GregCr | 0:03ec2f3bde8c | 973 | if( rxTimeout != NULL ) |
GregCr | 0:03ec2f3bde8c | 974 | { |
GregCr | 0:03ec2f3bde8c | 975 | rxTimeout( ); |
GregCr | 0:03ec2f3bde8c | 976 | } |
GregCr | 0:03ec2f3bde8c | 977 | } |
GregCr | 0:03ec2f3bde8c | 978 | break; |
GregCr | 0:03ec2f3bde8c | 979 | case MODE_TX: |
GregCr | 0:03ec2f3bde8c | 980 | if( ( irqRegs & IRQ_TX_DONE ) == IRQ_TX_DONE ) |
GregCr | 0:03ec2f3bde8c | 981 | { |
GregCr | 0:03ec2f3bde8c | 982 | if( txDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 983 | { |
GregCr | 0:03ec2f3bde8c | 984 | txDone( ); |
GregCr | 0:03ec2f3bde8c | 985 | } |
GregCr | 0:03ec2f3bde8c | 986 | } |
GregCr | 0:03ec2f3bde8c | 987 | if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) |
GregCr | 0:03ec2f3bde8c | 988 | { |
GregCr | 0:03ec2f3bde8c | 989 | if( txTimeout != NULL ) |
GregCr | 0:03ec2f3bde8c | 990 | { |
GregCr | 0:03ec2f3bde8c | 991 | txTimeout( ); |
GregCr | 0:03ec2f3bde8c | 992 | } |
GregCr | 0:03ec2f3bde8c | 993 | } |
GregCr | 0:03ec2f3bde8c | 994 | break; |
GregCr | 0:03ec2f3bde8c | 995 | default: |
GregCr | 0:03ec2f3bde8c | 996 | // Unexpected IRQ: silently returns |
GregCr | 0:03ec2f3bde8c | 997 | break; |
GregCr | 0:03ec2f3bde8c | 998 | } |
GregCr | 0:03ec2f3bde8c | 999 | break; |
GregCr | 0:03ec2f3bde8c | 1000 | case PACKET_TYPE_LORA: |
GregCr | 0:03ec2f3bde8c | 1001 | switch( OperatingMode ) |
GregCr | 0:03ec2f3bde8c | 1002 | { |
GregCr | 0:03ec2f3bde8c | 1003 | case MODE_RX: |
GregCr | 0:03ec2f3bde8c | 1004 | if( ( irqRegs & IRQ_RX_DONE ) == IRQ_RX_DONE ) |
GregCr | 0:03ec2f3bde8c | 1005 | { |
GregCr | 0:03ec2f3bde8c | 1006 | if( ( irqRegs & IRQ_CRC_ERROR ) == IRQ_CRC_ERROR ) |
GregCr | 0:03ec2f3bde8c | 1007 | { |
GregCr | 0:03ec2f3bde8c | 1008 | if( rxError != NULL ) |
GregCr | 0:03ec2f3bde8c | 1009 | { |
GregCr | 0:03ec2f3bde8c | 1010 | rxError( IRQ_CRC_ERROR_CODE ); |
GregCr | 0:03ec2f3bde8c | 1011 | } |
GregCr | 0:03ec2f3bde8c | 1012 | } |
GregCr | 0:03ec2f3bde8c | 1013 | else |
GregCr | 0:03ec2f3bde8c | 1014 | { |
GregCr | 0:03ec2f3bde8c | 1015 | if( rxDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1016 | { |
GregCr | 0:03ec2f3bde8c | 1017 | rxDone( ); |
GregCr | 0:03ec2f3bde8c | 1018 | } |
GregCr | 0:03ec2f3bde8c | 1019 | } |
GregCr | 0:03ec2f3bde8c | 1020 | } |
GregCr | 0:03ec2f3bde8c | 1021 | if( ( irqRegs & IRQ_HEADER_VALID ) == IRQ_HEADER_VALID ) |
GregCr | 0:03ec2f3bde8c | 1022 | { |
GregCr | 0:03ec2f3bde8c | 1023 | if( rxHeaderDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1024 | { |
GregCr | 0:03ec2f3bde8c | 1025 | rxHeaderDone( ); |
GregCr | 0:03ec2f3bde8c | 1026 | } |
GregCr | 0:03ec2f3bde8c | 1027 | } |
GregCr | 0:03ec2f3bde8c | 1028 | if( ( irqRegs & IRQ_HEADER_ERROR ) == IRQ_HEADER_ERROR ) |
GregCr | 0:03ec2f3bde8c | 1029 | { |
GregCr | 0:03ec2f3bde8c | 1030 | if( rxError != NULL ) |
GregCr | 0:03ec2f3bde8c | 1031 | { |
GregCr | 0:03ec2f3bde8c | 1032 | rxError( IRQ_HEADER_ERROR_CODE ); |
GregCr | 0:03ec2f3bde8c | 1033 | } |
GregCr | 0:03ec2f3bde8c | 1034 | } |
GregCr | 0:03ec2f3bde8c | 1035 | if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) |
GregCr | 0:03ec2f3bde8c | 1036 | { |
GregCr | 0:03ec2f3bde8c | 1037 | if( rxTimeout != NULL ) |
GregCr | 0:03ec2f3bde8c | 1038 | { |
GregCr | 0:03ec2f3bde8c | 1039 | rxTimeout( ); |
GregCr | 0:03ec2f3bde8c | 1040 | } |
GregCr | 0:03ec2f3bde8c | 1041 | } |
GregCr | 0:03ec2f3bde8c | 1042 | if( ( irqRegs & IRQ_RANGING_SLAVE_REQUEST_DISCARDED ) == IRQ_RANGING_SLAVE_REQUEST_DISCARDED ) |
GregCr | 0:03ec2f3bde8c | 1043 | { |
GregCr | 0:03ec2f3bde8c | 1044 | if( rxError != NULL ) |
GregCr | 0:03ec2f3bde8c | 1045 | { |
GregCr | 0:03ec2f3bde8c | 1046 | rxError( IRQ_RANGING_ON_LORA_ERROR_CODE ); |
GregCr | 0:03ec2f3bde8c | 1047 | } |
GregCr | 0:03ec2f3bde8c | 1048 | } |
GregCr | 0:03ec2f3bde8c | 1049 | break; |
GregCr | 0:03ec2f3bde8c | 1050 | case MODE_TX: |
GregCr | 0:03ec2f3bde8c | 1051 | if( ( irqRegs & IRQ_TX_DONE ) == IRQ_TX_DONE ) |
GregCr | 0:03ec2f3bde8c | 1052 | { |
GregCr | 0:03ec2f3bde8c | 1053 | if( txDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1054 | { |
GregCr | 0:03ec2f3bde8c | 1055 | txDone( ); |
GregCr | 0:03ec2f3bde8c | 1056 | } |
GregCr | 0:03ec2f3bde8c | 1057 | } |
GregCr | 0:03ec2f3bde8c | 1058 | if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) |
GregCr | 0:03ec2f3bde8c | 1059 | { |
GregCr | 0:03ec2f3bde8c | 1060 | if( txTimeout != NULL ) |
GregCr | 0:03ec2f3bde8c | 1061 | { |
GregCr | 0:03ec2f3bde8c | 1062 | txTimeout( ); |
GregCr | 0:03ec2f3bde8c | 1063 | } |
GregCr | 0:03ec2f3bde8c | 1064 | } |
GregCr | 0:03ec2f3bde8c | 1065 | break; |
GregCr | 0:03ec2f3bde8c | 1066 | case MODE_CAD: |
GregCr | 0:03ec2f3bde8c | 1067 | if( ( irqRegs & IRQ_CAD_DONE ) == IRQ_CAD_DONE ) |
GregCr | 0:03ec2f3bde8c | 1068 | { |
GregCr | 4:abf14b677777 | 1069 | if( ( irqRegs & IRQ_CAD_DETECTED ) == IRQ_CAD_DETECTED ) |
GregCr | 0:03ec2f3bde8c | 1070 | { |
GregCr | 0:03ec2f3bde8c | 1071 | if( cadDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1072 | { |
GregCr | 0:03ec2f3bde8c | 1073 | cadDone( true ); |
GregCr | 0:03ec2f3bde8c | 1074 | } |
GregCr | 0:03ec2f3bde8c | 1075 | } |
GregCr | 0:03ec2f3bde8c | 1076 | else |
GregCr | 0:03ec2f3bde8c | 1077 | { |
GregCr | 0:03ec2f3bde8c | 1078 | if( cadDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1079 | { |
GregCr | 0:03ec2f3bde8c | 1080 | cadDone( false ); |
GregCr | 0:03ec2f3bde8c | 1081 | } |
GregCr | 0:03ec2f3bde8c | 1082 | } |
GregCr | 0:03ec2f3bde8c | 1083 | } |
GregCr | 0:03ec2f3bde8c | 1084 | else if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) |
GregCr | 0:03ec2f3bde8c | 1085 | { |
GregCr | 0:03ec2f3bde8c | 1086 | if( rxTimeout != NULL ) |
GregCr | 0:03ec2f3bde8c | 1087 | { |
GregCr | 0:03ec2f3bde8c | 1088 | rxTimeout( ); |
GregCr | 0:03ec2f3bde8c | 1089 | } |
GregCr | 0:03ec2f3bde8c | 1090 | } |
GregCr | 0:03ec2f3bde8c | 1091 | break; |
GregCr | 0:03ec2f3bde8c | 1092 | default: |
GregCr | 0:03ec2f3bde8c | 1093 | // Unexpected IRQ: silently returns |
GregCr | 0:03ec2f3bde8c | 1094 | break; |
GregCr | 0:03ec2f3bde8c | 1095 | } |
GregCr | 0:03ec2f3bde8c | 1096 | break; |
GregCr | 0:03ec2f3bde8c | 1097 | case PACKET_TYPE_RANGING: |
GregCr | 0:03ec2f3bde8c | 1098 | switch( OperatingMode ) |
GregCr | 0:03ec2f3bde8c | 1099 | { |
GregCr | 0:03ec2f3bde8c | 1100 | // MODE_RX indicates an IRQ on the Slave side |
GregCr | 0:03ec2f3bde8c | 1101 | case MODE_RX: |
GregCr | 0:03ec2f3bde8c | 1102 | if( ( irqRegs & IRQ_RANGING_SLAVE_REQUEST_DISCARDED ) == IRQ_RANGING_SLAVE_REQUEST_DISCARDED ) |
GregCr | 0:03ec2f3bde8c | 1103 | { |
GregCr | 0:03ec2f3bde8c | 1104 | if( rangingDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1105 | { |
GregCr | 0:03ec2f3bde8c | 1106 | rangingDone( IRQ_RANGING_SLAVE_ERROR_CODE ); |
GregCr | 0:03ec2f3bde8c | 1107 | } |
GregCr | 0:03ec2f3bde8c | 1108 | } |
GregCr | 0:03ec2f3bde8c | 1109 | if( ( irqRegs & IRQ_RANGING_SLAVE_REQUEST_VALID ) == IRQ_RANGING_SLAVE_REQUEST_VALID ) |
GregCr | 0:03ec2f3bde8c | 1110 | { |
GregCr | 0:03ec2f3bde8c | 1111 | if( rangingDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1112 | { |
GregCr | 0:03ec2f3bde8c | 1113 | rangingDone( IRQ_RANGING_SLAVE_VALID_CODE ); |
GregCr | 0:03ec2f3bde8c | 1114 | } |
GregCr | 0:03ec2f3bde8c | 1115 | } |
GregCr | 0:03ec2f3bde8c | 1116 | if( ( irqRegs & IRQ_RANGING_SLAVE_RESPONSE_DONE ) == IRQ_RANGING_SLAVE_RESPONSE_DONE ) |
GregCr | 0:03ec2f3bde8c | 1117 | { |
GregCr | 0:03ec2f3bde8c | 1118 | if( rangingDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1119 | { |
GregCr | 0:03ec2f3bde8c | 1120 | rangingDone( IRQ_RANGING_SLAVE_VALID_CODE ); |
GregCr | 0:03ec2f3bde8c | 1121 | } |
GregCr | 0:03ec2f3bde8c | 1122 | } |
GregCr | 0:03ec2f3bde8c | 1123 | if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) |
GregCr | 0:03ec2f3bde8c | 1124 | { |
GregCr | 0:03ec2f3bde8c | 1125 | if( rangingDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1126 | { |
GregCr | 0:03ec2f3bde8c | 1127 | rangingDone( IRQ_RANGING_SLAVE_ERROR_CODE ); |
GregCr | 0:03ec2f3bde8c | 1128 | } |
GregCr | 0:03ec2f3bde8c | 1129 | } |
GregCr | 0:03ec2f3bde8c | 1130 | if( ( irqRegs & IRQ_HEADER_VALID ) == IRQ_HEADER_VALID ) |
GregCr | 0:03ec2f3bde8c | 1131 | { |
GregCr | 0:03ec2f3bde8c | 1132 | if( rxHeaderDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1133 | { |
GregCr | 0:03ec2f3bde8c | 1134 | rxHeaderDone( ); |
GregCr | 0:03ec2f3bde8c | 1135 | } |
GregCr | 0:03ec2f3bde8c | 1136 | } |
GregCr | 0:03ec2f3bde8c | 1137 | if( ( irqRegs & IRQ_HEADER_ERROR ) == IRQ_HEADER_ERROR ) |
GregCr | 0:03ec2f3bde8c | 1138 | { |
GregCr | 0:03ec2f3bde8c | 1139 | if( rxError != NULL ) |
GregCr | 0:03ec2f3bde8c | 1140 | { |
GregCr | 0:03ec2f3bde8c | 1141 | rxError( IRQ_HEADER_ERROR_CODE ); |
GregCr | 0:03ec2f3bde8c | 1142 | } |
GregCr | 0:03ec2f3bde8c | 1143 | } |
GregCr | 0:03ec2f3bde8c | 1144 | break; |
GregCr | 0:03ec2f3bde8c | 1145 | // MODE_TX indicates an IRQ on the Master side |
GregCr | 0:03ec2f3bde8c | 1146 | case MODE_TX: |
GregCr | 4:abf14b677777 | 1147 | if( ( irqRegs & IRQ_RANGING_MASTER_TIMEOUT ) == IRQ_RANGING_MASTER_TIMEOUT ) |
GregCr | 0:03ec2f3bde8c | 1148 | { |
GregCr | 0:03ec2f3bde8c | 1149 | if( rangingDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1150 | { |
GregCr | 0:03ec2f3bde8c | 1151 | rangingDone( IRQ_RANGING_MASTER_ERROR_CODE ); |
GregCr | 0:03ec2f3bde8c | 1152 | } |
GregCr | 0:03ec2f3bde8c | 1153 | } |
GregCr | 0:03ec2f3bde8c | 1154 | if( ( irqRegs & IRQ_RANGING_MASTER_RESULT_VALID ) == IRQ_RANGING_MASTER_RESULT_VALID ) |
GregCr | 0:03ec2f3bde8c | 1155 | { |
GregCr | 0:03ec2f3bde8c | 1156 | if( rangingDone != NULL ) |
GregCr | 0:03ec2f3bde8c | 1157 | { |
GregCr | 0:03ec2f3bde8c | 1158 | rangingDone( IRQ_RANGING_MASTER_VALID_CODE ); |
GregCr | 0:03ec2f3bde8c | 1159 | } |
GregCr | 0:03ec2f3bde8c | 1160 | } |
GregCr | 0:03ec2f3bde8c | 1161 | break; |
GregCr | 0:03ec2f3bde8c | 1162 | default: |
GregCr | 0:03ec2f3bde8c | 1163 | // Unexpected IRQ: silently returns |
GregCr | 0:03ec2f3bde8c | 1164 | break; |
GregCr | 0:03ec2f3bde8c | 1165 | } |
GregCr | 0:03ec2f3bde8c | 1166 | break; |
GregCr | 0:03ec2f3bde8c | 1167 | default: |
GregCr | 0:03ec2f3bde8c | 1168 | // Unexpected IRQ: silently returns |
GregCr | 0:03ec2f3bde8c | 1169 | break; |
GregCr | 0:03ec2f3bde8c | 1170 | } |
GregCr | 0:03ec2f3bde8c | 1171 | } |