Driver for the SX1272 RF Transceiver
Dependents: LORA-SX1272MB2xAS-PP mDot_Semtech_LoRaWAN_Stack LoRaWAN-demo-72_mdotIKS01A1 lora-project ... more
Diff: sx1272/sx1272-hal.cpp
- Revision:
- 2:cd1093b6676f
- Parent:
- 1:b0372ef620d0
- Child:
- 4:90bd79f1b458
- Child:
- 7:b988b60083a1
--- a/sx1272/sx1272-hal.cpp Tue Jan 26 22:04:33 2016 +0000 +++ b/sx1272/sx1272-hal.cpp Wed Feb 17 09:17:18 2016 +0000 @@ -14,9 +14,9 @@ */ #include "sx1272-hal.h" -const RadioRegisters_t SX1272MB1DxS::RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE; +const RadioRegisters_t SX1272MB2xAS::RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE; -SX1272MB1DxS::SX1272MB1DxS( RadioEvents_t *events, +SX1272MB2xAS::SX1272MB2xAS( RadioEvents_t *events, PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset, PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5, #if defined ( TARGET_MOTE_L152RC ) @@ -60,7 +60,7 @@ this->settings.State = RF_IDLE ; } -SX1272MB1DxS::SX1272MB1DxS( RadioEvents_t *events ) +SX1272MB2xAS::SX1272MB2xAS( RadioEvents_t *events ) #if defined ( TARGET_NUCLEO_L152RE ) : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, A3, D9 ), // For NUCLEO L152RE dio4 is on port A3 AntSwitch( A4 ), @@ -103,7 +103,7 @@ //------------------------------------------------------------------------- // Board relative functions //------------------------------------------------------------------------- -uint8_t SX1272MB1DxS::DetectBoardType( void ) +uint8_t SX1272MB2xAS::DetectBoardType( void ) { if( boardConnected == UNKNOWN ) { @@ -120,7 +120,7 @@ } else { - boardConnected = SX1272MB1DAS; + boardConnected = SX1272MB2XAS; } this->AntSwitch.output( ); wait_ms( 1 ); @@ -129,13 +129,13 @@ return ( boardConnected ); } -void SX1272MB1DxS::IoInit( void ) +void SX1272MB2xAS::IoInit( void ) { AntSwInit( ); SpiInit( ); } -void SX1272MB1DxS::RadioRegistersInit( ) +void SX1272MB2xAS::RadioRegistersInit( ) { uint8_t i = 0; for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ ) @@ -145,7 +145,7 @@ } } -void SX1272MB1DxS::SpiInit( void ) +void SX1272MB2xAS::SpiInit( void ) { nss = 1; spi.format( 8,0 ); @@ -160,7 +160,7 @@ wait(0.1); } -void SX1272MB1DxS::IoIrqInit( DioIrqHandler *irqHandlers ) +void SX1272MB2xAS::IoIrqInit( DioIrqHandler *irqHandlers ) { #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_MOTE_L152RC ) || defined ( TARGET_LPC11U6X ) ) dio0.mode( PullDown ); @@ -169,19 +169,19 @@ dio3.mode( PullDown ); dio4.mode( PullDown ); #endif - dio0.rise( this, static_cast< TriggerMB1DxS > ( irqHandlers[0] ) ); - dio1.rise( this, static_cast< TriggerMB1DxS > ( irqHandlers[1] ) ); - dio2.rise( this, static_cast< TriggerMB1DxS > ( irqHandlers[2] ) ); - dio3.rise( this, static_cast< TriggerMB1DxS > ( irqHandlers[3] ) ); - dio4.rise( this, static_cast< TriggerMB1DxS > ( irqHandlers[4] ) ); + dio0.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[0] ) ); + dio1.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[1] ) ); + dio2.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[2] ) ); + dio3.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[3] ) ); + dio4.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[4] ) ); } -void SX1272MB1DxS::IoDeInit( void ) +void SX1272MB2xAS::IoDeInit( void ) { //nothing } -uint8_t SX1272MB1DxS::GetPaSelect( uint32_t channel ) +uint8_t SX1272MB2xAS::GetPaSelect( uint32_t channel ) { if( boardConnected == SX1272MB1DCS || boardConnected == MDOT_F411RE ) { @@ -193,7 +193,7 @@ } } -void SX1272MB1DxS::SetAntSwLowPower( bool status ) +void SX1272MB2xAS::SetAntSwLowPower( bool status ) { if( isRadioActive != status ) { @@ -210,7 +210,7 @@ } } -void SX1272MB1DxS::AntSwInit( void ) +void SX1272MB2xAS::AntSwInit( void ) { #if defined ( TARGET_MOTE_L152RC ) this->RfSwitchCntr1 = 0; @@ -224,7 +224,7 @@ #endif } -void SX1272MB1DxS::AntSwDeInit( void ) +void SX1272MB2xAS::AntSwDeInit( void ) { #if defined ( TARGET_MOTE_L152RC ) this->RfSwitchCntr1 = 0; @@ -238,7 +238,7 @@ #endif } -void SX1272MB1DxS::SetAntSw( uint8_t rxTx ) +void SX1272MB2xAS::SetAntSw( uint8_t rxTx ) { #if defined ( TARGET_MOTE_L152RC ) switch( this->currentOpMode ) @@ -309,14 +309,14 @@ #endif } -bool SX1272MB1DxS::CheckRfFrequency( uint32_t frequency ) +bool SX1272MB2xAS::CheckRfFrequency( uint32_t frequency ) { //TODO: Implement check, currently all frequencies are supported return true; } -void SX1272MB1DxS::Reset( void ) +void SX1272MB2xAS::Reset( void ) { reset.output(); reset = 0; @@ -325,19 +325,19 @@ wait_ms( 6 ); } -void SX1272MB1DxS::Write( uint8_t addr, uint8_t data ) +void SX1272MB2xAS::Write( uint8_t addr, uint8_t data ) { Write( addr, &data, 1 ); } -uint8_t SX1272MB1DxS::Read( uint8_t addr ) +uint8_t SX1272MB2xAS::Read( uint8_t addr ) { uint8_t data; Read( addr, &data, 1 ); return data; } -void SX1272MB1DxS::Write( uint8_t addr, uint8_t *buffer, uint8_t size ) +void SX1272MB2xAS::Write( uint8_t addr, uint8_t *buffer, uint8_t size ) { uint8_t i; @@ -350,7 +350,7 @@ nss = 1; } -void SX1272MB1DxS::Read( uint8_t addr, uint8_t *buffer, uint8_t size ) +void SX1272MB2xAS::Read( uint8_t addr, uint8_t *buffer, uint8_t size ) { uint8_t i; @@ -363,12 +363,12 @@ nss = 1; } -void SX1272MB1DxS::WriteFifo( uint8_t *buffer, uint8_t size ) +void SX1272MB2xAS::WriteFifo( uint8_t *buffer, uint8_t size ) { Write( 0, buffer, size ); } -void SX1272MB1DxS::ReadFifo( uint8_t *buffer, uint8_t size ) +void SX1272MB2xAS::ReadFifo( uint8_t *buffer, uint8_t size ) { Read( 0, buffer, size ); }