Semtech / Mbed 2 deprecated SX126xDevKit

Source code for the SX126xDVK1xAS Dev Kit. This example code has only been tested on the Nucleo L476RG

Dependencies:   mbed DmTftLibrary SX126xLib

Demo/DemoApplication.h@1:b96176a4ccb8, 2018-03-09 (annotated)

Committer:
GregCr
Date:
Fri Mar 09 13:28:34 2018 +0000
Revision:
1:b96176a4ccb8
Parent:
0:e5420f1a8a1a
Child:
2:8e1b4210df6b
V1.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
GregCr 0:e5420f1a8a1a 1 /*
GregCr 0:e5420f1a8a1a 2 ______ _
GregCr 0:e5420f1a8a1a 3 / _____) _ | |
GregCr 0:e5420f1a8a1a 4 ( (____ _____ ____ _| |_ _____ ____| |__
GregCr 0:e5420f1a8a1a 5 \____ \| ___ | (_ _) ___ |/ ___) _ \
GregCr 0:e5420f1a8a1a 6 _____) ) ____| | | || |_| ____( (___| | | |
GregCr 0:e5420f1a8a1a 7 (______/|_____)_|_|_| \__)_____)\____)_| |_|
GregCr 0:e5420f1a8a1a 8 (C)2016 Semtech
GregCr 0:e5420f1a8a1a 9
GregCr 0:e5420f1a8a1a 10 Description: Display driver header
GregCr 0:e5420f1a8a1a 11
GregCr 0:e5420f1a8a1a 12 Maintainer: Gregory Cristian & Gilbert Menth
GregCr 0:e5420f1a8a1a 13 */
GregCr 0:e5420f1a8a1a 14
GregCr 0:e5420f1a8a1a 15 #ifndef DEMO_APPLICATION_H
GregCr 0:e5420f1a8a1a 16 #define DEMO_APPLICATION_H
GregCr 0:e5420f1a8a1a 17
GregCr 0:e5420f1a8a1a 18
GregCr 0:e5420f1a8a1a 19 /*!
GregCr 0:e5420f1a8a1a 20 * \brief Used to display firmware version on TFT (Utilities menu)
GregCr 0:e5420f1a8a1a 21 */
GregCr 1:b96176a4ccb8 22 #define FIRMWARE_VERSION ( ( char* )"Firmware Version: 180110" )
GregCr 0:e5420f1a8a1a 23
GregCr 0:e5420f1a8a1a 24 /*!
GregCr 0:e5420f1a8a1a 25 * \brief Define range of central frequency [Hz]
GregCr 0:e5420f1a8a1a 26 */
GregCr 0:e5420f1a8a1a 27 #define DEMO_CENTRAL_FREQ_MIN 850000000UL
GregCr 0:e5420f1a8a1a 28 #define DEMO_CENTRAL_FREQ_MAX 930000000UL
GregCr 0:e5420f1a8a1a 29
GregCr 0:e5420f1a8a1a 30 /*!
GregCr 0:e5420f1a8a1a 31 * \brief Define 3 preset central frequencies [Hz]
GregCr 0:e5420f1a8a1a 32 */
GregCr 0:e5420f1a8a1a 33 #define DEMO_CENTRAL_FREQ_PRESET1 868000000UL
GregCr 0:e5420f1a8a1a 34 #define DEMO_CENTRAL_FREQ_PRESET2 915000000UL
GregCr 0:e5420f1a8a1a 35 #define DEMO_CENTRAL_FREQ_PRESET3 930000000UL
GregCr 0:e5420f1a8a1a 36
GregCr 0:e5420f1a8a1a 37 /*!
GregCr 0:e5420f1a8a1a 38 * \brief Define min and max Tx power [dBm]
GregCr 0:e5420f1a8a1a 39 */
GregCr 0:e5420f1a8a1a 40 #define SX1261_POWER_TX_MIN -17
GregCr 0:e5420f1a8a1a 41 #define SX1261_POWER_TX_MAX 15
GregCr 0:e5420f1a8a1a 42
GregCr 0:e5420f1a8a1a 43 #define SX1262_POWER_TX_MIN -10
GregCr 0:e5420f1a8a1a 44 #define SX1262_POWER_TX_MAX 22
GregCr 0:e5420f1a8a1a 45
GregCr 0:e5420f1a8a1a 46 /*!
GregCr 0:e5420f1a8a1a 47 * \brief Define current demo mode
GregCr 0:e5420f1a8a1a 48 */
GregCr 0:e5420f1a8a1a 49 enum DemoMode
GregCr 0:e5420f1a8a1a 50 {
GregCr 0:e5420f1a8a1a 51 MASTER = 0,
GregCr 0:e5420f1a8a1a 52 SLAVE
GregCr 0:e5420f1a8a1a 53 };
GregCr 0:e5420f1a8a1a 54
GregCr 0:e5420f1a8a1a 55 /*!
GregCr 0:e5420f1a8a1a 56 * \brief Define GFSK bitrate
GregCr 0:e5420f1a8a1a 57 */
GregCr 0:e5420f1a8a1a 58 typedef enum
GregCr 0:e5420f1a8a1a 59 {
GregCr 0:e5420f1a8a1a 60 DEMO_BR_100 = 100,
GregCr 0:e5420f1a8a1a 61 DEMO_BR_600 = 600,
GregCr 0:e5420f1a8a1a 62 DEMO_BR_4800 = 4800,
GregCr 0:e5420f1a8a1a 63 DEMO_BR_9600 = 9600,
GregCr 0:e5420f1a8a1a 64 DEMO_BR_19200 = 19200,
GregCr 0:e5420f1a8a1a 65 DEMO_BR_57600 = 57600,
GregCr 0:e5420f1a8a1a 66 DEMO_BR_100000 = 100000,
GregCr 0:e5420f1a8a1a 67 DEMO_BR_250000 = 250000,
GregCr 0:e5420f1a8a1a 68 }DemoBitrate_t;
GregCr 0:e5420f1a8a1a 69
GregCr 0:e5420f1a8a1a 70 /*!
GregCr 0:e5420f1a8a1a 71 * \brief Define GFSK frequency deviation
GregCr 0:e5420f1a8a1a 72 */
GregCr 0:e5420f1a8a1a 73 typedef enum
GregCr 0:e5420f1a8a1a 74 {
GregCr 0:e5420f1a8a1a 75 DEMO_FDEV_5000 = 5000,
GregCr 0:e5420f1a8a1a 76 DEMO_FDEV_10000 = 10000,
GregCr 0:e5420f1a8a1a 77 DEMO_FDEV_25000 = 25000,
GregCr 0:e5420f1a8a1a 78 DEMO_FDEV_50000 = 50000,
GregCr 0:e5420f1a8a1a 79 DEMO_FDEV_75000 = 75000,
GregCr 0:e5420f1a8a1a 80 DEMO_FDEV_100000 = 100000,
GregCr 0:e5420f1a8a1a 81 DEMO_FDEV_150000 = 150000,
GregCr 0:e5420f1a8a1a 82 }DemoFrequencyDev_t;
GregCr 0:e5420f1a8a1a 83
GregCr 0:e5420f1a8a1a 84 /*!
GregCr 0:e5420f1a8a1a 85 * \brief List of states for demo state machine
GregCr 0:e5420f1a8a1a 86 */
GregCr 0:e5420f1a8a1a 87 enum DemoInternalStates
GregCr 0:e5420f1a8a1a 88 {
GregCr 0:e5420f1a8a1a 89 APP_IDLE = 0, // nothing to do (or wait a radio interrupt)
GregCr 0:e5420f1a8a1a 90 SEND_PING_MSG,
GregCr 0:e5420f1a8a1a 91 SEND_PONG_MSG,
GregCr 0:e5420f1a8a1a 92 APP_RX, // Rx done
GregCr 0:e5420f1a8a1a 93 APP_RX_TIMEOUT, // Rx timeout
GregCr 0:e5420f1a8a1a 94 APP_RX_ERROR, // Rx error
GregCr 0:e5420f1a8a1a 95 APP_TX, // Tx done
GregCr 0:e5420f1a8a1a 96 APP_TX_TIMEOUT, // Tx error
GregCr 0:e5420f1a8a1a 97 PER_TX_START, // PER master
GregCr 0:e5420f1a8a1a 98 PER_RX_START, // PER slave
GregCr 0:e5420f1a8a1a 99 CAD_DONE, // CAD Done
GregCr 0:e5420f1a8a1a 100 CAD_DONE_CHANNEL_DETECTED // Channel Detected following a CAD
GregCr 0:e5420f1a8a1a 101 };
GregCr 0:e5420f1a8a1a 102
GregCr 0:e5420f1a8a1a 103 /*!
GregCr 0:e5420f1a8a1a 104 * \brief Demo Settings structure of Eeprom structure
GregCr 0:e5420f1a8a1a 105 */
GregCr 0:e5420f1a8a1a 106 typedef struct
GregCr 0:e5420f1a8a1a 107 {
GregCr 0:e5420f1a8a1a 108 uint8_t Entity; // Master or Slave
GregCr 0:e5420f1a8a1a 109 uint8_t HoldDemo; // Put demo in hold status
GregCr 0:e5420f1a8a1a 110 uint8_t BoostedRx; // Use Boosted Rx if true
GregCr 0:e5420f1a8a1a 111 uint32_t Frequency; // Demo frequency
GregCr 0:e5420f1a8a1a 112 uint8_t LastDeviceConnected;// Last Device Connected
GregCr 0:e5420f1a8a1a 113 int8_t TxPower; // Demo Tx power
GregCr 0:e5420f1a8a1a 114 uint8_t RadioPowerMode; // Radio Power Mode [0: LDO, 1:DC_DC]
GregCr 0:e5420f1a8a1a 115 uint8_t PayloadLength; // Demo payload length
GregCr 0:e5420f1a8a1a 116 uint8_t ModulationType; // Demo modulation type (LORA, GFSK)
GregCr 0:e5420f1a8a1a 117 uint32_t ModulationParam1; // Demo Mod. Param1 (depend on modulation type)
GregCr 0:e5420f1a8a1a 118 uint32_t ModulationParam2; // Demo Mod. Param2 (depend on modulation type)
GregCr 0:e5420f1a8a1a 119 uint8_t ModulationParam3; // Demo Mod. Param3 (depend on modulation type)
GregCr 0:e5420f1a8a1a 120 uint8_t ModulationParam4; // Demo Mod. Param4 (depend on modulation type)
GregCr 0:e5420f1a8a1a 121 uint16_t PacketParam1; // Demo Pack. Param1 (depend on packet type)
GregCr 0:e5420f1a8a1a 122 uint8_t PacketParam2; // Demo Pack. Param2 (depend on packet type)
GregCr 0:e5420f1a8a1a 123 uint8_t PacketParam3; // Demo Pack. Param3 (depend on packet type)
GregCr 0:e5420f1a8a1a 124 uint8_t PacketParam4; // Demo Pack. Param4 (depend on packet type)
GregCr 0:e5420f1a8a1a 125 uint8_t PacketParam5; // Demo Pack. Param5 (depend on packet type)
GregCr 0:e5420f1a8a1a 126 uint8_t PacketParam6; // Demo Pack. Param6 (depend on packet type)
GregCr 0:e5420f1a8a1a 127 uint8_t PacketParam7; // Demo Pack. Param7 (depend on packet type)
GregCr 0:e5420f1a8a1a 128 uint8_t PacketParam8; // Demo Pack. Param8 (depend on packet type)
GregCr 0:e5420f1a8a1a 129 uint32_t MaxNumPacket; // Demo Max Num Packet for PingPong and PER
GregCr 0:e5420f1a8a1a 130 uint16_t InterPacketDelay; // Demo Inter-Packet Delay for PingPong and PER
GregCr 0:e5420f1a8a1a 131 uint32_t CntPacketTx; // Tx packet transmitted
GregCr 0:e5420f1a8a1a 132 uint32_t CntPacketRxOK; // Rx packet received OK
GregCr 0:e5420f1a8a1a 133 uint32_t CntPacketRxOKSlave;// Rx packet received OK (slave side)
GregCr 0:e5420f1a8a1a 134 uint32_t CntPacketRxKO; // Rx packet received KO
GregCr 0:e5420f1a8a1a 135 uint32_t CntPacketRxKOSlave;// Rx packet received KO (slave side)
GregCr 0:e5420f1a8a1a 136 uint16_t RxTimeOutCount; // Rx packet received KO (by timeout)
GregCr 0:e5420f1a8a1a 137 int8_t RssiValue; // Demo Rssi Value
GregCr 0:e5420f1a8a1a 138 int8_t SnrValue; // Demo Snr Value (only for LR24 mod. type)
GregCr 0:e5420f1a8a1a 139 uint32_t FreqErrorEst; // Estimation of the frequency error on the Rx side
GregCr 0:e5420f1a8a1a 140 }DemoSettings_t;
GregCr 0:e5420f1a8a1a 141
GregCr 0:e5420f1a8a1a 142 /*!
GregCr 0:e5420f1a8a1a 143 * \brief Define freq offset for config central freq in "Radio Config Freq" menu
GregCr 0:e5420f1a8a1a 144 */
GregCr 0:e5420f1a8a1a 145 enum FreqBase
GregCr 0:e5420f1a8a1a 146 {
GregCr 0:e5420f1a8a1a 147 FB1 = 1, // 1 Hz
GregCr 0:e5420f1a8a1a 148 FB10 = 10, // 10 Hz
GregCr 0:e5420f1a8a1a 149 FB100 = 100, // 100 Hz
GregCr 0:e5420f1a8a1a 150 FB1K = 1000, // 1 kHz
GregCr 0:e5420f1a8a1a 151 FB10K = 10000, // 10 kHz
GregCr 0:e5420f1a8a1a 152 FB100K = 100000, // 100 kHz
GregCr 0:e5420f1a8a1a 153 FB1M = 1000000, // 1 MHz
GregCr 0:e5420f1a8a1a 154 FB10M = 10000000 // 10 MHz
GregCr 0:e5420f1a8a1a 155 };
GregCr 0:e5420f1a8a1a 156
GregCr 0:e5420f1a8a1a 157
GregCr 0:e5420f1a8a1a 158 /*!
GregCr 0:e5420f1a8a1a 159 * \brief Simple Function which return the device connected.
GregCr 0:e5420f1a8a1a 160 *
GregCr 0:e5420f1a8a1a 161 * \retval deviceConnected device type connected
GregCr 0:e5420f1a8a1a 162 */
GregCr 0:e5420f1a8a1a 163 uint8_t GetConnectedDevice( void );
GregCr 0:e5420f1a8a1a 164
GregCr 0:e5420f1a8a1a 165 /*!
GregCr 1:b96176a4ccb8 166 * \brief Simple Function which return the board matching frequency
GregCr 1:b96176a4ccb8 167 *
GregCr 1:b96176a4ccb8 168 * \retval freq 1: 868 MHz 0: 915 MHz
GregCr 1:b96176a4ccb8 169 */
GregCr 1:b96176a4ccb8 170 uint8_t GetMatchingFrequency( void );
GregCr 1:b96176a4ccb8 171
GregCr 1:b96176a4ccb8 172 /*!
GregCr 0:e5420f1a8a1a 173 * \brief Init RAM copy of Eeprom structure and init radio with it.
GregCr 0:e5420f1a8a1a 174 *
GregCr 0:e5420f1a8a1a 175 */
GregCr 0:e5420f1a8a1a 176 void InitDemoApplication( void );
GregCr 0:e5420f1a8a1a 177
GregCr 0:e5420f1a8a1a 178 /*!
GregCr 0:e5420f1a8a1a 179 * \brief Init vars of demo and fix APP_IDLE state to demo state machine.
GregCr 0:e5420f1a8a1a 180 */
GregCr 0:e5420f1a8a1a 181 void StopDemoApplication( void );
GregCr 0:e5420f1a8a1a 182
GregCr 0:e5420f1a8a1a 183 /*!
GregCr 1:b96176a4ccb8 184 * \brief Run demo reading constantly the RSSI.
GregCr 1:b96176a4ccb8 185 *
GregCr 1:b96176a4ccb8 186 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 1:b96176a4ccb8 187 */
GregCr 1:b96176a4ccb8 188 uint8_t RunDemoTestRssi( void );
GregCr 1:b96176a4ccb8 189
GregCr 1:b96176a4ccb8 190 /*!
GregCr 0:e5420f1a8a1a 191 * \brief Run Demo in sleep mode.
GregCr 0:e5420f1a8a1a 192 *
GregCr 0:e5420f1a8a1a 193 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 194 */
GregCr 0:e5420f1a8a1a 195 uint8_t RunDemoSleepMode( void );
GregCr 0:e5420f1a8a1a 196
GregCr 0:e5420f1a8a1a 197 /*!
GregCr 0:e5420f1a8a1a 198 * \brief Run Demo in standby RC mode.
GregCr 0:e5420f1a8a1a 199 *
GregCr 0:e5420f1a8a1a 200 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 201 */
GregCr 0:e5420f1a8a1a 202 uint8_t RunDemoStandbyRcMode( void );
GregCr 0:e5420f1a8a1a 203
GregCr 0:e5420f1a8a1a 204 /*!
GregCr 0:e5420f1a8a1a 205 * \brief Run Demo in standby XOSC mode.
GregCr 0:e5420f1a8a1a 206 *
GregCr 0:e5420f1a8a1a 207 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 208 */
GregCr 0:e5420f1a8a1a 209 uint8_t RunDemoStandbyXoscMode( void );
GregCr 0:e5420f1a8a1a 210
GregCr 0:e5420f1a8a1a 211 /*!
GregCr 0:e5420f1a8a1a 212 * \brief Run Demo Tx in continuous mode without modulation.
GregCr 0:e5420f1a8a1a 213 *
GregCr 0:e5420f1a8a1a 214 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 215 */
GregCr 0:e5420f1a8a1a 216 uint8_t RunDemoTxCw( void );
GregCr 0:e5420f1a8a1a 217
GregCr 0:e5420f1a8a1a 218 /*!
GregCr 0:e5420f1a8a1a 219 * \brief Run Demo Tx in continuous modulation.
GregCr 0:e5420f1a8a1a 220 *
GregCr 0:e5420f1a8a1a 221 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 222 */
GregCr 0:e5420f1a8a1a 223 uint8_t RunDemoTxContinuousModulation( void );
GregCr 0:e5420f1a8a1a 224
GregCr 0:e5420f1a8a1a 225 /*!
GregCr 0:e5420f1a8a1a 226 * \brief Run Demo Rx in continuous mode.
GregCr 0:e5420f1a8a1a 227 *
GregCr 0:e5420f1a8a1a 228 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 229 */
GregCr 0:e5420f1a8a1a 230 uint8_t RunDemoRxContinuous( void );
GregCr 0:e5420f1a8a1a 231
GregCr 0:e5420f1a8a1a 232 /*!
GregCr 0:e5420f1a8a1a 233 * \brief Run demo PingPong.
GregCr 0:e5420f1a8a1a 234 *
GregCr 0:e5420f1a8a1a 235 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 236 */
GregCr 0:e5420f1a8a1a 237 uint8_t RunDemoApplicationPingPong( void );
GregCr 0:e5420f1a8a1a 238
GregCr 0:e5420f1a8a1a 239 /*!
GregCr 0:e5420f1a8a1a 240 * \brief Compute payload of Rx frame and update current counts and indicators.
GregCr 0:e5420f1a8a1a 241 *
GregCr 0:e5420f1a8a1a 242 * \param [in] buffer buffer with frame to compute
GregCr 0:e5420f1a8a1a 243 * \param [in] buffersize size of frame data in the buffer
GregCr 0:e5420f1a8a1a 244 */
GregCr 0:e5420f1a8a1a 245 void ComputePingPongPayload( uint8_t *buffer, uint8_t bufferSize );
GregCr 0:e5420f1a8a1a 246
GregCr 0:e5420f1a8a1a 247 /*!
GregCr 0:e5420f1a8a1a 248 * \brief Run demo PER.
GregCr 0:e5420f1a8a1a 249 *
GregCr 0:e5420f1a8a1a 250 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 251 */
GregCr 0:e5420f1a8a1a 252 uint8_t RunDemoApplicationPer( void );
GregCr 0:e5420f1a8a1a 253
GregCr 0:e5420f1a8a1a 254 /*!
GregCr 0:e5420f1a8a1a 255 * \brief Compute payload of Rx frame and update current counts and indicators.
GregCr 0:e5420f1a8a1a 256 *
GregCr 0:e5420f1a8a1a 257 * \param [in] buffer buffer with frame to compute
GregCr 0:e5420f1a8a1a 258 * \param [in] buffersize size of frame data in the buffer
GregCr 0:e5420f1a8a1a 259 */
GregCr 0:e5420f1a8a1a 260 void ComputePerPayload( uint8_t *buffer, uint8_t bufferSize );
GregCr 0:e5420f1a8a1a 261
GregCr 0:e5420f1a8a1a 262 #endif // DEMO_APPLICATION_H