Source code for the SX126xDVK1xAS Dev Kit. This example code has only been tested on the Nucleo L476RG

Dependencies:   mbed DmTftLibrary SX126xLib

Committer:
GregCr
Date:
Wed Jul 18 13:34:10 2018 +0000
Revision:
2:8e1b4210df6b
Parent:
1:b96176a4ccb8
added support for sx1268

Who changed what in which revision?

UserRevisionLine numberNew contents of line
GregCr 0:e5420f1a8a1a 1 /*
GregCr 0:e5420f1a8a1a 2 ______ _
GregCr 0:e5420f1a8a1a 3 / _____) _ | |
GregCr 0:e5420f1a8a1a 4 ( (____ _____ ____ _| |_ _____ ____| |__
GregCr 0:e5420f1a8a1a 5 \____ \| ___ | (_ _) ___ |/ ___) _ \
GregCr 0:e5420f1a8a1a 6 _____) ) ____| | | || |_| ____( (___| | | |
GregCr 0:e5420f1a8a1a 7 (______/|_____)_|_|_| \__)_____)\____)_| |_|
GregCr 0:e5420f1a8a1a 8 (C)2016 Semtech
GregCr 0:e5420f1a8a1a 9
GregCr 0:e5420f1a8a1a 10 Description: Display driver header
GregCr 0:e5420f1a8a1a 11
GregCr 0:e5420f1a8a1a 12 Maintainer: Gregory Cristian & Gilbert Menth
GregCr 0:e5420f1a8a1a 13 */
GregCr 0:e5420f1a8a1a 14
GregCr 0:e5420f1a8a1a 15 #ifndef DEMO_APPLICATION_H
GregCr 0:e5420f1a8a1a 16 #define DEMO_APPLICATION_H
GregCr 0:e5420f1a8a1a 17
GregCr 0:e5420f1a8a1a 18
GregCr 0:e5420f1a8a1a 19 /*!
GregCr 0:e5420f1a8a1a 20 * \brief Used to display firmware version on TFT (Utilities menu)
GregCr 0:e5420f1a8a1a 21 */
GregCr 2:8e1b4210df6b 22 #define FIRMWARE_VERSION ( ( char* )"Firmware Version: 180706" )
GregCr 0:e5420f1a8a1a 23
GregCr 0:e5420f1a8a1a 24 /*!
GregCr 0:e5420f1a8a1a 25 * \brief Define range of central frequency [Hz]
GregCr 0:e5420f1a8a1a 26 */
GregCr 2:8e1b4210df6b 27 #define DEMO_CENTRAL_FREQ_MIN 150000000UL
GregCr 2:8e1b4210df6b 28 #define DEMO_CENTRAL_FREQ_MAX 950000000UL
GregCr 0:e5420f1a8a1a 29
GregCr 0:e5420f1a8a1a 30 /*!
GregCr 0:e5420f1a8a1a 31 * \brief Define 3 preset central frequencies [Hz]
GregCr 0:e5420f1a8a1a 32 */
GregCr 2:8e1b4210df6b 33 #define DEMO_CENTRAL_FREQ_PRESET1 169000000UL
GregCr 2:8e1b4210df6b 34 #define DEMO_CENTRAL_FREQ_PRESET2 280000000UL
GregCr 2:8e1b4210df6b 35 #define DEMO_CENTRAL_FREQ_PRESET3 434000000UL
GregCr 2:8e1b4210df6b 36 #define DEMO_CENTRAL_FREQ_PRESET4 490000000UL
GregCr 2:8e1b4210df6b 37 #define DEMO_CENTRAL_FREQ_PRESET5 783000000UL
GregCr 2:8e1b4210df6b 38 #define DEMO_CENTRAL_FREQ_PRESET6 868000000UL
GregCr 2:8e1b4210df6b 39 #define DEMO_CENTRAL_FREQ_PRESET7 915000000UL
GregCr 2:8e1b4210df6b 40 #define DEMO_CENTRAL_FREQ_PRESET8 930000000UL
GregCr 2:8e1b4210df6b 41 #define DEMO_CENTRAL_FREQ_PRESET9 510000000UL
GregCr 0:e5420f1a8a1a 42
GregCr 0:e5420f1a8a1a 43 /*!
GregCr 0:e5420f1a8a1a 44 * \brief Define min and max Tx power [dBm]
GregCr 0:e5420f1a8a1a 45 */
GregCr 0:e5420f1a8a1a 46 #define SX1261_POWER_TX_MIN -17
GregCr 0:e5420f1a8a1a 47 #define SX1261_POWER_TX_MAX 15
GregCr 0:e5420f1a8a1a 48
GregCr 0:e5420f1a8a1a 49 #define SX1262_POWER_TX_MIN -10
GregCr 0:e5420f1a8a1a 50 #define SX1262_POWER_TX_MAX 22
GregCr 0:e5420f1a8a1a 51
GregCr 0:e5420f1a8a1a 52 /*!
GregCr 0:e5420f1a8a1a 53 * \brief Define current demo mode
GregCr 0:e5420f1a8a1a 54 */
GregCr 0:e5420f1a8a1a 55 enum DemoMode
GregCr 0:e5420f1a8a1a 56 {
GregCr 0:e5420f1a8a1a 57 MASTER = 0,
GregCr 0:e5420f1a8a1a 58 SLAVE
GregCr 0:e5420f1a8a1a 59 };
GregCr 0:e5420f1a8a1a 60
GregCr 0:e5420f1a8a1a 61 /*!
GregCr 0:e5420f1a8a1a 62 * \brief Define GFSK bitrate
GregCr 0:e5420f1a8a1a 63 */
GregCr 0:e5420f1a8a1a 64 typedef enum
GregCr 0:e5420f1a8a1a 65 {
GregCr 0:e5420f1a8a1a 66 DEMO_BR_100 = 100,
GregCr 0:e5420f1a8a1a 67 DEMO_BR_600 = 600,
GregCr 0:e5420f1a8a1a 68 DEMO_BR_4800 = 4800,
GregCr 0:e5420f1a8a1a 69 DEMO_BR_9600 = 9600,
GregCr 0:e5420f1a8a1a 70 DEMO_BR_19200 = 19200,
GregCr 0:e5420f1a8a1a 71 DEMO_BR_57600 = 57600,
GregCr 0:e5420f1a8a1a 72 DEMO_BR_100000 = 100000,
GregCr 0:e5420f1a8a1a 73 DEMO_BR_250000 = 250000,
GregCr 0:e5420f1a8a1a 74 }DemoBitrate_t;
GregCr 0:e5420f1a8a1a 75
GregCr 0:e5420f1a8a1a 76 /*!
GregCr 0:e5420f1a8a1a 77 * \brief Define GFSK frequency deviation
GregCr 0:e5420f1a8a1a 78 */
GregCr 0:e5420f1a8a1a 79 typedef enum
GregCr 0:e5420f1a8a1a 80 {
GregCr 0:e5420f1a8a1a 81 DEMO_FDEV_5000 = 5000,
GregCr 0:e5420f1a8a1a 82 DEMO_FDEV_10000 = 10000,
GregCr 0:e5420f1a8a1a 83 DEMO_FDEV_25000 = 25000,
GregCr 0:e5420f1a8a1a 84 DEMO_FDEV_50000 = 50000,
GregCr 0:e5420f1a8a1a 85 DEMO_FDEV_75000 = 75000,
GregCr 0:e5420f1a8a1a 86 DEMO_FDEV_100000 = 100000,
GregCr 0:e5420f1a8a1a 87 DEMO_FDEV_150000 = 150000,
GregCr 0:e5420f1a8a1a 88 }DemoFrequencyDev_t;
GregCr 0:e5420f1a8a1a 89
GregCr 0:e5420f1a8a1a 90 /*!
GregCr 0:e5420f1a8a1a 91 * \brief List of states for demo state machine
GregCr 0:e5420f1a8a1a 92 */
GregCr 0:e5420f1a8a1a 93 enum DemoInternalStates
GregCr 0:e5420f1a8a1a 94 {
GregCr 0:e5420f1a8a1a 95 APP_IDLE = 0, // nothing to do (or wait a radio interrupt)
GregCr 0:e5420f1a8a1a 96 SEND_PING_MSG,
GregCr 0:e5420f1a8a1a 97 SEND_PONG_MSG,
GregCr 0:e5420f1a8a1a 98 APP_RX, // Rx done
GregCr 0:e5420f1a8a1a 99 APP_RX_TIMEOUT, // Rx timeout
GregCr 0:e5420f1a8a1a 100 APP_RX_ERROR, // Rx error
GregCr 0:e5420f1a8a1a 101 APP_TX, // Tx done
GregCr 0:e5420f1a8a1a 102 APP_TX_TIMEOUT, // Tx error
GregCr 0:e5420f1a8a1a 103 PER_TX_START, // PER master
GregCr 0:e5420f1a8a1a 104 PER_RX_START, // PER slave
GregCr 0:e5420f1a8a1a 105 CAD_DONE, // CAD Done
GregCr 0:e5420f1a8a1a 106 CAD_DONE_CHANNEL_DETECTED // Channel Detected following a CAD
GregCr 0:e5420f1a8a1a 107 };
GregCr 0:e5420f1a8a1a 108
GregCr 0:e5420f1a8a1a 109 /*!
GregCr 0:e5420f1a8a1a 110 * \brief Demo Settings structure of Eeprom structure
GregCr 0:e5420f1a8a1a 111 */
GregCr 0:e5420f1a8a1a 112 typedef struct
GregCr 0:e5420f1a8a1a 113 {
GregCr 0:e5420f1a8a1a 114 uint8_t Entity; // Master or Slave
GregCr 0:e5420f1a8a1a 115 uint8_t HoldDemo; // Put demo in hold status
GregCr 0:e5420f1a8a1a 116 uint8_t BoostedRx; // Use Boosted Rx if true
GregCr 0:e5420f1a8a1a 117 uint32_t Frequency; // Demo frequency
GregCr 0:e5420f1a8a1a 118 uint8_t LastDeviceConnected;// Last Device Connected
GregCr 0:e5420f1a8a1a 119 int8_t TxPower; // Demo Tx power
GregCr 0:e5420f1a8a1a 120 uint8_t RadioPowerMode; // Radio Power Mode [0: LDO, 1:DC_DC]
GregCr 0:e5420f1a8a1a 121 uint8_t PayloadLength; // Demo payload length
GregCr 0:e5420f1a8a1a 122 uint8_t ModulationType; // Demo modulation type (LORA, GFSK)
GregCr 0:e5420f1a8a1a 123 uint32_t ModulationParam1; // Demo Mod. Param1 (depend on modulation type)
GregCr 0:e5420f1a8a1a 124 uint32_t ModulationParam2; // Demo Mod. Param2 (depend on modulation type)
GregCr 0:e5420f1a8a1a 125 uint8_t ModulationParam3; // Demo Mod. Param3 (depend on modulation type)
GregCr 0:e5420f1a8a1a 126 uint8_t ModulationParam4; // Demo Mod. Param4 (depend on modulation type)
GregCr 0:e5420f1a8a1a 127 uint16_t PacketParam1; // Demo Pack. Param1 (depend on packet type)
GregCr 0:e5420f1a8a1a 128 uint8_t PacketParam2; // Demo Pack. Param2 (depend on packet type)
GregCr 0:e5420f1a8a1a 129 uint8_t PacketParam3; // Demo Pack. Param3 (depend on packet type)
GregCr 0:e5420f1a8a1a 130 uint8_t PacketParam4; // Demo Pack. Param4 (depend on packet type)
GregCr 0:e5420f1a8a1a 131 uint8_t PacketParam5; // Demo Pack. Param5 (depend on packet type)
GregCr 0:e5420f1a8a1a 132 uint8_t PacketParam6; // Demo Pack. Param6 (depend on packet type)
GregCr 0:e5420f1a8a1a 133 uint8_t PacketParam7; // Demo Pack. Param7 (depend on packet type)
GregCr 0:e5420f1a8a1a 134 uint8_t PacketParam8; // Demo Pack. Param8 (depend on packet type)
GregCr 0:e5420f1a8a1a 135 uint32_t MaxNumPacket; // Demo Max Num Packet for PingPong and PER
GregCr 0:e5420f1a8a1a 136 uint16_t InterPacketDelay; // Demo Inter-Packet Delay for PingPong and PER
GregCr 0:e5420f1a8a1a 137 uint32_t CntPacketTx; // Tx packet transmitted
GregCr 0:e5420f1a8a1a 138 uint32_t CntPacketRxOK; // Rx packet received OK
GregCr 0:e5420f1a8a1a 139 uint32_t CntPacketRxOKSlave;// Rx packet received OK (slave side)
GregCr 0:e5420f1a8a1a 140 uint32_t CntPacketRxKO; // Rx packet received KO
GregCr 0:e5420f1a8a1a 141 uint32_t CntPacketRxKOSlave;// Rx packet received KO (slave side)
GregCr 0:e5420f1a8a1a 142 uint16_t RxTimeOutCount; // Rx packet received KO (by timeout)
GregCr 0:e5420f1a8a1a 143 int8_t RssiValue; // Demo Rssi Value
GregCr 0:e5420f1a8a1a 144 int8_t SnrValue; // Demo Snr Value (only for LR24 mod. type)
GregCr 0:e5420f1a8a1a 145 uint32_t FreqErrorEst; // Estimation of the frequency error on the Rx side
GregCr 0:e5420f1a8a1a 146 }DemoSettings_t;
GregCr 0:e5420f1a8a1a 147
GregCr 0:e5420f1a8a1a 148 /*!
GregCr 0:e5420f1a8a1a 149 * \brief Define freq offset for config central freq in "Radio Config Freq" menu
GregCr 0:e5420f1a8a1a 150 */
GregCr 0:e5420f1a8a1a 151 enum FreqBase
GregCr 0:e5420f1a8a1a 152 {
GregCr 0:e5420f1a8a1a 153 FB1 = 1, // 1 Hz
GregCr 0:e5420f1a8a1a 154 FB10 = 10, // 10 Hz
GregCr 0:e5420f1a8a1a 155 FB100 = 100, // 100 Hz
GregCr 0:e5420f1a8a1a 156 FB1K = 1000, // 1 kHz
GregCr 0:e5420f1a8a1a 157 FB10K = 10000, // 10 kHz
GregCr 0:e5420f1a8a1a 158 FB100K = 100000, // 100 kHz
GregCr 0:e5420f1a8a1a 159 FB1M = 1000000, // 1 MHz
GregCr 0:e5420f1a8a1a 160 FB10M = 10000000 // 10 MHz
GregCr 0:e5420f1a8a1a 161 };
GregCr 0:e5420f1a8a1a 162
GregCr 0:e5420f1a8a1a 163
GregCr 0:e5420f1a8a1a 164 /*!
GregCr 0:e5420f1a8a1a 165 * \brief Simple Function which return the device connected.
GregCr 0:e5420f1a8a1a 166 *
GregCr 0:e5420f1a8a1a 167 * \retval deviceConnected device type connected
GregCr 0:e5420f1a8a1a 168 */
GregCr 0:e5420f1a8a1a 169 uint8_t GetConnectedDevice( void );
GregCr 0:e5420f1a8a1a 170
GregCr 0:e5420f1a8a1a 171 /*!
GregCr 1:b96176a4ccb8 172 * \brief Simple Function which return the board matching frequency
GregCr 1:b96176a4ccb8 173 *
GregCr 1:b96176a4ccb8 174 * \retval freq 1: 868 MHz 0: 915 MHz
GregCr 1:b96176a4ccb8 175 */
GregCr 1:b96176a4ccb8 176 uint8_t GetMatchingFrequency( void );
GregCr 1:b96176a4ccb8 177
GregCr 1:b96176a4ccb8 178 /*!
GregCr 0:e5420f1a8a1a 179 * \brief Init RAM copy of Eeprom structure and init radio with it.
GregCr 0:e5420f1a8a1a 180 *
GregCr 0:e5420f1a8a1a 181 */
GregCr 0:e5420f1a8a1a 182 void InitDemoApplication( void );
GregCr 0:e5420f1a8a1a 183
GregCr 0:e5420f1a8a1a 184 /*!
GregCr 0:e5420f1a8a1a 185 * \brief Init vars of demo and fix APP_IDLE state to demo state machine.
GregCr 0:e5420f1a8a1a 186 */
GregCr 0:e5420f1a8a1a 187 void StopDemoApplication( void );
GregCr 0:e5420f1a8a1a 188
GregCr 0:e5420f1a8a1a 189 /*!
GregCr 1:b96176a4ccb8 190 * \brief Run demo reading constantly the RSSI.
GregCr 1:b96176a4ccb8 191 *
GregCr 1:b96176a4ccb8 192 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 1:b96176a4ccb8 193 */
GregCr 1:b96176a4ccb8 194 uint8_t RunDemoTestRssi( void );
GregCr 1:b96176a4ccb8 195
GregCr 1:b96176a4ccb8 196 /*!
GregCr 0:e5420f1a8a1a 197 * \brief Run Demo in sleep mode.
GregCr 0:e5420f1a8a1a 198 *
GregCr 0:e5420f1a8a1a 199 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 200 */
GregCr 0:e5420f1a8a1a 201 uint8_t RunDemoSleepMode( void );
GregCr 0:e5420f1a8a1a 202
GregCr 0:e5420f1a8a1a 203 /*!
GregCr 0:e5420f1a8a1a 204 * \brief Run Demo in standby RC mode.
GregCr 0:e5420f1a8a1a 205 *
GregCr 0:e5420f1a8a1a 206 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 207 */
GregCr 0:e5420f1a8a1a 208 uint8_t RunDemoStandbyRcMode( void );
GregCr 0:e5420f1a8a1a 209
GregCr 0:e5420f1a8a1a 210 /*!
GregCr 0:e5420f1a8a1a 211 * \brief Run Demo in standby XOSC mode.
GregCr 0:e5420f1a8a1a 212 *
GregCr 0:e5420f1a8a1a 213 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 214 */
GregCr 0:e5420f1a8a1a 215 uint8_t RunDemoStandbyXoscMode( void );
GregCr 0:e5420f1a8a1a 216
GregCr 0:e5420f1a8a1a 217 /*!
GregCr 0:e5420f1a8a1a 218 * \brief Run Demo Tx in continuous mode without modulation.
GregCr 0:e5420f1a8a1a 219 *
GregCr 0:e5420f1a8a1a 220 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 221 */
GregCr 0:e5420f1a8a1a 222 uint8_t RunDemoTxCw( void );
GregCr 0:e5420f1a8a1a 223
GregCr 0:e5420f1a8a1a 224 /*!
GregCr 0:e5420f1a8a1a 225 * \brief Run Demo Tx in continuous modulation.
GregCr 0:e5420f1a8a1a 226 *
GregCr 0:e5420f1a8a1a 227 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 228 */
GregCr 0:e5420f1a8a1a 229 uint8_t RunDemoTxContinuousModulation( void );
GregCr 0:e5420f1a8a1a 230
GregCr 0:e5420f1a8a1a 231 /*!
GregCr 0:e5420f1a8a1a 232 * \brief Run Demo Rx in continuous mode.
GregCr 0:e5420f1a8a1a 233 *
GregCr 0:e5420f1a8a1a 234 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 235 */
GregCr 0:e5420f1a8a1a 236 uint8_t RunDemoRxContinuous( void );
GregCr 0:e5420f1a8a1a 237
GregCr 0:e5420f1a8a1a 238 /*!
GregCr 0:e5420f1a8a1a 239 * \brief Run demo PingPong.
GregCr 0:e5420f1a8a1a 240 *
GregCr 0:e5420f1a8a1a 241 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 242 */
GregCr 0:e5420f1a8a1a 243 uint8_t RunDemoApplicationPingPong( void );
GregCr 0:e5420f1a8a1a 244
GregCr 0:e5420f1a8a1a 245 /*!
GregCr 0:e5420f1a8a1a 246 * \brief Compute payload of Rx frame and update current counts and indicators.
GregCr 0:e5420f1a8a1a 247 *
GregCr 0:e5420f1a8a1a 248 * \param [in] buffer buffer with frame to compute
GregCr 0:e5420f1a8a1a 249 * \param [in] buffersize size of frame data in the buffer
GregCr 0:e5420f1a8a1a 250 */
GregCr 0:e5420f1a8a1a 251 void ComputePingPongPayload( uint8_t *buffer, uint8_t bufferSize );
GregCr 0:e5420f1a8a1a 252
GregCr 0:e5420f1a8a1a 253 /*!
GregCr 0:e5420f1a8a1a 254 * \brief Run demo PER.
GregCr 0:e5420f1a8a1a 255 *
GregCr 0:e5420f1a8a1a 256 * \retval demoStatusUpdate page refresh status ( >0 : refresh)
GregCr 0:e5420f1a8a1a 257 */
GregCr 0:e5420f1a8a1a 258 uint8_t RunDemoApplicationPer( void );
GregCr 0:e5420f1a8a1a 259
GregCr 0:e5420f1a8a1a 260 /*!
GregCr 0:e5420f1a8a1a 261 * \brief Compute payload of Rx frame and update current counts and indicators.
GregCr 0:e5420f1a8a1a 262 *
GregCr 0:e5420f1a8a1a 263 * \param [in] buffer buffer with frame to compute
GregCr 0:e5420f1a8a1a 264 * \param [in] buffersize size of frame data in the buffer
GregCr 0:e5420f1a8a1a 265 */
GregCr 0:e5420f1a8a1a 266 void ComputePerPayload( uint8_t *buffer, uint8_t bufferSize );
GregCr 0:e5420f1a8a1a 267
GregCr 0:e5420f1a8a1a 268 #endif // DEMO_APPLICATION_H