SDRAM class for DISCO_F746NG
Dependents: ARMmbedFMsinth DISCO-F746NG_AUDIO_demo3 DISCO-F746NG_Monttory_Base DISCO-F746NG_Monttory_Base ... more
Deprecated lib
SDRAM_DISCO_F746NG.h@0:370f402a2219, 2016-03-21 (annotated)
- Committer:
- adustm
- Date:
- Mon Mar 21 12:16:24 2016 +0000
- Revision:
- 0:370f402a2219
SDRAM class for DISCO_F746NG
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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adustm | 0:370f402a2219 | 1 | /* Copyright (c) 2010-2016 mbed.org, MIT License |
adustm | 0:370f402a2219 | 2 | * |
adustm | 0:370f402a2219 | 3 | * Permission is hereby granted, free of charge, to any person obtaining a copy of this software |
adustm | 0:370f402a2219 | 4 | * and associated documentation files (the "Software"), to deal in the Software without |
adustm | 0:370f402a2219 | 5 | * restriction, including without limitation the rights to use, copy, modify, merge, publish, |
adustm | 0:370f402a2219 | 6 | * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the |
adustm | 0:370f402a2219 | 7 | * Software is furnished to do so, subject to the following conditions: |
adustm | 0:370f402a2219 | 8 | * |
adustm | 0:370f402a2219 | 9 | * The above copyright notice and this permission notice shall be included in all copies or |
adustm | 0:370f402a2219 | 10 | * substantial portions of the Software. |
adustm | 0:370f402a2219 | 11 | * |
adustm | 0:370f402a2219 | 12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING |
adustm | 0:370f402a2219 | 13 | * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
adustm | 0:370f402a2219 | 14 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, |
adustm | 0:370f402a2219 | 15 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
adustm | 0:370f402a2219 | 16 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
adustm | 0:370f402a2219 | 17 | */ |
adustm | 0:370f402a2219 | 18 | |
adustm | 0:370f402a2219 | 19 | #ifndef __SDRAM_DISCO_F746NG_H |
adustm | 0:370f402a2219 | 20 | #define __SDRAM_DISCO_F746NG_H |
adustm | 0:370f402a2219 | 21 | |
adustm | 0:370f402a2219 | 22 | #ifdef TARGET_DISCO_F746NG |
adustm | 0:370f402a2219 | 23 | |
adustm | 0:370f402a2219 | 24 | #include "mbed.h" |
adustm | 0:370f402a2219 | 25 | #include "stm32746g_discovery_sdram.h" |
adustm | 0:370f402a2219 | 26 | |
adustm | 0:370f402a2219 | 27 | /* |
adustm | 0:370f402a2219 | 28 | This class drives the SDRAM driver (MT48LC4M32B2B5-7) present on DISCO_F746NG board. |
adustm | 0:370f402a2219 | 29 | |
adustm | 0:370f402a2219 | 30 | Usage: |
adustm | 0:370f402a2219 | 31 | |
adustm | 0:370f402a2219 | 32 | #include "mbed.h" |
adustm | 0:370f402a2219 | 33 | #include "SDRAM_DISCO_F746NG.h" |
adustm | 0:370f402a2219 | 34 | |
adustm | 0:370f402a2219 | 35 | int main() |
adustm | 0:370f402a2219 | 36 | { |
adustm | 0:370f402a2219 | 37 | sdram.WriteData(SDRAM_DEVICE_ADDR + WRITE_READ_ADDR, WriteBuffer, BUFFER_SIZE); |
adustm | 0:370f402a2219 | 38 | SDRAMCommandStructure.CommandMode = FMC_SDRAM_CMD_SELFREFRESH_MODE; |
adustm | 0:370f402a2219 | 39 | SDRAMCommandStructure.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2; |
adustm | 0:370f402a2219 | 40 | SDRAMCommandStructure.AutoRefreshNumber = 1; |
adustm | 0:370f402a2219 | 41 | SDRAMCommandStructure.ModeRegisterDefinition = 0; |
adustm | 0:370f402a2219 | 42 | sdram.Sendcmd(&SDRAMCommandStructure); |
adustm | 0:370f402a2219 | 43 | SDRAMCommandStructure.CommandMode = FMC_SDRAM_CMD_NORMAL_MODE; |
adustm | 0:370f402a2219 | 44 | sdram.Sendcmd(&SDRAMCommandStructure); |
adustm | 0:370f402a2219 | 45 | sdram.ReadData(SDRAM_DEVICE_ADDR + WRITE_READ_ADDR, ReadBuffer, BUFFER_SIZE); |
adustm | 0:370f402a2219 | 46 | CompareBuffer(WriteBuffer, ReadBuffer, BUFFER_SIZE); |
adustm | 0:370f402a2219 | 47 | while(1) { |
adustm | 0:370f402a2219 | 48 | } |
adustm | 0:370f402a2219 | 49 | } |
adustm | 0:370f402a2219 | 50 | |
adustm | 0:370f402a2219 | 51 | */ |
adustm | 0:370f402a2219 | 52 | class SDRAM_DISCO_F746NG |
adustm | 0:370f402a2219 | 53 | { |
adustm | 0:370f402a2219 | 54 | |
adustm | 0:370f402a2219 | 55 | public: |
adustm | 0:370f402a2219 | 56 | //! Constructor |
adustm | 0:370f402a2219 | 57 | SDRAM_DISCO_F746NG(); |
adustm | 0:370f402a2219 | 58 | |
adustm | 0:370f402a2219 | 59 | //! Destructor |
adustm | 0:370f402a2219 | 60 | ~SDRAM_DISCO_F746NG(); |
adustm | 0:370f402a2219 | 61 | |
adustm | 0:370f402a2219 | 62 | |
adustm | 0:370f402a2219 | 63 | /** |
adustm | 0:370f402a2219 | 64 | * @brief Initializes the SDRAM device. |
adustm | 0:370f402a2219 | 65 | * @retval SDRAM status |
adustm | 0:370f402a2219 | 66 | */ |
adustm | 0:370f402a2219 | 67 | uint8_t Init(void); |
adustm | 0:370f402a2219 | 68 | |
adustm | 0:370f402a2219 | 69 | /** |
adustm | 0:370f402a2219 | 70 | * @brief DeInitializes the SDRAM device. |
adustm | 0:370f402a2219 | 71 | * @retval SDRAM status |
adustm | 0:370f402a2219 | 72 | */ |
adustm | 0:370f402a2219 | 73 | uint8_t DeInit(void); |
adustm | 0:370f402a2219 | 74 | |
adustm | 0:370f402a2219 | 75 | /** |
adustm | 0:370f402a2219 | 76 | * @brief Programs the SDRAM device. |
adustm | 0:370f402a2219 | 77 | * @param RefreshCount: SDRAM refresh counter value |
adustm | 0:370f402a2219 | 78 | * @retval None |
adustm | 0:370f402a2219 | 79 | */ |
adustm | 0:370f402a2219 | 80 | void Initialization_sequence(uint32_t RefreshCount); |
adustm | 0:370f402a2219 | 81 | |
adustm | 0:370f402a2219 | 82 | /** |
adustm | 0:370f402a2219 | 83 | * @brief Reads an amount of data from the SDRAM memory in polling mode. |
adustm | 0:370f402a2219 | 84 | * @param uwStartAddress: Read start address |
adustm | 0:370f402a2219 | 85 | * @param pData: Pointer to data to be read |
adustm | 0:370f402a2219 | 86 | * @param uwDataSize: Size of read data from the memory |
adustm | 0:370f402a2219 | 87 | * @retval SDRAM status |
adustm | 0:370f402a2219 | 88 | */ |
adustm | 0:370f402a2219 | 89 | uint8_t ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
adustm | 0:370f402a2219 | 90 | |
adustm | 0:370f402a2219 | 91 | /** |
adustm | 0:370f402a2219 | 92 | * @brief Reads an amount of data from the SDRAM memory in DMA mode. |
adustm | 0:370f402a2219 | 93 | * @param uwStartAddress: Read start address |
adustm | 0:370f402a2219 | 94 | * @param pData: Pointer to data to be read |
adustm | 0:370f402a2219 | 95 | * @param uwDataSize: Size of read data from the memory |
adustm | 0:370f402a2219 | 96 | * @retval SDRAM status |
adustm | 0:370f402a2219 | 97 | */ |
adustm | 0:370f402a2219 | 98 | uint8_t ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
adustm | 0:370f402a2219 | 99 | |
adustm | 0:370f402a2219 | 100 | /** |
adustm | 0:370f402a2219 | 101 | * @brief Writes an amount of data to the SDRAM memory in polling mode. |
adustm | 0:370f402a2219 | 102 | * @param uwStartAddress: Write start address |
adustm | 0:370f402a2219 | 103 | * @param pData: Pointer to data to be written |
adustm | 0:370f402a2219 | 104 | * @param uwDataSize: Size of written data from the memory |
adustm | 0:370f402a2219 | 105 | * @retval SDRAM status |
adustm | 0:370f402a2219 | 106 | */ |
adustm | 0:370f402a2219 | 107 | uint8_t WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
adustm | 0:370f402a2219 | 108 | |
adustm | 0:370f402a2219 | 109 | /** |
adustm | 0:370f402a2219 | 110 | * @brief Writes an amount of data to the SDRAM memory in DMA mode. |
adustm | 0:370f402a2219 | 111 | * @param uwStartAddress: Write start address |
adustm | 0:370f402a2219 | 112 | * @param pData: Pointer to data to be written |
adustm | 0:370f402a2219 | 113 | * @param uwDataSize: Size of written data from the memory |
adustm | 0:370f402a2219 | 114 | * @retval SDRAM status |
adustm | 0:370f402a2219 | 115 | */ |
adustm | 0:370f402a2219 | 116 | uint8_t WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
adustm | 0:370f402a2219 | 117 | |
adustm | 0:370f402a2219 | 118 | /** |
adustm | 0:370f402a2219 | 119 | * @brief Sends command to the SDRAM bank. |
adustm | 0:370f402a2219 | 120 | * @param SdramCmd: Pointer to SDRAM command structure |
adustm | 0:370f402a2219 | 121 | * @retval SDRAM status |
adustm | 0:370f402a2219 | 122 | */ |
adustm | 0:370f402a2219 | 123 | uint8_t Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd); |
adustm | 0:370f402a2219 | 124 | |
adustm | 0:370f402a2219 | 125 | private: |
adustm | 0:370f402a2219 | 126 | |
adustm | 0:370f402a2219 | 127 | }; |
adustm | 0:370f402a2219 | 128 | |
adustm | 0:370f402a2219 | 129 | #else |
adustm | 0:370f402a2219 | 130 | #error "This class must be used with DISCO_F746NG board only." |
adustm | 0:370f402a2219 | 131 | #endif // TARGET_DISCO_F746NG |
adustm | 0:370f402a2219 | 132 | |
adustm | 0:370f402a2219 | 133 | #endif |
adustm | 0:370f402a2219 | 134 |