iNEMO inertial module: 3D accelerometer and 3D gyroscope.

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   X_NUCLEO_IKS01A3 X_NUCLEO_IKS01A3

Committer:
cparata
Date:
Wed Jul 24 14:19:35 2019 +0000
Revision:
3:4274d9103f1d
Parent:
2:4d14e9edf37e
Child:
4:77faf76e3cd8
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cparata 0:6d69e896ce38 1 /*
cparata 0:6d69e896ce38 2 ******************************************************************************
cparata 0:6d69e896ce38 3 * @file lsm6dso_reg.c
cparata 0:6d69e896ce38 4 * @author Sensor Solutions Software Team
cparata 0:6d69e896ce38 5 * @brief LSM6DSO driver file
cparata 0:6d69e896ce38 6 ******************************************************************************
cparata 0:6d69e896ce38 7 * @attention
cparata 0:6d69e896ce38 8 *
cparata 0:6d69e896ce38 9 * <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
cparata 0:6d69e896ce38 10 *
cparata 0:6d69e896ce38 11 * Redistribution and use in source and binary forms, with or without
cparata 0:6d69e896ce38 12 * modification, are permitted provided that the following conditions
cparata 0:6d69e896ce38 13 * are met:
cparata 0:6d69e896ce38 14 * 1. Redistributions of source code must retain the above copyright notice,
cparata 0:6d69e896ce38 15 * this list of conditions and the following disclaimer.
cparata 0:6d69e896ce38 16 * 2. Redistributions in binary form must reproduce the above copyright
cparata 0:6d69e896ce38 17 * notice, this list of conditions and the following disclaimer in the
cparata 0:6d69e896ce38 18 * documentation and/or other materials provided with the distribution.
cparata 0:6d69e896ce38 19 * 3. Neither the name of STMicroelectronics nor the names of its
cparata 0:6d69e896ce38 20 * contributors may be used to endorse or promote products derived from
cparata 0:6d69e896ce38 21 * this software without specific prior written permission.
cparata 0:6d69e896ce38 22 *
cparata 0:6d69e896ce38 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata 0:6d69e896ce38 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata 0:6d69e896ce38 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
cparata 0:6d69e896ce38 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
cparata 0:6d69e896ce38 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
cparata 0:6d69e896ce38 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
cparata 0:6d69e896ce38 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
cparata 0:6d69e896ce38 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
cparata 0:6d69e896ce38 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
cparata 0:6d69e896ce38 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
cparata 0:6d69e896ce38 33 * POSSIBILITY OF SUCH DAMAGE.
cparata 0:6d69e896ce38 34 *
cparata 0:6d69e896ce38 35 */
cparata 0:6d69e896ce38 36
cparata 0:6d69e896ce38 37 #include "lsm6dso_reg.h"
cparata 0:6d69e896ce38 38
cparata 0:6d69e896ce38 39 /**
cparata 0:6d69e896ce38 40 * @defgroup LSM6DSO
cparata 0:6d69e896ce38 41 * @brief This file provides a set of functions needed to drive the
cparata 0:6d69e896ce38 42 * lsm6dso enhanced inertial module.
cparata 0:6d69e896ce38 43 * @{
cparata 0:6d69e896ce38 44 *
cparata 0:6d69e896ce38 45 */
cparata 0:6d69e896ce38 46
cparata 0:6d69e896ce38 47 /**
cparata 0:6d69e896ce38 48 * @defgroup LSM6DSO_Interfaces_Functions
cparata 0:6d69e896ce38 49 * @brief This section provide a set of functions used to read and
cparata 0:6d69e896ce38 50 * write a generic register of the device.
cparata 0:6d69e896ce38 51 * MANDATORY: return 0 -> no Error.
cparata 0:6d69e896ce38 52 * @{
cparata 0:6d69e896ce38 53 *
cparata 0:6d69e896ce38 54 */
cparata 0:6d69e896ce38 55
cparata 0:6d69e896ce38 56 /**
cparata 0:6d69e896ce38 57 * @brief Read generic device register
cparata 0:6d69e896ce38 58 *
cparata 0:6d69e896ce38 59 * @param ctx read / write interface definitions(ptr)
cparata 0:6d69e896ce38 60 * @param reg register to read
cparata 0:6d69e896ce38 61 * @param data pointer to buffer that store the data read(ptr)
cparata 0:6d69e896ce38 62 * @param len number of consecutive register to read
cparata 0:6d69e896ce38 63 * @retval interface status (MANDATORY: return 0 -> no Error)
cparata 0:6d69e896ce38 64 *
cparata 0:6d69e896ce38 65 */
cparata 3:4274d9103f1d 66 int32_t lsm6dso_read_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t *data,
cparata 0:6d69e896ce38 67 uint16_t len)
cparata 0:6d69e896ce38 68 {
cparata 3:4274d9103f1d 69 int32_t ret;
cparata 3:4274d9103f1d 70 ret = ctx->read_reg(ctx->handle, reg, data, len);
cparata 3:4274d9103f1d 71 return ret;
cparata 0:6d69e896ce38 72 }
cparata 0:6d69e896ce38 73
cparata 0:6d69e896ce38 74 /**
cparata 0:6d69e896ce38 75 * @brief Write generic device register
cparata 0:6d69e896ce38 76 *
cparata 0:6d69e896ce38 77 * @param ctx read / write interface definitions(ptr)
cparata 0:6d69e896ce38 78 * @param reg register to write
cparata 0:6d69e896ce38 79 * @param data pointer to data to write in register reg(ptr)
cparata 0:6d69e896ce38 80 * @param len number of consecutive register to write
cparata 0:6d69e896ce38 81 * @retval interface status (MANDATORY: return 0 -> no Error)
cparata 0:6d69e896ce38 82 *
cparata 0:6d69e896ce38 83 */
cparata 3:4274d9103f1d 84 int32_t lsm6dso_write_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t *data,
cparata 0:6d69e896ce38 85 uint16_t len)
cparata 0:6d69e896ce38 86 {
cparata 3:4274d9103f1d 87 int32_t ret;
cparata 3:4274d9103f1d 88 ret = ctx->write_reg(ctx->handle, reg, data, len);
cparata 3:4274d9103f1d 89 return ret;
cparata 0:6d69e896ce38 90 }
cparata 0:6d69e896ce38 91
cparata 0:6d69e896ce38 92 /**
cparata 0:6d69e896ce38 93 * @}
cparata 0:6d69e896ce38 94 *
cparata 0:6d69e896ce38 95 */
cparata 0:6d69e896ce38 96
cparata 0:6d69e896ce38 97 /**
cparata 0:6d69e896ce38 98 * @defgroup LSM6DSO_Sensitivity
cparata 0:6d69e896ce38 99 * @brief These functions convert raw-data into engineering units.
cparata 0:6d69e896ce38 100 * @{
cparata 0:6d69e896ce38 101 *
cparata 0:6d69e896ce38 102 */
cparata 2:4d14e9edf37e 103 float_t lsm6dso_from_fs2_to_mg(int16_t lsb)
cparata 2:4d14e9edf37e 104 {
cparata 3:4274d9103f1d 105 return ((float_t)lsb) * 0.061f;
cparata 2:4d14e9edf37e 106 }
cparata 2:4d14e9edf37e 107
cparata 2:4d14e9edf37e 108 float_t lsm6dso_from_fs4_to_mg(int16_t lsb)
cparata 2:4d14e9edf37e 109 {
cparata 3:4274d9103f1d 110 return ((float_t)lsb) * 0.122f;
cparata 2:4d14e9edf37e 111 }
cparata 2:4d14e9edf37e 112
cparata 2:4d14e9edf37e 113 float_t lsm6dso_from_fs8_to_mg(int16_t lsb)
cparata 2:4d14e9edf37e 114 {
cparata 3:4274d9103f1d 115 return ((float_t)lsb) * 0.244f;
cparata 2:4d14e9edf37e 116 }
cparata 2:4d14e9edf37e 117
cparata 2:4d14e9edf37e 118 float_t lsm6dso_from_fs16_to_mg(int16_t lsb)
cparata 2:4d14e9edf37e 119 {
cparata 3:4274d9103f1d 120 return ((float_t)lsb) * 0.488f;
cparata 2:4d14e9edf37e 121 }
cparata 2:4d14e9edf37e 122
cparata 2:4d14e9edf37e 123 float_t lsm6dso_from_fs125_to_mdps(int16_t lsb)
cparata 2:4d14e9edf37e 124 {
cparata 3:4274d9103f1d 125 return ((float_t)lsb) * 4.375f;
cparata 2:4d14e9edf37e 126 }
cparata 2:4d14e9edf37e 127
cparata 2:4d14e9edf37e 128 float_t lsm6dso_from_fs500_to_mdps(int16_t lsb)
cparata 2:4d14e9edf37e 129 {
cparata 3:4274d9103f1d 130 return ((float_t)lsb) * 17.50f;
cparata 2:4d14e9edf37e 131 }
cparata 2:4d14e9edf37e 132
cparata 2:4d14e9edf37e 133 float_t lsm6dso_from_fs250_to_mdps(int16_t lsb)
cparata 2:4d14e9edf37e 134 {
cparata 3:4274d9103f1d 135 return ((float_t)lsb) * 8.750f;
cparata 2:4d14e9edf37e 136 }
cparata 2:4d14e9edf37e 137
cparata 2:4d14e9edf37e 138 float_t lsm6dso_from_fs1000_to_mdps(int16_t lsb)
cparata 2:4d14e9edf37e 139 {
cparata 3:4274d9103f1d 140 return ((float_t)lsb) * 35.0f;
cparata 2:4d14e9edf37e 141 }
cparata 2:4d14e9edf37e 142
cparata 2:4d14e9edf37e 143 float_t lsm6dso_from_fs2000_to_mdps(int16_t lsb)
cparata 2:4d14e9edf37e 144 {
cparata 3:4274d9103f1d 145 return ((float_t)lsb) * 70.0f;
cparata 2:4d14e9edf37e 146 }
cparata 2:4d14e9edf37e 147
cparata 2:4d14e9edf37e 148 float_t lsm6dso_from_lsb_to_celsius(int16_t lsb)
cparata 2:4d14e9edf37e 149 {
cparata 3:4274d9103f1d 150 return (((float_t)lsb / 256.0f) + 25.0f);
cparata 2:4d14e9edf37e 151 }
cparata 2:4d14e9edf37e 152
cparata 2:4d14e9edf37e 153 float_t lsm6dso_from_lsb_to_nsec(int16_t lsb)
cparata 2:4d14e9edf37e 154 {
cparata 3:4274d9103f1d 155 return ((float_t)lsb * 25000.0f);
cparata 0:6d69e896ce38 156 }
cparata 0:6d69e896ce38 157
cparata 0:6d69e896ce38 158 /**
cparata 0:6d69e896ce38 159 * @}
cparata 0:6d69e896ce38 160 *
cparata 0:6d69e896ce38 161 */
cparata 0:6d69e896ce38 162
cparata 0:6d69e896ce38 163 /**
cparata 0:6d69e896ce38 164 * @defgroup LSM6DSO_Data_Generation
cparata 0:6d69e896ce38 165 * @brief This section groups all the functions concerning
cparata 0:6d69e896ce38 166 * data generation.
cparata 0:6d69e896ce38 167 *
cparata 0:6d69e896ce38 168 */
cparata 0:6d69e896ce38 169
cparata 0:6d69e896ce38 170 /**
cparata 0:6d69e896ce38 171 * @brief Accelerometer full-scale selection.[set]
cparata 0:6d69e896ce38 172 *
cparata 0:6d69e896ce38 173 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 174 * @param val change the values of fs_xl in reg CTRL1_XL
cparata 0:6d69e896ce38 175 *
cparata 0:6d69e896ce38 176 */
cparata 0:6d69e896ce38 177 int32_t lsm6dso_xl_full_scale_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 178 lsm6dso_fs_xl_t val)
cparata 0:6d69e896ce38 179 {
cparata 3:4274d9103f1d 180 lsm6dso_ctrl1_xl_t reg;
cparata 3:4274d9103f1d 181 int32_t ret;
cparata 3:4274d9103f1d 182
cparata 3:4274d9103f1d 183 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 184 if (ret == 0) {
cparata 3:4274d9103f1d 185 reg.fs_xl = (uint8_t) val;
cparata 3:4274d9103f1d 186 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 187 }
cparata 3:4274d9103f1d 188 return ret;
cparata 0:6d69e896ce38 189 }
cparata 0:6d69e896ce38 190
cparata 0:6d69e896ce38 191 /**
cparata 0:6d69e896ce38 192 * @brief Accelerometer full-scale selection.[get]
cparata 0:6d69e896ce38 193 *
cparata 0:6d69e896ce38 194 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 195 * @param val Get the values of fs_xl in reg CTRL1_XL
cparata 0:6d69e896ce38 196 *
cparata 0:6d69e896ce38 197 */
cparata 0:6d69e896ce38 198 int32_t lsm6dso_xl_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_xl_t *val)
cparata 0:6d69e896ce38 199 {
cparata 3:4274d9103f1d 200 lsm6dso_ctrl1_xl_t reg;
cparata 3:4274d9103f1d 201 int32_t ret;
cparata 3:4274d9103f1d 202
cparata 3:4274d9103f1d 203 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 204 switch (reg.fs_xl) {
cparata 3:4274d9103f1d 205 case LSM6DSO_2g:
cparata 3:4274d9103f1d 206 *val = LSM6DSO_2g;
cparata 3:4274d9103f1d 207 break;
cparata 3:4274d9103f1d 208 case LSM6DSO_16g:
cparata 3:4274d9103f1d 209 *val = LSM6DSO_16g;
cparata 3:4274d9103f1d 210 break;
cparata 3:4274d9103f1d 211 case LSM6DSO_4g:
cparata 3:4274d9103f1d 212 *val = LSM6DSO_4g;
cparata 3:4274d9103f1d 213 break;
cparata 3:4274d9103f1d 214 case LSM6DSO_8g:
cparata 3:4274d9103f1d 215 *val = LSM6DSO_8g;
cparata 3:4274d9103f1d 216 break;
cparata 3:4274d9103f1d 217 default:
cparata 3:4274d9103f1d 218 *val = LSM6DSO_2g;
cparata 3:4274d9103f1d 219 break;
cparata 3:4274d9103f1d 220 }
cparata 3:4274d9103f1d 221
cparata 3:4274d9103f1d 222 return ret;
cparata 0:6d69e896ce38 223 }
cparata 0:6d69e896ce38 224
cparata 0:6d69e896ce38 225 /**
cparata 0:6d69e896ce38 226 * @brief Accelerometer UI data rate selection.[set]
cparata 0:6d69e896ce38 227 *
cparata 0:6d69e896ce38 228 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 229 * @param val change the values of odr_xl in reg CTRL1_XL
cparata 0:6d69e896ce38 230 *
cparata 0:6d69e896ce38 231 */
cparata 0:6d69e896ce38 232 int32_t lsm6dso_xl_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t val)
cparata 0:6d69e896ce38 233 {
cparata 3:4274d9103f1d 234 lsm6dso_ctrl1_xl_t reg;
cparata 3:4274d9103f1d 235 int32_t ret;
cparata 3:4274d9103f1d 236
cparata 3:4274d9103f1d 237 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 238 if (ret == 0) {
cparata 3:4274d9103f1d 239 reg.odr_xl = (uint8_t) val;
cparata 3:4274d9103f1d 240 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 241 }
cparata 3:4274d9103f1d 242 return ret;
cparata 0:6d69e896ce38 243 }
cparata 0:6d69e896ce38 244
cparata 0:6d69e896ce38 245 /**
cparata 0:6d69e896ce38 246 * @brief Accelerometer UI data rate selection.[get]
cparata 0:6d69e896ce38 247 *
cparata 0:6d69e896ce38 248 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 249 * @param val Get the values of odr_xl in reg CTRL1_XL
cparata 0:6d69e896ce38 250 *
cparata 0:6d69e896ce38 251 */
cparata 0:6d69e896ce38 252 int32_t lsm6dso_xl_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t *val)
cparata 0:6d69e896ce38 253 {
cparata 3:4274d9103f1d 254 lsm6dso_ctrl1_xl_t reg;
cparata 3:4274d9103f1d 255 int32_t ret;
cparata 3:4274d9103f1d 256
cparata 3:4274d9103f1d 257 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 258
cparata 3:4274d9103f1d 259 switch (reg.odr_xl) {
cparata 3:4274d9103f1d 260 case LSM6DSO_XL_ODR_OFF:
cparata 3:4274d9103f1d 261 *val = LSM6DSO_XL_ODR_OFF;
cparata 3:4274d9103f1d 262 break;
cparata 3:4274d9103f1d 263 case LSM6DSO_XL_ODR_12Hz5:
cparata 3:4274d9103f1d 264 *val = LSM6DSO_XL_ODR_12Hz5;
cparata 3:4274d9103f1d 265 break;
cparata 3:4274d9103f1d 266 case LSM6DSO_XL_ODR_26Hz:
cparata 3:4274d9103f1d 267 *val = LSM6DSO_XL_ODR_26Hz;
cparata 3:4274d9103f1d 268 break;
cparata 3:4274d9103f1d 269 case LSM6DSO_XL_ODR_52Hz:
cparata 3:4274d9103f1d 270 *val = LSM6DSO_XL_ODR_52Hz;
cparata 3:4274d9103f1d 271 break;
cparata 3:4274d9103f1d 272 case LSM6DSO_XL_ODR_104Hz:
cparata 3:4274d9103f1d 273 *val = LSM6DSO_XL_ODR_104Hz;
cparata 3:4274d9103f1d 274 break;
cparata 3:4274d9103f1d 275 case LSM6DSO_XL_ODR_208Hz:
cparata 3:4274d9103f1d 276 *val = LSM6DSO_XL_ODR_208Hz;
cparata 3:4274d9103f1d 277 break;
cparata 3:4274d9103f1d 278 case LSM6DSO_XL_ODR_417Hz:
cparata 3:4274d9103f1d 279 *val = LSM6DSO_XL_ODR_417Hz;
cparata 3:4274d9103f1d 280 break;
cparata 3:4274d9103f1d 281 case LSM6DSO_XL_ODR_833Hz:
cparata 3:4274d9103f1d 282 *val = LSM6DSO_XL_ODR_833Hz;
cparata 3:4274d9103f1d 283 break;
cparata 3:4274d9103f1d 284 case LSM6DSO_XL_ODR_1667Hz:
cparata 3:4274d9103f1d 285 *val = LSM6DSO_XL_ODR_1667Hz;
cparata 3:4274d9103f1d 286 break;
cparata 3:4274d9103f1d 287 case LSM6DSO_XL_ODR_3333Hz:
cparata 3:4274d9103f1d 288 *val = LSM6DSO_XL_ODR_3333Hz;
cparata 3:4274d9103f1d 289 break;
cparata 3:4274d9103f1d 290 case LSM6DSO_XL_ODR_6667Hz:
cparata 3:4274d9103f1d 291 *val = LSM6DSO_XL_ODR_6667Hz;
cparata 3:4274d9103f1d 292 break;
cparata 3:4274d9103f1d 293 case LSM6DSO_XL_ODR_6Hz5:
cparata 3:4274d9103f1d 294 *val = LSM6DSO_XL_ODR_6Hz5;
cparata 3:4274d9103f1d 295 break;
cparata 3:4274d9103f1d 296 default:
cparata 3:4274d9103f1d 297 *val = LSM6DSO_XL_ODR_OFF;
cparata 3:4274d9103f1d 298 break;
cparata 3:4274d9103f1d 299 }
cparata 3:4274d9103f1d 300 return ret;
cparata 0:6d69e896ce38 301 }
cparata 0:6d69e896ce38 302
cparata 0:6d69e896ce38 303 /**
cparata 0:6d69e896ce38 304 * @brief Gyroscope UI chain full-scale selection.[set]
cparata 0:6d69e896ce38 305 *
cparata 0:6d69e896ce38 306 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 307 * @param val change the values of fs_g in reg CTRL2_G
cparata 0:6d69e896ce38 308 *
cparata 0:6d69e896ce38 309 */
cparata 0:6d69e896ce38 310 int32_t lsm6dso_gy_full_scale_set(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t val)
cparata 0:6d69e896ce38 311 {
cparata 3:4274d9103f1d 312 lsm6dso_ctrl2_g_t reg;
cparata 3:4274d9103f1d 313 int32_t ret;
cparata 3:4274d9103f1d 314
cparata 3:4274d9103f1d 315 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 316 if (ret == 0) {
cparata 3:4274d9103f1d 317 reg.fs_g = (uint8_t) val;
cparata 3:4274d9103f1d 318 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 319 }
cparata 3:4274d9103f1d 320
cparata 3:4274d9103f1d 321 return ret;
cparata 0:6d69e896ce38 322 }
cparata 0:6d69e896ce38 323
cparata 0:6d69e896ce38 324 /**
cparata 0:6d69e896ce38 325 * @brief Gyroscope UI chain full-scale selection.[get]
cparata 0:6d69e896ce38 326 *
cparata 0:6d69e896ce38 327 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 328 * @param val Get the values of fs_g in reg CTRL2_G
cparata 0:6d69e896ce38 329 *
cparata 0:6d69e896ce38 330 */
cparata 0:6d69e896ce38 331 int32_t lsm6dso_gy_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t *val)
cparata 0:6d69e896ce38 332 {
cparata 3:4274d9103f1d 333 lsm6dso_ctrl2_g_t reg;
cparata 3:4274d9103f1d 334 int32_t ret;
cparata 3:4274d9103f1d 335
cparata 3:4274d9103f1d 336 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 337 switch (reg.fs_g) {
cparata 3:4274d9103f1d 338 case LSM6DSO_250dps:
cparata 3:4274d9103f1d 339 *val = LSM6DSO_250dps;
cparata 3:4274d9103f1d 340 break;
cparata 3:4274d9103f1d 341 case LSM6DSO_125dps:
cparata 3:4274d9103f1d 342 *val = LSM6DSO_125dps;
cparata 3:4274d9103f1d 343 break;
cparata 3:4274d9103f1d 344 case LSM6DSO_500dps:
cparata 3:4274d9103f1d 345 *val = LSM6DSO_500dps;
cparata 3:4274d9103f1d 346 break;
cparata 3:4274d9103f1d 347 case LSM6DSO_1000dps:
cparata 3:4274d9103f1d 348 *val = LSM6DSO_1000dps;
cparata 3:4274d9103f1d 349 break;
cparata 3:4274d9103f1d 350 case LSM6DSO_2000dps:
cparata 3:4274d9103f1d 351 *val = LSM6DSO_2000dps;
cparata 3:4274d9103f1d 352 break;
cparata 3:4274d9103f1d 353 default:
cparata 3:4274d9103f1d 354 *val = LSM6DSO_250dps;
cparata 3:4274d9103f1d 355 break;
cparata 3:4274d9103f1d 356 }
cparata 3:4274d9103f1d 357
cparata 3:4274d9103f1d 358 return ret;
cparata 0:6d69e896ce38 359 }
cparata 0:6d69e896ce38 360
cparata 0:6d69e896ce38 361 /**
cparata 0:6d69e896ce38 362 * @brief Gyroscope UI data rate selection.[set]
cparata 0:6d69e896ce38 363 *
cparata 0:6d69e896ce38 364 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 365 * @param val change the values of odr_g in reg CTRL2_G
cparata 0:6d69e896ce38 366 *
cparata 0:6d69e896ce38 367 */
cparata 0:6d69e896ce38 368 int32_t lsm6dso_gy_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t val)
cparata 0:6d69e896ce38 369 {
cparata 3:4274d9103f1d 370 lsm6dso_ctrl2_g_t reg;
cparata 3:4274d9103f1d 371 int32_t ret;
cparata 3:4274d9103f1d 372
cparata 3:4274d9103f1d 373 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 374 if (ret == 0) {
cparata 3:4274d9103f1d 375 reg.odr_g = (uint8_t) val;
cparata 3:4274d9103f1d 376 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 377 }
cparata 3:4274d9103f1d 378
cparata 3:4274d9103f1d 379 return ret;
cparata 0:6d69e896ce38 380 }
cparata 0:6d69e896ce38 381
cparata 0:6d69e896ce38 382 /**
cparata 0:6d69e896ce38 383 * @brief Gyroscope UI data rate selection.[get]
cparata 0:6d69e896ce38 384 *
cparata 0:6d69e896ce38 385 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 386 * @param val Get the values of odr_g in reg CTRL2_G
cparata 0:6d69e896ce38 387 *
cparata 0:6d69e896ce38 388 */
cparata 0:6d69e896ce38 389 int32_t lsm6dso_gy_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t *val)
cparata 0:6d69e896ce38 390 {
cparata 3:4274d9103f1d 391 lsm6dso_ctrl2_g_t reg;
cparata 3:4274d9103f1d 392 int32_t ret;
cparata 3:4274d9103f1d 393
cparata 3:4274d9103f1d 394 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 395 switch (reg.odr_g) {
cparata 3:4274d9103f1d 396 case LSM6DSO_GY_ODR_OFF:
cparata 3:4274d9103f1d 397 *val = LSM6DSO_GY_ODR_OFF;
cparata 3:4274d9103f1d 398 break;
cparata 3:4274d9103f1d 399 case LSM6DSO_GY_ODR_12Hz5:
cparata 3:4274d9103f1d 400 *val = LSM6DSO_GY_ODR_12Hz5;
cparata 3:4274d9103f1d 401 break;
cparata 3:4274d9103f1d 402 case LSM6DSO_GY_ODR_26Hz:
cparata 3:4274d9103f1d 403 *val = LSM6DSO_GY_ODR_26Hz;
cparata 3:4274d9103f1d 404 break;
cparata 3:4274d9103f1d 405 case LSM6DSO_GY_ODR_52Hz:
cparata 3:4274d9103f1d 406 *val = LSM6DSO_GY_ODR_52Hz;
cparata 3:4274d9103f1d 407 break;
cparata 3:4274d9103f1d 408 case LSM6DSO_GY_ODR_104Hz:
cparata 3:4274d9103f1d 409 *val = LSM6DSO_GY_ODR_104Hz;
cparata 3:4274d9103f1d 410 break;
cparata 3:4274d9103f1d 411 case LSM6DSO_GY_ODR_208Hz:
cparata 3:4274d9103f1d 412 *val = LSM6DSO_GY_ODR_208Hz;
cparata 3:4274d9103f1d 413 break;
cparata 3:4274d9103f1d 414 case LSM6DSO_GY_ODR_417Hz:
cparata 3:4274d9103f1d 415 *val = LSM6DSO_GY_ODR_417Hz;
cparata 3:4274d9103f1d 416 break;
cparata 3:4274d9103f1d 417 case LSM6DSO_GY_ODR_833Hz:
cparata 3:4274d9103f1d 418 *val = LSM6DSO_GY_ODR_833Hz;
cparata 3:4274d9103f1d 419 break;
cparata 3:4274d9103f1d 420 case LSM6DSO_GY_ODR_1667Hz:
cparata 3:4274d9103f1d 421 *val = LSM6DSO_GY_ODR_1667Hz;
cparata 3:4274d9103f1d 422 break;
cparata 3:4274d9103f1d 423 case LSM6DSO_GY_ODR_3333Hz:
cparata 3:4274d9103f1d 424 *val = LSM6DSO_GY_ODR_3333Hz;
cparata 3:4274d9103f1d 425 break;
cparata 3:4274d9103f1d 426 case LSM6DSO_GY_ODR_6667Hz:
cparata 3:4274d9103f1d 427 *val = LSM6DSO_GY_ODR_6667Hz;
cparata 3:4274d9103f1d 428 break;
cparata 3:4274d9103f1d 429 default:
cparata 3:4274d9103f1d 430 *val = LSM6DSO_GY_ODR_OFF;
cparata 3:4274d9103f1d 431 break;
cparata 3:4274d9103f1d 432 }
cparata 3:4274d9103f1d 433 return ret;
cparata 0:6d69e896ce38 434 }
cparata 0:6d69e896ce38 435
cparata 0:6d69e896ce38 436 /**
cparata 0:6d69e896ce38 437 * @brief Block data update.[set]
cparata 0:6d69e896ce38 438 *
cparata 0:6d69e896ce38 439 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 440 * @param val change the values of bdu in reg CTRL3_C
cparata 0:6d69e896ce38 441 *
cparata 0:6d69e896ce38 442 */
cparata 0:6d69e896ce38 443 int32_t lsm6dso_block_data_update_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 444 {
cparata 3:4274d9103f1d 445 lsm6dso_ctrl3_c_t reg;
cparata 3:4274d9103f1d 446 int32_t ret;
cparata 3:4274d9103f1d 447
cparata 3:4274d9103f1d 448 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 449 if (ret == 0) {
cparata 3:4274d9103f1d 450 reg.bdu = val;
cparata 3:4274d9103f1d 451 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 452 }
cparata 3:4274d9103f1d 453 return ret;
cparata 0:6d69e896ce38 454 }
cparata 0:6d69e896ce38 455
cparata 0:6d69e896ce38 456 /**
cparata 0:6d69e896ce38 457 * @brief Block data update.[get]
cparata 0:6d69e896ce38 458 *
cparata 0:6d69e896ce38 459 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 460 * @param val change the values of bdu in reg CTRL3_C
cparata 0:6d69e896ce38 461 *
cparata 0:6d69e896ce38 462 */
cparata 0:6d69e896ce38 463 int32_t lsm6dso_block_data_update_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 464 {
cparata 3:4274d9103f1d 465 lsm6dso_ctrl3_c_t reg;
cparata 3:4274d9103f1d 466 int32_t ret;
cparata 3:4274d9103f1d 467
cparata 3:4274d9103f1d 468 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 469 *val = reg.bdu;
cparata 3:4274d9103f1d 470
cparata 3:4274d9103f1d 471 return ret;
cparata 0:6d69e896ce38 472 }
cparata 0:6d69e896ce38 473
cparata 0:6d69e896ce38 474 /**
cparata 0:6d69e896ce38 475 * @brief Weight of XL user offset bits of registers X_OFS_USR (73h),
cparata 0:6d69e896ce38 476 * Y_OFS_USR (74h), Z_OFS_USR (75h).[set]
cparata 0:6d69e896ce38 477 *
cparata 0:6d69e896ce38 478 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 479 * @param val change the values of usr_off_w in reg CTRL6_C
cparata 0:6d69e896ce38 480 *
cparata 0:6d69e896ce38 481 */
cparata 0:6d69e896ce38 482 int32_t lsm6dso_xl_offset_weight_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 483 lsm6dso_usr_off_w_t val)
cparata 0:6d69e896ce38 484 {
cparata 3:4274d9103f1d 485 lsm6dso_ctrl6_c_t reg;
cparata 3:4274d9103f1d 486 int32_t ret;
cparata 3:4274d9103f1d 487
cparata 3:4274d9103f1d 488 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 489 if (ret == 0) {
cparata 3:4274d9103f1d 490 reg.usr_off_w = (uint8_t)val;
cparata 3:4274d9103f1d 491 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 492 }
cparata 3:4274d9103f1d 493 return ret;
cparata 0:6d69e896ce38 494 }
cparata 0:6d69e896ce38 495
cparata 0:6d69e896ce38 496 /**
cparata 0:6d69e896ce38 497 * @brief Weight of XL user offset bits of registers X_OFS_USR (73h),
cparata 0:6d69e896ce38 498 * Y_OFS_USR (74h), Z_OFS_USR (75h).[get]
cparata 0:6d69e896ce38 499 *
cparata 0:6d69e896ce38 500 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 501 * @param val Get the values of usr_off_w in reg CTRL6_C
cparata 0:6d69e896ce38 502 *
cparata 0:6d69e896ce38 503 */
cparata 0:6d69e896ce38 504 int32_t lsm6dso_xl_offset_weight_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 505 lsm6dso_usr_off_w_t *val)
cparata 0:6d69e896ce38 506 {
cparata 3:4274d9103f1d 507 lsm6dso_ctrl6_c_t reg;
cparata 3:4274d9103f1d 508 int32_t ret;
cparata 3:4274d9103f1d 509
cparata 3:4274d9103f1d 510 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 511
cparata 3:4274d9103f1d 512 switch (reg.usr_off_w) {
cparata 3:4274d9103f1d 513 case LSM6DSO_LSb_1mg:
cparata 3:4274d9103f1d 514 *val = LSM6DSO_LSb_1mg;
cparata 3:4274d9103f1d 515 break;
cparata 3:4274d9103f1d 516 case LSM6DSO_LSb_16mg:
cparata 3:4274d9103f1d 517 *val = LSM6DSO_LSb_16mg;
cparata 3:4274d9103f1d 518 break;
cparata 3:4274d9103f1d 519 default:
cparata 3:4274d9103f1d 520 *val = LSM6DSO_LSb_1mg;
cparata 3:4274d9103f1d 521 break;
cparata 3:4274d9103f1d 522 }
cparata 3:4274d9103f1d 523 return ret;
cparata 0:6d69e896ce38 524 }
cparata 0:6d69e896ce38 525
cparata 0:6d69e896ce38 526 /**
cparata 0:6d69e896ce38 527 * @brief Accelerometer power mode.[set]
cparata 0:6d69e896ce38 528 *
cparata 0:6d69e896ce38 529 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 530 * @param val change the values of xl_hm_mode in
cparata 0:6d69e896ce38 531 * reg CTRL6_C
cparata 0:6d69e896ce38 532 *
cparata 0:6d69e896ce38 533 */
cparata 0:6d69e896ce38 534 int32_t lsm6dso_xl_power_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 535 lsm6dso_xl_hm_mode_t val)
cparata 0:6d69e896ce38 536 {
cparata 3:4274d9103f1d 537 lsm6dso_ctrl5_c_t ctrl5_c;
cparata 3:4274d9103f1d 538 lsm6dso_ctrl6_c_t ctrl6_c;
cparata 3:4274d9103f1d 539 int32_t ret;
cparata 3:4274d9103f1d 540
cparata 3:4274d9103f1d 541 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
cparata 3:4274d9103f1d 542 if (ret == 0) {
cparata 3:4274d9103f1d 543 ctrl5_c.xl_ulp_en = ((uint8_t)val & 0x02U) >> 1;
cparata 3:4274d9103f1d 544 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
cparata 3:4274d9103f1d 545 }
cparata 3:4274d9103f1d 546 if (ret == 0) {
cparata 3:4274d9103f1d 547 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
cparata 3:4274d9103f1d 548 }
cparata 3:4274d9103f1d 549 if (ret == 0) {
cparata 3:4274d9103f1d 550 ctrl6_c.xl_hm_mode = (uint8_t)val & 0x01U;
cparata 3:4274d9103f1d 551 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
cparata 3:4274d9103f1d 552 }
cparata 3:4274d9103f1d 553 return ret;
cparata 0:6d69e896ce38 554 }
cparata 0:6d69e896ce38 555
cparata 0:6d69e896ce38 556 /**
cparata 0:6d69e896ce38 557 * @brief Accelerometer power mode.[get]
cparata 0:6d69e896ce38 558 *
cparata 0:6d69e896ce38 559 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 560 * @param val Get the values of xl_hm_mode in reg CTRL6_C
cparata 0:6d69e896ce38 561 *
cparata 0:6d69e896ce38 562 */
cparata 0:6d69e896ce38 563 int32_t lsm6dso_xl_power_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 564 lsm6dso_xl_hm_mode_t *val)
cparata 0:6d69e896ce38 565 {
cparata 3:4274d9103f1d 566 lsm6dso_ctrl5_c_t ctrl5_c;
cparata 3:4274d9103f1d 567 lsm6dso_ctrl6_c_t ctrl6_c;
cparata 3:4274d9103f1d 568 int32_t ret;
cparata 3:4274d9103f1d 569
cparata 3:4274d9103f1d 570 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
cparata 3:4274d9103f1d 571 if (ret == 0) {
cparata 3:4274d9103f1d 572 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
cparata 3:4274d9103f1d 573 switch ((ctrl5_c.xl_ulp_en << 1) | ctrl6_c.xl_hm_mode) {
cparata 3:4274d9103f1d 574 case LSM6DSO_HIGH_PERFORMANCE_MD:
cparata 3:4274d9103f1d 575 *val = LSM6DSO_HIGH_PERFORMANCE_MD;
cparata 3:4274d9103f1d 576 break;
cparata 3:4274d9103f1d 577 case LSM6DSO_LOW_NORMAL_POWER_MD:
cparata 3:4274d9103f1d 578 *val = LSM6DSO_LOW_NORMAL_POWER_MD;
cparata 3:4274d9103f1d 579 break;
cparata 3:4274d9103f1d 580 case LSM6DSO_ULTRA_LOW_POWER_MD:
cparata 3:4274d9103f1d 581 *val = LSM6DSO_ULTRA_LOW_POWER_MD;
cparata 3:4274d9103f1d 582 break;
cparata 3:4274d9103f1d 583 default:
cparata 3:4274d9103f1d 584 *val = LSM6DSO_HIGH_PERFORMANCE_MD;
cparata 3:4274d9103f1d 585 break;
cparata 3:4274d9103f1d 586 }
cparata 3:4274d9103f1d 587 }
cparata 3:4274d9103f1d 588 return ret;
cparata 0:6d69e896ce38 589 }
cparata 0:6d69e896ce38 590
cparata 0:6d69e896ce38 591 /**
cparata 0:6d69e896ce38 592 * @brief Operating mode for gyroscope.[set]
cparata 0:6d69e896ce38 593 *
cparata 0:6d69e896ce38 594 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 595 * @param val change the values of g_hm_mode in reg CTRL7_G
cparata 0:6d69e896ce38 596 *
cparata 0:6d69e896ce38 597 */
cparata 0:6d69e896ce38 598 int32_t lsm6dso_gy_power_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 599 lsm6dso_g_hm_mode_t val)
cparata 0:6d69e896ce38 600 {
cparata 3:4274d9103f1d 601 lsm6dso_ctrl7_g_t reg;
cparata 3:4274d9103f1d 602 int32_t ret;
cparata 3:4274d9103f1d 603
cparata 3:4274d9103f1d 604 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 605 if (ret == 0) {
cparata 3:4274d9103f1d 606 reg.g_hm_mode = (uint8_t)val;
cparata 3:4274d9103f1d 607 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 608 }
cparata 3:4274d9103f1d 609 return ret;
cparata 0:6d69e896ce38 610 }
cparata 0:6d69e896ce38 611
cparata 0:6d69e896ce38 612 /**
cparata 0:6d69e896ce38 613 * @brief Operating mode for gyroscope.[get]
cparata 0:6d69e896ce38 614 *
cparata 0:6d69e896ce38 615 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 616 * @param val Get the values of g_hm_mode in reg CTRL7_G
cparata 0:6d69e896ce38 617 *
cparata 0:6d69e896ce38 618 */
cparata 0:6d69e896ce38 619 int32_t lsm6dso_gy_power_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 620 lsm6dso_g_hm_mode_t *val)
cparata 0:6d69e896ce38 621 {
cparata 3:4274d9103f1d 622 lsm6dso_ctrl7_g_t reg;
cparata 3:4274d9103f1d 623 int32_t ret;
cparata 3:4274d9103f1d 624
cparata 3:4274d9103f1d 625 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 626 switch (reg.g_hm_mode) {
cparata 3:4274d9103f1d 627 case LSM6DSO_GY_HIGH_PERFORMANCE:
cparata 3:4274d9103f1d 628 *val = LSM6DSO_GY_HIGH_PERFORMANCE;
cparata 3:4274d9103f1d 629 break;
cparata 3:4274d9103f1d 630 case LSM6DSO_GY_NORMAL:
cparata 3:4274d9103f1d 631 *val = LSM6DSO_GY_NORMAL;
cparata 3:4274d9103f1d 632 break;
cparata 3:4274d9103f1d 633 default:
cparata 3:4274d9103f1d 634 *val = LSM6DSO_GY_HIGH_PERFORMANCE;
cparata 3:4274d9103f1d 635 break;
cparata 3:4274d9103f1d 636 }
cparata 3:4274d9103f1d 637 return ret;
cparata 0:6d69e896ce38 638 }
cparata 0:6d69e896ce38 639
cparata 0:6d69e896ce38 640 /**
cparata 0:6d69e896ce38 641 * @brief Read all the interrupt flag of the device.[get]
cparata 0:6d69e896ce38 642 *
cparata 0:6d69e896ce38 643 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 644 * @param val registers ALL_INT_SRC; WAKE_UP_SRC;
cparata 0:6d69e896ce38 645 * TAP_SRC; D6D_SRC; STATUS_REG;
cparata 0:6d69e896ce38 646 * EMB_FUNC_STATUS; FSM_STATUS_A/B
cparata 0:6d69e896ce38 647 *
cparata 0:6d69e896ce38 648 */
cparata 0:6d69e896ce38 649 int32_t lsm6dso_all_sources_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 650 lsm6dso_all_sources_t *val)
cparata 0:6d69e896ce38 651 {
cparata 3:4274d9103f1d 652 int32_t ret;
cparata 3:4274d9103f1d 653
cparata 3:4274d9103f1d 654 ret = lsm6dso_read_reg(ctx, LSM6DSO_ALL_INT_SRC,
cparata 3:4274d9103f1d 655 (uint8_t *)&val->all_int_src, 1);
cparata 3:4274d9103f1d 656 if (ret == 0) {
cparata 3:4274d9103f1d 657 ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_SRC,
cparata 3:4274d9103f1d 658 (uint8_t *)&val->wake_up_src, 1);
cparata 3:4274d9103f1d 659 }
cparata 3:4274d9103f1d 660 if (ret == 0) {
cparata 3:4274d9103f1d 661 ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_SRC,
cparata 3:4274d9103f1d 662 (uint8_t *)&val->tap_src, 1);
cparata 3:4274d9103f1d 663 }
cparata 3:4274d9103f1d 664 if (ret == 0) {
cparata 3:4274d9103f1d 665 ret = lsm6dso_read_reg(ctx, LSM6DSO_D6D_SRC,
cparata 3:4274d9103f1d 666 (uint8_t *)&val->d6d_src, 1);
cparata 3:4274d9103f1d 667 }
cparata 3:4274d9103f1d 668 if (ret == 0) {
cparata 3:4274d9103f1d 669 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG,
cparata 3:4274d9103f1d 670 (uint8_t *)&val->status_reg, 1);
cparata 3:4274d9103f1d 671 }
cparata 3:4274d9103f1d 672 if (ret == 0) {
cparata 3:4274d9103f1d 673
cparata 3:4274d9103f1d 674 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 3:4274d9103f1d 675 }
cparata 3:4274d9103f1d 676 if (ret == 0) {
cparata 3:4274d9103f1d 677 ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS,
cparata 3:4274d9103f1d 678 (uint8_t *)&val->emb_func_status, 1);
cparata 3:4274d9103f1d 679 }
cparata 3:4274d9103f1d 680 if (ret == 0) {
cparata 3:4274d9103f1d 681 ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_STATUS_A,
cparata 3:4274d9103f1d 682 (uint8_t *)&val->fsm_status_a, 1);
cparata 3:4274d9103f1d 683 }
cparata 3:4274d9103f1d 684 if (ret == 0) {
cparata 3:4274d9103f1d 685 ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_STATUS_B,
cparata 3:4274d9103f1d 686 (uint8_t *)&val->fsm_status_b, 1);
cparata 3:4274d9103f1d 687 }
cparata 3:4274d9103f1d 688 if (ret == 0) {
cparata 3:4274d9103f1d 689 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 3:4274d9103f1d 690 }
cparata 3:4274d9103f1d 691 return ret;
cparata 0:6d69e896ce38 692 }
cparata 0:6d69e896ce38 693
cparata 0:6d69e896ce38 694 /**
cparata 0:6d69e896ce38 695 * @brief The STATUS_REG register is read by the primary interface.[get]
cparata 0:6d69e896ce38 696 *
cparata 0:6d69e896ce38 697 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 698 * @param val register STATUS_REG
cparata 0:6d69e896ce38 699 *
cparata 0:6d69e896ce38 700 */
cparata 0:6d69e896ce38 701 int32_t lsm6dso_status_reg_get(lsm6dso_ctx_t *ctx, lsm6dso_status_reg_t *val)
cparata 0:6d69e896ce38 702 {
cparata 3:4274d9103f1d 703 int32_t ret;
cparata 3:4274d9103f1d 704 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *) val, 1);
cparata 3:4274d9103f1d 705 return ret;
cparata 0:6d69e896ce38 706 }
cparata 0:6d69e896ce38 707
cparata 0:6d69e896ce38 708 /**
cparata 0:6d69e896ce38 709 * @brief Accelerometer new data available.[get]
cparata 0:6d69e896ce38 710 *
cparata 0:6d69e896ce38 711 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 712 * @param val change the values of xlda in reg STATUS_REG
cparata 0:6d69e896ce38 713 *
cparata 0:6d69e896ce38 714 */
cparata 0:6d69e896ce38 715 int32_t lsm6dso_xl_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 716 {
cparata 3:4274d9103f1d 717 lsm6dso_status_reg_t reg;
cparata 3:4274d9103f1d 718 int32_t ret;
cparata 3:4274d9103f1d 719
cparata 3:4274d9103f1d 720 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 721 *val = reg.xlda;
cparata 3:4274d9103f1d 722
cparata 3:4274d9103f1d 723 return ret;
cparata 0:6d69e896ce38 724 }
cparata 0:6d69e896ce38 725
cparata 0:6d69e896ce38 726 /**
cparata 0:6d69e896ce38 727 * @brief Gyroscope new data available.[get]
cparata 0:6d69e896ce38 728 *
cparata 0:6d69e896ce38 729 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 730 * @param val change the values of gda in reg STATUS_REG
cparata 0:6d69e896ce38 731 *
cparata 0:6d69e896ce38 732 */
cparata 0:6d69e896ce38 733 int32_t lsm6dso_gy_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 734 {
cparata 3:4274d9103f1d 735 lsm6dso_status_reg_t reg;
cparata 3:4274d9103f1d 736 int32_t ret;
cparata 3:4274d9103f1d 737
cparata 3:4274d9103f1d 738 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 739 *val = reg.gda;
cparata 3:4274d9103f1d 740
cparata 3:4274d9103f1d 741 return ret;
cparata 0:6d69e896ce38 742 }
cparata 0:6d69e896ce38 743
cparata 0:6d69e896ce38 744 /**
cparata 0:6d69e896ce38 745 * @brief Temperature new data available.[get]
cparata 0:6d69e896ce38 746 *
cparata 0:6d69e896ce38 747 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 748 * @param val change the values of tda in reg STATUS_REG
cparata 0:6d69e896ce38 749 *
cparata 0:6d69e896ce38 750 */
cparata 0:6d69e896ce38 751 int32_t lsm6dso_temp_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 752 {
cparata 3:4274d9103f1d 753 lsm6dso_status_reg_t reg;
cparata 3:4274d9103f1d 754 int32_t ret;
cparata 3:4274d9103f1d 755
cparata 3:4274d9103f1d 756 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 757 *val = reg.tda;
cparata 3:4274d9103f1d 758
cparata 3:4274d9103f1d 759 return ret;
cparata 0:6d69e896ce38 760 }
cparata 0:6d69e896ce38 761
cparata 0:6d69e896ce38 762 /**
cparata 0:6d69e896ce38 763 * @brief Accelerometer X-axis user offset correction expressed in
cparata 0:6d69e896ce38 764 * two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 765 * The value must be in the range [-127 127].[set]
cparata 0:6d69e896ce38 766 *
cparata 0:6d69e896ce38 767 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 768 * @param buff buffer that contains data to write
cparata 0:6d69e896ce38 769 *
cparata 0:6d69e896ce38 770 */
cparata 0:6d69e896ce38 771 int32_t lsm6dso_xl_usr_offset_x_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 772 {
cparata 3:4274d9103f1d 773 int32_t ret;
cparata 3:4274d9103f1d 774 ret = lsm6dso_write_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
cparata 3:4274d9103f1d 775 return ret;
cparata 0:6d69e896ce38 776 }
cparata 0:6d69e896ce38 777
cparata 0:6d69e896ce38 778 /**
cparata 0:6d69e896ce38 779 * @brief Accelerometer X-axis user offset correction expressed in two’s
cparata 0:6d69e896ce38 780 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 781 * The value must be in the range [-127 127].[get]
cparata 0:6d69e896ce38 782 *
cparata 0:6d69e896ce38 783 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 784 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 785 *
cparata 0:6d69e896ce38 786 */
cparata 0:6d69e896ce38 787 int32_t lsm6dso_xl_usr_offset_x_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 788 {
cparata 3:4274d9103f1d 789 int32_t ret;
cparata 3:4274d9103f1d 790 ret = lsm6dso_read_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
cparata 3:4274d9103f1d 791 return ret;
cparata 0:6d69e896ce38 792 }
cparata 0:6d69e896ce38 793
cparata 0:6d69e896ce38 794 /**
cparata 0:6d69e896ce38 795 * @brief Accelerometer Y-axis user offset correction expressed in two’s
cparata 0:6d69e896ce38 796 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 797 * The value must be in the range [-127 127].[set]
cparata 0:6d69e896ce38 798 *
cparata 0:6d69e896ce38 799 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 800 * @param buff buffer that contains data to write
cparata 0:6d69e896ce38 801 *
cparata 0:6d69e896ce38 802 */
cparata 0:6d69e896ce38 803 int32_t lsm6dso_xl_usr_offset_y_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 804 {
cparata 3:4274d9103f1d 805 int32_t ret;
cparata 3:4274d9103f1d 806 ret = lsm6dso_write_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
cparata 3:4274d9103f1d 807 return ret;
cparata 0:6d69e896ce38 808 }
cparata 0:6d69e896ce38 809
cparata 0:6d69e896ce38 810 /**
cparata 0:6d69e896ce38 811 * @brief Accelerometer Y-axis user offset correction expressed in two’s
cparata 0:6d69e896ce38 812 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 813 * The value must be in the range [-127 127].[get]
cparata 0:6d69e896ce38 814 *
cparata 0:6d69e896ce38 815 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 816 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 817 *
cparata 0:6d69e896ce38 818 */
cparata 0:6d69e896ce38 819 int32_t lsm6dso_xl_usr_offset_y_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 820 {
cparata 3:4274d9103f1d 821 int32_t ret;
cparata 3:4274d9103f1d 822 ret = lsm6dso_read_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
cparata 3:4274d9103f1d 823 return ret;
cparata 0:6d69e896ce38 824 }
cparata 0:6d69e896ce38 825
cparata 0:6d69e896ce38 826 /**
cparata 0:6d69e896ce38 827 * @brief Accelerometer Z-axis user offset correction expressed in two’s
cparata 0:6d69e896ce38 828 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 829 * The value must be in the range [-127 127].[set]
cparata 0:6d69e896ce38 830 *
cparata 0:6d69e896ce38 831 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 832 * @param buff buffer that contains data to write
cparata 0:6d69e896ce38 833 *
cparata 0:6d69e896ce38 834 */
cparata 0:6d69e896ce38 835 int32_t lsm6dso_xl_usr_offset_z_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 836 {
cparata 3:4274d9103f1d 837 int32_t ret;
cparata 3:4274d9103f1d 838 ret = lsm6dso_write_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
cparata 3:4274d9103f1d 839 return ret;
cparata 0:6d69e896ce38 840 }
cparata 0:6d69e896ce38 841
cparata 0:6d69e896ce38 842 /**
cparata 0:6d69e896ce38 843 * @brief Accelerometer Z-axis user offset correction expressed in two’s
cparata 0:6d69e896ce38 844 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 845 * The value must be in the range [-127 127].[get]
cparata 0:6d69e896ce38 846 *
cparata 0:6d69e896ce38 847 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 848 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 849 *
cparata 0:6d69e896ce38 850 */
cparata 0:6d69e896ce38 851 int32_t lsm6dso_xl_usr_offset_z_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 852 {
cparata 3:4274d9103f1d 853 int32_t ret;
cparata 3:4274d9103f1d 854 ret = lsm6dso_read_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
cparata 3:4274d9103f1d 855 return ret;
cparata 0:6d69e896ce38 856 }
cparata 0:6d69e896ce38 857
cparata 0:6d69e896ce38 858 /**
cparata 0:6d69e896ce38 859 * @brief Enables user offset on out.[set]
cparata 0:6d69e896ce38 860 *
cparata 0:6d69e896ce38 861 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 862 * @param val change the values of usr_off_on_out in reg CTRL7_G
cparata 0:6d69e896ce38 863 *
cparata 0:6d69e896ce38 864 */
cparata 0:6d69e896ce38 865 int32_t lsm6dso_xl_usr_offset_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 866 {
cparata 3:4274d9103f1d 867 lsm6dso_ctrl7_g_t reg;
cparata 3:4274d9103f1d 868 int32_t ret;
cparata 3:4274d9103f1d 869
cparata 3:4274d9103f1d 870 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 871 if (ret == 0) {
cparata 3:4274d9103f1d 872 reg.usr_off_on_out = val;
cparata 3:4274d9103f1d 873 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 874 }
cparata 3:4274d9103f1d 875 return ret;
cparata 0:6d69e896ce38 876 }
cparata 0:6d69e896ce38 877
cparata 0:6d69e896ce38 878 /**
cparata 0:6d69e896ce38 879 * @brief User offset on out flag.[get]
cparata 0:6d69e896ce38 880 *
cparata 0:6d69e896ce38 881 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 882 * @param val values of usr_off_on_out in reg CTRL7_G
cparata 0:6d69e896ce38 883 *
cparata 0:6d69e896ce38 884 */
cparata 0:6d69e896ce38 885 int32_t lsm6dso_xl_usr_offset_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 886 {
cparata 3:4274d9103f1d 887 lsm6dso_ctrl7_g_t reg;
cparata 3:4274d9103f1d 888 int32_t ret;
cparata 3:4274d9103f1d 889
cparata 3:4274d9103f1d 890 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 891 *val = reg.usr_off_on_out;
cparata 3:4274d9103f1d 892
cparata 3:4274d9103f1d 893 return ret;
cparata 0:6d69e896ce38 894 }
cparata 0:6d69e896ce38 895
cparata 0:6d69e896ce38 896 /**
cparata 0:6d69e896ce38 897 * @}
cparata 0:6d69e896ce38 898 *
cparata 0:6d69e896ce38 899 */
cparata 0:6d69e896ce38 900
cparata 0:6d69e896ce38 901 /**
cparata 0:6d69e896ce38 902 * @defgroup LSM6DSO_Timestamp
cparata 0:6d69e896ce38 903 * @brief This section groups all the functions that manage the
cparata 0:6d69e896ce38 904 * timestamp generation.
cparata 0:6d69e896ce38 905 * @{
cparata 0:6d69e896ce38 906 *
cparata 0:6d69e896ce38 907 */
cparata 0:6d69e896ce38 908
cparata 0:6d69e896ce38 909 /**
cparata 0:6d69e896ce38 910 * @brief Enables timestamp counter.[set]
cparata 0:6d69e896ce38 911 *
cparata 0:6d69e896ce38 912 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 913 * @param val change the values of timestamp_en in reg CTRL10_C
cparata 0:6d69e896ce38 914 *
cparata 0:6d69e896ce38 915 */
cparata 0:6d69e896ce38 916 int32_t lsm6dso_timestamp_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 917 {
cparata 3:4274d9103f1d 918 lsm6dso_ctrl10_c_t reg;
cparata 3:4274d9103f1d 919 int32_t ret;
cparata 3:4274d9103f1d 920
cparata 3:4274d9103f1d 921 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 922 if (ret == 0) {
cparata 3:4274d9103f1d 923 reg.timestamp_en = val;
cparata 3:4274d9103f1d 924 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 925 }
cparata 3:4274d9103f1d 926 return ret;
cparata 0:6d69e896ce38 927 }
cparata 0:6d69e896ce38 928
cparata 0:6d69e896ce38 929 /**
cparata 0:6d69e896ce38 930 * @brief Enables timestamp counter.[get]
cparata 0:6d69e896ce38 931 *
cparata 0:6d69e896ce38 932 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 933 * @param val change the values of timestamp_en in reg CTRL10_C
cparata 0:6d69e896ce38 934 *
cparata 0:6d69e896ce38 935 */
cparata 0:6d69e896ce38 936 int32_t lsm6dso_timestamp_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 937 {
cparata 3:4274d9103f1d 938 lsm6dso_ctrl10_c_t reg;
cparata 3:4274d9103f1d 939 int32_t ret;
cparata 3:4274d9103f1d 940
cparata 3:4274d9103f1d 941 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 942 *val = reg.timestamp_en;
cparata 3:4274d9103f1d 943
cparata 3:4274d9103f1d 944 return ret;
cparata 0:6d69e896ce38 945 }
cparata 0:6d69e896ce38 946
cparata 0:6d69e896ce38 947 /**
cparata 0:6d69e896ce38 948 * @brief Timestamp first data output register (r).
cparata 0:6d69e896ce38 949 * The value is expressed as a 32-bit word and the bit
cparata 0:6d69e896ce38 950 * resolution is 25 μs.[get]
cparata 0:6d69e896ce38 951 *
cparata 0:6d69e896ce38 952 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 953 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 954 *
cparata 0:6d69e896ce38 955 */
cparata 0:6d69e896ce38 956 int32_t lsm6dso_timestamp_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 957 {
cparata 3:4274d9103f1d 958 int32_t ret;
cparata 3:4274d9103f1d 959 ret = lsm6dso_read_reg(ctx, LSM6DSO_TIMESTAMP0, buff, 4);
cparata 3:4274d9103f1d 960 return ret;
cparata 0:6d69e896ce38 961 }
cparata 0:6d69e896ce38 962
cparata 0:6d69e896ce38 963 /**
cparata 0:6d69e896ce38 964 * @}
cparata 0:6d69e896ce38 965 *
cparata 0:6d69e896ce38 966 */
cparata 0:6d69e896ce38 967
cparata 0:6d69e896ce38 968 /**
cparata 0:6d69e896ce38 969 * @defgroup LSM6DSO_Data output
cparata 0:6d69e896ce38 970 * @brief This section groups all the data output functions.
cparata 0:6d69e896ce38 971 * @{
cparata 0:6d69e896ce38 972 *
cparata 0:6d69e896ce38 973 */
cparata 0:6d69e896ce38 974
cparata 0:6d69e896ce38 975 /**
cparata 0:6d69e896ce38 976 * @brief Circular burst-mode (rounding) read of the output
cparata 0:6d69e896ce38 977 * registers.[set]
cparata 0:6d69e896ce38 978 *
cparata 0:6d69e896ce38 979 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 980 * @param val change the values of rounding in reg CTRL5_C
cparata 0:6d69e896ce38 981 *
cparata 0:6d69e896ce38 982 */
cparata 0:6d69e896ce38 983 int32_t lsm6dso_rounding_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 984 lsm6dso_rounding_t val)
cparata 0:6d69e896ce38 985 {
cparata 3:4274d9103f1d 986 lsm6dso_ctrl5_c_t reg;
cparata 3:4274d9103f1d 987 int32_t ret;
cparata 3:4274d9103f1d 988
cparata 3:4274d9103f1d 989 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 990 if (ret == 0) {
cparata 3:4274d9103f1d 991 reg.rounding = (uint8_t)val;
cparata 3:4274d9103f1d 992 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 993 }
cparata 3:4274d9103f1d 994 return ret;
cparata 0:6d69e896ce38 995 }
cparata 0:6d69e896ce38 996
cparata 0:6d69e896ce38 997 /**
cparata 0:6d69e896ce38 998 * @brief Gyroscope UI chain full-scale selection.[get]
cparata 0:6d69e896ce38 999 *
cparata 0:6d69e896ce38 1000 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1001 * @param val Get the values of rounding in reg CTRL5_C
cparata 0:6d69e896ce38 1002 *
cparata 0:6d69e896ce38 1003 */
cparata 0:6d69e896ce38 1004 int32_t lsm6dso_rounding_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 1005 lsm6dso_rounding_t *val)
cparata 0:6d69e896ce38 1006 {
cparata 3:4274d9103f1d 1007 lsm6dso_ctrl5_c_t reg;
cparata 3:4274d9103f1d 1008 int32_t ret;
cparata 3:4274d9103f1d 1009
cparata 3:4274d9103f1d 1010 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1011 switch (reg.rounding) {
cparata 3:4274d9103f1d 1012 case LSM6DSO_NO_ROUND:
cparata 3:4274d9103f1d 1013 *val = LSM6DSO_NO_ROUND;
cparata 3:4274d9103f1d 1014 break;
cparata 3:4274d9103f1d 1015 case LSM6DSO_ROUND_XL:
cparata 3:4274d9103f1d 1016 *val = LSM6DSO_ROUND_XL;
cparata 3:4274d9103f1d 1017 break;
cparata 3:4274d9103f1d 1018 case LSM6DSO_ROUND_GY:
cparata 3:4274d9103f1d 1019 *val = LSM6DSO_ROUND_GY;
cparata 3:4274d9103f1d 1020 break;
cparata 3:4274d9103f1d 1021 case LSM6DSO_ROUND_GY_XL:
cparata 3:4274d9103f1d 1022 *val = LSM6DSO_ROUND_GY_XL;
cparata 3:4274d9103f1d 1023 break;
cparata 3:4274d9103f1d 1024 default:
cparata 3:4274d9103f1d 1025 *val = LSM6DSO_NO_ROUND;
cparata 3:4274d9103f1d 1026 break;
cparata 3:4274d9103f1d 1027 }
cparata 3:4274d9103f1d 1028 return ret;
cparata 0:6d69e896ce38 1029 }
cparata 0:6d69e896ce38 1030
cparata 0:6d69e896ce38 1031 /**
cparata 0:6d69e896ce38 1032 * @brief Temperature data output register (r).
cparata 0:6d69e896ce38 1033 * L and H registers together express a 16-bit word in two’s
cparata 0:6d69e896ce38 1034 * complement.[get]
cparata 0:6d69e896ce38 1035 *
cparata 0:6d69e896ce38 1036 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1037 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1038 *
cparata 0:6d69e896ce38 1039 */
cparata 0:6d69e896ce38 1040 int32_t lsm6dso_temperature_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1041 {
cparata 3:4274d9103f1d 1042 int32_t ret;
cparata 3:4274d9103f1d 1043 ret = lsm6dso_read_reg(ctx, LSM6DSO_OUT_TEMP_L, buff, 2);
cparata 3:4274d9103f1d 1044 return ret;
cparata 0:6d69e896ce38 1045 }
cparata 0:6d69e896ce38 1046
cparata 0:6d69e896ce38 1047 /**
cparata 0:6d69e896ce38 1048 * @brief Angular rate sensor. The value is expressed as a 16-bit
cparata 0:6d69e896ce38 1049 * word in two’s complement.[get]
cparata 0:6d69e896ce38 1050 *
cparata 0:6d69e896ce38 1051 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1052 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1053 *
cparata 0:6d69e896ce38 1054 */
cparata 0:6d69e896ce38 1055 int32_t lsm6dso_angular_rate_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1056 {
cparata 3:4274d9103f1d 1057 int32_t ret;
cparata 3:4274d9103f1d 1058 ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_G, buff, 6);
cparata 3:4274d9103f1d 1059 return ret;
cparata 0:6d69e896ce38 1060 }
cparata 0:6d69e896ce38 1061
cparata 0:6d69e896ce38 1062 /**
cparata 0:6d69e896ce38 1063 * @brief Linear acceleration output register.
cparata 0:6d69e896ce38 1064 * The value is expressed as a 16-bit word in two’s complement.[get]
cparata 0:6d69e896ce38 1065 *
cparata 0:6d69e896ce38 1066 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1067 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1068 *
cparata 0:6d69e896ce38 1069 */
cparata 0:6d69e896ce38 1070 int32_t lsm6dso_acceleration_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1071 {
cparata 3:4274d9103f1d 1072 int32_t ret;
cparata 3:4274d9103f1d 1073 ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_A, buff, 6);
cparata 3:4274d9103f1d 1074 return ret;
cparata 0:6d69e896ce38 1075 }
cparata 0:6d69e896ce38 1076
cparata 0:6d69e896ce38 1077 /**
cparata 0:6d69e896ce38 1078 * @brief FIFO data output [get]
cparata 0:6d69e896ce38 1079 *
cparata 0:6d69e896ce38 1080 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1081 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1082 *
cparata 0:6d69e896ce38 1083 */
cparata 0:6d69e896ce38 1084 int32_t lsm6dso_fifo_out_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1085 {
cparata 3:4274d9103f1d 1086 int32_t ret;
cparata 3:4274d9103f1d 1087 ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_DATA_OUT_X_L, buff, 6);
cparata 3:4274d9103f1d 1088 return ret;
cparata 0:6d69e896ce38 1089 }
cparata 0:6d69e896ce38 1090
cparata 0:6d69e896ce38 1091 /**
cparata 0:6d69e896ce38 1092 * @brief Step counter output register.[get]
cparata 0:6d69e896ce38 1093 *
cparata 0:6d69e896ce38 1094 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1095 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1096 *
cparata 0:6d69e896ce38 1097 */
cparata 0:6d69e896ce38 1098 int32_t lsm6dso_number_of_steps_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1099 {
cparata 3:4274d9103f1d 1100 int32_t ret;
cparata 3:4274d9103f1d 1101
cparata 3:4274d9103f1d 1102 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 3:4274d9103f1d 1103 if (ret == 0) {
cparata 3:4274d9103f1d 1104 ret = lsm6dso_read_reg(ctx, LSM6DSO_STEP_COUNTER_L, buff, 2);
cparata 3:4274d9103f1d 1105 }
cparata 3:4274d9103f1d 1106 if (ret == 0) {
cparata 3:4274d9103f1d 1107 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 3:4274d9103f1d 1108 }
cparata 3:4274d9103f1d 1109 return ret;
cparata 0:6d69e896ce38 1110 }
cparata 0:6d69e896ce38 1111
cparata 0:6d69e896ce38 1112 /**
cparata 0:6d69e896ce38 1113 * @brief Reset step counter register.[get]
cparata 0:6d69e896ce38 1114 *
cparata 0:6d69e896ce38 1115 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1116 *
cparata 0:6d69e896ce38 1117 */
cparata 0:6d69e896ce38 1118 int32_t lsm6dso_steps_reset(lsm6dso_ctx_t *ctx)
cparata 0:6d69e896ce38 1119 {
cparata 3:4274d9103f1d 1120 lsm6dso_emb_func_src_t reg;
cparata 3:4274d9103f1d 1121 int32_t ret;
cparata 3:4274d9103f1d 1122
cparata 3:4274d9103f1d 1123 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 3:4274d9103f1d 1124 if (ret == 0) {
cparata 3:4274d9103f1d 1125 ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1126 }
cparata 3:4274d9103f1d 1127 if (ret == 0) {
cparata 3:4274d9103f1d 1128 reg.pedo_rst_step = PROPERTY_ENABLE;
cparata 3:4274d9103f1d 1129 ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1130 }
cparata 3:4274d9103f1d 1131 if (ret == 0) {
cparata 3:4274d9103f1d 1132 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 3:4274d9103f1d 1133 }
cparata 3:4274d9103f1d 1134 return ret;
cparata 0:6d69e896ce38 1135 }
cparata 0:6d69e896ce38 1136
cparata 0:6d69e896ce38 1137 /**
cparata 0:6d69e896ce38 1138 * @}
cparata 0:6d69e896ce38 1139 *
cparata 0:6d69e896ce38 1140 */
cparata 0:6d69e896ce38 1141
cparata 0:6d69e896ce38 1142 /**
cparata 0:6d69e896ce38 1143 * @defgroup LSM6DSO_common
cparata 0:6d69e896ce38 1144 * @brief This section groups common usefull functions.
cparata 0:6d69e896ce38 1145 * @{
cparata 0:6d69e896ce38 1146 *
cparata 0:6d69e896ce38 1147 */
cparata 0:6d69e896ce38 1148
cparata 0:6d69e896ce38 1149 /**
cparata 0:6d69e896ce38 1150 * @brief Difference in percentage of the effective ODR(and timestamp rate)
cparata 0:6d69e896ce38 1151 * with respect to the typical.
cparata 0:6d69e896ce38 1152 * Step: 0.15%. 8-bit format, 2's complement.[set]
cparata 0:6d69e896ce38 1153 *
cparata 0:6d69e896ce38 1154 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1155 * @param val change the values of freq_fine in reg
cparata 0:6d69e896ce38 1156 * INTERNAL_FREQ_FINE
cparata 0:6d69e896ce38 1157 *
cparata 0:6d69e896ce38 1158 */
cparata 0:6d69e896ce38 1159 int32_t lsm6dso_odr_cal_reg_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1160 {
cparata 3:4274d9103f1d 1161 lsm6dso_internal_freq_fine_t reg;
cparata 3:4274d9103f1d 1162 int32_t ret;
cparata 3:4274d9103f1d 1163
cparata 3:4274d9103f1d 1164 ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1165 if (ret == 0) {
cparata 3:4274d9103f1d 1166 reg.freq_fine = val;
cparata 3:4274d9103f1d 1167 ret = lsm6dso_write_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE,
cparata 3:4274d9103f1d 1168 (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1169 }
cparata 3:4274d9103f1d 1170 return ret;
cparata 0:6d69e896ce38 1171 }
cparata 0:6d69e896ce38 1172
cparata 0:6d69e896ce38 1173 /**
cparata 0:6d69e896ce38 1174 * @brief Difference in percentage of the effective ODR(and timestamp rate)
cparata 0:6d69e896ce38 1175 * with respect to the typical.
cparata 0:6d69e896ce38 1176 * Step: 0.15%. 8-bit format, 2's complement.[get]
cparata 0:6d69e896ce38 1177 *
cparata 0:6d69e896ce38 1178 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1179 * @param val change the values of freq_fine in reg INTERNAL_FREQ_FINE
cparata 0:6d69e896ce38 1180 *
cparata 0:6d69e896ce38 1181 */
cparata 0:6d69e896ce38 1182 int32_t lsm6dso_odr_cal_reg_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1183 {
cparata 3:4274d9103f1d 1184 lsm6dso_internal_freq_fine_t reg;
cparata 3:4274d9103f1d 1185 int32_t ret;
cparata 3:4274d9103f1d 1186
cparata 3:4274d9103f1d 1187 ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1188 *val = reg.freq_fine;
cparata 3:4274d9103f1d 1189
cparata 3:4274d9103f1d 1190 return ret;
cparata 0:6d69e896ce38 1191 }
cparata 0:6d69e896ce38 1192
cparata 0:6d69e896ce38 1193
cparata 0:6d69e896ce38 1194 /**
cparata 0:6d69e896ce38 1195 * @brief Enable access to the embedded functions/sensor
cparata 0:6d69e896ce38 1196 * hub configuration registers.[set]
cparata 0:6d69e896ce38 1197 *
cparata 0:6d69e896ce38 1198 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1199 * @param val change the values of reg_access in
cparata 0:6d69e896ce38 1200 * reg FUNC_CFG_ACCESS
cparata 0:6d69e896ce38 1201 *
cparata 0:6d69e896ce38 1202 */
cparata 0:6d69e896ce38 1203 int32_t lsm6dso_mem_bank_set(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t val)
cparata 0:6d69e896ce38 1204 {
cparata 3:4274d9103f1d 1205 lsm6dso_func_cfg_access_t reg;
cparata 3:4274d9103f1d 1206 int32_t ret;
cparata 3:4274d9103f1d 1207
cparata 3:4274d9103f1d 1208 ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1209 if (ret == 0) {
cparata 3:4274d9103f1d 1210 reg.reg_access = (uint8_t)val;
cparata 3:4274d9103f1d 1211 ret = lsm6dso_write_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1212 }
cparata 3:4274d9103f1d 1213 return ret;
cparata 0:6d69e896ce38 1214 }
cparata 0:6d69e896ce38 1215
cparata 0:6d69e896ce38 1216 /**
cparata 0:6d69e896ce38 1217 * @brief Enable access to the embedded functions/sensor
cparata 0:6d69e896ce38 1218 * hub configuration registers.[get]
cparata 0:6d69e896ce38 1219 *
cparata 0:6d69e896ce38 1220 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1221 * @param val Get the values of reg_access in
cparata 0:6d69e896ce38 1222 * reg FUNC_CFG_ACCESS
cparata 0:6d69e896ce38 1223 *
cparata 0:6d69e896ce38 1224 */
cparata 0:6d69e896ce38 1225 int32_t lsm6dso_mem_bank_get(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t *val)
cparata 0:6d69e896ce38 1226 {
cparata 3:4274d9103f1d 1227 lsm6dso_func_cfg_access_t reg;
cparata 3:4274d9103f1d 1228 int32_t ret;
cparata 3:4274d9103f1d 1229
cparata 3:4274d9103f1d 1230 ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1231 switch (reg.reg_access) {
cparata 3:4274d9103f1d 1232 case LSM6DSO_USER_BANK:
cparata 3:4274d9103f1d 1233 *val = LSM6DSO_USER_BANK;
cparata 3:4274d9103f1d 1234 break;
cparata 3:4274d9103f1d 1235 case LSM6DSO_SENSOR_HUB_BANK:
cparata 3:4274d9103f1d 1236 *val = LSM6DSO_SENSOR_HUB_BANK;
cparata 3:4274d9103f1d 1237 break;
cparata 3:4274d9103f1d 1238 case LSM6DSO_EMBEDDED_FUNC_BANK:
cparata 3:4274d9103f1d 1239 *val = LSM6DSO_EMBEDDED_FUNC_BANK;
cparata 3:4274d9103f1d 1240 break;
cparata 3:4274d9103f1d 1241 default:
cparata 3:4274d9103f1d 1242 *val = LSM6DSO_USER_BANK;
cparata 3:4274d9103f1d 1243 break;
cparata 3:4274d9103f1d 1244 }
cparata 3:4274d9103f1d 1245 return ret;
cparata 0:6d69e896ce38 1246 }
cparata 0:6d69e896ce38 1247
cparata 0:6d69e896ce38 1248 /**
cparata 0:6d69e896ce38 1249 * @brief Write a line(byte) in a page.[set]
cparata 0:6d69e896ce38 1250 *
cparata 0:6d69e896ce38 1251 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1252 * @param uint8_t address: page line address
cparata 0:6d69e896ce38 1253 * @param val value to write
cparata 0:6d69e896ce38 1254 *
cparata 0:6d69e896ce38 1255 */
cparata 0:6d69e896ce38 1256 int32_t lsm6dso_ln_pg_write_byte(lsm6dso_ctx_t *ctx, uint16_t address,
cparata 0:6d69e896ce38 1257 uint8_t *val)
cparata 0:6d69e896ce38 1258 {
cparata 3:4274d9103f1d 1259 lsm6dso_page_rw_t page_rw;
cparata 3:4274d9103f1d 1260 lsm6dso_page_sel_t page_sel;
cparata 3:4274d9103f1d 1261 lsm6dso_page_address_t page_address;
cparata 3:4274d9103f1d 1262 int32_t ret;
cparata 3:4274d9103f1d 1263
cparata 3:4274d9103f1d 1264 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 3:4274d9103f1d 1265
cparata 3:4274d9103f1d 1266 if (ret == 0) {
cparata 3:4274d9103f1d 1267 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1268 }
cparata 3:4274d9103f1d 1269 if (ret == 0) {
cparata 3:4274d9103f1d 1270 page_rw.page_rw = 0x02; /* page_write enable */
cparata 3:4274d9103f1d 1271 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1272 }
cparata 3:4274d9103f1d 1273 if (ret == 0) {
cparata 3:4274d9103f1d 1274 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
cparata 3:4274d9103f1d 1275 }
cparata 3:4274d9103f1d 1276
cparata 3:4274d9103f1d 1277 if (ret == 0) {
cparata 3:4274d9103f1d 1278 page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
cparata 3:4274d9103f1d 1279 page_sel.not_used_01 = 1;
cparata 3:4274d9103f1d 1280 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
cparata 3:4274d9103f1d 1281 }
cparata 3:4274d9103f1d 1282 if (ret == 0) {
cparata 3:4274d9103f1d 1283 page_address.page_addr = (uint8_t)address & 0xFFU;
cparata 3:4274d9103f1d 1284 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
cparata 3:4274d9103f1d 1285 (uint8_t *)&page_address, 1);
cparata 3:4274d9103f1d 1286 }
cparata 3:4274d9103f1d 1287 if (ret == 0) {
cparata 3:4274d9103f1d 1288 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, val, 1);
cparata 3:4274d9103f1d 1289 }
cparata 3:4274d9103f1d 1290 if (ret == 0) {
cparata 3:4274d9103f1d 1291 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1292 }
cparata 3:4274d9103f1d 1293 if (ret == 0) {
cparata 3:4274d9103f1d 1294 page_rw.page_rw = 0x00; /* page_write disable */
cparata 3:4274d9103f1d 1295 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1296 }
cparata 3:4274d9103f1d 1297 if (ret == 0) {
cparata 3:4274d9103f1d 1298
cparata 3:4274d9103f1d 1299 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 3:4274d9103f1d 1300 }
cparata 3:4274d9103f1d 1301 return ret;
cparata 0:6d69e896ce38 1302 }
cparata 0:6d69e896ce38 1303
cparata 0:6d69e896ce38 1304 /**
cparata 0:6d69e896ce38 1305 * @brief Write buffer in a page.[set]
cparata 0:6d69e896ce38 1306 *
cparata 0:6d69e896ce38 1307 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1308 * @param uint8_t address: page line address
cparata 0:6d69e896ce38 1309 * @param uint8_t *buf: buffer to write
cparata 0:6d69e896ce38 1310 * @param uint8_t len: buffer len
cparata 0:6d69e896ce38 1311 *
cparata 0:6d69e896ce38 1312 */
cparata 0:6d69e896ce38 1313 int32_t lsm6dso_ln_pg_write(lsm6dso_ctx_t *ctx, uint16_t address,
cparata 0:6d69e896ce38 1314 uint8_t *buf, uint8_t len)
cparata 0:6d69e896ce38 1315 {
cparata 3:4274d9103f1d 1316 lsm6dso_page_rw_t page_rw;
cparata 3:4274d9103f1d 1317 lsm6dso_page_sel_t page_sel;
cparata 3:4274d9103f1d 1318 lsm6dso_page_address_t page_address;
cparata 3:4274d9103f1d 1319 uint16_t addr_pointed;
cparata 3:4274d9103f1d 1320 int32_t ret;
cparata 3:4274d9103f1d 1321 uint8_t i ;
cparata 3:4274d9103f1d 1322
cparata 3:4274d9103f1d 1323 addr_pointed = address;
cparata 3:4274d9103f1d 1324
cparata 3:4274d9103f1d 1325 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 3:4274d9103f1d 1326 if (ret == 0) {
cparata 3:4274d9103f1d 1327
cparata 3:4274d9103f1d 1328 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1329 }
cparata 3:4274d9103f1d 1330 if (ret == 0) {
cparata 3:4274d9103f1d 1331 page_rw.page_rw = 0x02; /* page_write enable*/
cparata 3:4274d9103f1d 1332 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1333 }
cparata 3:4274d9103f1d 1334 if (ret == 0) {
cparata 3:4274d9103f1d 1335 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
cparata 3:4274d9103f1d 1336 }
cparata 3:4274d9103f1d 1337 if (ret == 0) {
cparata 3:4274d9103f1d 1338 page_sel.page_sel = ((uint8_t)(addr_pointed >> 8) & 0x0FU);
cparata 3:4274d9103f1d 1339 page_sel.not_used_01 = 1;
cparata 3:4274d9103f1d 1340 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
cparata 3:4274d9103f1d 1341 }
cparata 3:4274d9103f1d 1342 if (ret == 0) {
cparata 3:4274d9103f1d 1343 page_address.page_addr = (uint8_t)(addr_pointed & 0x00FFU);
cparata 3:4274d9103f1d 1344 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
cparata 3:4274d9103f1d 1345 (uint8_t *)&page_address, 1);
cparata 3:4274d9103f1d 1346 }
cparata 3:4274d9103f1d 1347
cparata 3:4274d9103f1d 1348 if (ret == 0) {
cparata 3:4274d9103f1d 1349 for (i = 0; ((i < len) && (ret == 0)); i++) {
cparata 3:4274d9103f1d 1350 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, &buf[i], 1);
cparata 3:4274d9103f1d 1351 addr_pointed++;
cparata 3:4274d9103f1d 1352 /* Check if page wrap */
cparata 3:4274d9103f1d 1353 if (((addr_pointed % 0x0100U) == 0x00U) && (ret == 0)) {
cparata 3:4274d9103f1d 1354 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *)&page_sel, 1);
cparata 3:4274d9103f1d 1355 if (ret == 0) {
cparata 3:4274d9103f1d 1356 page_sel.page_sel = ((uint8_t)(addr_pointed >> 8) & 0x0FU);
cparata 3:4274d9103f1d 1357 page_sel.not_used_01 = 1;
cparata 3:4274d9103f1d 1358 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL,
cparata 3:4274d9103f1d 1359 (uint8_t *)&page_sel, 1);
cparata 3:4274d9103f1d 1360 }
cparata 3:4274d9103f1d 1361 }
cparata 0:6d69e896ce38 1362 }
cparata 3:4274d9103f1d 1363 page_sel.page_sel = 0;
cparata 3:4274d9103f1d 1364 page_sel.not_used_01 = 1;
cparata 3:4274d9103f1d 1365 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
cparata 3:4274d9103f1d 1366 }
cparata 3:4274d9103f1d 1367 if (ret == 0) {
cparata 3:4274d9103f1d 1368 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1369 }
cparata 3:4274d9103f1d 1370 if (ret == 0) {
cparata 3:4274d9103f1d 1371 page_rw.page_rw = 0x00; /* page_write disable */
cparata 3:4274d9103f1d 1372 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1373 }
cparata 3:4274d9103f1d 1374 if (ret == 0) {
cparata 3:4274d9103f1d 1375 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 3:4274d9103f1d 1376 }
cparata 3:4274d9103f1d 1377 return ret;
cparata 0:6d69e896ce38 1378 }
cparata 0:6d69e896ce38 1379
cparata 0:6d69e896ce38 1380 /**
cparata 0:6d69e896ce38 1381 * @brief Read a line(byte) in a page.[get]
cparata 0:6d69e896ce38 1382 *
cparata 0:6d69e896ce38 1383 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1384 * @param uint8_t address: page line address
cparata 0:6d69e896ce38 1385 * @param val read value
cparata 0:6d69e896ce38 1386 *
cparata 0:6d69e896ce38 1387 */
cparata 0:6d69e896ce38 1388 int32_t lsm6dso_ln_pg_read_byte(lsm6dso_ctx_t *ctx, uint16_t address,
cparata 0:6d69e896ce38 1389 uint8_t *val)
cparata 0:6d69e896ce38 1390 {
cparata 3:4274d9103f1d 1391 lsm6dso_page_rw_t page_rw;
cparata 3:4274d9103f1d 1392 lsm6dso_page_sel_t page_sel;
cparata 3:4274d9103f1d 1393 lsm6dso_page_address_t page_address;
cparata 3:4274d9103f1d 1394 int32_t ret;
cparata 3:4274d9103f1d 1395
cparata 3:4274d9103f1d 1396 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 3:4274d9103f1d 1397 if (ret == 0) {
cparata 3:4274d9103f1d 1398
cparata 3:4274d9103f1d 1399 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1400 }
cparata 3:4274d9103f1d 1401 if (ret == 0) {
cparata 3:4274d9103f1d 1402 page_rw.page_rw = 0x01; /* page_read enable*/
cparata 3:4274d9103f1d 1403 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1404 }
cparata 3:4274d9103f1d 1405 if (ret == 0) {
cparata 3:4274d9103f1d 1406
cparata 3:4274d9103f1d 1407 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
cparata 3:4274d9103f1d 1408 }
cparata 3:4274d9103f1d 1409 if (ret == 0) {
cparata 3:4274d9103f1d 1410 page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
cparata 3:4274d9103f1d 1411 page_sel.not_used_01 = 1;
cparata 3:4274d9103f1d 1412 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
cparata 3:4274d9103f1d 1413 }
cparata 3:4274d9103f1d 1414 if (ret == 0) {
cparata 3:4274d9103f1d 1415 page_address.page_addr = (uint8_t)address & 0x00FFU;
cparata 3:4274d9103f1d 1416 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
cparata 3:4274d9103f1d 1417 (uint8_t *)&page_address, 1);
cparata 3:4274d9103f1d 1418 }
cparata 3:4274d9103f1d 1419 if (ret == 0) {
cparata 3:4274d9103f1d 1420
cparata 3:4274d9103f1d 1421 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_VALUE, val, 2);
cparata 3:4274d9103f1d 1422 }
cparata 3:4274d9103f1d 1423 if (ret == 0) {
cparata 3:4274d9103f1d 1424 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1425 }
cparata 3:4274d9103f1d 1426 if (ret == 0) {
cparata 3:4274d9103f1d 1427 page_rw.page_rw = 0x00; /* page_read disable */
cparata 3:4274d9103f1d 1428 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
cparata 3:4274d9103f1d 1429 }
cparata 3:4274d9103f1d 1430 if (ret == 0) {
cparata 3:4274d9103f1d 1431 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 3:4274d9103f1d 1432 }
cparata 3:4274d9103f1d 1433
cparata 3:4274d9103f1d 1434 return ret;
cparata 0:6d69e896ce38 1435 }
cparata 0:6d69e896ce38 1436
cparata 0:6d69e896ce38 1437 /**
cparata 0:6d69e896ce38 1438 * @brief Data-ready pulsed / letched mode.[set]
cparata 0:6d69e896ce38 1439 *
cparata 0:6d69e896ce38 1440 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1441 * @param val change the values of
cparata 0:6d69e896ce38 1442 * dataready_pulsed in
cparata 0:6d69e896ce38 1443 * reg COUNTER_BDR_REG1
cparata 0:6d69e896ce38 1444 *
cparata 0:6d69e896ce38 1445 */
cparata 0:6d69e896ce38 1446 int32_t lsm6dso_data_ready_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 1447 lsm6dso_dataready_pulsed_t val)
cparata 0:6d69e896ce38 1448 {
cparata 3:4274d9103f1d 1449 lsm6dso_counter_bdr_reg1_t reg;
cparata 3:4274d9103f1d 1450 int32_t ret;
cparata 3:4274d9103f1d 1451
cparata 3:4274d9103f1d 1452 ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1453 if (ret == 0) {
cparata 3:4274d9103f1d 1454 reg.dataready_pulsed = (uint8_t)val;
cparata 3:4274d9103f1d 1455 ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1456 }
cparata 3:4274d9103f1d 1457 return ret;
cparata 0:6d69e896ce38 1458 }
cparata 0:6d69e896ce38 1459
cparata 0:6d69e896ce38 1460 /**
cparata 0:6d69e896ce38 1461 * @brief Data-ready pulsed / letched mode.[get]
cparata 0:6d69e896ce38 1462 *
cparata 0:6d69e896ce38 1463 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1464 * @param val Get the values of
cparata 0:6d69e896ce38 1465 * dataready_pulsed in
cparata 0:6d69e896ce38 1466 * reg COUNTER_BDR_REG1
cparata 0:6d69e896ce38 1467 *
cparata 0:6d69e896ce38 1468 */
cparata 0:6d69e896ce38 1469 int32_t lsm6dso_data_ready_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 1470 lsm6dso_dataready_pulsed_t *val)
cparata 0:6d69e896ce38 1471 {
cparata 3:4274d9103f1d 1472 lsm6dso_counter_bdr_reg1_t reg;
cparata 3:4274d9103f1d 1473 int32_t ret;
cparata 3:4274d9103f1d 1474
cparata 3:4274d9103f1d 1475 ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1476 switch (reg.dataready_pulsed) {
cparata 3:4274d9103f1d 1477 case LSM6DSO_DRDY_LATCHED:
cparata 3:4274d9103f1d 1478 *val = LSM6DSO_DRDY_LATCHED;
cparata 3:4274d9103f1d 1479 break;
cparata 3:4274d9103f1d 1480 case LSM6DSO_DRDY_PULSED:
cparata 3:4274d9103f1d 1481 *val = LSM6DSO_DRDY_PULSED;
cparata 3:4274d9103f1d 1482 break;
cparata 3:4274d9103f1d 1483 default:
cparata 3:4274d9103f1d 1484 *val = LSM6DSO_DRDY_LATCHED;
cparata 3:4274d9103f1d 1485 break;
cparata 3:4274d9103f1d 1486 }
cparata 3:4274d9103f1d 1487 return ret;
cparata 0:6d69e896ce38 1488 }
cparata 0:6d69e896ce38 1489
cparata 0:6d69e896ce38 1490 /**
cparata 0:6d69e896ce38 1491 * @brief Device "Who am I".[get]
cparata 0:6d69e896ce38 1492 *
cparata 0:6d69e896ce38 1493 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1494 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1495 *
cparata 0:6d69e896ce38 1496 */
cparata 0:6d69e896ce38 1497 int32_t lsm6dso_device_id_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1498 {
cparata 3:4274d9103f1d 1499 int32_t ret;
cparata 3:4274d9103f1d 1500 ret = lsm6dso_read_reg(ctx, LSM6DSO_WHO_AM_I, buff, 1);
cparata 3:4274d9103f1d 1501 return ret;
cparata 0:6d69e896ce38 1502 }
cparata 0:6d69e896ce38 1503
cparata 0:6d69e896ce38 1504 /**
cparata 0:6d69e896ce38 1505 * @brief Software reset. Restore the default values
cparata 0:6d69e896ce38 1506 * in user registers[set]
cparata 0:6d69e896ce38 1507 *
cparata 0:6d69e896ce38 1508 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1509 * @param val change the values of sw_reset in reg CTRL3_C
cparata 0:6d69e896ce38 1510 *
cparata 0:6d69e896ce38 1511 */
cparata 0:6d69e896ce38 1512 int32_t lsm6dso_reset_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1513 {
cparata 3:4274d9103f1d 1514 lsm6dso_ctrl3_c_t reg;
cparata 3:4274d9103f1d 1515 int32_t ret;
cparata 3:4274d9103f1d 1516
cparata 3:4274d9103f1d 1517 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1518 if (ret == 0) {
cparata 3:4274d9103f1d 1519 reg.sw_reset = val;
cparata 3:4274d9103f1d 1520 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1521 }
cparata 3:4274d9103f1d 1522
cparata 3:4274d9103f1d 1523 return ret;
cparata 0:6d69e896ce38 1524 }
cparata 0:6d69e896ce38 1525
cparata 0:6d69e896ce38 1526 /**
cparata 0:6d69e896ce38 1527 * @brief Software reset. Restore the default values in user registers.[get]
cparata 0:6d69e896ce38 1528 *
cparata 0:6d69e896ce38 1529 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1530 * @param val change the values of sw_reset in reg CTRL3_C
cparata 0:6d69e896ce38 1531 *
cparata 0:6d69e896ce38 1532 */
cparata 0:6d69e896ce38 1533 int32_t lsm6dso_reset_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1534 {
cparata 3:4274d9103f1d 1535 lsm6dso_ctrl3_c_t reg;
cparata 3:4274d9103f1d 1536 int32_t ret;
cparata 3:4274d9103f1d 1537
cparata 3:4274d9103f1d 1538 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1539 *val = reg.sw_reset;
cparata 3:4274d9103f1d 1540
cparata 3:4274d9103f1d 1541 return ret;
cparata 0:6d69e896ce38 1542 }
cparata 0:6d69e896ce38 1543
cparata 0:6d69e896ce38 1544 /**
cparata 0:6d69e896ce38 1545 * @brief Register address automatically incremented during a multiple byte
cparata 0:6d69e896ce38 1546 * access with a serial interface.[set]
cparata 0:6d69e896ce38 1547 *
cparata 0:6d69e896ce38 1548 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1549 * @param val change the values of if_inc in reg CTRL3_C
cparata 0:6d69e896ce38 1550 *
cparata 0:6d69e896ce38 1551 */
cparata 0:6d69e896ce38 1552 int32_t lsm6dso_auto_increment_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1553 {
cparata 3:4274d9103f1d 1554 lsm6dso_ctrl3_c_t reg;
cparata 3:4274d9103f1d 1555 int32_t ret;
cparata 3:4274d9103f1d 1556
cparata 3:4274d9103f1d 1557 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1558 if (ret == 0) {
cparata 3:4274d9103f1d 1559 reg.if_inc = val;
cparata 3:4274d9103f1d 1560 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1561 }
cparata 3:4274d9103f1d 1562 return ret;
cparata 0:6d69e896ce38 1563 }
cparata 0:6d69e896ce38 1564
cparata 0:6d69e896ce38 1565 /**
cparata 0:6d69e896ce38 1566 * @brief Register address automatically incremented during a multiple byte
cparata 0:6d69e896ce38 1567 * access with a serial interface.[get]
cparata 0:6d69e896ce38 1568 *
cparata 0:6d69e896ce38 1569 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1570 * @param val change the values of if_inc in reg CTRL3_C
cparata 0:6d69e896ce38 1571 *
cparata 0:6d69e896ce38 1572 */
cparata 0:6d69e896ce38 1573 int32_t lsm6dso_auto_increment_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1574 {
cparata 3:4274d9103f1d 1575 lsm6dso_ctrl3_c_t reg;
cparata 3:4274d9103f1d 1576 int32_t ret;
cparata 3:4274d9103f1d 1577
cparata 3:4274d9103f1d 1578 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1579 *val = reg.if_inc;
cparata 3:4274d9103f1d 1580
cparata 3:4274d9103f1d 1581 return ret;
cparata 0:6d69e896ce38 1582 }
cparata 0:6d69e896ce38 1583
cparata 0:6d69e896ce38 1584 /**
cparata 0:6d69e896ce38 1585 * @brief Reboot memory content. Reload the calibration parameters.[set]
cparata 0:6d69e896ce38 1586 *
cparata 0:6d69e896ce38 1587 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1588 * @param val change the values of boot in reg CTRL3_C
cparata 0:6d69e896ce38 1589 *
cparata 0:6d69e896ce38 1590 */
cparata 0:6d69e896ce38 1591 int32_t lsm6dso_boot_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1592 {
cparata 3:4274d9103f1d 1593 lsm6dso_ctrl3_c_t reg;
cparata 3:4274d9103f1d 1594 int32_t ret;
cparata 3:4274d9103f1d 1595
cparata 3:4274d9103f1d 1596 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1597 if (ret == 0) {
cparata 3:4274d9103f1d 1598 reg.boot = val;
cparata 3:4274d9103f1d 1599 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1600 }
cparata 3:4274d9103f1d 1601 return ret;
cparata 0:6d69e896ce38 1602 }
cparata 0:6d69e896ce38 1603
cparata 0:6d69e896ce38 1604 /**
cparata 0:6d69e896ce38 1605 * @brief Reboot memory content. Reload the calibration parameters.[get]
cparata 0:6d69e896ce38 1606 *
cparata 0:6d69e896ce38 1607 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1608 * @param val change the values of boot in reg CTRL3_C
cparata 0:6d69e896ce38 1609 *
cparata 0:6d69e896ce38 1610 */
cparata 0:6d69e896ce38 1611 int32_t lsm6dso_boot_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1612 {
cparata 3:4274d9103f1d 1613 lsm6dso_ctrl3_c_t reg;
cparata 3:4274d9103f1d 1614 int32_t ret;
cparata 3:4274d9103f1d 1615
cparata 3:4274d9103f1d 1616 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1617 *val = reg.boot;
cparata 3:4274d9103f1d 1618
cparata 3:4274d9103f1d 1619 return ret;
cparata 0:6d69e896ce38 1620 }
cparata 0:6d69e896ce38 1621
cparata 0:6d69e896ce38 1622 /**
cparata 0:6d69e896ce38 1623 * @brief Linear acceleration sensor self-test enable.[set]
cparata 0:6d69e896ce38 1624 *
cparata 0:6d69e896ce38 1625 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1626 * @param val change the values of st_xl in reg CTRL5_C
cparata 0:6d69e896ce38 1627 *
cparata 0:6d69e896ce38 1628 */
cparata 0:6d69e896ce38 1629 int32_t lsm6dso_xl_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t val)
cparata 0:6d69e896ce38 1630 {
cparata 3:4274d9103f1d 1631 lsm6dso_ctrl5_c_t reg;
cparata 3:4274d9103f1d 1632 int32_t ret;
cparata 3:4274d9103f1d 1633
cparata 3:4274d9103f1d 1634 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1635 if (ret == 0) {
cparata 3:4274d9103f1d 1636 reg.st_xl = (uint8_t)val;
cparata 3:4274d9103f1d 1637 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1638 }
cparata 3:4274d9103f1d 1639 return ret;
cparata 0:6d69e896ce38 1640 }
cparata 0:6d69e896ce38 1641
cparata 0:6d69e896ce38 1642 /**
cparata 0:6d69e896ce38 1643 * @brief Linear acceleration sensor self-test enable.[get]
cparata 0:6d69e896ce38 1644 *
cparata 0:6d69e896ce38 1645 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1646 * @param val Get the values of st_xl in reg CTRL5_C
cparata 0:6d69e896ce38 1647 *
cparata 0:6d69e896ce38 1648 */
cparata 0:6d69e896ce38 1649 int32_t lsm6dso_xl_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t *val)
cparata 0:6d69e896ce38 1650 {
cparata 3:4274d9103f1d 1651 lsm6dso_ctrl5_c_t reg;
cparata 3:4274d9103f1d 1652 int32_t ret;
cparata 3:4274d9103f1d 1653
cparata 3:4274d9103f1d 1654 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1655 switch (reg.st_xl) {
cparata 3:4274d9103f1d 1656 case LSM6DSO_XL_ST_DISABLE:
cparata 3:4274d9103f1d 1657 *val = LSM6DSO_XL_ST_DISABLE;
cparata 3:4274d9103f1d 1658 break;
cparata 3:4274d9103f1d 1659 case LSM6DSO_XL_ST_POSITIVE:
cparata 3:4274d9103f1d 1660 *val = LSM6DSO_XL_ST_POSITIVE;
cparata 3:4274d9103f1d 1661 break;
cparata 3:4274d9103f1d 1662 case LSM6DSO_XL_ST_NEGATIVE:
cparata 3:4274d9103f1d 1663 *val = LSM6DSO_XL_ST_NEGATIVE;
cparata 3:4274d9103f1d 1664 break;
cparata 3:4274d9103f1d 1665 default:
cparata 3:4274d9103f1d 1666 *val = LSM6DSO_XL_ST_DISABLE;
cparata 3:4274d9103f1d 1667 break;
cparata 3:4274d9103f1d 1668 }
cparata 3:4274d9103f1d 1669 return ret;
cparata 0:6d69e896ce38 1670 }
cparata 0:6d69e896ce38 1671
cparata 0:6d69e896ce38 1672 /**
cparata 0:6d69e896ce38 1673 * @brief Angular rate sensor self-test enable.[set]
cparata 0:6d69e896ce38 1674 *
cparata 0:6d69e896ce38 1675 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1676 * @param val change the values of st_g in reg CTRL5_C
cparata 0:6d69e896ce38 1677 *
cparata 0:6d69e896ce38 1678 */
cparata 0:6d69e896ce38 1679 int32_t lsm6dso_gy_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t val)
cparata 0:6d69e896ce38 1680 {
cparata 3:4274d9103f1d 1681 lsm6dso_ctrl5_c_t reg;
cparata 3:4274d9103f1d 1682 int32_t ret;
cparata 3:4274d9103f1d 1683
cparata 3:4274d9103f1d 1684 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1685 if (ret == 0) {
cparata 3:4274d9103f1d 1686 reg.st_g = (uint8_t)val;
cparata 3:4274d9103f1d 1687 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1688 }
cparata 3:4274d9103f1d 1689 return ret;
cparata 0:6d69e896ce38 1690 }
cparata 0:6d69e896ce38 1691
cparata 0:6d69e896ce38 1692 /**
cparata 0:6d69e896ce38 1693 * @brief Angular rate sensor self-test enable.[get]
cparata 0:6d69e896ce38 1694 *
cparata 0:6d69e896ce38 1695 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1696 * @param val Get the values of st_g in reg CTRL5_C
cparata 0:6d69e896ce38 1697 *
cparata 0:6d69e896ce38 1698 */
cparata 0:6d69e896ce38 1699 int32_t lsm6dso_gy_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t *val)
cparata 0:6d69e896ce38 1700 {
cparata 3:4274d9103f1d 1701 lsm6dso_ctrl5_c_t reg;
cparata 3:4274d9103f1d 1702 int32_t ret;
cparata 3:4274d9103f1d 1703
cparata 3:4274d9103f1d 1704 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1705 switch (reg.st_g) {
cparata 3:4274d9103f1d 1706 case LSM6DSO_GY_ST_DISABLE:
cparata 3:4274d9103f1d 1707 *val = LSM6DSO_GY_ST_DISABLE;
cparata 3:4274d9103f1d 1708 break;
cparata 3:4274d9103f1d 1709 case LSM6DSO_GY_ST_POSITIVE:
cparata 3:4274d9103f1d 1710 *val = LSM6DSO_GY_ST_POSITIVE;
cparata 3:4274d9103f1d 1711 break;
cparata 3:4274d9103f1d 1712 case LSM6DSO_GY_ST_NEGATIVE:
cparata 3:4274d9103f1d 1713 *val = LSM6DSO_GY_ST_NEGATIVE;
cparata 3:4274d9103f1d 1714 break;
cparata 3:4274d9103f1d 1715 default:
cparata 3:4274d9103f1d 1716 *val = LSM6DSO_GY_ST_DISABLE;
cparata 3:4274d9103f1d 1717 break;
cparata 3:4274d9103f1d 1718 }
cparata 3:4274d9103f1d 1719 return ret;
cparata 0:6d69e896ce38 1720 }
cparata 0:6d69e896ce38 1721
cparata 0:6d69e896ce38 1722 /**
cparata 0:6d69e896ce38 1723 * @}
cparata 0:6d69e896ce38 1724 *
cparata 0:6d69e896ce38 1725 */
cparata 0:6d69e896ce38 1726
cparata 0:6d69e896ce38 1727 /**
cparata 0:6d69e896ce38 1728 * @defgroup LSM6DSO_filters
cparata 0:6d69e896ce38 1729 * @brief This section group all the functions concerning the
cparata 0:6d69e896ce38 1730 * filters configuration
cparata 0:6d69e896ce38 1731 * @{
cparata 0:6d69e896ce38 1732 *
cparata 0:6d69e896ce38 1733 */
cparata 0:6d69e896ce38 1734
cparata 0:6d69e896ce38 1735 /**
cparata 0:6d69e896ce38 1736 * @brief Accelerometer output from LPF2 filtering stage selection.[set]
cparata 0:6d69e896ce38 1737 *
cparata 0:6d69e896ce38 1738 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1739 * @param val change the values of lpf2_xl_en in reg CTRL1_XL
cparata 0:6d69e896ce38 1740 *
cparata 0:6d69e896ce38 1741 */
cparata 0:6d69e896ce38 1742 int32_t lsm6dso_xl_filter_lp2_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1743 {
cparata 3:4274d9103f1d 1744 lsm6dso_ctrl1_xl_t reg;
cparata 3:4274d9103f1d 1745 int32_t ret;
cparata 3:4274d9103f1d 1746
cparata 3:4274d9103f1d 1747 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1748 if (ret == 0) {
cparata 3:4274d9103f1d 1749 reg.lpf2_xl_en = val;
cparata 3:4274d9103f1d 1750 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1751 }
cparata 3:4274d9103f1d 1752 return ret;
cparata 0:6d69e896ce38 1753 }
cparata 0:6d69e896ce38 1754
cparata 0:6d69e896ce38 1755 /**
cparata 0:6d69e896ce38 1756 * @brief Accelerometer output from LPF2 filtering stage selection.[get]
cparata 0:6d69e896ce38 1757 *
cparata 0:6d69e896ce38 1758 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1759 * @param val change the values of lpf2_xl_en in reg CTRL1_XL
cparata 0:6d69e896ce38 1760 *
cparata 0:6d69e896ce38 1761 */
cparata 0:6d69e896ce38 1762 int32_t lsm6dso_xl_filter_lp2_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1763 {
cparata 3:4274d9103f1d 1764 lsm6dso_ctrl1_xl_t reg;
cparata 3:4274d9103f1d 1765 int32_t ret;
cparata 3:4274d9103f1d 1766
cparata 3:4274d9103f1d 1767 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1768 *val = reg.lpf2_xl_en;
cparata 3:4274d9103f1d 1769
cparata 3:4274d9103f1d 1770 return ret;
cparata 0:6d69e896ce38 1771 }
cparata 0:6d69e896ce38 1772
cparata 0:6d69e896ce38 1773 /**
cparata 0:6d69e896ce38 1774 * @brief Enables gyroscope digital LPF1 if auxiliary SPI is disabled;
cparata 0:6d69e896ce38 1775 * the bandwidth can be selected through FTYPE [2:0]
cparata 0:6d69e896ce38 1776 * in CTRL6_C (15h).[set]
cparata 0:6d69e896ce38 1777 *
cparata 0:6d69e896ce38 1778 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1779 * @param val change the values of lpf1_sel_g in reg CTRL4_C
cparata 0:6d69e896ce38 1780 *
cparata 0:6d69e896ce38 1781 */
cparata 0:6d69e896ce38 1782 int32_t lsm6dso_gy_filter_lp1_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1783 {
cparata 3:4274d9103f1d 1784 lsm6dso_ctrl4_c_t reg;
cparata 3:4274d9103f1d 1785 int32_t ret;
cparata 3:4274d9103f1d 1786
cparata 3:4274d9103f1d 1787 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1788 if (ret == 0) {
cparata 3:4274d9103f1d 1789 reg.lpf1_sel_g = val;
cparata 3:4274d9103f1d 1790 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1791 }
cparata 3:4274d9103f1d 1792 return ret;
cparata 0:6d69e896ce38 1793 }
cparata 0:6d69e896ce38 1794
cparata 0:6d69e896ce38 1795 /**
cparata 0:6d69e896ce38 1796 * @brief Enables gyroscope digital LPF1 if auxiliary SPI is disabled;
cparata 0:6d69e896ce38 1797 * the bandwidth can be selected through FTYPE [2:0]
cparata 0:6d69e896ce38 1798 * in CTRL6_C (15h).[get]
cparata 0:6d69e896ce38 1799 *
cparata 0:6d69e896ce38 1800 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1801 * @param val change the values of lpf1_sel_g in reg CTRL4_C
cparata 0:6d69e896ce38 1802 *
cparata 0:6d69e896ce38 1803 */
cparata 0:6d69e896ce38 1804 int32_t lsm6dso_gy_filter_lp1_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1805 {
cparata 3:4274d9103f1d 1806 lsm6dso_ctrl4_c_t reg;
cparata 3:4274d9103f1d 1807 int32_t ret;
cparata 3:4274d9103f1d 1808
cparata 3:4274d9103f1d 1809 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1810 *val = reg.lpf1_sel_g;
cparata 3:4274d9103f1d 1811
cparata 3:4274d9103f1d 1812 return ret;
cparata 0:6d69e896ce38 1813 }
cparata 0:6d69e896ce38 1814
cparata 0:6d69e896ce38 1815 /**
cparata 0:6d69e896ce38 1816 * @brief Mask DRDY on pin (both XL & Gyro) until filter settling ends
cparata 0:6d69e896ce38 1817 * (XL and Gyro independently masked).[set]
cparata 0:6d69e896ce38 1818 *
cparata 0:6d69e896ce38 1819 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1820 * @param val change the values of drdy_mask in reg CTRL4_C
cparata 0:6d69e896ce38 1821 *
cparata 0:6d69e896ce38 1822 */
cparata 0:6d69e896ce38 1823 int32_t lsm6dso_filter_settling_mask_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1824 {
cparata 3:4274d9103f1d 1825 lsm6dso_ctrl4_c_t reg;
cparata 3:4274d9103f1d 1826 int32_t ret;
cparata 3:4274d9103f1d 1827
cparata 3:4274d9103f1d 1828 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1829 if (ret == 0) {
cparata 3:4274d9103f1d 1830 reg.drdy_mask = val;
cparata 3:4274d9103f1d 1831 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1832 }
cparata 3:4274d9103f1d 1833 return ret;
cparata 0:6d69e896ce38 1834 }
cparata 0:6d69e896ce38 1835
cparata 0:6d69e896ce38 1836 /**
cparata 0:6d69e896ce38 1837 * @brief Mask DRDY on pin (both XL & Gyro) until filter settling ends
cparata 0:6d69e896ce38 1838 * (XL and Gyro independently masked).[get]
cparata 0:6d69e896ce38 1839 *
cparata 0:6d69e896ce38 1840 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1841 * @param val change the values of drdy_mask in reg CTRL4_C
cparata 0:6d69e896ce38 1842 *
cparata 0:6d69e896ce38 1843 */
cparata 0:6d69e896ce38 1844 int32_t lsm6dso_filter_settling_mask_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1845 {
cparata 3:4274d9103f1d 1846 lsm6dso_ctrl4_c_t reg;
cparata 3:4274d9103f1d 1847 int32_t ret;
cparata 3:4274d9103f1d 1848
cparata 3:4274d9103f1d 1849 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1850 *val = reg.drdy_mask;
cparata 3:4274d9103f1d 1851
cparata 3:4274d9103f1d 1852 return ret;
cparata 0:6d69e896ce38 1853 }
cparata 0:6d69e896ce38 1854
cparata 0:6d69e896ce38 1855 /**
cparata 0:6d69e896ce38 1856 * @brief Gyroscope lp1 bandwidth.[set]
cparata 0:6d69e896ce38 1857 *
cparata 0:6d69e896ce38 1858 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1859 * @param val change the values of ftype in reg CTRL6_C
cparata 0:6d69e896ce38 1860 *
cparata 0:6d69e896ce38 1861 */
cparata 0:6d69e896ce38 1862 int32_t lsm6dso_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx, lsm6dso_ftype_t val)
cparata 0:6d69e896ce38 1863 {
cparata 3:4274d9103f1d 1864 lsm6dso_ctrl6_c_t reg;
cparata 3:4274d9103f1d 1865 int32_t ret;
cparata 3:4274d9103f1d 1866
cparata 3:4274d9103f1d 1867 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1868 if (ret == 0) {
cparata 3:4274d9103f1d 1869 reg.ftype = (uint8_t)val;
cparata 3:4274d9103f1d 1870 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1871 }
cparata 3:4274d9103f1d 1872 return ret;
cparata 0:6d69e896ce38 1873 }
cparata 0:6d69e896ce38 1874
cparata 0:6d69e896ce38 1875 /**
cparata 0:6d69e896ce38 1876 * @brief Gyroscope lp1 bandwidth.[get]
cparata 0:6d69e896ce38 1877 *
cparata 0:6d69e896ce38 1878 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1879 * @param val Get the values of ftype in reg CTRL6_C
cparata 0:6d69e896ce38 1880 *
cparata 0:6d69e896ce38 1881 */
cparata 0:6d69e896ce38 1882 int32_t lsm6dso_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx, lsm6dso_ftype_t *val)
cparata 0:6d69e896ce38 1883 {
cparata 3:4274d9103f1d 1884 lsm6dso_ctrl6_c_t reg;
cparata 3:4274d9103f1d 1885 int32_t ret;
cparata 3:4274d9103f1d 1886
cparata 3:4274d9103f1d 1887 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1888 switch (reg.ftype) {
cparata 3:4274d9103f1d 1889 case LSM6DSO_ULTRA_LIGHT:
cparata 3:4274d9103f1d 1890 *val = LSM6DSO_ULTRA_LIGHT;
cparata 3:4274d9103f1d 1891 break;
cparata 3:4274d9103f1d 1892 case LSM6DSO_VERY_LIGHT:
cparata 3:4274d9103f1d 1893 *val = LSM6DSO_VERY_LIGHT;
cparata 3:4274d9103f1d 1894 break;
cparata 3:4274d9103f1d 1895 case LSM6DSO_LIGHT:
cparata 3:4274d9103f1d 1896 *val = LSM6DSO_LIGHT;
cparata 3:4274d9103f1d 1897 break;
cparata 3:4274d9103f1d 1898 case LSM6DSO_MEDIUM:
cparata 3:4274d9103f1d 1899 *val = LSM6DSO_MEDIUM;
cparata 3:4274d9103f1d 1900 break;
cparata 3:4274d9103f1d 1901 case LSM6DSO_STRONG:
cparata 3:4274d9103f1d 1902 *val = LSM6DSO_STRONG;
cparata 3:4274d9103f1d 1903 break;
cparata 3:4274d9103f1d 1904 case LSM6DSO_VERY_STRONG:
cparata 3:4274d9103f1d 1905 *val = LSM6DSO_VERY_STRONG;
cparata 3:4274d9103f1d 1906 break;
cparata 3:4274d9103f1d 1907 case LSM6DSO_AGGRESSIVE:
cparata 3:4274d9103f1d 1908 *val = LSM6DSO_AGGRESSIVE;
cparata 3:4274d9103f1d 1909 break;
cparata 3:4274d9103f1d 1910 case LSM6DSO_XTREME:
cparata 3:4274d9103f1d 1911 *val = LSM6DSO_XTREME;
cparata 3:4274d9103f1d 1912 break;
cparata 3:4274d9103f1d 1913 default:
cparata 3:4274d9103f1d 1914 *val = LSM6DSO_ULTRA_LIGHT;
cparata 3:4274d9103f1d 1915 break;
cparata 3:4274d9103f1d 1916 }
cparata 3:4274d9103f1d 1917 return ret;
cparata 0:6d69e896ce38 1918 }
cparata 0:6d69e896ce38 1919
cparata 0:6d69e896ce38 1920 /**
cparata 0:6d69e896ce38 1921 * @brief Low pass filter 2 on 6D function selection.[set]
cparata 0:6d69e896ce38 1922 *
cparata 0:6d69e896ce38 1923 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1924 * @param val change the values of low_pass_on_6d in reg CTRL8_XL
cparata 0:6d69e896ce38 1925 *
cparata 0:6d69e896ce38 1926 */
cparata 0:6d69e896ce38 1927 int32_t lsm6dso_xl_lp2_on_6d_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1928 {
cparata 3:4274d9103f1d 1929 lsm6dso_ctrl8_xl_t reg;
cparata 3:4274d9103f1d 1930 int32_t ret;
cparata 3:4274d9103f1d 1931
cparata 3:4274d9103f1d 1932 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1933 if (ret == 0) {
cparata 3:4274d9103f1d 1934 reg.low_pass_on_6d = val;
cparata 3:4274d9103f1d 1935 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1936 }
cparata 3:4274d9103f1d 1937 return ret;
cparata 0:6d69e896ce38 1938 }
cparata 0:6d69e896ce38 1939
cparata 0:6d69e896ce38 1940 /**
cparata 0:6d69e896ce38 1941 * @brief Low pass filter 2 on 6D function selection.[get]
cparata 0:6d69e896ce38 1942 *
cparata 0:6d69e896ce38 1943 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1944 * @param val change the values of low_pass_on_6d in reg CTRL8_XL
cparata 0:6d69e896ce38 1945 *
cparata 0:6d69e896ce38 1946 */
cparata 0:6d69e896ce38 1947 int32_t lsm6dso_xl_lp2_on_6d_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1948 {
cparata 3:4274d9103f1d 1949 lsm6dso_ctrl8_xl_t reg;
cparata 3:4274d9103f1d 1950 int32_t ret;
cparata 3:4274d9103f1d 1951
cparata 3:4274d9103f1d 1952 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1953 *val = reg.low_pass_on_6d;
cparata 3:4274d9103f1d 1954
cparata 3:4274d9103f1d 1955 return ret;
cparata 0:6d69e896ce38 1956 }
cparata 0:6d69e896ce38 1957
cparata 0:6d69e896ce38 1958 /**
cparata 0:6d69e896ce38 1959 * @brief Accelerometer slope filter / high-pass filter selection
cparata 0:6d69e896ce38 1960 * on output.[set]
cparata 0:6d69e896ce38 1961 *
cparata 0:6d69e896ce38 1962 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1963 * @param val change the values of hp_slope_xl_en
cparata 0:6d69e896ce38 1964 * in reg CTRL8_XL
cparata 0:6d69e896ce38 1965 *
cparata 0:6d69e896ce38 1966 */
cparata 0:6d69e896ce38 1967 int32_t lsm6dso_xl_hp_path_on_out_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 1968 lsm6dso_hp_slope_xl_en_t val)
cparata 0:6d69e896ce38 1969 {
cparata 3:4274d9103f1d 1970 lsm6dso_ctrl8_xl_t reg;
cparata 3:4274d9103f1d 1971 int32_t ret;
cparata 3:4274d9103f1d 1972
cparata 3:4274d9103f1d 1973 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1974 if (ret == 0) {
cparata 3:4274d9103f1d 1975 reg.hp_slope_xl_en = ((uint8_t)val & 0x10U) >> 4;
cparata 3:4274d9103f1d 1976 reg.hp_ref_mode_xl = ((uint8_t)val & 0x20U) >> 5;
cparata 3:4274d9103f1d 1977 reg.hpcf_xl = (uint8_t)val & 0x07U;
cparata 3:4274d9103f1d 1978 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1979 }
cparata 3:4274d9103f1d 1980 return ret;
cparata 0:6d69e896ce38 1981 }
cparata 0:6d69e896ce38 1982
cparata 0:6d69e896ce38 1983 /**
cparata 0:6d69e896ce38 1984 * @brief Accelerometer slope filter / high-pass filter selection
cparata 0:6d69e896ce38 1985 * on output.[get]
cparata 0:6d69e896ce38 1986 *
cparata 0:6d69e896ce38 1987 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1988 * @param val Get the values of hp_slope_xl_en
cparata 0:6d69e896ce38 1989 * in reg CTRL8_XL
cparata 0:6d69e896ce38 1990 *
cparata 0:6d69e896ce38 1991 */
cparata 0:6d69e896ce38 1992 int32_t lsm6dso_xl_hp_path_on_out_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 1993 lsm6dso_hp_slope_xl_en_t *val)
cparata 0:6d69e896ce38 1994 {
cparata 3:4274d9103f1d 1995 lsm6dso_ctrl8_xl_t reg;
cparata 3:4274d9103f1d 1996 int32_t ret;
cparata 3:4274d9103f1d 1997
cparata 3:4274d9103f1d 1998 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 1999 switch ((reg.hp_ref_mode_xl << 5) | (reg.hp_slope_xl_en << 4) |
cparata 3:4274d9103f1d 2000 reg.hpcf_xl) {
cparata 3:4274d9103f1d 2001 case LSM6DSO_HP_PATH_DISABLE_ON_OUT:
cparata 3:4274d9103f1d 2002 *val = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
cparata 3:4274d9103f1d 2003 break;
cparata 3:4274d9103f1d 2004 case LSM6DSO_SLOPE_ODR_DIV_4:
cparata 3:4274d9103f1d 2005 *val = LSM6DSO_SLOPE_ODR_DIV_4;
cparata 3:4274d9103f1d 2006 break;
cparata 3:4274d9103f1d 2007 case LSM6DSO_HP_ODR_DIV_10:
cparata 3:4274d9103f1d 2008 *val = LSM6DSO_HP_ODR_DIV_10;
cparata 3:4274d9103f1d 2009 break;
cparata 3:4274d9103f1d 2010 case LSM6DSO_HP_ODR_DIV_20:
cparata 3:4274d9103f1d 2011 *val = LSM6DSO_HP_ODR_DIV_20;
cparata 3:4274d9103f1d 2012 break;
cparata 3:4274d9103f1d 2013 case LSM6DSO_HP_ODR_DIV_45:
cparata 3:4274d9103f1d 2014 *val = LSM6DSO_HP_ODR_DIV_45;
cparata 3:4274d9103f1d 2015 break;
cparata 3:4274d9103f1d 2016 case LSM6DSO_HP_ODR_DIV_100:
cparata 3:4274d9103f1d 2017 *val = LSM6DSO_HP_ODR_DIV_100;
cparata 3:4274d9103f1d 2018 break;
cparata 3:4274d9103f1d 2019 case LSM6DSO_HP_ODR_DIV_200:
cparata 3:4274d9103f1d 2020 *val = LSM6DSO_HP_ODR_DIV_200;
cparata 3:4274d9103f1d 2021 break;
cparata 3:4274d9103f1d 2022 case LSM6DSO_HP_ODR_DIV_400:
cparata 3:4274d9103f1d 2023 *val = LSM6DSO_HP_ODR_DIV_400;
cparata 3:4274d9103f1d 2024 break;
cparata 3:4274d9103f1d 2025 case LSM6DSO_HP_ODR_DIV_800:
cparata 3:4274d9103f1d 2026 *val = LSM6DSO_HP_ODR_DIV_800;
cparata 3:4274d9103f1d 2027 break;
cparata 3:4274d9103f1d 2028 case LSM6DSO_HP_REF_MD_ODR_DIV_10:
cparata 3:4274d9103f1d 2029 *val = LSM6DSO_HP_REF_MD_ODR_DIV_10;
cparata 3:4274d9103f1d 2030 break;
cparata 3:4274d9103f1d 2031 case LSM6DSO_HP_REF_MD_ODR_DIV_20:
cparata 3:4274d9103f1d 2032 *val = LSM6DSO_HP_REF_MD_ODR_DIV_20;
cparata 3:4274d9103f1d 2033 break;
cparata 3:4274d9103f1d 2034 case LSM6DSO_HP_REF_MD_ODR_DIV_45:
cparata 3:4274d9103f1d 2035 *val = LSM6DSO_HP_REF_MD_ODR_DIV_45;
cparata 3:4274d9103f1d 2036 break;
cparata 3:4274d9103f1d 2037 case LSM6DSO_HP_REF_MD_ODR_DIV_100:
cparata 3:4274d9103f1d 2038 *val = LSM6DSO_HP_REF_MD_ODR_DIV_100;
cparata 3:4274d9103f1d 2039 break;
cparata 3:4274d9103f1d 2040 case LSM6DSO_HP_REF_MD_ODR_DIV_200:
cparata 3:4274d9103f1d 2041 *val = LSM6DSO_HP_REF_MD_ODR_DIV_200;
cparata 3:4274d9103f1d 2042 break;
cparata 3:4274d9103f1d 2043 case LSM6DSO_HP_REF_MD_ODR_DIV_400:
cparata 3:4274d9103f1d 2044 *val = LSM6DSO_HP_REF_MD_ODR_DIV_400;
cparata 3:4274d9103f1d 2045 break;
cparata 3:4274d9103f1d 2046 case LSM6DSO_HP_REF_MD_ODR_DIV_800:
cparata 3:4274d9103f1d 2047 *val = LSM6DSO_HP_REF_MD_ODR_DIV_800;
cparata 3:4274d9103f1d 2048 break;
cparata 3:4274d9103f1d 2049 case LSM6DSO_LP_ODR_DIV_10:
cparata 3:4274d9103f1d 2050 *val = LSM6DSO_LP_ODR_DIV_10;
cparata 3:4274d9103f1d 2051 break;
cparata 3:4274d9103f1d 2052 case LSM6DSO_LP_ODR_DIV_20:
cparata 3:4274d9103f1d 2053 *val = LSM6DSO_LP_ODR_DIV_20;
cparata 3:4274d9103f1d 2054 break;
cparata 3:4274d9103f1d 2055 case LSM6DSO_LP_ODR_DIV_45:
cparata 3:4274d9103f1d 2056 *val = LSM6DSO_LP_ODR_DIV_45;
cparata 3:4274d9103f1d 2057 break;
cparata 3:4274d9103f1d 2058 case LSM6DSO_LP_ODR_DIV_100:
cparata 3:4274d9103f1d 2059 *val = LSM6DSO_LP_ODR_DIV_100;
cparata 3:4274d9103f1d 2060 break;
cparata 3:4274d9103f1d 2061 case LSM6DSO_LP_ODR_DIV_200:
cparata 3:4274d9103f1d 2062 *val = LSM6DSO_LP_ODR_DIV_200;
cparata 3:4274d9103f1d 2063 break;
cparata 3:4274d9103f1d 2064 case LSM6DSO_LP_ODR_DIV_400:
cparata 3:4274d9103f1d 2065 *val = LSM6DSO_LP_ODR_DIV_400;
cparata 3:4274d9103f1d 2066 break;
cparata 3:4274d9103f1d 2067 case LSM6DSO_LP_ODR_DIV_800:
cparata 3:4274d9103f1d 2068 *val = LSM6DSO_LP_ODR_DIV_800;
cparata 3:4274d9103f1d 2069 break;
cparata 3:4274d9103f1d 2070 default:
cparata 3:4274d9103f1d 2071 *val = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
cparata 3:4274d9103f1d 2072 break;
cparata 3:4274d9103f1d 2073 }
cparata 3:4274d9103f1d 2074
cparata 3:4274d9103f1d 2075 return ret;
cparata 0:6d69e896ce38 2076 }
cparata 0:6d69e896ce38 2077
cparata 0:6d69e896ce38 2078 /**
cparata 0:6d69e896ce38 2079 * @brief Enables accelerometer LPF2 and HPF fast-settling mode.
cparata 0:6d69e896ce38 2080 * The filter sets the second samples after writing this bit.
cparata 0:6d69e896ce38 2081 * Active only during device exit from power-down mode.[set]
cparata 0:6d69e896ce38 2082 *
cparata 0:6d69e896ce38 2083 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2084 * @param val change the values of fastsettl_mode_xl in
cparata 0:6d69e896ce38 2085 * reg CTRL8_XL
cparata 0:6d69e896ce38 2086 *
cparata 0:6d69e896ce38 2087 */
cparata 0:6d69e896ce38 2088 int32_t lsm6dso_xl_fast_settling_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 2089 {
cparata 3:4274d9103f1d 2090 lsm6dso_ctrl8_xl_t reg;
cparata 3:4274d9103f1d 2091 int32_t ret;
cparata 3:4274d9103f1d 2092
cparata 3:4274d9103f1d 2093 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2094 if (ret == 0) {
cparata 3:4274d9103f1d 2095 reg.fastsettl_mode_xl = val;
cparata 3:4274d9103f1d 2096 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2097 }
cparata 3:4274d9103f1d 2098 return ret;
cparata 0:6d69e896ce38 2099 }
cparata 0:6d69e896ce38 2100
cparata 0:6d69e896ce38 2101 /**
cparata 0:6d69e896ce38 2102 * @brief Enables accelerometer LPF2 and HPF fast-settling mode.
cparata 0:6d69e896ce38 2103 * The filter sets the second samples after writing this bit.
cparata 0:6d69e896ce38 2104 * Active only during device exit from power-down mode.[get]
cparata 0:6d69e896ce38 2105 *
cparata 0:6d69e896ce38 2106 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2107 * @param val change the values of fastsettl_mode_xl in reg CTRL8_XL
cparata 0:6d69e896ce38 2108 *
cparata 0:6d69e896ce38 2109 */
cparata 0:6d69e896ce38 2110 int32_t lsm6dso_xl_fast_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 2111 {
cparata 3:4274d9103f1d 2112 lsm6dso_ctrl8_xl_t reg;
cparata 3:4274d9103f1d 2113 int32_t ret;
cparata 3:4274d9103f1d 2114
cparata 3:4274d9103f1d 2115 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2116 *val = reg.fastsettl_mode_xl;
cparata 3:4274d9103f1d 2117
cparata 3:4274d9103f1d 2118 return ret;
cparata 0:6d69e896ce38 2119 }
cparata 0:6d69e896ce38 2120
cparata 0:6d69e896ce38 2121 /**
cparata 0:6d69e896ce38 2122 * @brief HPF or SLOPE filter selection on wake-up and Activity/Inactivity
cparata 0:6d69e896ce38 2123 * functions.[set]
cparata 0:6d69e896ce38 2124 *
cparata 0:6d69e896ce38 2125 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2126 * @param val change the values of slope_fds in reg TAP_CFG0
cparata 0:6d69e896ce38 2127 *
cparata 0:6d69e896ce38 2128 */
cparata 0:6d69e896ce38 2129 int32_t lsm6dso_xl_hp_path_internal_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2130 lsm6dso_slope_fds_t val)
cparata 0:6d69e896ce38 2131 {
cparata 3:4274d9103f1d 2132 lsm6dso_tap_cfg0_t reg;
cparata 3:4274d9103f1d 2133 int32_t ret;
cparata 3:4274d9103f1d 2134
cparata 3:4274d9103f1d 2135 ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2136 if (ret == 0) {
cparata 3:4274d9103f1d 2137 reg.slope_fds = (uint8_t)val;
cparata 3:4274d9103f1d 2138 ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2139 }
cparata 3:4274d9103f1d 2140 return ret;
cparata 0:6d69e896ce38 2141 }
cparata 0:6d69e896ce38 2142
cparata 0:6d69e896ce38 2143 /**
cparata 0:6d69e896ce38 2144 * @brief HPF or SLOPE filter selection on wake-up and Activity/Inactivity
cparata 0:6d69e896ce38 2145 * functions.[get]
cparata 0:6d69e896ce38 2146 *
cparata 0:6d69e896ce38 2147 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2148 * @param val Get the values of slope_fds in reg TAP_CFG0
cparata 0:6d69e896ce38 2149 *
cparata 0:6d69e896ce38 2150 */
cparata 0:6d69e896ce38 2151 int32_t lsm6dso_xl_hp_path_internal_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2152 lsm6dso_slope_fds_t *val)
cparata 0:6d69e896ce38 2153 {
cparata 3:4274d9103f1d 2154 lsm6dso_tap_cfg0_t reg;
cparata 3:4274d9103f1d 2155 int32_t ret;
cparata 3:4274d9103f1d 2156
cparata 3:4274d9103f1d 2157 ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2158 switch (reg.slope_fds) {
cparata 3:4274d9103f1d 2159 case LSM6DSO_USE_SLOPE:
cparata 3:4274d9103f1d 2160 *val = LSM6DSO_USE_SLOPE;
cparata 3:4274d9103f1d 2161 break;
cparata 3:4274d9103f1d 2162 case LSM6DSO_USE_HPF:
cparata 3:4274d9103f1d 2163 *val = LSM6DSO_USE_HPF;
cparata 3:4274d9103f1d 2164 break;
cparata 3:4274d9103f1d 2165 default:
cparata 3:4274d9103f1d 2166 *val = LSM6DSO_USE_SLOPE;
cparata 3:4274d9103f1d 2167 break;
cparata 3:4274d9103f1d 2168 }
cparata 3:4274d9103f1d 2169 return ret;
cparata 0:6d69e896ce38 2170 }
cparata 0:6d69e896ce38 2171
cparata 0:6d69e896ce38 2172 /**
cparata 0:6d69e896ce38 2173 * @brief Enables gyroscope digital high-pass filter. The filter is
cparata 0:6d69e896ce38 2174 * enabled only if the gyro is in HP mode.[set]
cparata 0:6d69e896ce38 2175 *
cparata 0:6d69e896ce38 2176 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2177 * @param val Get the values of hp_en_g and hp_en_g
cparata 0:6d69e896ce38 2178 * in reg CTRL7_G
cparata 0:6d69e896ce38 2179 *
cparata 0:6d69e896ce38 2180 */
cparata 0:6d69e896ce38 2181 int32_t lsm6dso_gy_hp_path_internal_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2182 lsm6dso_hpm_g_t val)
cparata 0:6d69e896ce38 2183 {
cparata 3:4274d9103f1d 2184 lsm6dso_ctrl7_g_t reg;
cparata 3:4274d9103f1d 2185 int32_t ret;
cparata 3:4274d9103f1d 2186
cparata 3:4274d9103f1d 2187 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2188 if (ret == 0) {
cparata 3:4274d9103f1d 2189 reg.hp_en_g = ((uint8_t)val & 0x80U) >> 7;
cparata 3:4274d9103f1d 2190 reg.hpm_g = (uint8_t)val & 0x03U;
cparata 3:4274d9103f1d 2191 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2192 }
cparata 3:4274d9103f1d 2193 return ret;
cparata 0:6d69e896ce38 2194 }
cparata 0:6d69e896ce38 2195
cparata 0:6d69e896ce38 2196 /**
cparata 0:6d69e896ce38 2197 * @brief Enables gyroscope digital high-pass filter. The filter is
cparata 0:6d69e896ce38 2198 * enabled only if the gyro is in HP mode.[get]
cparata 0:6d69e896ce38 2199 *
cparata 0:6d69e896ce38 2200 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2201 * @param val Get the values of hp_en_g and hp_en_g
cparata 0:6d69e896ce38 2202 * in reg CTRL7_G
cparata 0:6d69e896ce38 2203 *
cparata 0:6d69e896ce38 2204 */
cparata 0:6d69e896ce38 2205 int32_t lsm6dso_gy_hp_path_internal_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2206 lsm6dso_hpm_g_t *val)
cparata 0:6d69e896ce38 2207 {
cparata 3:4274d9103f1d 2208 lsm6dso_ctrl7_g_t reg;
cparata 3:4274d9103f1d 2209 int32_t ret;
cparata 3:4274d9103f1d 2210
cparata 3:4274d9103f1d 2211 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2212 switch ((reg.hp_en_g << 7) + reg.hpm_g) {
cparata 3:4274d9103f1d 2213 case LSM6DSO_HP_FILTER_NONE:
cparata 3:4274d9103f1d 2214 *val = LSM6DSO_HP_FILTER_NONE;
cparata 3:4274d9103f1d 2215 break;
cparata 3:4274d9103f1d 2216 case LSM6DSO_HP_FILTER_16mHz:
cparata 3:4274d9103f1d 2217 *val = LSM6DSO_HP_FILTER_16mHz;
cparata 3:4274d9103f1d 2218 break;
cparata 3:4274d9103f1d 2219 case LSM6DSO_HP_FILTER_65mHz:
cparata 3:4274d9103f1d 2220 *val = LSM6DSO_HP_FILTER_65mHz;
cparata 3:4274d9103f1d 2221 break;
cparata 3:4274d9103f1d 2222 case LSM6DSO_HP_FILTER_260mHz:
cparata 3:4274d9103f1d 2223 *val = LSM6DSO_HP_FILTER_260mHz;
cparata 3:4274d9103f1d 2224 break;
cparata 3:4274d9103f1d 2225 case LSM6DSO_HP_FILTER_1Hz04:
cparata 3:4274d9103f1d 2226 *val = LSM6DSO_HP_FILTER_1Hz04;
cparata 3:4274d9103f1d 2227 break;
cparata 3:4274d9103f1d 2228 default:
cparata 3:4274d9103f1d 2229 *val = LSM6DSO_HP_FILTER_NONE;
cparata 3:4274d9103f1d 2230 break;
cparata 3:4274d9103f1d 2231 }
cparata 3:4274d9103f1d 2232 return ret;
cparata 0:6d69e896ce38 2233 }
cparata 0:6d69e896ce38 2234
cparata 0:6d69e896ce38 2235 /**
cparata 0:6d69e896ce38 2236 * @}
cparata 0:6d69e896ce38 2237 *
cparata 0:6d69e896ce38 2238 */
cparata 0:6d69e896ce38 2239
cparata 0:6d69e896ce38 2240 /**
cparata 0:6d69e896ce38 2241 * @defgroup LSM6DSO_ Auxiliary_interface
cparata 0:6d69e896ce38 2242 * @brief This section groups all the functions concerning
cparata 0:6d69e896ce38 2243 * auxiliary interface.
cparata 0:6d69e896ce38 2244 * @{
cparata 0:6d69e896ce38 2245 *
cparata 0:6d69e896ce38 2246 */
cparata 0:6d69e896ce38 2247
cparata 0:6d69e896ce38 2248 /**
cparata 0:6d69e896ce38 2249 * @brief aOn auxiliary interface connect/disconnect SDO and OCS
cparata 0:6d69e896ce38 2250 * internal pull-up.[set]
cparata 0:6d69e896ce38 2251 *
cparata 0:6d69e896ce38 2252 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2253 * @param val change the values of ois_pu_dis in
cparata 0:6d69e896ce38 2254 * reg PIN_CTRL
cparata 0:6d69e896ce38 2255 *
cparata 0:6d69e896ce38 2256 */
cparata 0:6d69e896ce38 2257 int32_t lsm6dso_aux_sdo_ocs_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2258 lsm6dso_ois_pu_dis_t val)
cparata 0:6d69e896ce38 2259 {
cparata 3:4274d9103f1d 2260 lsm6dso_pin_ctrl_t reg;
cparata 3:4274d9103f1d 2261 int32_t ret;
cparata 3:4274d9103f1d 2262
cparata 3:4274d9103f1d 2263 ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2264 if (ret == 0) {
cparata 3:4274d9103f1d 2265 reg.ois_pu_dis = (uint8_t)val;
cparata 3:4274d9103f1d 2266 ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2267 }
cparata 3:4274d9103f1d 2268 return ret;
cparata 0:6d69e896ce38 2269 }
cparata 0:6d69e896ce38 2270
cparata 0:6d69e896ce38 2271 /**
cparata 0:6d69e896ce38 2272 * @brief On auxiliary interface connect/disconnect SDO and OCS
cparata 0:6d69e896ce38 2273 * internal pull-up.[get]
cparata 0:6d69e896ce38 2274 *
cparata 0:6d69e896ce38 2275 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2276 * @param val Get the values of ois_pu_dis in reg PIN_CTRL
cparata 0:6d69e896ce38 2277 *
cparata 0:6d69e896ce38 2278 */
cparata 0:6d69e896ce38 2279 int32_t lsm6dso_aux_sdo_ocs_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2280 lsm6dso_ois_pu_dis_t *val)
cparata 0:6d69e896ce38 2281 {
cparata 3:4274d9103f1d 2282 lsm6dso_pin_ctrl_t reg;
cparata 3:4274d9103f1d 2283 int32_t ret;
cparata 3:4274d9103f1d 2284
cparata 3:4274d9103f1d 2285 ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2286 switch (reg.ois_pu_dis) {
cparata 3:4274d9103f1d 2287 case LSM6DSO_AUX_PULL_UP_DISC:
cparata 3:4274d9103f1d 2288 *val = LSM6DSO_AUX_PULL_UP_DISC;
cparata 3:4274d9103f1d 2289 break;
cparata 3:4274d9103f1d 2290 case LSM6DSO_AUX_PULL_UP_CONNECT:
cparata 3:4274d9103f1d 2291 *val = LSM6DSO_AUX_PULL_UP_CONNECT;
cparata 3:4274d9103f1d 2292 break;
cparata 3:4274d9103f1d 2293 default:
cparata 3:4274d9103f1d 2294 *val = LSM6DSO_AUX_PULL_UP_DISC;
cparata 3:4274d9103f1d 2295 break;
cparata 3:4274d9103f1d 2296 }
cparata 3:4274d9103f1d 2297 return ret;
cparata 0:6d69e896ce38 2298 }
cparata 0:6d69e896ce38 2299
cparata 0:6d69e896ce38 2300 /**
cparata 0:6d69e896ce38 2301 * @brief OIS chain on aux interface power on mode.[set]
cparata 0:6d69e896ce38 2302 *
cparata 0:6d69e896ce38 2303 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2304 * @param val change the values of ois_on in reg CTRL7_G
cparata 0:6d69e896ce38 2305 *
cparata 0:6d69e896ce38 2306 */
cparata 0:6d69e896ce38 2307 int32_t lsm6dso_aux_pw_on_ctrl_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t val)
cparata 0:6d69e896ce38 2308 {
cparata 3:4274d9103f1d 2309 lsm6dso_ctrl7_g_t reg;
cparata 3:4274d9103f1d 2310 int32_t ret;
cparata 3:4274d9103f1d 2311
cparata 3:4274d9103f1d 2312 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2313 if (ret == 0) {
cparata 3:4274d9103f1d 2314 reg.ois_on_en = (uint8_t)val & 0x01U;
cparata 3:4274d9103f1d 2315 reg.ois_on = (uint8_t)val & 0x01U;
cparata 3:4274d9103f1d 2316 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2317 }
cparata 3:4274d9103f1d 2318 return ret;
cparata 0:6d69e896ce38 2319 }
cparata 0:6d69e896ce38 2320
cparata 0:6d69e896ce38 2321 /**
cparata 0:6d69e896ce38 2322 * @brief aux_pw_on_ctrl: [get] OIS chain on aux interface power on mode
cparata 0:6d69e896ce38 2323 *
cparata 0:6d69e896ce38 2324 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2325 * @param val Get the values of ois_on in reg CTRL7_G
cparata 0:6d69e896ce38 2326 *
cparata 0:6d69e896ce38 2327 */
cparata 0:6d69e896ce38 2328 int32_t lsm6dso_aux_pw_on_ctrl_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t *val)
cparata 0:6d69e896ce38 2329 {
cparata 3:4274d9103f1d 2330 lsm6dso_ctrl7_g_t reg;
cparata 3:4274d9103f1d 2331 int32_t ret;
cparata 3:4274d9103f1d 2332
cparata 3:4274d9103f1d 2333 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2334 switch (reg.ois_on) {
cparata 3:4274d9103f1d 2335 case LSM6DSO_AUX_ON:
cparata 3:4274d9103f1d 2336 *val = LSM6DSO_AUX_ON;
cparata 3:4274d9103f1d 2337 break;
cparata 3:4274d9103f1d 2338 case LSM6DSO_AUX_ON_BY_AUX_INTERFACE:
cparata 3:4274d9103f1d 2339 *val = LSM6DSO_AUX_ON_BY_AUX_INTERFACE;
cparata 3:4274d9103f1d 2340 break;
cparata 3:4274d9103f1d 2341 default:
cparata 3:4274d9103f1d 2342 *val = LSM6DSO_AUX_ON;
cparata 3:4274d9103f1d 2343 break;
cparata 3:4274d9103f1d 2344 }
cparata 3:4274d9103f1d 2345
cparata 3:4274d9103f1d 2346 return ret;
cparata 0:6d69e896ce38 2347 }
cparata 0:6d69e896ce38 2348
cparata 0:6d69e896ce38 2349 /**
cparata 0:6d69e896ce38 2350 * @brief Accelerometer full-scale management between UI chain and
cparata 0:6d69e896ce38 2351 * OIS chain. When XL UI is on, the full scale is the same
cparata 0:6d69e896ce38 2352 * between UI/OIS and is chosen by the UI CTRL registers;
cparata 0:6d69e896ce38 2353 * when XL UI is in PD, the OIS can choose the FS.
cparata 0:6d69e896ce38 2354 * Full scales are independent between the UI/OIS chain
cparata 0:6d69e896ce38 2355 * but both bound to 8 g.[set]
cparata 0:6d69e896ce38 2356 *
cparata 0:6d69e896ce38 2357 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2358 * @param val change the values of xl_fs_mode in
cparata 0:6d69e896ce38 2359 * reg CTRL8_XL
cparata 0:6d69e896ce38 2360 *
cparata 0:6d69e896ce38 2361 */
cparata 0:6d69e896ce38 2362 int32_t lsm6dso_aux_xl_fs_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2363 lsm6dso_xl_fs_mode_t val)
cparata 0:6d69e896ce38 2364 {
cparata 3:4274d9103f1d 2365 lsm6dso_ctrl8_xl_t reg;
cparata 3:4274d9103f1d 2366 int32_t ret;
cparata 3:4274d9103f1d 2367
cparata 3:4274d9103f1d 2368 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2369 if (ret == 0) {
cparata 3:4274d9103f1d 2370 reg.xl_fs_mode = (uint8_t)val;
cparata 3:4274d9103f1d 2371 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2372 }
cparata 3:4274d9103f1d 2373 return ret;
cparata 0:6d69e896ce38 2374 }
cparata 0:6d69e896ce38 2375
cparata 0:6d69e896ce38 2376 /**
cparata 0:6d69e896ce38 2377 * @brief Accelerometer full-scale management between UI chain and
cparata 0:6d69e896ce38 2378 * OIS chain. When XL UI is on, the full scale is the same
cparata 0:6d69e896ce38 2379 * between UI/OIS and is chosen by the UI CTRL registers;
cparata 0:6d69e896ce38 2380 * when XL UI is in PD, the OIS can choose the FS.
cparata 0:6d69e896ce38 2381 * Full scales are independent between the UI/OIS chain
cparata 0:6d69e896ce38 2382 * but both bound to 8 g.[get]
cparata 0:6d69e896ce38 2383 *
cparata 0:6d69e896ce38 2384 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2385 * @param val Get the values of xl_fs_mode in reg CTRL8_XL
cparata 0:6d69e896ce38 2386 *
cparata 0:6d69e896ce38 2387 */
cparata 0:6d69e896ce38 2388 int32_t lsm6dso_aux_xl_fs_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2389 lsm6dso_xl_fs_mode_t *val)
cparata 0:6d69e896ce38 2390 {
cparata 3:4274d9103f1d 2391 lsm6dso_ctrl8_xl_t reg;
cparata 3:4274d9103f1d 2392 int32_t ret;
cparata 3:4274d9103f1d 2393
cparata 3:4274d9103f1d 2394 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2395 switch (reg.xl_fs_mode) {
cparata 3:4274d9103f1d 2396 case LSM6DSO_USE_SAME_XL_FS:
cparata 3:4274d9103f1d 2397 *val = LSM6DSO_USE_SAME_XL_FS;
cparata 3:4274d9103f1d 2398 break;
cparata 3:4274d9103f1d 2399 case LSM6DSO_USE_DIFFERENT_XL_FS:
cparata 3:4274d9103f1d 2400 *val = LSM6DSO_USE_DIFFERENT_XL_FS;
cparata 3:4274d9103f1d 2401 break;
cparata 3:4274d9103f1d 2402 default:
cparata 3:4274d9103f1d 2403 *val = LSM6DSO_USE_SAME_XL_FS;
cparata 3:4274d9103f1d 2404 break;
cparata 3:4274d9103f1d 2405 }
cparata 3:4274d9103f1d 2406
cparata 3:4274d9103f1d 2407 return ret;
cparata 0:6d69e896ce38 2408 }
cparata 0:6d69e896ce38 2409
cparata 0:6d69e896ce38 2410 /**
cparata 0:6d69e896ce38 2411 * @brief The STATUS_SPIAux register is read by the auxiliary SPI.[get]
cparata 0:6d69e896ce38 2412 *
cparata 0:6d69e896ce38 2413 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2414 * @param lsm6dso_status_spiaux_t: registers STATUS_SPIAUX
cparata 0:6d69e896ce38 2415 *
cparata 0:6d69e896ce38 2416 */
cparata 0:6d69e896ce38 2417 int32_t lsm6dso_aux_status_reg_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2418 lsm6dso_status_spiaux_t *val)
cparata 0:6d69e896ce38 2419 {
cparata 3:4274d9103f1d 2420 int32_t ret;
cparata 3:4274d9103f1d 2421 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *) val, 1);
cparata 3:4274d9103f1d 2422 return ret;
cparata 0:6d69e896ce38 2423 }
cparata 0:6d69e896ce38 2424
cparata 0:6d69e896ce38 2425 /**
cparata 0:6d69e896ce38 2426 * @brief aux_xl_flag_data_ready: [get] AUX accelerometer data available
cparata 0:6d69e896ce38 2427 *
cparata 0:6d69e896ce38 2428 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2429 * @param val change the values of xlda in reg STATUS_SPIAUX
cparata 0:6d69e896ce38 2430 *
cparata 0:6d69e896ce38 2431 */
cparata 0:6d69e896ce38 2432 int32_t lsm6dso_aux_xl_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 2433 {
cparata 3:4274d9103f1d 2434 lsm6dso_status_spiaux_t reg;
cparata 3:4274d9103f1d 2435 int32_t ret;
cparata 3:4274d9103f1d 2436
cparata 3:4274d9103f1d 2437 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2438 *val = reg.xlda;
cparata 3:4274d9103f1d 2439
cparata 3:4274d9103f1d 2440 return ret;
cparata 0:6d69e896ce38 2441 }
cparata 0:6d69e896ce38 2442
cparata 0:6d69e896ce38 2443 /**
cparata 0:6d69e896ce38 2444 * @brief aux_gy_flag_data_ready: [get] AUX gyroscope data available.
cparata 0:6d69e896ce38 2445 *
cparata 0:6d69e896ce38 2446 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2447 * @param val change the values of gda in reg STATUS_SPIAUX
cparata 0:6d69e896ce38 2448 *
cparata 0:6d69e896ce38 2449 */
cparata 0:6d69e896ce38 2450 int32_t lsm6dso_aux_gy_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 2451 {
cparata 3:4274d9103f1d 2452 lsm6dso_status_spiaux_t reg;
cparata 3:4274d9103f1d 2453 int32_t ret;
cparata 3:4274d9103f1d 2454
cparata 3:4274d9103f1d 2455 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2456 *val = reg.gda;
cparata 3:4274d9103f1d 2457
cparata 3:4274d9103f1d 2458 return ret;
cparata 0:6d69e896ce38 2459 }
cparata 0:6d69e896ce38 2460
cparata 0:6d69e896ce38 2461 /**
cparata 0:6d69e896ce38 2462 * @brief High when the gyroscope output is in the settling phase.[get]
cparata 0:6d69e896ce38 2463 *
cparata 0:6d69e896ce38 2464 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2465 * @param val change the values of gyro_settling in reg STATUS_SPIAUX
cparata 0:6d69e896ce38 2466 *
cparata 0:6d69e896ce38 2467 */
cparata 0:6d69e896ce38 2468 int32_t lsm6dso_aux_gy_flag_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 2469 {
cparata 3:4274d9103f1d 2470 lsm6dso_status_spiaux_t reg;
cparata 3:4274d9103f1d 2471 int32_t ret;
cparata 3:4274d9103f1d 2472
cparata 3:4274d9103f1d 2473 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2474 *val = reg.gyro_settling;
cparata 3:4274d9103f1d 2475
cparata 3:4274d9103f1d 2476 return ret;
cparata 0:6d69e896ce38 2477 }
cparata 0:6d69e896ce38 2478
cparata 0:6d69e896ce38 2479 /**
cparata 0:6d69e896ce38 2480 * @brief Selects accelerometer self-test. Effective only if XL OIS
cparata 0:6d69e896ce38 2481 * chain is enabled.[set]
cparata 0:6d69e896ce38 2482 *
cparata 0:6d69e896ce38 2483 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2484 * @param val change the values of st_xl_ois in reg INT_OIS
cparata 0:6d69e896ce38 2485 *
cparata 0:6d69e896ce38 2486 */
cparata 0:6d69e896ce38 2487 int32_t lsm6dso_aux_xl_self_test_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2488 lsm6dso_st_xl_ois_t val)
cparata 0:6d69e896ce38 2489 {
cparata 3:4274d9103f1d 2490 lsm6dso_int_ois_t reg;
cparata 3:4274d9103f1d 2491 int32_t ret;
cparata 3:4274d9103f1d 2492
cparata 3:4274d9103f1d 2493 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2494 if (ret == 0) {
cparata 3:4274d9103f1d 2495 reg.st_xl_ois = (uint8_t)val;
cparata 3:4274d9103f1d 2496 ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2497 }
cparata 3:4274d9103f1d 2498 return ret;
cparata 0:6d69e896ce38 2499 }
cparata 0:6d69e896ce38 2500
cparata 0:6d69e896ce38 2501 /**
cparata 0:6d69e896ce38 2502 * @brief Selects accelerometer self-test. Effective only if XL OIS
cparata 0:6d69e896ce38 2503 * chain is enabled.[get]
cparata 0:6d69e896ce38 2504 *
cparata 0:6d69e896ce38 2505 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2506 * @param val Get the values of st_xl_ois in reg INT_OIS
cparata 0:6d69e896ce38 2507 *
cparata 0:6d69e896ce38 2508 */
cparata 0:6d69e896ce38 2509 int32_t lsm6dso_aux_xl_self_test_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2510 lsm6dso_st_xl_ois_t *val)
cparata 0:6d69e896ce38 2511 {
cparata 3:4274d9103f1d 2512 lsm6dso_int_ois_t reg;
cparata 3:4274d9103f1d 2513 int32_t ret;
cparata 3:4274d9103f1d 2514
cparata 3:4274d9103f1d 2515 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2516 switch (reg.st_xl_ois) {
cparata 3:4274d9103f1d 2517 case LSM6DSO_AUX_XL_DISABLE:
cparata 3:4274d9103f1d 2518 *val = LSM6DSO_AUX_XL_DISABLE;
cparata 3:4274d9103f1d 2519 break;
cparata 3:4274d9103f1d 2520 case LSM6DSO_AUX_XL_POS:
cparata 3:4274d9103f1d 2521 *val = LSM6DSO_AUX_XL_POS;
cparata 3:4274d9103f1d 2522 break;
cparata 3:4274d9103f1d 2523 case LSM6DSO_AUX_XL_NEG:
cparata 3:4274d9103f1d 2524 *val = LSM6DSO_AUX_XL_NEG;
cparata 3:4274d9103f1d 2525 break;
cparata 3:4274d9103f1d 2526 default:
cparata 3:4274d9103f1d 2527 *val = LSM6DSO_AUX_XL_DISABLE;
cparata 3:4274d9103f1d 2528 break;
cparata 3:4274d9103f1d 2529 }
cparata 3:4274d9103f1d 2530 return ret;
cparata 0:6d69e896ce38 2531 }
cparata 0:6d69e896ce38 2532
cparata 0:6d69e896ce38 2533 /**
cparata 0:6d69e896ce38 2534 * @brief Indicates polarity of DEN signal on OIS chain.[set]
cparata 0:6d69e896ce38 2535 *
cparata 0:6d69e896ce38 2536 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2537 * @param val change the values of den_lh_ois in
cparata 0:6d69e896ce38 2538 * reg INT_OIS
cparata 0:6d69e896ce38 2539 *
cparata 0:6d69e896ce38 2540 */
cparata 0:6d69e896ce38 2541 int32_t lsm6dso_aux_den_polarity_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2542 lsm6dso_den_lh_ois_t val)
cparata 0:6d69e896ce38 2543 {
cparata 3:4274d9103f1d 2544 lsm6dso_int_ois_t reg;
cparata 3:4274d9103f1d 2545 int32_t ret;
cparata 3:4274d9103f1d 2546
cparata 3:4274d9103f1d 2547 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2548 if (ret == 0) {
cparata 3:4274d9103f1d 2549 reg.den_lh_ois = (uint8_t)val;
cparata 3:4274d9103f1d 2550 ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2551 }
cparata 3:4274d9103f1d 2552 return ret;
cparata 0:6d69e896ce38 2553 }
cparata 0:6d69e896ce38 2554
cparata 0:6d69e896ce38 2555 /**
cparata 0:6d69e896ce38 2556 * @brief Indicates polarity of DEN signal on OIS chain.[get]
cparata 0:6d69e896ce38 2557 *
cparata 0:6d69e896ce38 2558 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2559 * @param val Get the values of den_lh_ois in reg INT_OIS
cparata 0:6d69e896ce38 2560 *
cparata 0:6d69e896ce38 2561 */
cparata 0:6d69e896ce38 2562 int32_t lsm6dso_aux_den_polarity_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2563 lsm6dso_den_lh_ois_t *val)
cparata 0:6d69e896ce38 2564 {
cparata 3:4274d9103f1d 2565 lsm6dso_int_ois_t reg;
cparata 3:4274d9103f1d 2566 int32_t ret;
cparata 3:4274d9103f1d 2567
cparata 3:4274d9103f1d 2568 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2569 switch (reg.den_lh_ois) {
cparata 3:4274d9103f1d 2570 case LSM6DSO_AUX_DEN_ACTIVE_LOW:
cparata 3:4274d9103f1d 2571 *val = LSM6DSO_AUX_DEN_ACTIVE_LOW;
cparata 3:4274d9103f1d 2572 break;
cparata 3:4274d9103f1d 2573 case LSM6DSO_AUX_DEN_ACTIVE_HIGH:
cparata 3:4274d9103f1d 2574 *val = LSM6DSO_AUX_DEN_ACTIVE_HIGH;
cparata 3:4274d9103f1d 2575 break;
cparata 3:4274d9103f1d 2576 default:
cparata 3:4274d9103f1d 2577 *val = LSM6DSO_AUX_DEN_ACTIVE_LOW;
cparata 3:4274d9103f1d 2578 break;
cparata 3:4274d9103f1d 2579 }
cparata 3:4274d9103f1d 2580 return ret;
cparata 0:6d69e896ce38 2581 }
cparata 0:6d69e896ce38 2582
cparata 0:6d69e896ce38 2583 /**
cparata 0:6d69e896ce38 2584 * @brief Configure DEN mode on the OIS chain.[set]
cparata 0:6d69e896ce38 2585 *
cparata 0:6d69e896ce38 2586 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2587 * @param val change the values of lvl2_ois in reg INT_OIS
cparata 0:6d69e896ce38 2588 *
cparata 0:6d69e896ce38 2589 */
cparata 0:6d69e896ce38 2590 int32_t lsm6dso_aux_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t val)
cparata 0:6d69e896ce38 2591 {
cparata 3:4274d9103f1d 2592 lsm6dso_ctrl1_ois_t ctrl1_ois;
cparata 3:4274d9103f1d 2593 lsm6dso_int_ois_t int_ois;
cparata 3:4274d9103f1d 2594 int32_t ret;
cparata 3:4274d9103f1d 2595
cparata 3:4274d9103f1d 2596 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
cparata 3:4274d9103f1d 2597 if (ret == 0) {
cparata 3:4274d9103f1d 2598 int_ois.lvl2_ois = (uint8_t)val & 0x01U;
cparata 3:4274d9103f1d 2599 ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
cparata 3:4274d9103f1d 2600 }
cparata 3:4274d9103f1d 2601 if (ret == 0) {
cparata 3:4274d9103f1d 2602 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois, 1);
cparata 3:4274d9103f1d 2603 }
cparata 3:4274d9103f1d 2604 if (ret == 0) {
cparata 3:4274d9103f1d 2605 ctrl1_ois.lvl1_ois = ((uint8_t)val & 0x02U) >> 1;
cparata 3:4274d9103f1d 2606 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois, 1);
cparata 3:4274d9103f1d 2607 }
cparata 3:4274d9103f1d 2608 return ret;
cparata 0:6d69e896ce38 2609 }
cparata 0:6d69e896ce38 2610
cparata 0:6d69e896ce38 2611 /**
cparata 0:6d69e896ce38 2612 * @brief Configure DEN mode on the OIS chain.[get]
cparata 0:6d69e896ce38 2613 *
cparata 0:6d69e896ce38 2614 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2615 * @param val Get the values of lvl2_ois in reg INT_OIS
cparata 0:6d69e896ce38 2616 *
cparata 0:6d69e896ce38 2617 */
cparata 0:6d69e896ce38 2618 int32_t lsm6dso_aux_den_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t *val)
cparata 0:6d69e896ce38 2619 {
cparata 3:4274d9103f1d 2620 lsm6dso_ctrl1_ois_t ctrl1_ois;
cparata 3:4274d9103f1d 2621 lsm6dso_int_ois_t int_ois;
cparata 3:4274d9103f1d 2622 int32_t ret;
cparata 3:4274d9103f1d 2623
cparata 3:4274d9103f1d 2624 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
cparata 3:4274d9103f1d 2625 if (ret == 0) {
cparata 3:4274d9103f1d 2626 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois, 1);
cparata 3:4274d9103f1d 2627 switch ((ctrl1_ois.lvl1_ois << 1) + int_ois.lvl2_ois) {
cparata 3:4274d9103f1d 2628 case LSM6DSO_AUX_DEN_DISABLE:
cparata 3:4274d9103f1d 2629 *val = LSM6DSO_AUX_DEN_DISABLE;
cparata 3:4274d9103f1d 2630 break;
cparata 3:4274d9103f1d 2631 case LSM6DSO_AUX_DEN_LEVEL_LATCH:
cparata 3:4274d9103f1d 2632 *val = LSM6DSO_AUX_DEN_LEVEL_LATCH;
cparata 3:4274d9103f1d 2633 break;
cparata 3:4274d9103f1d 2634 case LSM6DSO_AUX_DEN_LEVEL_TRIG:
cparata 3:4274d9103f1d 2635 *val = LSM6DSO_AUX_DEN_LEVEL_TRIG;
cparata 3:4274d9103f1d 2636 break;
cparata 3:4274d9103f1d 2637 default:
cparata 3:4274d9103f1d 2638 *val = LSM6DSO_AUX_DEN_DISABLE;
cparata 3:4274d9103f1d 2639 break;
cparata 3:4274d9103f1d 2640 }
cparata 3:4274d9103f1d 2641 }
cparata 3:4274d9103f1d 2642 return ret;
cparata 0:6d69e896ce38 2643 }
cparata 0:6d69e896ce38 2644
cparata 0:6d69e896ce38 2645 /**
cparata 0:6d69e896ce38 2646 * @brief Enables/Disable OIS chain DRDY on INT2 pin.
cparata 0:6d69e896ce38 2647 * This setting has priority over all other INT2 settings.[set]
cparata 0:6d69e896ce38 2648 *
cparata 0:6d69e896ce38 2649 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2650 * @param val change the values of int2_drdy_ois in reg INT_OIS
cparata 0:6d69e896ce38 2651 *
cparata 0:6d69e896ce38 2652 */
cparata 0:6d69e896ce38 2653 int32_t lsm6dso_aux_drdy_on_int2_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 2654 {
cparata 3:4274d9103f1d 2655 lsm6dso_int_ois_t reg;
cparata 3:4274d9103f1d 2656 int32_t ret;
cparata 3:4274d9103f1d 2657
cparata 3:4274d9103f1d 2658 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2659 if (ret == 0) {
cparata 3:4274d9103f1d 2660 reg.int2_drdy_ois = val;
cparata 3:4274d9103f1d 2661 ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2662 }
cparata 3:4274d9103f1d 2663 return ret;
cparata 0:6d69e896ce38 2664 }
cparata 0:6d69e896ce38 2665
cparata 0:6d69e896ce38 2666 /**
cparata 0:6d69e896ce38 2667 * @brief Enables/Disable OIS chain DRDY on INT2 pin.
cparata 0:6d69e896ce38 2668 * This setting has priority over all other INT2 settings.[get]
cparata 0:6d69e896ce38 2669 *
cparata 0:6d69e896ce38 2670 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2671 * @param val change the values of int2_drdy_ois in reg INT_OIS
cparata 0:6d69e896ce38 2672 *
cparata 0:6d69e896ce38 2673 */
cparata 0:6d69e896ce38 2674 int32_t lsm6dso_aux_drdy_on_int2_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 2675 {
cparata 3:4274d9103f1d 2676 lsm6dso_int_ois_t reg;
cparata 3:4274d9103f1d 2677 int32_t ret;
cparata 3:4274d9103f1d 2678
cparata 3:4274d9103f1d 2679 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2680 *val = reg.int2_drdy_ois;
cparata 3:4274d9103f1d 2681
cparata 3:4274d9103f1d 2682 return ret;
cparata 0:6d69e896ce38 2683 }
cparata 0:6d69e896ce38 2684
cparata 0:6d69e896ce38 2685 /**
cparata 0:6d69e896ce38 2686 * @brief Enables OIS chain data processing for gyro in Mode 3 and Mode 4
cparata 0:6d69e896ce38 2687 * (mode4_en = 1) and accelerometer data in and Mode 4 (mode4_en = 1).
cparata 0:6d69e896ce38 2688 * When the OIS chain is enabled, the OIS outputs are available
cparata 0:6d69e896ce38 2689 * through the SPI2 in registers OUTX_L_G (22h) through
cparata 0:6d69e896ce38 2690 * OUTZ_H_G (27h) and STATUS_REG (1Eh) / STATUS_SPIAux, and
cparata 0:6d69e896ce38 2691 * LPF1 is dedicated to this chain.[set]
cparata 0:6d69e896ce38 2692 *
cparata 0:6d69e896ce38 2693 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2694 * @param val change the values of ois_en_spi2 in
cparata 0:6d69e896ce38 2695 * reg CTRL1_OIS
cparata 0:6d69e896ce38 2696 *
cparata 0:6d69e896ce38 2697 */
cparata 0:6d69e896ce38 2698 int32_t lsm6dso_aux_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t val)
cparata 0:6d69e896ce38 2699 {
cparata 3:4274d9103f1d 2700 lsm6dso_ctrl1_ois_t reg;
cparata 3:4274d9103f1d 2701 int32_t ret;
cparata 3:4274d9103f1d 2702
cparata 3:4274d9103f1d 2703 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2704 if (ret == 0) {
cparata 3:4274d9103f1d 2705 reg.ois_en_spi2 = (uint8_t)val & 0x01U;
cparata 3:4274d9103f1d 2706 reg.mode4_en = ((uint8_t)val & 0x02U) >> 1;
cparata 3:4274d9103f1d 2707 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2708 }
cparata 3:4274d9103f1d 2709 return ret;
cparata 0:6d69e896ce38 2710 }
cparata 0:6d69e896ce38 2711
cparata 0:6d69e896ce38 2712 /**
cparata 0:6d69e896ce38 2713 * @brief Enables OIS chain data processing for gyro in Mode 3 and Mode 4
cparata 0:6d69e896ce38 2714 * (mode4_en = 1) and accelerometer data in and Mode 4 (mode4_en = 1).
cparata 0:6d69e896ce38 2715 * When the OIS chain is enabled, the OIS outputs are available
cparata 0:6d69e896ce38 2716 * through the SPI2 in registers OUTX_L_G (22h) through
cparata 0:6d69e896ce38 2717 * OUTZ_H_G (27h) and STATUS_REG (1Eh) / STATUS_SPIAux, and
cparata 0:6d69e896ce38 2718 * LPF1 is dedicated to this chain.[get]
cparata 0:6d69e896ce38 2719 *
cparata 0:6d69e896ce38 2720 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2721 * @param val Get the values of ois_en_spi2 in
cparata 0:6d69e896ce38 2722 * reg CTRL1_OIS
cparata 0:6d69e896ce38 2723 *
cparata 0:6d69e896ce38 2724 */
cparata 0:6d69e896ce38 2725 int32_t lsm6dso_aux_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t *val)
cparata 0:6d69e896ce38 2726 {
cparata 3:4274d9103f1d 2727 lsm6dso_ctrl1_ois_t reg;
cparata 3:4274d9103f1d 2728 int32_t ret;
cparata 3:4274d9103f1d 2729
cparata 3:4274d9103f1d 2730 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2731 switch ((reg.mode4_en << 1) | reg.ois_en_spi2) {
cparata 3:4274d9103f1d 2732 case LSM6DSO_AUX_DISABLE:
cparata 3:4274d9103f1d 2733 *val = LSM6DSO_AUX_DISABLE;
cparata 3:4274d9103f1d 2734 break;
cparata 3:4274d9103f1d 2735 case LSM6DSO_MODE_3_GY:
cparata 3:4274d9103f1d 2736 *val = LSM6DSO_MODE_3_GY;
cparata 3:4274d9103f1d 2737 break;
cparata 3:4274d9103f1d 2738 case LSM6DSO_MODE_4_GY_XL:
cparata 3:4274d9103f1d 2739 *val = LSM6DSO_MODE_4_GY_XL;
cparata 3:4274d9103f1d 2740 break;
cparata 3:4274d9103f1d 2741 default:
cparata 3:4274d9103f1d 2742 *val = LSM6DSO_AUX_DISABLE;
cparata 3:4274d9103f1d 2743 break;
cparata 3:4274d9103f1d 2744 }
cparata 3:4274d9103f1d 2745 return ret;
cparata 0:6d69e896ce38 2746 }
cparata 0:6d69e896ce38 2747
cparata 0:6d69e896ce38 2748 /**
cparata 0:6d69e896ce38 2749 * @brief Selects gyroscope OIS chain full-scale.[set]
cparata 0:6d69e896ce38 2750 *
cparata 0:6d69e896ce38 2751 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2752 * @param val change the values of fs_g_ois in reg CTRL1_OIS
cparata 0:6d69e896ce38 2753 *
cparata 0:6d69e896ce38 2754 */
cparata 0:6d69e896ce38 2755 int32_t lsm6dso_aux_gy_full_scale_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2756 lsm6dso_fs_g_ois_t val)
cparata 0:6d69e896ce38 2757 {
cparata 3:4274d9103f1d 2758 lsm6dso_ctrl1_ois_t reg;
cparata 3:4274d9103f1d 2759 int32_t ret;
cparata 3:4274d9103f1d 2760
cparata 3:4274d9103f1d 2761 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2762 if (ret == 0) {
cparata 3:4274d9103f1d 2763 reg.fs_g_ois = (uint8_t)val;
cparata 3:4274d9103f1d 2764 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2765 }
cparata 3:4274d9103f1d 2766 return ret;
cparata 0:6d69e896ce38 2767 }
cparata 0:6d69e896ce38 2768
cparata 0:6d69e896ce38 2769 /**
cparata 0:6d69e896ce38 2770 * @brief Selects gyroscope OIS chain full-scale.[get]
cparata 0:6d69e896ce38 2771 *
cparata 0:6d69e896ce38 2772 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2773 * @param val Get the values of fs_g_ois in reg CTRL1_OIS
cparata 0:6d69e896ce38 2774 *
cparata 0:6d69e896ce38 2775 */
cparata 0:6d69e896ce38 2776 int32_t lsm6dso_aux_gy_full_scale_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2777 lsm6dso_fs_g_ois_t *val)
cparata 0:6d69e896ce38 2778 {
cparata 3:4274d9103f1d 2779 lsm6dso_ctrl1_ois_t reg;
cparata 3:4274d9103f1d 2780 int32_t ret;
cparata 3:4274d9103f1d 2781
cparata 3:4274d9103f1d 2782 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2783 switch (reg.fs_g_ois) {
cparata 3:4274d9103f1d 2784 case LSM6DSO_250dps_AUX:
cparata 3:4274d9103f1d 2785 *val = LSM6DSO_250dps_AUX;
cparata 3:4274d9103f1d 2786 break;
cparata 3:4274d9103f1d 2787 case LSM6DSO_125dps_AUX:
cparata 3:4274d9103f1d 2788 *val = LSM6DSO_125dps_AUX;
cparata 3:4274d9103f1d 2789 break;
cparata 3:4274d9103f1d 2790 case LSM6DSO_500dps_AUX:
cparata 3:4274d9103f1d 2791 *val = LSM6DSO_500dps_AUX;
cparata 3:4274d9103f1d 2792 break;
cparata 3:4274d9103f1d 2793 case LSM6DSO_1000dps_AUX:
cparata 3:4274d9103f1d 2794 *val = LSM6DSO_1000dps_AUX;
cparata 3:4274d9103f1d 2795 break;
cparata 3:4274d9103f1d 2796 case LSM6DSO_2000dps_AUX:
cparata 3:4274d9103f1d 2797 *val = LSM6DSO_2000dps_AUX;
cparata 3:4274d9103f1d 2798 break;
cparata 3:4274d9103f1d 2799 default:
cparata 3:4274d9103f1d 2800 *val = LSM6DSO_250dps_AUX;
cparata 3:4274d9103f1d 2801 break;
cparata 3:4274d9103f1d 2802 }
cparata 3:4274d9103f1d 2803 return ret;
cparata 0:6d69e896ce38 2804 }
cparata 0:6d69e896ce38 2805
cparata 0:6d69e896ce38 2806 /**
cparata 0:6d69e896ce38 2807 * @brief SPI2 3- or 4-wire interface.[set]
cparata 0:6d69e896ce38 2808 *
cparata 0:6d69e896ce38 2809 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2810 * @param val change the values of sim_ois in reg CTRL1_OIS
cparata 0:6d69e896ce38 2811 *
cparata 0:6d69e896ce38 2812 */
cparata 0:6d69e896ce38 2813 int32_t lsm6dso_aux_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t val)
cparata 0:6d69e896ce38 2814 {
cparata 3:4274d9103f1d 2815 lsm6dso_ctrl1_ois_t reg;
cparata 3:4274d9103f1d 2816 int32_t ret;
cparata 3:4274d9103f1d 2817
cparata 3:4274d9103f1d 2818 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2819 if (ret == 0) {
cparata 3:4274d9103f1d 2820 reg.sim_ois = (uint8_t)val;
cparata 3:4274d9103f1d 2821 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2822 }
cparata 3:4274d9103f1d 2823 return ret;
cparata 0:6d69e896ce38 2824 }
cparata 0:6d69e896ce38 2825
cparata 0:6d69e896ce38 2826 /**
cparata 0:6d69e896ce38 2827 * @brief SPI2 3- or 4-wire interface.[get]
cparata 0:6d69e896ce38 2828 *
cparata 0:6d69e896ce38 2829 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2830 * @param val Get the values of sim_ois in reg CTRL1_OIS
cparata 0:6d69e896ce38 2831 *
cparata 0:6d69e896ce38 2832 */
cparata 0:6d69e896ce38 2833 int32_t lsm6dso_aux_spi_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t *val)
cparata 0:6d69e896ce38 2834 {
cparata 3:4274d9103f1d 2835 lsm6dso_ctrl1_ois_t reg;
cparata 3:4274d9103f1d 2836 int32_t ret;
cparata 3:4274d9103f1d 2837
cparata 3:4274d9103f1d 2838 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2839 switch (reg.sim_ois) {
cparata 3:4274d9103f1d 2840 case LSM6DSO_AUX_SPI_4_WIRE:
cparata 3:4274d9103f1d 2841 *val = LSM6DSO_AUX_SPI_4_WIRE;
cparata 3:4274d9103f1d 2842 break;
cparata 3:4274d9103f1d 2843 case LSM6DSO_AUX_SPI_3_WIRE:
cparata 3:4274d9103f1d 2844 *val = LSM6DSO_AUX_SPI_3_WIRE;
cparata 3:4274d9103f1d 2845 break;
cparata 3:4274d9103f1d 2846 default:
cparata 3:4274d9103f1d 2847 *val = LSM6DSO_AUX_SPI_4_WIRE;
cparata 3:4274d9103f1d 2848 break;
cparata 3:4274d9103f1d 2849 }
cparata 3:4274d9103f1d 2850 return ret;
cparata 0:6d69e896ce38 2851 }
cparata 0:6d69e896ce38 2852
cparata 0:6d69e896ce38 2853 /**
cparata 0:6d69e896ce38 2854 * @brief Selects gyroscope digital LPF1 filter bandwidth.[set]
cparata 0:6d69e896ce38 2855 *
cparata 0:6d69e896ce38 2856 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2857 * @param val change the values of ftype_ois in
cparata 0:6d69e896ce38 2858 * reg CTRL2_OIS
cparata 0:6d69e896ce38 2859 *
cparata 0:6d69e896ce38 2860 */
cparata 0:6d69e896ce38 2861 int32_t lsm6dso_aux_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2862 lsm6dso_ftype_ois_t val)
cparata 0:6d69e896ce38 2863 {
cparata 3:4274d9103f1d 2864 lsm6dso_ctrl2_ois_t reg;
cparata 3:4274d9103f1d 2865 int32_t ret;
cparata 3:4274d9103f1d 2866
cparata 3:4274d9103f1d 2867 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2868 if (ret == 0) {
cparata 3:4274d9103f1d 2869 reg.ftype_ois = (uint8_t)val;
cparata 3:4274d9103f1d 2870 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2871 }
cparata 3:4274d9103f1d 2872 return ret;
cparata 0:6d69e896ce38 2873 }
cparata 0:6d69e896ce38 2874
cparata 0:6d69e896ce38 2875 /**
cparata 0:6d69e896ce38 2876 * @brief Selects gyroscope digital LPF1 filter bandwidth.[get]
cparata 0:6d69e896ce38 2877 *
cparata 0:6d69e896ce38 2878 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2879 * @param val Get the values of ftype_ois in reg CTRL2_OIS
cparata 0:6d69e896ce38 2880 *
cparata 0:6d69e896ce38 2881 */
cparata 0:6d69e896ce38 2882 int32_t lsm6dso_aux_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2883 lsm6dso_ftype_ois_t *val)
cparata 0:6d69e896ce38 2884 {
cparata 3:4274d9103f1d 2885 lsm6dso_ctrl2_ois_t reg;
cparata 3:4274d9103f1d 2886 int32_t ret;
cparata 3:4274d9103f1d 2887
cparata 3:4274d9103f1d 2888 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2889 switch (reg.ftype_ois) {
cparata 3:4274d9103f1d 2890 case LSM6DSO_351Hz39:
cparata 3:4274d9103f1d 2891 *val = LSM6DSO_351Hz39;
cparata 3:4274d9103f1d 2892 break;
cparata 3:4274d9103f1d 2893 case LSM6DSO_236Hz63:
cparata 3:4274d9103f1d 2894 *val = LSM6DSO_236Hz63;
cparata 3:4274d9103f1d 2895 break;
cparata 3:4274d9103f1d 2896 case LSM6DSO_172Hz70:
cparata 3:4274d9103f1d 2897 *val = LSM6DSO_172Hz70;
cparata 3:4274d9103f1d 2898 break;
cparata 3:4274d9103f1d 2899 case LSM6DSO_937Hz91:
cparata 3:4274d9103f1d 2900 *val = LSM6DSO_937Hz91;
cparata 3:4274d9103f1d 2901 break;
cparata 3:4274d9103f1d 2902 default:
cparata 3:4274d9103f1d 2903 *val = LSM6DSO_351Hz39;
cparata 3:4274d9103f1d 2904 break;
cparata 3:4274d9103f1d 2905 }
cparata 3:4274d9103f1d 2906 return ret;
cparata 0:6d69e896ce38 2907 }
cparata 0:6d69e896ce38 2908
cparata 0:6d69e896ce38 2909 /**
cparata 0:6d69e896ce38 2910 * @brief Selects gyroscope OIS chain digital high-pass filter cutoff.[set]
cparata 0:6d69e896ce38 2911 *
cparata 0:6d69e896ce38 2912 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2913 * @param val change the values of hpm_ois in reg CTRL2_OIS
cparata 0:6d69e896ce38 2914 *
cparata 0:6d69e896ce38 2915 */
cparata 0:6d69e896ce38 2916 int32_t lsm6dso_aux_gy_hp_bandwidth_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2917 lsm6dso_hpm_ois_t val)
cparata 0:6d69e896ce38 2918 {
cparata 3:4274d9103f1d 2919 lsm6dso_ctrl2_ois_t reg;
cparata 3:4274d9103f1d 2920 int32_t ret;
cparata 3:4274d9103f1d 2921
cparata 3:4274d9103f1d 2922 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2923 if (ret == 0) {
cparata 3:4274d9103f1d 2924 reg.hpm_ois = (uint8_t)val & 0x03U;
cparata 3:4274d9103f1d 2925 reg.hp_en_ois = ((uint8_t)val & 0x10U) >> 4;
cparata 3:4274d9103f1d 2926 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2927 }
cparata 3:4274d9103f1d 2928 return ret;
cparata 0:6d69e896ce38 2929 }
cparata 0:6d69e896ce38 2930
cparata 0:6d69e896ce38 2931 /**
cparata 0:6d69e896ce38 2932 * @brief Selects gyroscope OIS chain digital high-pass filter cutoff.[get]
cparata 0:6d69e896ce38 2933 *
cparata 0:6d69e896ce38 2934 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2935 * @param val Get the values of hpm_ois in reg CTRL2_OIS
cparata 0:6d69e896ce38 2936 *
cparata 0:6d69e896ce38 2937 */
cparata 0:6d69e896ce38 2938 int32_t lsm6dso_aux_gy_hp_bandwidth_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2939 lsm6dso_hpm_ois_t *val)
cparata 0:6d69e896ce38 2940 {
cparata 3:4274d9103f1d 2941 lsm6dso_ctrl2_ois_t reg;
cparata 3:4274d9103f1d 2942 int32_t ret;
cparata 3:4274d9103f1d 2943
cparata 3:4274d9103f1d 2944 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2945 switch ((reg.hp_en_ois << 4) | reg.hpm_ois) {
cparata 3:4274d9103f1d 2946 case LSM6DSO_AUX_HP_DISABLE:
cparata 3:4274d9103f1d 2947 *val = LSM6DSO_AUX_HP_DISABLE;
cparata 3:4274d9103f1d 2948 break;
cparata 3:4274d9103f1d 2949 case LSM6DSO_AUX_HP_Hz016:
cparata 3:4274d9103f1d 2950 *val = LSM6DSO_AUX_HP_Hz016;
cparata 3:4274d9103f1d 2951 break;
cparata 3:4274d9103f1d 2952 case LSM6DSO_AUX_HP_Hz065:
cparata 3:4274d9103f1d 2953 *val = LSM6DSO_AUX_HP_Hz065;
cparata 3:4274d9103f1d 2954 break;
cparata 3:4274d9103f1d 2955 case LSM6DSO_AUX_HP_Hz260:
cparata 3:4274d9103f1d 2956 *val = LSM6DSO_AUX_HP_Hz260;
cparata 3:4274d9103f1d 2957 break;
cparata 3:4274d9103f1d 2958 case LSM6DSO_AUX_HP_1Hz040:
cparata 3:4274d9103f1d 2959 *val = LSM6DSO_AUX_HP_1Hz040;
cparata 3:4274d9103f1d 2960 break;
cparata 3:4274d9103f1d 2961 default:
cparata 3:4274d9103f1d 2962 *val = LSM6DSO_AUX_HP_DISABLE;
cparata 3:4274d9103f1d 2963 break;
cparata 3:4274d9103f1d 2964 }
cparata 3:4274d9103f1d 2965 return ret;
cparata 0:6d69e896ce38 2966 }
cparata 0:6d69e896ce38 2967
cparata 0:6d69e896ce38 2968 /**
cparata 0:6d69e896ce38 2969 * @brief Enable / Disables OIS chain clamp.
cparata 0:6d69e896ce38 2970 * Enable: All OIS chain outputs = 8000h
cparata 0:6d69e896ce38 2971 * during self-test; Disable: OIS chain self-test
cparata 0:6d69e896ce38 2972 * outputs dependent from the aux gyro full
cparata 0:6d69e896ce38 2973 * scale selected.[set]
cparata 0:6d69e896ce38 2974 *
cparata 0:6d69e896ce38 2975 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2976 * @param val change the values of st_ois_clampdis in
cparata 0:6d69e896ce38 2977 * reg CTRL3_OIS
cparata 0:6d69e896ce38 2978 *
cparata 0:6d69e896ce38 2979 */
cparata 0:6d69e896ce38 2980 int32_t lsm6dso_aux_gy_clamp_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2981 lsm6dso_st_ois_clampdis_t val)
cparata 0:6d69e896ce38 2982 {
cparata 3:4274d9103f1d 2983 lsm6dso_ctrl3_ois_t reg;
cparata 3:4274d9103f1d 2984 int32_t ret;
cparata 3:4274d9103f1d 2985
cparata 3:4274d9103f1d 2986 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2987 if (ret == 0) {
cparata 3:4274d9103f1d 2988 reg.st_ois_clampdis = (uint8_t)val;
cparata 3:4274d9103f1d 2989 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 2990 }
cparata 3:4274d9103f1d 2991 return ret;
cparata 0:6d69e896ce38 2992 }
cparata 0:6d69e896ce38 2993
cparata 0:6d69e896ce38 2994 /**
cparata 0:6d69e896ce38 2995 * @brief Enable / Disables OIS chain clamp.
cparata 0:6d69e896ce38 2996 * Enable: All OIS chain outputs = 8000h
cparata 0:6d69e896ce38 2997 * during self-test; Disable: OIS chain self-test
cparata 0:6d69e896ce38 2998 * outputs dependent from the aux gyro full
cparata 0:6d69e896ce38 2999 * scale selected.[set]
cparata 0:6d69e896ce38 3000 *
cparata 0:6d69e896ce38 3001 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3002 * @param val Get the values of st_ois_clampdis in
cparata 0:6d69e896ce38 3003 * reg CTRL3_OIS
cparata 0:6d69e896ce38 3004 *
cparata 0:6d69e896ce38 3005 */
cparata 0:6d69e896ce38 3006 int32_t lsm6dso_aux_gy_clamp_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 3007 lsm6dso_st_ois_clampdis_t *val)
cparata 0:6d69e896ce38 3008 {
cparata 3:4274d9103f1d 3009 lsm6dso_ctrl3_ois_t reg;
cparata 3:4274d9103f1d 3010 int32_t ret;
cparata 3:4274d9103f1d 3011
cparata 3:4274d9103f1d 3012 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3013 switch (reg.st_ois_clampdis) {
cparata 3:4274d9103f1d 3014 case LSM6DSO_ENABLE_CLAMP:
cparata 3:4274d9103f1d 3015 *val = LSM6DSO_ENABLE_CLAMP;
cparata 3:4274d9103f1d 3016 break;
cparata 3:4274d9103f1d 3017 case LSM6DSO_DISABLE_CLAMP:
cparata 3:4274d9103f1d 3018 *val = LSM6DSO_DISABLE_CLAMP;
cparata 3:4274d9103f1d 3019 break;
cparata 3:4274d9103f1d 3020 default:
cparata 3:4274d9103f1d 3021 *val = LSM6DSO_ENABLE_CLAMP;
cparata 3:4274d9103f1d 3022 break;
cparata 3:4274d9103f1d 3023 }
cparata 3:4274d9103f1d 3024 return ret;
cparata 0:6d69e896ce38 3025 }
cparata 0:6d69e896ce38 3026
cparata 0:6d69e896ce38 3027 /**
cparata 0:6d69e896ce38 3028 * @brief Selects gyroscope OIS chain self-test.[set]
cparata 0:6d69e896ce38 3029 *
cparata 0:6d69e896ce38 3030 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3031 * @param val change the values of st_ois in reg CTRL3_OIS
cparata 0:6d69e896ce38 3032 *
cparata 0:6d69e896ce38 3033 */
cparata 0:6d69e896ce38 3034 int32_t lsm6dso_aux_gy_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_ois_t val)
cparata 0:6d69e896ce38 3035 {
cparata 3:4274d9103f1d 3036 lsm6dso_ctrl3_ois_t reg;
cparata 3:4274d9103f1d 3037 int32_t ret;
cparata 3:4274d9103f1d 3038
cparata 3:4274d9103f1d 3039 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3040 if (ret == 0) {
cparata 3:4274d9103f1d 3041 reg.st_ois = (uint8_t)val;
cparata 3:4274d9103f1d 3042 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3043 }
cparata 3:4274d9103f1d 3044 return ret;
cparata 0:6d69e896ce38 3045 }
cparata 0:6d69e896ce38 3046
cparata 0:6d69e896ce38 3047 /**
cparata 0:6d69e896ce38 3048 * @brief Selects gyroscope OIS chain self-test.[get]
cparata 0:6d69e896ce38 3049 *
cparata 0:6d69e896ce38 3050 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3051 * @param val Get the values of st_ois in reg CTRL3_OIS
cparata 0:6d69e896ce38 3052 *
cparata 0:6d69e896ce38 3053 */
cparata 0:6d69e896ce38 3054 int32_t lsm6dso_aux_gy_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_ois_t *val)
cparata 0:6d69e896ce38 3055 {
cparata 3:4274d9103f1d 3056 lsm6dso_ctrl3_ois_t reg;
cparata 3:4274d9103f1d 3057 int32_t ret;
cparata 3:4274d9103f1d 3058
cparata 3:4274d9103f1d 3059 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3060 switch (reg.st_ois) {
cparata 3:4274d9103f1d 3061 case LSM6DSO_AUX_GY_DISABLE:
cparata 3:4274d9103f1d 3062 *val = LSM6DSO_AUX_GY_DISABLE;
cparata 3:4274d9103f1d 3063 break;
cparata 3:4274d9103f1d 3064 case LSM6DSO_AUX_GY_POS:
cparata 3:4274d9103f1d 3065 *val = LSM6DSO_AUX_GY_POS;
cparata 3:4274d9103f1d 3066 break;
cparata 3:4274d9103f1d 3067 case LSM6DSO_AUX_GY_NEG:
cparata 3:4274d9103f1d 3068 *val = LSM6DSO_AUX_GY_NEG;
cparata 3:4274d9103f1d 3069 break;
cparata 3:4274d9103f1d 3070 default:
cparata 3:4274d9103f1d 3071 *val = LSM6DSO_AUX_GY_DISABLE;
cparata 3:4274d9103f1d 3072 break;
cparata 3:4274d9103f1d 3073 }
cparata 3:4274d9103f1d 3074 return ret;
cparata 0:6d69e896ce38 3075 }
cparata 0:6d69e896ce38 3076
cparata 0:6d69e896ce38 3077 /**
cparata 0:6d69e896ce38 3078 * @brief Selects accelerometer OIS channel bandwidth.[set]
cparata 0:6d69e896ce38 3079 *
cparata 0:6d69e896ce38 3080 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3081 * @param val change the values of
cparata 0:6d69e896ce38 3082 * filter_xl_conf_ois in reg CTRL3_OIS
cparata 0:6d69e896ce38 3083 *
cparata 0:6d69e896ce38 3084 */
cparata 0:6d69e896ce38 3085 int32_t lsm6dso_aux_xl_bandwidth_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 3086 lsm6dso_filter_xl_conf_ois_t val)
cparata 0:6d69e896ce38 3087 {
cparata 3:4274d9103f1d 3088 lsm6dso_ctrl3_ois_t reg;
cparata 3:4274d9103f1d 3089 int32_t ret;
cparata 3:4274d9103f1d 3090
cparata 3:4274d9103f1d 3091 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3092 if (ret == 0) {
cparata 3:4274d9103f1d 3093 reg.filter_xl_conf_ois = (uint8_t)val;
cparata 3:4274d9103f1d 3094 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3095 }
cparata 3:4274d9103f1d 3096 return ret;
cparata 0:6d69e896ce38 3097 }
cparata 0:6d69e896ce38 3098
cparata 0:6d69e896ce38 3099 /**
cparata 0:6d69e896ce38 3100 * @brief Selects accelerometer OIS channel bandwidth.[get]
cparata 0:6d69e896ce38 3101 *
cparata 0:6d69e896ce38 3102 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3103 * @param val Get the values of
cparata 0:6d69e896ce38 3104 * filter_xl_conf_ois in reg CTRL3_OIS
cparata 0:6d69e896ce38 3105 *
cparata 0:6d69e896ce38 3106 */
cparata 0:6d69e896ce38 3107 int32_t lsm6dso_aux_xl_bandwidth_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 3108 lsm6dso_filter_xl_conf_ois_t *val)
cparata 0:6d69e896ce38 3109 {
cparata 3:4274d9103f1d 3110 lsm6dso_ctrl3_ois_t reg;
cparata 3:4274d9103f1d 3111 int32_t ret;
cparata 3:4274d9103f1d 3112
cparata 3:4274d9103f1d 3113 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3114
cparata 3:4274d9103f1d 3115 switch (reg.filter_xl_conf_ois) {
cparata 3:4274d9103f1d 3116 case LSM6DSO_289Hz:
cparata 3:4274d9103f1d 3117 *val = LSM6DSO_289Hz;
cparata 3:4274d9103f1d 3118 break;
cparata 3:4274d9103f1d 3119 case LSM6DSO_258Hz:
cparata 3:4274d9103f1d 3120 *val = LSM6DSO_258Hz;
cparata 3:4274d9103f1d 3121 break;
cparata 3:4274d9103f1d 3122 case LSM6DSO_120Hz:
cparata 3:4274d9103f1d 3123 *val = LSM6DSO_120Hz;
cparata 3:4274d9103f1d 3124 break;
cparata 3:4274d9103f1d 3125 case LSM6DSO_65Hz2:
cparata 3:4274d9103f1d 3126 *val = LSM6DSO_65Hz2;
cparata 3:4274d9103f1d 3127 break;
cparata 3:4274d9103f1d 3128 case LSM6DSO_33Hz2:
cparata 3:4274d9103f1d 3129 *val = LSM6DSO_33Hz2;
cparata 3:4274d9103f1d 3130 break;
cparata 3:4274d9103f1d 3131 case LSM6DSO_16Hz6:
cparata 3:4274d9103f1d 3132 *val = LSM6DSO_16Hz6;
cparata 3:4274d9103f1d 3133 break;
cparata 3:4274d9103f1d 3134 case LSM6DSO_8Hz30:
cparata 3:4274d9103f1d 3135 *val = LSM6DSO_8Hz30;
cparata 3:4274d9103f1d 3136 break;
cparata 3:4274d9103f1d 3137 case LSM6DSO_4Hz15:
cparata 3:4274d9103f1d 3138 *val = LSM6DSO_4Hz15;
cparata 3:4274d9103f1d 3139 break;
cparata 3:4274d9103f1d 3140 default:
cparata 3:4274d9103f1d 3141 *val = LSM6DSO_289Hz;
cparata 3:4274d9103f1d 3142 break;
cparata 3:4274d9103f1d 3143 }
cparata 3:4274d9103f1d 3144 return ret;
cparata 0:6d69e896ce38 3145 }
cparata 0:6d69e896ce38 3146
cparata 0:6d69e896ce38 3147 /**
cparata 0:6d69e896ce38 3148 * @brief Selects accelerometer OIS channel full-scale.[set]
cparata 0:6d69e896ce38 3149 *
cparata 0:6d69e896ce38 3150 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3151 * @param val change the values of fs_xl_ois in
cparata 0:6d69e896ce38 3152 * reg CTRL3_OIS
cparata 0:6d69e896ce38 3153 *
cparata 0:6d69e896ce38 3154 */
cparata 0:6d69e896ce38 3155 int32_t lsm6dso_aux_xl_full_scale_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 3156 lsm6dso_fs_xl_ois_t val)
cparata 0:6d69e896ce38 3157 {
cparata 3:4274d9103f1d 3158 lsm6dso_ctrl3_ois_t reg;
cparata 3:4274d9103f1d 3159 int32_t ret;
cparata 3:4274d9103f1d 3160
cparata 3:4274d9103f1d 3161 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3162 if (ret == 0) {
cparata 3:4274d9103f1d 3163 reg.fs_xl_ois = (uint8_t)val;
cparata 3:4274d9103f1d 3164 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3165 }
cparata 3:4274d9103f1d 3166 return ret;
cparata 0:6d69e896ce38 3167 }
cparata 0:6d69e896ce38 3168
cparata 0:6d69e896ce38 3169 /**
cparata 0:6d69e896ce38 3170 * @brief Selects accelerometer OIS channel full-scale.[get]
cparata 0:6d69e896ce38 3171 *
cparata 0:6d69e896ce38 3172 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3173 * @param val Get the values of fs_xl_ois in reg CTRL3_OIS
cparata 0:6d69e896ce38 3174 *
cparata 0:6d69e896ce38 3175 */
cparata 0:6d69e896ce38 3176 int32_t lsm6dso_aux_xl_full_scale_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 3177 lsm6dso_fs_xl_ois_t *val)
cparata 0:6d69e896ce38 3178 {
cparata 3:4274d9103f1d 3179 lsm6dso_ctrl3_ois_t reg;
cparata 3:4274d9103f1d 3180 int32_t ret;
cparata 3:4274d9103f1d 3181
cparata 3:4274d9103f1d 3182 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3183 switch (reg.fs_xl_ois) {
cparata 3:4274d9103f1d 3184 case LSM6DSO_AUX_2g:
cparata 3:4274d9103f1d 3185 *val = LSM6DSO_AUX_2g;
cparata 3:4274d9103f1d 3186 break;
cparata 3:4274d9103f1d 3187 case LSM6DSO_AUX_16g:
cparata 3:4274d9103f1d 3188 *val = LSM6DSO_AUX_16g;
cparata 3:4274d9103f1d 3189 break;
cparata 3:4274d9103f1d 3190 case LSM6DSO_AUX_4g:
cparata 3:4274d9103f1d 3191 *val = LSM6DSO_AUX_4g;
cparata 3:4274d9103f1d 3192 break;
cparata 3:4274d9103f1d 3193 case LSM6DSO_AUX_8g:
cparata 3:4274d9103f1d 3194 *val = LSM6DSO_AUX_8g;
cparata 3:4274d9103f1d 3195 break;
cparata 3:4274d9103f1d 3196 default:
cparata 3:4274d9103f1d 3197 *val = LSM6DSO_AUX_2g;
cparata 3:4274d9103f1d 3198 break;
cparata 3:4274d9103f1d 3199 }
cparata 3:4274d9103f1d 3200 return ret;
cparata 0:6d69e896ce38 3201 }
cparata 0:6d69e896ce38 3202
cparata 0:6d69e896ce38 3203 /**
cparata 0:6d69e896ce38 3204 * @}
cparata 0:6d69e896ce38 3205 *
cparata 0:6d69e896ce38 3206 */
cparata 0:6d69e896ce38 3207
cparata 0:6d69e896ce38 3208 /**
cparata 0:6d69e896ce38 3209 * @defgroup LSM6DSO_ main_serial_interface
cparata 0:6d69e896ce38 3210 * @brief This section groups all the functions concerning main
cparata 0:6d69e896ce38 3211 * serial interface management (not auxiliary)
cparata 0:6d69e896ce38 3212 * @{
cparata 0:6d69e896ce38 3213 *
cparata 0:6d69e896ce38 3214 */
cparata 0:6d69e896ce38 3215
cparata 0:6d69e896ce38 3216 /**
cparata 0:6d69e896ce38 3217 * @brief Connect/Disconnect SDO/SA0 internal pull-up.[set]
cparata 0:6d69e896ce38 3218 *
cparata 0:6d69e896ce38 3219 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3220 * @param val change the values of sdo_pu_en in
cparata 0:6d69e896ce38 3221 * reg PIN_CTRL
cparata 0:6d69e896ce38 3222 *
cparata 0:6d69e896ce38 3223 */
cparata 0:6d69e896ce38 3224 int32_t lsm6dso_sdo_sa0_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sdo_pu_en_t val)
cparata 0:6d69e896ce38 3225 {
cparata 3:4274d9103f1d 3226 lsm6dso_pin_ctrl_t reg;
cparata 3:4274d9103f1d 3227 int32_t ret;
cparata 3:4274d9103f1d 3228
cparata 3:4274d9103f1d 3229 ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3230 if (ret == 0) {
cparata 3:4274d9103f1d 3231 reg.sdo_pu_en = (uint8_t)val;
cparata 3:4274d9103f1d 3232 ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3233 }
cparata 3:4274d9103f1d 3234 return ret;
cparata 0:6d69e896ce38 3235 }
cparata 0:6d69e896ce38 3236
cparata 0:6d69e896ce38 3237 /**
cparata 0:6d69e896ce38 3238 * @brief Connect/Disconnect SDO/SA0 internal pull-up.[get]
cparata 0:6d69e896ce38 3239 *
cparata 0:6d69e896ce38 3240 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3241 * @param val Get the values of sdo_pu_en in reg PIN_CTRL
cparata 0:6d69e896ce38 3242 *
cparata 0:6d69e896ce38 3243 */
cparata 0:6d69e896ce38 3244 int32_t lsm6dso_sdo_sa0_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sdo_pu_en_t *val)
cparata 0:6d69e896ce38 3245 {
cparata 3:4274d9103f1d 3246 lsm6dso_pin_ctrl_t reg;
cparata 3:4274d9103f1d 3247 int32_t ret;
cparata 3:4274d9103f1d 3248
cparata 3:4274d9103f1d 3249 ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3250 switch (reg.sdo_pu_en) {
cparata 3:4274d9103f1d 3251 case LSM6DSO_PULL_UP_DISC:
cparata 3:4274d9103f1d 3252 *val = LSM6DSO_PULL_UP_DISC;
cparata 3:4274d9103f1d 3253 break;
cparata 3:4274d9103f1d 3254 case LSM6DSO_PULL_UP_CONNECT:
cparata 3:4274d9103f1d 3255 *val = LSM6DSO_PULL_UP_CONNECT;
cparata 3:4274d9103f1d 3256 break;
cparata 3:4274d9103f1d 3257 default:
cparata 3:4274d9103f1d 3258 *val = LSM6DSO_PULL_UP_DISC;
cparata 3:4274d9103f1d 3259 break;
cparata 3:4274d9103f1d 3260 }
cparata 3:4274d9103f1d 3261 return ret;
cparata 0:6d69e896ce38 3262 }
cparata 0:6d69e896ce38 3263
cparata 0:6d69e896ce38 3264 /**
cparata 0:6d69e896ce38 3265 * @brief SPI Serial Interface Mode selection.[set]
cparata 0:6d69e896ce38 3266 *
cparata 0:6d69e896ce38 3267 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3268 * @param val change the values of sim in reg CTRL3_C
cparata 0:6d69e896ce38 3269 *
cparata 0:6d69e896ce38 3270 */
cparata 0:6d69e896ce38 3271 int32_t lsm6dso_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_t val)
cparata 0:6d69e896ce38 3272 {
cparata 3:4274d9103f1d 3273 lsm6dso_ctrl3_c_t reg;
cparata 3:4274d9103f1d 3274 int32_t ret;
cparata 3:4274d9103f1d 3275
cparata 3:4274d9103f1d 3276 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3277 if (ret == 0) {
cparata 3:4274d9103f1d 3278 reg.sim = (uint8_t)val;
cparata 3:4274d9103f1d 3279 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3280 }
cparata 3:4274d9103f1d 3281 return ret;
cparata 0:6d69e896ce38 3282 }
cparata 0:6d69e896ce38 3283
cparata 0:6d69e896ce38 3284 /**
cparata 0:6d69e896ce38 3285 * @brief SPI Serial Interface Mode selection.[get]
cparata 0:6d69e896ce38 3286 *
cparata 0:6d69e896ce38 3287 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3288 * @param val Get the values of sim in reg CTRL3_C
cparata 0:6d69e896ce38 3289 *
cparata 0:6d69e896ce38 3290 */
cparata 0:6d69e896ce38 3291 int32_t lsm6dso_spi_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sim_t *val)
cparata 0:6d69e896ce38 3292 {
cparata 3:4274d9103f1d 3293 lsm6dso_ctrl3_c_t reg;
cparata 3:4274d9103f1d 3294 int32_t ret;
cparata 3:4274d9103f1d 3295
cparata 3:4274d9103f1d 3296 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
cparata 3:4274d9103f1d 3297 switch (reg.sim) {
cparata 3:4274d9103f1d 3298 case LSM6DSO_SPI_4_WIRE:
cparata 3:4274d9103f1d 3299 *val = LSM6DSO_SPI_4_WIRE;
cparata 3:4274d9103f1d 3300 break;
cparata 3:4274d9103f1d 3301 case LSM6DSO_SPI_3_WIRE:
cparata 3:4274d9103f1d 3302 *val = LSM6DSO_SPI_3_WIRE;
cparata 3:4274d9103f1d 3303 break;
cparata 3:4274d9103f1d 3304 default:
cparata 3:4274d9103f1d 3305 *val = LSM6DSO_SPI_4_WIRE;
cparata 3:4274d9103f1d 3306 break;
cparata 3:4274d9103f1d 3307 }
cparata 3:4274d9103f1d 3308 return ret;
cparata 0:6d69e896ce38 3309 }
cparata 0:6d69e896ce38 3310
cparata 0:6d69e896ce38 3311 /**
cparata 0:6d69e896ce38 3312 * @brief Disable / Enable I2C interface.[set]
cparata 0:6d69e896ce38 3313 *
cparata 0:6d69e896ce38 3314 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3315 * @param val change the values of i2c_disable in
cparata 0:6d69e896ce38 3316 * reg CTRL4_C
cparata 0:6d69e896ce38 3317 *
cparata 0:6d69e896ce38 3318 */
cparata 0:6d69e896ce38 3319 int32_t lsm6dso_i2c_interface_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 3320 lsm6dso_i2c_disable_t val)
cparata 0:6d69e896ce38 3321 {
cparata 3:4274d9103f1d 3322 lsm6dso_ctrl4_c_t reg;
cparata 3:4274d9103f1d 3323 int32_t ret;
cparata