ST / LIS2DW12

3-axis MEMS ultra low power accelerometer

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   X_NUCLEO_IKS01A3 X_NUCLEO_IKS01A3

lis2dw12_reg.h@4:94c5d5546161, 2019-07-24 (annotated)

Committer:
cparata
Date:
Wed Jul 24 14:18:07 2019 +0000
Revision:
4:94c5d5546161
Parent:
3:111317ba9301 
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cparata 3:111317ba9301 1 /**
cparata 0:dff8803aace7 2 ******************************************************************************
cparata 0:dff8803aace7 3 * @file lis2dw12_reg.h
cparata 2:a94816b14e3d 4 * @author Sensors Software Solution Team
cparata 4:94c5d5546161 5 * @brief This file contains all the functions prototypes for the
cparata 0:dff8803aace7 6 * lis2dw12_reg.c driver.
cparata 0:dff8803aace7 7 ******************************************************************************
cparata 0:dff8803aace7 8 * @attention
cparata 0:dff8803aace7 9 *
cparata 0:dff8803aace7 10 * <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
cparata 0:dff8803aace7 11 *
cparata 2:a94816b14e3d 12 * Redistribution and use in source and binary forms, with or without
cparata 2:a94816b14e3d 13 * modification, are permitted provided that the following conditions
cparata 2:a94816b14e3d 14 * are met:
cparata 0:dff8803aace7 15 * 1. Redistributions of source code must retain the above copyright notice,
cparata 0:dff8803aace7 16 * this list of conditions and the following disclaimer.
cparata 2:a94816b14e3d 17 * 2. Redistributions in binary form must reproduce the above copyright
cparata 2:a94816b14e3d 18 * notice, this list of conditions and the following disclaimer in the
cparata 2:a94816b14e3d 19 * documentation and/or other materials provided with the distribution.
cparata 2:a94816b14e3d 20 * 3. Neither the name of STMicroelectronics nor the names of its
cparata 2:a94816b14e3d 21 * contributors may be used to endorse or promote products derived from
cparata 2:a94816b14e3d 22 * this software without specific prior written permission.
cparata 0:dff8803aace7 23 *
cparata 0:dff8803aace7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata 0:dff8803aace7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata 2:a94816b14e3d 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
cparata 2:a94816b14e3d 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
cparata 2:a94816b14e3d 28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
cparata 2:a94816b14e3d 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
cparata 2:a94816b14e3d 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
cparata 2:a94816b14e3d 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
cparata 2:a94816b14e3d 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
cparata 2:a94816b14e3d 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
cparata 2:a94816b14e3d 34 * POSSIBILITY OF SUCH DAMAGE.
cparata 0:dff8803aace7 35 *
cparata 3:111317ba9301 36 ******************************************************************************
cparata 0:dff8803aace7 37 */
cparata 4:94c5d5546161 38
cparata 0:dff8803aace7 39 /* Define to prevent recursive inclusion -------------------------------------*/
cparata 2:a94816b14e3d 40 #ifndef LIS2DW12_REGS_H
cparata 2:a94816b14e3d 41 #define LIS2DW12_REGS_H
cparata 0:dff8803aace7 42
cparata 0:dff8803aace7 43 #ifdef __cplusplus
cparata 4:94c5d5546161 44 extern "C" {
cparata 0:dff8803aace7 45 #endif
cparata 0:dff8803aace7 46
cparata 0:dff8803aace7 47 /* Includes ------------------------------------------------------------------*/
cparata 0:dff8803aace7 48 #include <stdint.h>
cparata 2:a94816b14e3d 49 #include <math.h>
cparata 0:dff8803aace7 50
cparata 2:a94816b14e3d 51 /** @addtogroup LIS2DW12
cparata 2:a94816b14e3d 52 * @{
cparata 2:a94816b14e3d 53 *
cparata 2:a94816b14e3d 54 */
cparata 2:a94816b14e3d 55
cparata 2:a94816b14e3d 56 /** @defgroup LIS2DW12_sensors_common_types
cparata 2:a94816b14e3d 57 * @{
cparata 2:a94816b14e3d 58 *
cparata 2:a94816b14e3d 59 */
cparata 2:a94816b14e3d 60
cparata 0:dff8803aace7 61 #ifndef MEMS_SHARED_TYPES
cparata 0:dff8803aace7 62 #define MEMS_SHARED_TYPES
cparata 0:dff8803aace7 63
cparata 2:a94816b14e3d 64 /**
cparata 2:a94816b14e3d 65 * @defgroup axisXbitXX_t
cparata 2:a94816b14e3d 66 * @brief These unions are useful to represent different sensors data type.
cparata 2:a94816b14e3d 67 * These unions are not need by the driver.
cparata 2:a94816b14e3d 68 *
cparata 2:a94816b14e3d 69 * REMOVING the unions you are compliant with:
cparata 2:a94816b14e3d 70 * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
cparata 2:a94816b14e3d 71 *
cparata 0:dff8803aace7 72 * @{
cparata 2:a94816b14e3d 73 *
cparata 0:dff8803aace7 74 */
cparata 0:dff8803aace7 75
cparata 4:94c5d5546161 76 typedef union {
cparata 4:94c5d5546161 77 int16_t i16bit[3];
cparata 4:94c5d5546161 78 uint8_t u8bit[6];
cparata 0:dff8803aace7 79 } axis3bit16_t;
cparata 0:dff8803aace7 80
cparata 4:94c5d5546161 81 typedef union {
cparata 4:94c5d5546161 82 int16_t i16bit;
cparata 4:94c5d5546161 83 uint8_t u8bit[2];
cparata 0:dff8803aace7 84 } axis1bit16_t;
cparata 0:dff8803aace7 85
cparata 4:94c5d5546161 86 typedef union {
cparata 4:94c5d5546161 87 int32_t i32bit[3];
cparata 4:94c5d5546161 88 uint8_t u8bit[12];
cparata 0:dff8803aace7 89 } axis3bit32_t;
cparata 0:dff8803aace7 90
cparata 4:94c5d5546161 91 typedef union {
cparata 4:94c5d5546161 92 int32_t i32bit;
cparata 4:94c5d5546161 93 uint8_t u8bit[4];
cparata 0:dff8803aace7 94 } axis1bit32_t;
cparata 0:dff8803aace7 95
cparata 2:a94816b14e3d 96 /**
cparata 2:a94816b14e3d 97 * @}
cparata 2:a94816b14e3d 98 *
cparata 2:a94816b14e3d 99 */
cparata 2:a94816b14e3d 100
cparata 4:94c5d5546161 101 typedef struct {
cparata 4:94c5d5546161 102 uint8_t bit0 : 1;
cparata 4:94c5d5546161 103 uint8_t bit1 : 1;
cparata 4:94c5d5546161 104 uint8_t bit2 : 1;
cparata 4:94c5d5546161 105 uint8_t bit3 : 1;
cparata 4:94c5d5546161 106 uint8_t bit4 : 1;
cparata 4:94c5d5546161 107 uint8_t bit5 : 1;
cparata 4:94c5d5546161 108 uint8_t bit6 : 1;
cparata 4:94c5d5546161 109 uint8_t bit7 : 1;
cparata 0:dff8803aace7 110 } bitwise_t;
cparata 0:dff8803aace7 111
cparata 2:a94816b14e3d 112 #define PROPERTY_DISABLE (0U)
cparata 2:a94816b14e3d 113 #define PROPERTY_ENABLE (1U)
cparata 0:dff8803aace7 114
cparata 2:a94816b14e3d 115 #endif /* MEMS_SHARED_TYPES */
cparata 0:dff8803aace7 116
cparata 0:dff8803aace7 117 /**
cparata 0:dff8803aace7 118 * @}
cparata 2:a94816b14e3d 119 *
cparata 0:dff8803aace7 120 */
cparata 0:dff8803aace7 121
cparata 2:a94816b14e3d 122 /** @addtogroup LIS2DW12_Interfaces_Functions
cparata 2:a94816b14e3d 123 * @brief This section provide a set of functions used to read and
cparata 2:a94816b14e3d 124 * write a generic register of the device.
cparata 2:a94816b14e3d 125 * MANDATORY: return 0 -> no Error.
cparata 0:dff8803aace7 126 * @{
cparata 2:a94816b14e3d 127 *
cparata 4:94c5d5546161 128 */
cparata 0:dff8803aace7 129
cparata 4:94c5d5546161 130 typedef int32_t (*lis2dw12_write_ptr)(void *, uint8_t, uint8_t *, uint16_t);
cparata 4:94c5d5546161 131 typedef int32_t (*lis2dw12_read_ptr)(void *, uint8_t, uint8_t *, uint16_t);
cparata 0:dff8803aace7 132
cparata 0:dff8803aace7 133 typedef struct {
cparata 4:94c5d5546161 134 /** Component mandatory fields **/
cparata 4:94c5d5546161 135 lis2dw12_write_ptr write_reg;
cparata 4:94c5d5546161 136 lis2dw12_read_ptr read_reg;
cparata 4:94c5d5546161 137 /** Customizable optional pointer **/
cparata 4:94c5d5546161 138 void *handle;
cparata 0:dff8803aace7 139 } lis2dw12_ctx_t;
cparata 0:dff8803aace7 140
cparata 0:dff8803aace7 141 /**
cparata 0:dff8803aace7 142 * @}
cparata 2:a94816b14e3d 143 *
cparata 2:a94816b14e3d 144 */
cparata 0:dff8803aace7 145
cparata 2:a94816b14e3d 146 /** @defgroup LIS2DW12_Infos
cparata 0:dff8803aace7 147 * @{
cparata 2:a94816b14e3d 148 *
cparata 2:a94816b14e3d 149 */
cparata 4:94c5d5546161 150
cparata 2:a94816b14e3d 151 /** I2C Device Address 8 bit format if SA0=0 -> 31 if SA0=1 -> 33 **/
cparata 2:a94816b14e3d 152 #define LIS2DW12_I2C_ADD_L 0x31U
cparata 2:a94816b14e3d 153 #define LIS2DW12_I2C_ADD_H 0x33U
cparata 0:dff8803aace7 154
cparata 0:dff8803aace7 155 /** Device Identification (Who am I) **/
cparata 2:a94816b14e3d 156 #define LIS2DW12_ID 0x44U
cparata 0:dff8803aace7 157
cparata 0:dff8803aace7 158 /**
cparata 0:dff8803aace7 159 * @}
cparata 2:a94816b14e3d 160 *
cparata 0:dff8803aace7 161 */
cparata 0:dff8803aace7 162
cparata 2:a94816b14e3d 163 /**
cparata 2:a94816b14e3d 164 * @addtogroup LIS2DW12_Sensitivity
cparata 2:a94816b14e3d 165 * @brief These macro are maintained for back compatibility.
cparata 2:a94816b14e3d 166 * in order to convert data into engineering units please
cparata 2:a94816b14e3d 167 * use functions:
cparata 2:a94816b14e3d 168 * -> _from_fs2_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 169 * -> _from_fs4_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 170 * -> _from_fs8_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 171 * -> _from_fs16_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 172 * -> _from_fs2_lp1_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 173 * -> _from_fs4_lp1_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 174 * -> _from_fs8_lp1_to_mg(int16_t lsb);
cparata 4:94c5d5546161 175 * -> _from_fs16_lp1_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 176 * -> _from_lsb_to_celsius(int16_t lsb);
cparata 2:a94816b14e3d 177 *
cparata 2:a94816b14e3d 178 * REMOVING the MACRO you are compliant with:
cparata 2:a94816b14e3d 179 * MISRA-C 2012 [Dir 4.9] -> " avoid function-like macros "
cparata 0:dff8803aace7 180 * @{
cparata 2:a94816b14e3d 181 *
cparata 0:dff8803aace7 182 */
cparata 0:dff8803aace7 183
cparata 0:dff8803aace7 184 #define LIS2DW12_FROM_FS_2g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.244f
cparata 0:dff8803aace7 185 #define LIS2DW12_FROM_FS_4g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.488f
cparata 0:dff8803aace7 186 #define LIS2DW12_FROM_FS_8g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.976f
cparata 0:dff8803aace7 187 #define LIS2DW12_FROM_FS_16g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 1.952f
cparata 0:dff8803aace7 188
cparata 2:a94816b14e3d 189 #define LIS2DW12_FROM_FS_2g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 0.976f
cparata 2:a94816b14e3d 190 #define LIS2DW12_FROM_FS_4g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 1.952f
cparata 0:dff8803aace7 191 #define LIS2DW12_FROM_FS_8g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 3.904f
cparata 0:dff8803aace7 192 #define LIS2DW12_FROM_FS_16g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 7.808f
cparata 0:dff8803aace7 193
cparata 0:dff8803aace7 194 #define LIS2DW12_FROM_LSB_TO_degC(lsb) (float)((int16_t)lsb) / 16.0f+25.0f
cparata 0:dff8803aace7 195
cparata 0:dff8803aace7 196 /**
cparata 0:dff8803aace7 197 * @}
cparata 2:a94816b14e3d 198 *
cparata 0:dff8803aace7 199 */
cparata 0:dff8803aace7 200
cparata 2:a94816b14e3d 201 #define LIS2DW12_OUT_T_L 0x0DU
cparata 2:a94816b14e3d 202 #define LIS2DW12_OUT_T_H 0x0EU
cparata 2:a94816b14e3d 203 #define LIS2DW12_WHO_AM_I 0x0FU
cparata 2:a94816b14e3d 204 #define LIS2DW12_CTRL1 0x20U
cparata 0:dff8803aace7 205 typedef struct {
cparata 4:94c5d5546161 206 uint8_t lp_mode : 2;
cparata 4:94c5d5546161 207 uint8_t mode : 2;
cparata 4:94c5d5546161 208 uint8_t odr : 4;
cparata 0:dff8803aace7 209 } lis2dw12_ctrl1_t;
cparata 0:dff8803aace7 210
cparata 2:a94816b14e3d 211 #define LIS2DW12_CTRL2 0x21U
cparata 0:dff8803aace7 212 typedef struct {
cparata 4:94c5d5546161 213 uint8_t sim : 1;
cparata 4:94c5d5546161 214 uint8_t i2c_disable : 1;
cparata 4:94c5d5546161 215 uint8_t if_add_inc : 1;
cparata 4:94c5d5546161 216 uint8_t bdu : 1;
cparata 4:94c5d5546161 217 uint8_t cs_pu_disc : 1;
cparata 4:94c5d5546161 218 uint8_t not_used_01 : 1;
cparata 4:94c5d5546161 219 uint8_t soft_reset : 1;
cparata 4:94c5d5546161 220 uint8_t boot : 1;
cparata 0:dff8803aace7 221 } lis2dw12_ctrl2_t;
cparata 0:dff8803aace7 222
cparata 2:a94816b14e3d 223 #define LIS2DW12_CTRL3 0x22U
cparata 0:dff8803aace7 224 typedef struct {
cparata 4:94c5d5546161 225 uint8_t slp_mode : 2; /* slp_mode_sel + slp_mode_1 */
cparata 4:94c5d5546161 226 uint8_t not_used_01 : 1;
cparata 4:94c5d5546161 227 uint8_t h_lactive : 1;
cparata 4:94c5d5546161 228 uint8_t lir : 1;
cparata 4:94c5d5546161 229 uint8_t pp_od : 1;
cparata 4:94c5d5546161 230 uint8_t st : 2;
cparata 0:dff8803aace7 231 } lis2dw12_ctrl3_t;
cparata 0:dff8803aace7 232
cparata 2:a94816b14e3d 233 #define LIS2DW12_CTRL4_INT1_PAD_CTRL 0x23U
cparata 0:dff8803aace7 234 typedef struct {
cparata 4:94c5d5546161 235 uint8_t int1_drdy : 1;
cparata 4:94c5d5546161 236 uint8_t int1_fth : 1;
cparata 4:94c5d5546161 237 uint8_t int1_diff5 : 1;
cparata 4:94c5d5546161 238 uint8_t int1_tap : 1;
cparata 4:94c5d5546161 239 uint8_t int1_ff : 1;
cparata 4:94c5d5546161 240 uint8_t int1_wu : 1;
cparata 4:94c5d5546161 241 uint8_t int1_single_tap : 1;
cparata 4:94c5d5546161 242 uint8_t int1_6d : 1;
cparata 0:dff8803aace7 243 } lis2dw12_ctrl4_int1_pad_ctrl_t;
cparata 0:dff8803aace7 244
cparata 2:a94816b14e3d 245 #define LIS2DW12_CTRL5_INT2_PAD_CTRL 0x24U
cparata 0:dff8803aace7 246 typedef struct {
cparata 4:94c5d5546161 247 uint8_t int2_drdy : 1;
cparata 4:94c5d5546161 248 uint8_t int2_fth : 1;
cparata 4:94c5d5546161 249 uint8_t int2_diff5 : 1;
cparata 4:94c5d5546161 250 uint8_t int2_ovr : 1;
cparata 4:94c5d5546161 251 uint8_t int2_drdy_t : 1;
cparata 4:94c5d5546161 252 uint8_t int2_boot : 1;
cparata 4:94c5d5546161 253 uint8_t int2_sleep_chg : 1;
cparata 4:94c5d5546161 254 uint8_t int2_sleep_state : 1;
cparata 0:dff8803aace7 255 } lis2dw12_ctrl5_int2_pad_ctrl_t;
cparata 0:dff8803aace7 256
cparata 2:a94816b14e3d 257 #define LIS2DW12_CTRL6 0x25U
cparata 0:dff8803aace7 258 typedef struct {
cparata 4:94c5d5546161 259 uint8_t not_used_01 : 2;
cparata 4:94c5d5546161 260 uint8_t low_noise : 1;
cparata 4:94c5d5546161 261 uint8_t fds : 1;
cparata 4:94c5d5546161 262 uint8_t fs : 2;
cparata 4:94c5d5546161 263 uint8_t bw_filt : 2;
cparata 0:dff8803aace7 264 } lis2dw12_ctrl6_t;
cparata 0:dff8803aace7 265
cparata 2:a94816b14e3d 266 #define LIS2DW12_OUT_T 0x26U
cparata 2:a94816b14e3d 267 #define LIS2DW12_STATUS 0x27U
cparata 0:dff8803aace7 268 typedef struct {
cparata 4:94c5d5546161 269 uint8_t drdy : 1;
cparata 4:94c5d5546161 270 uint8_t ff_ia : 1;
cparata 4:94c5d5546161 271 uint8_t _6d_ia : 1;
cparata 4:94c5d5546161 272 uint8_t single_tap : 1;
cparata 4:94c5d5546161 273 uint8_t double_tap : 1;
cparata 4:94c5d5546161 274 uint8_t sleep_state : 1;
cparata 4:94c5d5546161 275 uint8_t wu_ia : 1;
cparata 4:94c5d5546161 276 uint8_t fifo_ths : 1;
cparata 0:dff8803aace7 277 } lis2dw12_status_t;
cparata 0:dff8803aace7 278
cparata 2:a94816b14e3d 279 #define LIS2DW12_OUT_X_L 0x28U
cparata 2:a94816b14e3d 280 #define LIS2DW12_OUT_X_H 0x29U
cparata 2:a94816b14e3d 281 #define LIS2DW12_OUT_Y_L 0x2AU
cparata 2:a94816b14e3d 282 #define LIS2DW12_OUT_Y_H 0x2BU
cparata 2:a94816b14e3d 283 #define LIS2DW12_OUT_Z_L 0x2CU
cparata 2:a94816b14e3d 284 #define LIS2DW12_OUT_Z_H 0x2DU
cparata 2:a94816b14e3d 285 #define LIS2DW12_FIFO_CTRL 0x2EU
cparata 0:dff8803aace7 286 typedef struct {
cparata 4:94c5d5546161 287 uint8_t fth : 5;
cparata 4:94c5d5546161 288 uint8_t fmode : 3;
cparata 0:dff8803aace7 289 } lis2dw12_fifo_ctrl_t;
cparata 0:dff8803aace7 290
cparata 2:a94816b14e3d 291 #define LIS2DW12_FIFO_SAMPLES 0x2FU
cparata 0:dff8803aace7 292 typedef struct {
cparata 4:94c5d5546161 293 uint8_t diff : 6;
cparata 4:94c5d5546161 294 uint8_t fifo_ovr : 1;
cparata 4:94c5d5546161 295 uint8_t fifo_fth : 1;
cparata 0:dff8803aace7 296 } lis2dw12_fifo_samples_t;
cparata 0:dff8803aace7 297
cparata 2:a94816b14e3d 298 #define LIS2DW12_TAP_THS_X 0x30U
cparata 0:dff8803aace7 299 typedef struct {
cparata 4:94c5d5546161 300 uint8_t tap_thsx : 5;
cparata 4:94c5d5546161 301 uint8_t _6d_ths : 2;
cparata 4:94c5d5546161 302 uint8_t _4d_en : 1;
cparata 0:dff8803aace7 303 } lis2dw12_tap_ths_x_t;
cparata 0:dff8803aace7 304
cparata 2:a94816b14e3d 305 #define LIS2DW12_TAP_THS_Y 0x31U
cparata 0:dff8803aace7 306 typedef struct {
cparata 4:94c5d5546161 307 uint8_t tap_thsy : 5;
cparata 4:94c5d5546161 308 uint8_t tap_prior : 3;
cparata 0:dff8803aace7 309 } lis2dw12_tap_ths_y_t;
cparata 0:dff8803aace7 310
cparata 2:a94816b14e3d 311 #define LIS2DW12_TAP_THS_Z 0x32U
cparata 0:dff8803aace7 312 typedef struct {
cparata 4:94c5d5546161 313 uint8_t tap_thsz : 5;
cparata 4:94c5d5546161 314 uint8_t tap_z_en : 1;
cparata 4:94c5d5546161 315 uint8_t tap_y_en : 1;
cparata 4:94c5d5546161 316 uint8_t tap_x_en : 1;
cparata 0:dff8803aace7 317 } lis2dw12_tap_ths_z_t;
cparata 0:dff8803aace7 318
cparata 2:a94816b14e3d 319 #define LIS2DW12_INT_DUR 0x33U
cparata 0:dff8803aace7 320 typedef struct {
cparata 4:94c5d5546161 321 uint8_t shock : 2;
cparata 4:94c5d5546161 322 uint8_t quiet : 2;
cparata 4:94c5d5546161 323 uint8_t latency : 4;
cparata 0:dff8803aace7 324 } lis2dw12_int_dur_t;
cparata 0:dff8803aace7 325
cparata 2:a94816b14e3d 326 #define LIS2DW12_WAKE_UP_THS 0x34U
cparata 0:dff8803aace7 327 typedef struct {
cparata 4:94c5d5546161 328 uint8_t wk_ths : 6;
cparata 4:94c5d5546161 329 uint8_t sleep_on : 1;
cparata 4:94c5d5546161 330 uint8_t single_double_tap : 1;
cparata 0:dff8803aace7 331 } lis2dw12_wake_up_ths_t;
cparata 0:dff8803aace7 332
cparata 2:a94816b14e3d 333 #define LIS2DW12_WAKE_UP_DUR 0x35U
cparata 0:dff8803aace7 334 typedef struct {
cparata 4:94c5d5546161 335 uint8_t sleep_dur : 4;
cparata 4:94c5d5546161 336 uint8_t stationary : 1;
cparata 4:94c5d5546161 337 uint8_t wake_dur : 2;
cparata 4:94c5d5546161 338 uint8_t ff_dur : 1;
cparata 0:dff8803aace7 339 } lis2dw12_wake_up_dur_t;
cparata 0:dff8803aace7 340
cparata 2:a94816b14e3d 341 #define LIS2DW12_FREE_FALL 0x36U
cparata 0:dff8803aace7 342 typedef struct {
cparata 4:94c5d5546161 343 uint8_t ff_ths : 3;
cparata 4:94c5d5546161 344 uint8_t ff_dur : 5;
cparata 0:dff8803aace7 345 } lis2dw12_free_fall_t;
cparata 0:dff8803aace7 346
cparata 2:a94816b14e3d 347 #define LIS2DW12_STATUS_DUP 0x37U
cparata 0:dff8803aace7 348 typedef struct {
cparata 4:94c5d5546161 349 uint8_t drdy : 1;
cparata 4:94c5d5546161 350 uint8_t ff_ia : 1;
cparata 4:94c5d5546161 351 uint8_t _6d_ia : 1;
cparata 4:94c5d5546161 352 uint8_t single_tap : 1;
cparata 4:94c5d5546161 353 uint8_t double_tap : 1;
cparata 4:94c5d5546161 354 uint8_t sleep_state_ia : 1;
cparata 4:94c5d5546161 355 uint8_t drdy_t : 1;
cparata 4:94c5d5546161 356 uint8_t ovr : 1;
cparata 0:dff8803aace7 357 } lis2dw12_status_dup_t;
cparata 0:dff8803aace7 358
cparata 2:a94816b14e3d 359 #define LIS2DW12_WAKE_UP_SRC 0x38U
cparata 0:dff8803aace7 360 typedef struct {
cparata 4:94c5d5546161 361 uint8_t z_wu : 1;
cparata 4:94c5d5546161 362 uint8_t y_wu : 1;
cparata 4:94c5d5546161 363 uint8_t x_wu : 1;
cparata 4:94c5d5546161 364 uint8_t wu_ia : 1;
cparata 4:94c5d5546161 365 uint8_t sleep_state_ia : 1;
cparata 4:94c5d5546161 366 uint8_t ff_ia : 1;
cparata 4:94c5d5546161 367 uint8_t not_used_01 : 2;
cparata 0:dff8803aace7 368 } lis2dw12_wake_up_src_t;
cparata 0:dff8803aace7 369
cparata 2:a94816b14e3d 370 #define LIS2DW12_TAP_SRC 0x39U
cparata 0:dff8803aace7 371 typedef struct {
cparata 4:94c5d5546161 372 uint8_t z_tap : 1;
cparata 4:94c5d5546161 373 uint8_t y_tap : 1;
cparata 4:94c5d5546161 374 uint8_t x_tap : 1;
cparata 4:94c5d5546161 375 uint8_t tap_sign : 1;
cparata 4:94c5d5546161 376 uint8_t double_tap : 1;
cparata 4:94c5d5546161 377 uint8_t single_tap : 1;
cparata 4:94c5d5546161 378 uint8_t tap_ia : 1;
cparata 4:94c5d5546161 379 uint8_t not_used_01 : 1;
cparata 0:dff8803aace7 380 } lis2dw12_tap_src_t;
cparata 0:dff8803aace7 381
cparata 2:a94816b14e3d 382 #define LIS2DW12_SIXD_SRC 0x3AU
cparata 0:dff8803aace7 383 typedef struct {
cparata 4:94c5d5546161 384 uint8_t xl : 1;
cparata 4:94c5d5546161 385 uint8_t xh : 1;
cparata 4:94c5d5546161 386 uint8_t yl : 1;
cparata 4:94c5d5546161 387 uint8_t yh : 1;
cparata 4:94c5d5546161 388 uint8_t zl : 1;
cparata 4:94c5d5546161 389 uint8_t zh : 1;
cparata 4:94c5d5546161 390 uint8_t _6d_ia : 1;
cparata 4:94c5d5546161 391 uint8_t not_used_01 : 1;
cparata 0:dff8803aace7 392 } lis2dw12_sixd_src_t;
cparata 0:dff8803aace7 393
cparata 2:a94816b14e3d 394 #define LIS2DW12_ALL_INT_SRC 0x3BU
cparata 0:dff8803aace7 395 typedef struct {
cparata 4:94c5d5546161 396 uint8_t ff_ia : 1;
cparata 4:94c5d5546161 397 uint8_t wu_ia : 1;
cparata 4:94c5d5546161 398 uint8_t single_tap : 1;
cparata 4:94c5d5546161 399 uint8_t double_tap : 1;
cparata 4:94c5d5546161 400 uint8_t _6d_ia : 1;
cparata 4:94c5d5546161 401 uint8_t sleep_change_ia : 1;
cparata 4:94c5d5546161 402 uint8_t not_used_01 : 2;
cparata 0:dff8803aace7 403 } lis2dw12_all_int_src_t;
cparata 0:dff8803aace7 404
cparata 2:a94816b14e3d 405 #define LIS2DW12_X_OFS_USR 0x3CU
cparata 2:a94816b14e3d 406 #define LIS2DW12_Y_OFS_USR 0x3DU
cparata 2:a94816b14e3d 407 #define LIS2DW12_Z_OFS_USR 0x3EU
cparata 2:a94816b14e3d 408 #define LIS2DW12_CTRL_REG7 0x3FU
cparata 0:dff8803aace7 409 typedef struct {
cparata 4:94c5d5546161 410 uint8_t lpass_on6d : 1;
cparata 4:94c5d5546161 411 uint8_t hp_ref_mode : 1;
cparata 4:94c5d5546161 412 uint8_t usr_off_w : 1;
cparata 4:94c5d5546161 413 uint8_t usr_off_on_wu : 1;
cparata 4:94c5d5546161 414 uint8_t usr_off_on_out : 1;
cparata 4:94c5d5546161 415 uint8_t interrupts_enable : 1;
cparata 4:94c5d5546161 416 uint8_t int2_on_int1 : 1;
cparata 4:94c5d5546161 417 uint8_t drdy_pulsed : 1;
cparata 0:dff8803aace7 418 } lis2dw12_ctrl_reg7_t;
cparata 0:dff8803aace7 419
cparata 2:a94816b14e3d 420 /**
cparata 2:a94816b14e3d 421 * @defgroup LIS2DW12_Register_Union
cparata 2:a94816b14e3d 422 * @brief This union group all the registers that has a bitfield
cparata 2:a94816b14e3d 423 * description.
cparata 2:a94816b14e3d 424 * This union is useful but not need by the driver.
cparata 2:a94816b14e3d 425 *
cparata 2:a94816b14e3d 426 * REMOVING this union you are compliant with:
cparata 2:a94816b14e3d 427 * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
cparata 2:a94816b14e3d 428 *
cparata 2:a94816b14e3d 429 * @{
cparata 2:a94816b14e3d 430 *
cparata 2:a94816b14e3d 431 */
cparata 4:94c5d5546161 432 typedef union {
cparata 4:94c5d5546161 433 lis2dw12_ctrl1_t ctrl1;
cparata 4:94c5d5546161 434 lis2dw12_ctrl2_t ctrl2;
cparata 4:94c5d5546161 435 lis2dw12_ctrl3_t ctrl3;
cparata 4:94c5d5546161 436 lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_pad_ctrl;
cparata 4:94c5d5546161 437 lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_pad_ctrl;
cparata 4:94c5d5546161 438 lis2dw12_ctrl6_t ctrl6;
cparata 4:94c5d5546161 439 lis2dw12_status_t status;
cparata 4:94c5d5546161 440 lis2dw12_fifo_ctrl_t fifo_ctrl;
cparata 4:94c5d5546161 441 lis2dw12_fifo_samples_t fifo_samples;
cparata 4:94c5d5546161 442 lis2dw12_tap_ths_x_t tap_ths_x;
cparata 4:94c5d5546161 443 lis2dw12_tap_ths_y_t tap_ths_y;
cparata 4:94c5d5546161 444 lis2dw12_tap_ths_z_t tap_ths_z;
cparata 4:94c5d5546161 445 lis2dw12_int_dur_t int_dur;
cparata 4:94c5d5546161 446 lis2dw12_wake_up_ths_t wake_up_ths;
cparata 4:94c5d5546161 447 lis2dw12_wake_up_dur_t wake_up_dur;
cparata 4:94c5d5546161 448 lis2dw12_free_fall_t free_fall;
cparata 4:94c5d5546161 449 lis2dw12_status_dup_t status_dup;
cparata 4:94c5d5546161 450 lis2dw12_wake_up_src_t wake_up_src;
cparata 4:94c5d5546161 451 lis2dw12_tap_src_t tap_src;
cparata 4:94c5d5546161 452 lis2dw12_sixd_src_t sixd_src;
cparata 4:94c5d5546161 453 lis2dw12_all_int_src_t all_int_src;
cparata 4:94c5d5546161 454 lis2dw12_ctrl_reg7_t ctrl_reg7;
cparata 4:94c5d5546161 455 bitwise_t bitwise;
cparata 4:94c5d5546161 456 uint8_t byte;
cparata 0:dff8803aace7 457 } lis2dw12_reg_t;
cparata 0:dff8803aace7 458
cparata 2:a94816b14e3d 459 /**
cparata 2:a94816b14e3d 460 * @}
cparata 2:a94816b14e3d 461 *
cparata 2:a94816b14e3d 462 */
cparata 2:a94816b14e3d 463
cparata 4:94c5d5546161 464 int32_t lis2dw12_read_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t *data,
cparata 0:dff8803aace7 465 uint16_t len);
cparata 4:94c5d5546161 466 int32_t lis2dw12_write_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t *data,
cparata 0:dff8803aace7 467 uint16_t len);
cparata 4:94c5d5546161 468
cparata 2:a94816b14e3d 469 extern float lis2dw12_from_fs2_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 470 extern float lis2dw12_from_fs4_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 471 extern float lis2dw12_from_fs8_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 472 extern float lis2dw12_from_fs16_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 473 extern float lis2dw12_from_fs2_lp1_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 474 extern float lis2dw12_from_fs4_lp1_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 475 extern float lis2dw12_from_fs8_lp1_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 476 extern float lis2dw12_from_fs16_lp1_to_mg(int16_t lsb);
cparata 2:a94816b14e3d 477 extern float lis2dw12_from_lsb_to_celsius(int16_t lsb);
cparata 0:dff8803aace7 478
cparata 0:dff8803aace7 479 typedef enum {
cparata 4:94c5d5546161 480 LIS2DW12_HIGH_PERFORMANCE = 0x04,
cparata 4:94c5d5546161 481 LIS2DW12_CONT_LOW_PWR_4 = 0x03,
cparata 4:94c5d5546161 482 LIS2DW12_CONT_LOW_PWR_3 = 0x02,
cparata 4:94c5d5546161 483 LIS2DW12_CONT_LOW_PWR_2 = 0x01,
cparata 4:94c5d5546161 484 LIS2DW12_CONT_LOW_PWR_12bit = 0x00,
cparata 4:94c5d5546161 485 LIS2DW12_SINGLE_LOW_PWR_4 = 0x0B,
cparata 4:94c5d5546161 486 LIS2DW12_SINGLE_LOW_PWR_3 = 0x0A,
cparata 4:94c5d5546161 487 LIS2DW12_SINGLE_LOW_PWR_2 = 0x09,
cparata 4:94c5d5546161 488 LIS2DW12_SINGLE_LOW_PWR_12bit = 0x08,
cparata 4:94c5d5546161 489 LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE = 0x14,
cparata 4:94c5d5546161 490 LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4 = 0x13,
cparata 4:94c5d5546161 491 LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3 = 0x12,
cparata 4:94c5d5546161 492 LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2 = 0x11,
cparata 4:94c5d5546161 493 LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit = 0x10,
cparata 4:94c5d5546161 494 LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4 = 0x1B,
cparata 4:94c5d5546161 495 LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3 = 0x1A,
cparata 4:94c5d5546161 496 LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2 = 0x19,
cparata 4:94c5d5546161 497 LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit = 0x18,
cparata 0:dff8803aace7 498 } lis2dw12_mode_t;
cparata 0:dff8803aace7 499 int32_t lis2dw12_power_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_mode_t val);
cparata 0:dff8803aace7 500 int32_t lis2dw12_power_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_mode_t *val);
cparata 0:dff8803aace7 501
cparata 0:dff8803aace7 502 typedef enum {
cparata 4:94c5d5546161 503 LIS2DW12_XL_ODR_OFF = 0x00,
cparata 4:94c5d5546161 504 LIS2DW12_XL_ODR_1Hz6_LP_ONLY = 0x01,
cparata 4:94c5d5546161 505 LIS2DW12_XL_ODR_12Hz5 = 0x02,
cparata 4:94c5d5546161 506 LIS2DW12_XL_ODR_25Hz = 0x03,
cparata 4:94c5d5546161 507 LIS2DW12_XL_ODR_50Hz = 0x04,
cparata 4:94c5d5546161 508 LIS2DW12_XL_ODR_100Hz = 0x05,
cparata 4:94c5d5546161 509 LIS2DW12_XL_ODR_200Hz = 0x06,
cparata 4:94c5d5546161 510 LIS2DW12_XL_ODR_400Hz = 0x07,
cparata 4:94c5d5546161 511 LIS2DW12_XL_ODR_800Hz = 0x08,
cparata 4:94c5d5546161 512 LIS2DW12_XL_ODR_1k6Hz = 0x09,
cparata 4:94c5d5546161 513 LIS2DW12_XL_SET_SW_TRIG = 0x10, /* Use this only in SINGLE mode */
cparata 4:94c5d5546161 514 LIS2DW12_XL_SET_PIN_TRIG = 0x20, /* Use this only in SINGLE mode */
cparata 0:dff8803aace7 515 } lis2dw12_odr_t;
cparata 0:dff8803aace7 516 int32_t lis2dw12_data_rate_set(lis2dw12_ctx_t *ctx, lis2dw12_odr_t val);
cparata 0:dff8803aace7 517 int32_t lis2dw12_data_rate_get(lis2dw12_ctx_t *ctx, lis2dw12_odr_t *val);
cparata 0:dff8803aace7 518
cparata 0:dff8803aace7 519 int32_t lis2dw12_block_data_update_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 520 int32_t lis2dw12_block_data_update_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 521
cparata 0:dff8803aace7 522 typedef enum {
cparata 4:94c5d5546161 523 LIS2DW12_2g = 0,
cparata 4:94c5d5546161 524 LIS2DW12_4g = 1,
cparata 4:94c5d5546161 525 LIS2DW12_8g = 2,
cparata 4:94c5d5546161 526 LIS2DW12_16g = 3,
cparata 0:dff8803aace7 527 } lis2dw12_fs_t;
cparata 0:dff8803aace7 528 int32_t lis2dw12_full_scale_set(lis2dw12_ctx_t *ctx, lis2dw12_fs_t val);
cparata 0:dff8803aace7 529 int32_t lis2dw12_full_scale_get(lis2dw12_ctx_t *ctx, lis2dw12_fs_t *val);
cparata 0:dff8803aace7 530
cparata 0:dff8803aace7 531 int32_t lis2dw12_status_reg_get(lis2dw12_ctx_t *ctx, lis2dw12_status_t *val);
cparata 0:dff8803aace7 532
cparata 0:dff8803aace7 533 int32_t lis2dw12_flag_data_ready_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 534
cparata 4:94c5d5546161 535 typedef struct {
cparata 4:94c5d5546161 536 lis2dw12_status_dup_t status_dup;
cparata 4:94c5d5546161 537 lis2dw12_wake_up_src_t wake_up_src;
cparata 4:94c5d5546161 538 lis2dw12_tap_src_t tap_src;
cparata 4:94c5d5546161 539 lis2dw12_sixd_src_t sixd_src;
cparata 4:94c5d5546161 540 lis2dw12_all_int_src_t all_int_src;
cparata 0:dff8803aace7 541 } lis2dw12_all_sources_t;
cparata 0:dff8803aace7 542 int32_t lis2dw12_all_sources_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 543 lis2dw12_all_sources_t *val);
cparata 0:dff8803aace7 544
cparata 0:dff8803aace7 545 int32_t lis2dw12_usr_offset_x_set(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 546 int32_t lis2dw12_usr_offset_x_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 547
cparata 0:dff8803aace7 548 int32_t lis2dw12_usr_offset_y_set(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 549 int32_t lis2dw12_usr_offset_y_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 550
cparata 0:dff8803aace7 551 int32_t lis2dw12_usr_offset_z_set(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 552 int32_t lis2dw12_usr_offset_z_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 553
cparata 0:dff8803aace7 554 typedef enum {
cparata 4:94c5d5546161 555 LIS2DW12_LSb_977ug = 0,
cparata 4:94c5d5546161 556 LIS2DW12_LSb_15mg6 = 1,
cparata 0:dff8803aace7 557 } lis2dw12_usr_off_w_t;
cparata 0:dff8803aace7 558 int32_t lis2dw12_offset_weight_set(lis2dw12_ctx_t *ctx,
cparata 4:94c5d5546161 559 lis2dw12_usr_off_w_t val);
cparata 0:dff8803aace7 560 int32_t lis2dw12_offset_weight_get(lis2dw12_ctx_t *ctx,
cparata 4:94c5d5546161 561 lis2dw12_usr_off_w_t *val);
cparata 0:dff8803aace7 562
cparata 0:dff8803aace7 563 int32_t lis2dw12_temperature_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 564
cparata 0:dff8803aace7 565 int32_t lis2dw12_acceleration_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 566
cparata 0:dff8803aace7 567 int32_t lis2dw12_device_id_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 568
cparata 0:dff8803aace7 569 int32_t lis2dw12_auto_increment_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 570 int32_t lis2dw12_auto_increment_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 571
cparata 0:dff8803aace7 572 int32_t lis2dw12_reset_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 573 int32_t lis2dw12_reset_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 574
cparata 0:dff8803aace7 575 int32_t lis2dw12_boot_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 576 int32_t lis2dw12_boot_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 577
cparata 0:dff8803aace7 578 typedef enum {
cparata 4:94c5d5546161 579 LIS2DW12_XL_ST_DISABLE = 0,
cparata 4:94c5d5546161 580 LIS2DW12_XL_ST_POSITIVE = 1,
cparata 4:94c5d5546161 581 LIS2DW12_XL_ST_NEGATIVE = 2,
cparata 0:dff8803aace7 582 } lis2dw12_st_t;
cparata 0:dff8803aace7 583 int32_t lis2dw12_self_test_set(lis2dw12_ctx_t *ctx, lis2dw12_st_t val);
cparata 0:dff8803aace7 584 int32_t lis2dw12_self_test_get(lis2dw12_ctx_t *ctx, lis2dw12_st_t *val);
cparata 0:dff8803aace7 585
cparata 0:dff8803aace7 586 typedef enum {
cparata 4:94c5d5546161 587 LIS2DW12_DRDY_LATCHED = 0,
cparata 4:94c5d5546161 588 LIS2DW12_DRDY_PULSED = 1,
cparata 0:dff8803aace7 589 } lis2dw12_drdy_pulsed_t;
cparata 0:dff8803aace7 590 int32_t lis2dw12_data_ready_mode_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 591 lis2dw12_drdy_pulsed_t val);
cparata 0:dff8803aace7 592 int32_t lis2dw12_data_ready_mode_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 593 lis2dw12_drdy_pulsed_t *val);
cparata 0:dff8803aace7 594
cparata 0:dff8803aace7 595 typedef enum {
cparata 4:94c5d5546161 596 LIS2DW12_LPF_ON_OUT = 0x00,
cparata 4:94c5d5546161 597 LIS2DW12_USER_OFFSET_ON_OUT = 0x01,
cparata 4:94c5d5546161 598 LIS2DW12_HIGH_PASS_ON_OUT = 0x10,
cparata 0:dff8803aace7 599 } lis2dw12_fds_t;
cparata 0:dff8803aace7 600 int32_t lis2dw12_filter_path_set(lis2dw12_ctx_t *ctx, lis2dw12_fds_t val);
cparata 0:dff8803aace7 601 int32_t lis2dw12_filter_path_get(lis2dw12_ctx_t *ctx, lis2dw12_fds_t *val);
cparata 0:dff8803aace7 602
cparata 0:dff8803aace7 603 typedef enum {
cparata 4:94c5d5546161 604 LIS2DW12_ODR_DIV_2 = 0,
cparata 4:94c5d5546161 605 LIS2DW12_ODR_DIV_4 = 1,
cparata 4:94c5d5546161 606 LIS2DW12_ODR_DIV_10 = 2,
cparata 4:94c5d5546161 607 LIS2DW12_ODR_DIV_20 = 3,
cparata 0:dff8803aace7 608 } lis2dw12_bw_filt_t;
cparata 0:dff8803aace7 609 int32_t lis2dw12_filter_bandwidth_set(lis2dw12_ctx_t *ctx,
cparata 4:94c5d5546161 610 lis2dw12_bw_filt_t val);
cparata 0:dff8803aace7 611 int32_t lis2dw12_filter_bandwidth_get(lis2dw12_ctx_t *ctx,
cparata 4:94c5d5546161 612 lis2dw12_bw_filt_t *val);
cparata 0:dff8803aace7 613
cparata 0:dff8803aace7 614 int32_t lis2dw12_reference_mode_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 615 int32_t lis2dw12_reference_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 616
cparata 0:dff8803aace7 617 typedef enum {
cparata 4:94c5d5546161 618 LIS2DW12_SPI_4_WIRE = 0,
cparata 4:94c5d5546161 619 LIS2DW12_SPI_3_WIRE = 1,
cparata 0:dff8803aace7 620 } lis2dw12_sim_t;
cparata 0:dff8803aace7 621 int32_t lis2dw12_spi_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sim_t val);
cparata 0:dff8803aace7 622 int32_t lis2dw12_spi_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sim_t *val);
cparata 0:dff8803aace7 623
cparata 0:dff8803aace7 624 typedef enum {
cparata 4:94c5d5546161 625 LIS2DW12_I2C_ENABLE = 0,
cparata 4:94c5d5546161 626 LIS2DW12_I2C_DISABLE = 1,
cparata 0:dff8803aace7 627 } lis2dw12_i2c_disable_t;
cparata 0:dff8803aace7 628 int32_t lis2dw12_i2c_interface_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 629 lis2dw12_i2c_disable_t val);
cparata 0:dff8803aace7 630 int32_t lis2dw12_i2c_interface_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 631 lis2dw12_i2c_disable_t *val);
cparata 0:dff8803aace7 632
cparata 0:dff8803aace7 633 typedef enum {
cparata 4:94c5d5546161 634 LIS2DW12_PULL_UP_CONNECT = 0,
cparata 4:94c5d5546161 635 LIS2DW12_PULL_UP_DISCONNECT = 1,
cparata 0:dff8803aace7 636 } lis2dw12_cs_pu_disc_t;
cparata 0:dff8803aace7 637 int32_t lis2dw12_cs_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t val);
cparata 0:dff8803aace7 638 int32_t lis2dw12_cs_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t *val);
cparata 0:dff8803aace7 639
cparata 0:dff8803aace7 640 typedef enum {
cparata 4:94c5d5546161 641 LIS2DW12_ACTIVE_HIGH = 0,
cparata 4:94c5d5546161 642 LIS2DW12_ACTIVE_LOW = 1,
cparata 0:dff8803aace7 643 } lis2dw12_h_lactive_t;
cparata 0:dff8803aace7 644 int32_t lis2dw12_pin_polarity_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 645 lis2dw12_h_lactive_t val);
cparata 0:dff8803aace7 646 int32_t lis2dw12_pin_polarity_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 647 lis2dw12_h_lactive_t *val);
cparata 0:dff8803aace7 648
cparata 0:dff8803aace7 649 typedef enum {
cparata 4:94c5d5546161 650 LIS2DW12_INT_PULSED = 0,
cparata 4:94c5d5546161 651 LIS2DW12_INT_LATCHED = 1,
cparata 0:dff8803aace7 652 } lis2dw12_lir_t;
cparata 0:dff8803aace7 653 int32_t lis2dw12_int_notification_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 654 lis2dw12_lir_t val);
cparata 0:dff8803aace7 655 int32_t lis2dw12_int_notification_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 656 lis2dw12_lir_t *val);
cparata 0:dff8803aace7 657
cparata 0:dff8803aace7 658 typedef enum {
cparata 4:94c5d5546161 659 LIS2DW12_PUSH_PULL = 0,
cparata 4:94c5d5546161 660 LIS2DW12_OPEN_DRAIN = 1,
cparata 0:dff8803aace7 661 } lis2dw12_pp_od_t;
cparata 0:dff8803aace7 662 int32_t lis2dw12_pin_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t val);
cparata 0:dff8803aace7 663 int32_t lis2dw12_pin_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t *val);
cparata 0:dff8803aace7 664
cparata 4:94c5d5546161 665 int32_t lis2dw12_pin_int1_route_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 666 lis2dw12_ctrl4_int1_pad_ctrl_t *val);
cparata 0:dff8803aace7 667 int32_t lis2dw12_pin_int1_route_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 668 lis2dw12_ctrl4_int1_pad_ctrl_t *val);
cparata 0:dff8803aace7 669
cparata 0:dff8803aace7 670 int32_t lis2dw12_pin_int2_route_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 671 lis2dw12_ctrl5_int2_pad_ctrl_t *val);
cparata 0:dff8803aace7 672 int32_t lis2dw12_pin_int2_route_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 673 lis2dw12_ctrl5_int2_pad_ctrl_t *val);
cparata 0:dff8803aace7 674
cparata 0:dff8803aace7 675 int32_t lis2dw12_all_on_int1_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 676 int32_t lis2dw12_all_on_int1_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 677
cparata 0:dff8803aace7 678 int32_t lis2dw12_wkup_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 679 int32_t lis2dw12_wkup_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 680
cparata 0:dff8803aace7 681 int32_t lis2dw12_wkup_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 682 int32_t lis2dw12_wkup_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 683
cparata 0:dff8803aace7 684 typedef enum {
cparata 4:94c5d5546161 685 LIS2DW12_HP_FEED = 0,
cparata 4:94c5d5546161 686 LIS2DW12_USER_OFFSET_FEED = 1,
cparata 0:dff8803aace7 687 } lis2dw12_usr_off_on_wu_t;
cparata 0:dff8803aace7 688 int32_t lis2dw12_wkup_feed_data_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 689 lis2dw12_usr_off_on_wu_t val);
cparata 0:dff8803aace7 690 int32_t lis2dw12_wkup_feed_data_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 691 lis2dw12_usr_off_on_wu_t *val);
cparata 0:dff8803aace7 692
cparata 0:dff8803aace7 693 typedef enum {
cparata 4:94c5d5546161 694 LIS2DW12_NO_DETECTION = 0,
cparata 4:94c5d5546161 695 LIS2DW12_DETECT_ACT_INACT = 1,
cparata 4:94c5d5546161 696 LIS2DW12_DETECT_STAT_MOTION = 3,
cparata 0:dff8803aace7 697 } lis2dw12_sleep_on_t;
cparata 0:dff8803aace7 698 int32_t lis2dw12_act_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t val);
cparata 0:dff8803aace7 699 int32_t lis2dw12_act_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t *val);
cparata 0:dff8803aace7 700
cparata 0:dff8803aace7 701 int32_t lis2dw12_act_sleep_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 702 int32_t lis2dw12_act_sleep_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 703
cparata 0:dff8803aace7 704 int32_t lis2dw12_tap_threshold_x_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 705 int32_t lis2dw12_tap_threshold_x_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 706
cparata 0:dff8803aace7 707 int32_t lis2dw12_tap_threshold_y_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 708 int32_t lis2dw12_tap_threshold_y_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 709
cparata 0:dff8803aace7 710 typedef enum {
cparata 4:94c5d5546161 711 LIS2DW12_XYZ = 0,
cparata 4:94c5d5546161 712 LIS2DW12_YXZ = 1,
cparata 4:94c5d5546161 713 LIS2DW12_XZY = 2,
cparata 4:94c5d5546161 714 LIS2DW12_ZYX = 3,
cparata 4:94c5d5546161 715 LIS2DW12_YZX = 5,
cparata 4:94c5d5546161 716 LIS2DW12_ZXY = 6,
cparata 0:dff8803aace7 717 } lis2dw12_tap_prior_t;
cparata 0:dff8803aace7 718 int32_t lis2dw12_tap_axis_priority_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 719 lis2dw12_tap_prior_t val);
cparata 0:dff8803aace7 720 int32_t lis2dw12_tap_axis_priority_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 721 lis2dw12_tap_prior_t *val);
cparata 0:dff8803aace7 722
cparata 0:dff8803aace7 723 int32_t lis2dw12_tap_threshold_z_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 724 int32_t lis2dw12_tap_threshold_z_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 725
cparata 0:dff8803aace7 726 int32_t lis2dw12_tap_detection_on_z_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 727 int32_t lis2dw12_tap_detection_on_z_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 728
cparata 0:dff8803aace7 729 int32_t lis2dw12_tap_detection_on_y_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 730 int32_t lis2dw12_tap_detection_on_y_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 731
cparata 0:dff8803aace7 732 int32_t lis2dw12_tap_detection_on_x_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 733 int32_t lis2dw12_tap_detection_on_x_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 734
cparata 0:dff8803aace7 735 int32_t lis2dw12_tap_shock_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 736 int32_t lis2dw12_tap_shock_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 737
cparata 0:dff8803aace7 738 int32_t lis2dw12_tap_quiet_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 739 int32_t lis2dw12_tap_quiet_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 740
cparata 0:dff8803aace7 741 int32_t lis2dw12_tap_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 742 int32_t lis2dw12_tap_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 743
cparata 0:dff8803aace7 744 typedef enum {
cparata 4:94c5d5546161 745 LIS2DW12_ONLY_SINGLE = 0,
cparata 4:94c5d5546161 746 LIS2DW12_BOTH_SINGLE_DOUBLE = 1,
cparata 0:dff8803aace7 747 } lis2dw12_single_double_tap_t;
cparata 0:dff8803aace7 748 int32_t lis2dw12_tap_mode_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 749 lis2dw12_single_double_tap_t val);
cparata 0:dff8803aace7 750 int32_t lis2dw12_tap_mode_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 751 lis2dw12_single_double_tap_t *val);
cparata 0:dff8803aace7 752
cparata 0:dff8803aace7 753 int32_t lis2dw12_tap_src_get(lis2dw12_ctx_t *ctx, lis2dw12_tap_src_t *val);
cparata 0:dff8803aace7 754
cparata 0:dff8803aace7 755 int32_t lis2dw12_6d_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 756 int32_t lis2dw12_6d_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 757
cparata 0:dff8803aace7 758 int32_t lis2dw12_4d_mode_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 759 int32_t lis2dw12_4d_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 760
cparata 0:dff8803aace7 761 int32_t lis2dw12_6d_src_get(lis2dw12_ctx_t *ctx, lis2dw12_sixd_src_t *val);
cparata 0:dff8803aace7 762
cparata 0:dff8803aace7 763 typedef enum {
cparata 4:94c5d5546161 764 LIS2DW12_ODR_DIV_2_FEED = 0,
cparata 4:94c5d5546161 765 LIS2DW12_LPF2_FEED = 1,
cparata 0:dff8803aace7 766 } lis2dw12_lpass_on6d_t;
cparata 0:dff8803aace7 767 int32_t lis2dw12_6d_feed_data_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 768 lis2dw12_lpass_on6d_t val);
cparata 0:dff8803aace7 769 int32_t lis2dw12_6d_feed_data_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 770 lis2dw12_lpass_on6d_t *val);
cparata 0:dff8803aace7 771
cparata 0:dff8803aace7 772 int32_t lis2dw12_ff_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 773 int32_t lis2dw12_ff_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 774
cparata 0:dff8803aace7 775 typedef enum {
cparata 4:94c5d5546161 776 LIS2DW12_FF_TSH_5LSb_FS2g = 0,
cparata 4:94c5d5546161 777 LIS2DW12_FF_TSH_7LSb_FS2g = 1,
cparata 4:94c5d5546161 778 LIS2DW12_FF_TSH_8LSb_FS2g = 2,
cparata 4:94c5d5546161 779 LIS2DW12_FF_TSH_10LSb_FS2g = 3,
cparata 4:94c5d5546161 780 LIS2DW12_FF_TSH_11LSb_FS2g = 4,
cparata 4:94c5d5546161 781 LIS2DW12_FF_TSH_13LSb_FS2g = 5,
cparata 4:94c5d5546161 782 LIS2DW12_FF_TSH_15LSb_FS2g = 6,
cparata 4:94c5d5546161 783 LIS2DW12_FF_TSH_16LSb_FS2g = 7,
cparata 0:dff8803aace7 784 } lis2dw12_ff_ths_t;
cparata 0:dff8803aace7 785 int32_t lis2dw12_ff_threshold_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 786 lis2dw12_ff_ths_t val);
cparata 0:dff8803aace7 787 int32_t lis2dw12_ff_threshold_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 788 lis2dw12_ff_ths_t *val);
cparata 0:dff8803aace7 789
cparata 0:dff8803aace7 790 int32_t lis2dw12_fifo_watermark_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 791 int32_t lis2dw12_fifo_watermark_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 792
cparata 0:dff8803aace7 793 typedef enum {
cparata 4:94c5d5546161 794 LIS2DW12_BYPASS_MODE = 0,
cparata 4:94c5d5546161 795 LIS2DW12_FIFO_MODE = 1,
cparata 4:94c5d5546161 796 LIS2DW12_STREAM_TO_FIFO_MODE = 3,
cparata 4:94c5d5546161 797 LIS2DW12_BYPASS_TO_STREAM_MODE = 4,
cparata 4:94c5d5546161 798 LIS2DW12_STREAM_MODE = 6,
cparata 0:dff8803aace7 799 } lis2dw12_fmode_t;
cparata 0:dff8803aace7 800 int32_t lis2dw12_fifo_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t val);
cparata 0:dff8803aace7 801 int32_t lis2dw12_fifo_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t *val);
cparata 0:dff8803aace7 802
cparata 0:dff8803aace7 803 int32_t lis2dw12_fifo_data_level_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 804
cparata 0:dff8803aace7 805 int32_t lis2dw12_fifo_ovr_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 806
cparata 0:dff8803aace7 807 int32_t lis2dw12_fifo_wtm_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 808
cparata 0:dff8803aace7 809 /**
cparata 0:dff8803aace7 810 * @}
cparata 2:a94816b14e3d 811 *
cparata 2:a94816b14e3d 812 */
cparata 0:dff8803aace7 813
cparata 0:dff8803aace7 814 #ifdef __cplusplus
cparata 0:dff8803aace7 815 }
cparata 0:dff8803aace7 816 #endif
cparata 0:dff8803aace7 817
cparata 2:a94816b14e3d 818 #endif /*LIS2DW12_REGS_H */
cparata 0:dff8803aace7 819
cparata 0:dff8803aace7 820 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/