ST / BSP_DISCO_L476VG

STM32L476G-Discovery board drivers V1.0.0

Dependents:   DiscoLogger DISCO_L476VG_GlassLCD DISCO_L476VG_MicrophoneRecorder DISCO_L476VG_UART ... more

Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c@1:917af0ca86df, 2017-07-05 (annotated)

Committer:
Jerome Coutant
Date:
Wed Jul 05 10:51:49 2017 +0200
Revision:
1:917af0ca86df
Child:
5:4943b15cce9f
Update with STM32Cube_FW_L4_V1.8.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Jerome Coutant 1:917af0ca86df 1 /**
Jerome Coutant 1:917af0ca86df 2 ******************************************************************************
Jerome Coutant 1:917af0ca86df 3 * @file mfxstm32l152.c
Jerome Coutant 1:917af0ca86df 4 * @author MCD Application Team
Jerome Coutant 1:917af0ca86df 5 * @version V2.0.0
Jerome Coutant 1:917af0ca86df 6 * @date 24-June-2015
Jerome Coutant 1:917af0ca86df 7 * @brief This file provides a set of functions needed to manage the MFXSTM32L152
Jerome Coutant 1:917af0ca86df 8 * IO Expander devices.
Jerome Coutant 1:917af0ca86df 9 ******************************************************************************
Jerome Coutant 1:917af0ca86df 10 * @attention
Jerome Coutant 1:917af0ca86df 11 *
Jerome Coutant 1:917af0ca86df 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Jerome Coutant 1:917af0ca86df 13 *
Jerome Coutant 1:917af0ca86df 14 * Redistribution and use in source and binary forms, with or without modification,
Jerome Coutant 1:917af0ca86df 15 * are permitted provided that the following conditions are met:
Jerome Coutant 1:917af0ca86df 16 * 1. Redistributions of source code must retain the above copyright notice,
Jerome Coutant 1:917af0ca86df 17 * this list of conditions and the following disclaimer.
Jerome Coutant 1:917af0ca86df 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
Jerome Coutant 1:917af0ca86df 19 * this list of conditions and the following disclaimer in the documentation
Jerome Coutant 1:917af0ca86df 20 * and/or other materials provided with the distribution.
Jerome Coutant 1:917af0ca86df 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Jerome Coutant 1:917af0ca86df 22 * may be used to endorse or promote products derived from this software
Jerome Coutant 1:917af0ca86df 23 * without specific prior written permission.
Jerome Coutant 1:917af0ca86df 24 *
Jerome Coutant 1:917af0ca86df 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Jerome Coutant 1:917af0ca86df 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Jerome Coutant 1:917af0ca86df 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Jerome Coutant 1:917af0ca86df 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Jerome Coutant 1:917af0ca86df 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Jerome Coutant 1:917af0ca86df 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Jerome Coutant 1:917af0ca86df 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Jerome Coutant 1:917af0ca86df 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Jerome Coutant 1:917af0ca86df 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Jerome Coutant 1:917af0ca86df 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Jerome Coutant 1:917af0ca86df 35 *
Jerome Coutant 1:917af0ca86df 36 ******************************************************************************
Jerome Coutant 1:917af0ca86df 37 */
Jerome Coutant 1:917af0ca86df 38
Jerome Coutant 1:917af0ca86df 39 /* Includes ------------------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 40 #include "mfxstm32l152.h"
Jerome Coutant 1:917af0ca86df 41
Jerome Coutant 1:917af0ca86df 42 /** @addtogroup BSP
Jerome Coutant 1:917af0ca86df 43 * @{
Jerome Coutant 1:917af0ca86df 44 */
Jerome Coutant 1:917af0ca86df 45
Jerome Coutant 1:917af0ca86df 46 /** @addtogroup Component
Jerome Coutant 1:917af0ca86df 47 * @{
Jerome Coutant 1:917af0ca86df 48 */
Jerome Coutant 1:917af0ca86df 49
Jerome Coutant 1:917af0ca86df 50 /** @defgroup MFXSTM32L152
Jerome Coutant 1:917af0ca86df 51 * @{
Jerome Coutant 1:917af0ca86df 52 */
Jerome Coutant 1:917af0ca86df 53
Jerome Coutant 1:917af0ca86df 54 /* Private typedef -----------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 55
Jerome Coutant 1:917af0ca86df 56 /** @defgroup MFXSTM32L152_Private_Types_Definitions
Jerome Coutant 1:917af0ca86df 57 * @{
Jerome Coutant 1:917af0ca86df 58 */
Jerome Coutant 1:917af0ca86df 59
Jerome Coutant 1:917af0ca86df 60 /* Private define ------------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 61
Jerome Coutant 1:917af0ca86df 62 /** @defgroup MFXSTM32L152_Private_Defines
Jerome Coutant 1:917af0ca86df 63 * @{
Jerome Coutant 1:917af0ca86df 64 */
Jerome Coutant 1:917af0ca86df 65 #define MFXSTM32L152_MAX_INSTANCE 3
Jerome Coutant 1:917af0ca86df 66
Jerome Coutant 1:917af0ca86df 67 /* Private macro -------------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 68
Jerome Coutant 1:917af0ca86df 69 /** @defgroup MFXSTM32L152_Private_Macros
Jerome Coutant 1:917af0ca86df 70 * @{
Jerome Coutant 1:917af0ca86df 71 */
Jerome Coutant 1:917af0ca86df 72
Jerome Coutant 1:917af0ca86df 73 /* Private variables ---------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 74
Jerome Coutant 1:917af0ca86df 75 /** @defgroup MFXSTM32L152_Private_Variables
Jerome Coutant 1:917af0ca86df 76 * @{
Jerome Coutant 1:917af0ca86df 77 */
Jerome Coutant 1:917af0ca86df 78
Jerome Coutant 1:917af0ca86df 79 /* Touch screen driver structure initialization */
Jerome Coutant 1:917af0ca86df 80 TS_DrvTypeDef mfxstm32l152_ts_drv =
Jerome Coutant 1:917af0ca86df 81 {
Jerome Coutant 1:917af0ca86df 82 mfxstm32l152_Init,
Jerome Coutant 1:917af0ca86df 83 mfxstm32l152_ReadID,
Jerome Coutant 1:917af0ca86df 84 mfxstm32l152_Reset,
Jerome Coutant 1:917af0ca86df 85
Jerome Coutant 1:917af0ca86df 86 mfxstm32l152_TS_Start,
Jerome Coutant 1:917af0ca86df 87 mfxstm32l152_TS_DetectTouch,
Jerome Coutant 1:917af0ca86df 88 mfxstm32l152_TS_GetXY,
Jerome Coutant 1:917af0ca86df 89
Jerome Coutant 1:917af0ca86df 90 mfxstm32l152_TS_EnableIT,
Jerome Coutant 1:917af0ca86df 91 mfxstm32l152_TS_ClearIT,
Jerome Coutant 1:917af0ca86df 92 mfxstm32l152_TS_ITStatus,
Jerome Coutant 1:917af0ca86df 93 mfxstm32l152_TS_DisableIT,
Jerome Coutant 1:917af0ca86df 94 };
Jerome Coutant 1:917af0ca86df 95
Jerome Coutant 1:917af0ca86df 96 /* IO driver structure initialization */
Jerome Coutant 1:917af0ca86df 97 IO_DrvTypeDef mfxstm32l152_io_drv =
Jerome Coutant 1:917af0ca86df 98 {
Jerome Coutant 1:917af0ca86df 99 mfxstm32l152_Init,
Jerome Coutant 1:917af0ca86df 100 mfxstm32l152_ReadID,
Jerome Coutant 1:917af0ca86df 101 mfxstm32l152_Reset,
Jerome Coutant 1:917af0ca86df 102
Jerome Coutant 1:917af0ca86df 103 mfxstm32l152_IO_Start,
Jerome Coutant 1:917af0ca86df 104 mfxstm32l152_IO_Config,
Jerome Coutant 1:917af0ca86df 105 mfxstm32l152_IO_WritePin,
Jerome Coutant 1:917af0ca86df 106 mfxstm32l152_IO_ReadPin,
Jerome Coutant 1:917af0ca86df 107
Jerome Coutant 1:917af0ca86df 108 mfxstm32l152_IO_EnableIT,
Jerome Coutant 1:917af0ca86df 109 mfxstm32l152_IO_DisableIT,
Jerome Coutant 1:917af0ca86df 110 mfxstm32l152_IO_ITStatus,
Jerome Coutant 1:917af0ca86df 111 mfxstm32l152_IO_ClearIT,
Jerome Coutant 1:917af0ca86df 112 };
Jerome Coutant 1:917af0ca86df 113
Jerome Coutant 1:917af0ca86df 114 /* IDD driver structure initialization */
Jerome Coutant 1:917af0ca86df 115 IDD_DrvTypeDef mfxstm32l152_idd_drv =
Jerome Coutant 1:917af0ca86df 116 {
Jerome Coutant 1:917af0ca86df 117 mfxstm32l152_Init,
Jerome Coutant 1:917af0ca86df 118 mfxstm32l152_DeInit,
Jerome Coutant 1:917af0ca86df 119 mfxstm32l152_ReadID,
Jerome Coutant 1:917af0ca86df 120 mfxstm32l152_Reset,
Jerome Coutant 1:917af0ca86df 121 mfxstm32l152_LowPower,
Jerome Coutant 1:917af0ca86df 122 mfxstm32l152_WakeUp,
Jerome Coutant 1:917af0ca86df 123
Jerome Coutant 1:917af0ca86df 124 mfxstm32l152_IDD_Start,
Jerome Coutant 1:917af0ca86df 125 mfxstm32l152_IDD_Config,
Jerome Coutant 1:917af0ca86df 126 mfxstm32l152_IDD_GetValue,
Jerome Coutant 1:917af0ca86df 127
Jerome Coutant 1:917af0ca86df 128 mfxstm32l152_IDD_EnableIT,
Jerome Coutant 1:917af0ca86df 129 mfxstm32l152_IDD_ClearIT,
Jerome Coutant 1:917af0ca86df 130 mfxstm32l152_IDD_GetITStatus,
Jerome Coutant 1:917af0ca86df 131 mfxstm32l152_IDD_DisableIT,
Jerome Coutant 1:917af0ca86df 132
Jerome Coutant 1:917af0ca86df 133 mfxstm32l152_Error_EnableIT,
Jerome Coutant 1:917af0ca86df 134 mfxstm32l152_Error_ClearIT,
Jerome Coutant 1:917af0ca86df 135 mfxstm32l152_Error_GetITStatus,
Jerome Coutant 1:917af0ca86df 136 mfxstm32l152_Error_DisableIT,
Jerome Coutant 1:917af0ca86df 137 mfxstm32l152_Error_ReadSrc,
Jerome Coutant 1:917af0ca86df 138 mfxstm32l152_Error_ReadMsg
Jerome Coutant 1:917af0ca86df 139 };
Jerome Coutant 1:917af0ca86df 140
Jerome Coutant 1:917af0ca86df 141
Jerome Coutant 1:917af0ca86df 142 /* mfxstm32l152 instances by address */
Jerome Coutant 1:917af0ca86df 143 uint8_t mfxstm32l152[MFXSTM32L152_MAX_INSTANCE] = {0};
Jerome Coutant 1:917af0ca86df 144 /**
Jerome Coutant 1:917af0ca86df 145 * @}
Jerome Coutant 1:917af0ca86df 146 */
Jerome Coutant 1:917af0ca86df 147
Jerome Coutant 1:917af0ca86df 148 /* Private function prototypes -----------------------------------------------*/
Jerome Coutant 1:917af0ca86df 149
Jerome Coutant 1:917af0ca86df 150 /** @defgroup MFXSTM32L152_Private_Function_Prototypes
Jerome Coutant 1:917af0ca86df 151 * @{
Jerome Coutant 1:917af0ca86df 152 */
Jerome Coutant 1:917af0ca86df 153 static uint8_t mfxstm32l152_GetInstance(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 154 static uint8_t mfxstm32l152_ReleaseInstance(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 155 static void mfxstm32l152_reg24_setPinValue(uint16_t DeviceAddr, uint8_t RegisterAddr, uint32_t PinPosition, uint8_t PinValue );
Jerome Coutant 1:917af0ca86df 156
Jerome Coutant 1:917af0ca86df 157 /* Private functions ---------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 158
Jerome Coutant 1:917af0ca86df 159 /** @defgroup MFXSTM32L152_Private_Functions
Jerome Coutant 1:917af0ca86df 160 * @{
Jerome Coutant 1:917af0ca86df 161 */
Jerome Coutant 1:917af0ca86df 162
Jerome Coutant 1:917af0ca86df 163 /**
Jerome Coutant 1:917af0ca86df 164 * @brief Initialize the mfxstm32l152 and configure the needed hardware resources
Jerome Coutant 1:917af0ca86df 165 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 166 * @retval None
Jerome Coutant 1:917af0ca86df 167 */
Jerome Coutant 1:917af0ca86df 168 void mfxstm32l152_Init(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 169 {
Jerome Coutant 1:917af0ca86df 170 uint8_t instance;
Jerome Coutant 1:917af0ca86df 171 uint8_t empty;
Jerome Coutant 1:917af0ca86df 172
Jerome Coutant 1:917af0ca86df 173 /* Check if device instance already exists */
Jerome Coutant 1:917af0ca86df 174 instance = mfxstm32l152_GetInstance(DeviceAddr);
Jerome Coutant 1:917af0ca86df 175
Jerome Coutant 1:917af0ca86df 176 /* To prevent double initialization */
Jerome Coutant 1:917af0ca86df 177 if(instance == 0xFF)
Jerome Coutant 1:917af0ca86df 178 {
Jerome Coutant 1:917af0ca86df 179 /* Look for empty instance */
Jerome Coutant 1:917af0ca86df 180 empty = mfxstm32l152_GetInstance(0);
Jerome Coutant 1:917af0ca86df 181
Jerome Coutant 1:917af0ca86df 182 if(empty < MFXSTM32L152_MAX_INSTANCE)
Jerome Coutant 1:917af0ca86df 183 {
Jerome Coutant 1:917af0ca86df 184 /* Register the current device instance */
Jerome Coutant 1:917af0ca86df 185 mfxstm32l152[empty] = DeviceAddr;
Jerome Coutant 1:917af0ca86df 186
Jerome Coutant 1:917af0ca86df 187 /* Initialize IO BUS layer */
Jerome Coutant 1:917af0ca86df 188 MFX_IO_Init();
Jerome Coutant 1:917af0ca86df 189 }
Jerome Coutant 1:917af0ca86df 190 }
Jerome Coutant 1:917af0ca86df 191
Jerome Coutant 1:917af0ca86df 192 mfxstm32l152_SetIrqOutPinPolarity(DeviceAddr, MFXSTM32L152_OUT_PIN_POLARITY_HIGH);
Jerome Coutant 1:917af0ca86df 193 mfxstm32l152_SetIrqOutPinType(DeviceAddr, MFXSTM32L152_OUT_PIN_TYPE_PUSHPULL);
Jerome Coutant 1:917af0ca86df 194 }
Jerome Coutant 1:917af0ca86df 195
Jerome Coutant 1:917af0ca86df 196 /**
Jerome Coutant 1:917af0ca86df 197 * @brief DeInitialize the mfxstm32l152 and unconfigure the needed hardware resources
Jerome Coutant 1:917af0ca86df 198 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 199 * @retval None
Jerome Coutant 1:917af0ca86df 200 */
Jerome Coutant 1:917af0ca86df 201 void mfxstm32l152_DeInit(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 202 {
Jerome Coutant 1:917af0ca86df 203 uint8_t instance;
Jerome Coutant 1:917af0ca86df 204
Jerome Coutant 1:917af0ca86df 205 /* release existing instance */
Jerome Coutant 1:917af0ca86df 206 instance = mfxstm32l152_ReleaseInstance(DeviceAddr);
Jerome Coutant 1:917af0ca86df 207
Jerome Coutant 1:917af0ca86df 208 /* De-Init only if instance was previously registered */
Jerome Coutant 1:917af0ca86df 209 if(instance != 0xFF)
Jerome Coutant 1:917af0ca86df 210 {
Jerome Coutant 1:917af0ca86df 211 /* De-Initialize IO BUS layer */
Jerome Coutant 1:917af0ca86df 212 MFX_IO_DeInit();
Jerome Coutant 1:917af0ca86df 213 }
Jerome Coutant 1:917af0ca86df 214 }
Jerome Coutant 1:917af0ca86df 215
Jerome Coutant 1:917af0ca86df 216 /**
Jerome Coutant 1:917af0ca86df 217 * @brief Reset the mfxstm32l152 by Software.
Jerome Coutant 1:917af0ca86df 218 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 219 * @retval None
Jerome Coutant 1:917af0ca86df 220 */
Jerome Coutant 1:917af0ca86df 221 void mfxstm32l152_Reset(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 222 {
Jerome Coutant 1:917af0ca86df 223 /* Soft Reset */
Jerome Coutant 1:917af0ca86df 224 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, MFXSTM32L152_SWRST);
Jerome Coutant 1:917af0ca86df 225
Jerome Coutant 1:917af0ca86df 226 /* Wait for a delay to ensure registers erasing */
Jerome Coutant 1:917af0ca86df 227 MFX_IO_Delay(10);
Jerome Coutant 1:917af0ca86df 228 }
Jerome Coutant 1:917af0ca86df 229
Jerome Coutant 1:917af0ca86df 230 /**
Jerome Coutant 1:917af0ca86df 231 * @brief Put mfxstm32l152 Device in Low Power standby mode
Jerome Coutant 1:917af0ca86df 232 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 233 * @retval None
Jerome Coutant 1:917af0ca86df 234 */
Jerome Coutant 1:917af0ca86df 235 void mfxstm32l152_LowPower(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 236 {
Jerome Coutant 1:917af0ca86df 237 /* Enter standby mode */
Jerome Coutant 1:917af0ca86df 238 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, MFXSTM32L152_STANDBY);
Jerome Coutant 1:917af0ca86df 239
Jerome Coutant 1:917af0ca86df 240 /* enable wakeup pin */
Jerome Coutant 1:917af0ca86df 241 MFX_IO_EnableWakeupPin();
Jerome Coutant 1:917af0ca86df 242 }
Jerome Coutant 1:917af0ca86df 243
Jerome Coutant 1:917af0ca86df 244 /**
Jerome Coutant 1:917af0ca86df 245 * @brief WakeUp mfxstm32l152 from standby mode
Jerome Coutant 1:917af0ca86df 246 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 247 * @retval None
Jerome Coutant 1:917af0ca86df 248 */
Jerome Coutant 1:917af0ca86df 249 void mfxstm32l152_WakeUp(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 250 {
Jerome Coutant 1:917af0ca86df 251 uint8_t instance;
Jerome Coutant 1:917af0ca86df 252
Jerome Coutant 1:917af0ca86df 253 /* Check if device instance already exists */
Jerome Coutant 1:917af0ca86df 254 instance = mfxstm32l152_GetInstance(DeviceAddr);
Jerome Coutant 1:917af0ca86df 255
Jerome Coutant 1:917af0ca86df 256 /* if instance does not exist, first initialize pins*/
Jerome Coutant 1:917af0ca86df 257 if(instance == 0xFF)
Jerome Coutant 1:917af0ca86df 258 {
Jerome Coutant 1:917af0ca86df 259 /* enable wakeup pin */
Jerome Coutant 1:917af0ca86df 260 MFX_IO_EnableWakeupPin();
Jerome Coutant 1:917af0ca86df 261 }
Jerome Coutant 1:917af0ca86df 262
Jerome Coutant 1:917af0ca86df 263 /* toggle wakeup pin */
Jerome Coutant 1:917af0ca86df 264 MFX_IO_Wakeup();
Jerome Coutant 1:917af0ca86df 265 }
Jerome Coutant 1:917af0ca86df 266
Jerome Coutant 1:917af0ca86df 267 /**
Jerome Coutant 1:917af0ca86df 268 * @brief Read the MFXSTM32L152 IO Expander device ID.
Jerome Coutant 1:917af0ca86df 269 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 270 * @retval The Device ID (two bytes).
Jerome Coutant 1:917af0ca86df 271 */
Jerome Coutant 1:917af0ca86df 272 uint16_t mfxstm32l152_ReadID(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 273 {
Jerome Coutant 1:917af0ca86df 274 uint8_t id;
Jerome Coutant 1:917af0ca86df 275
Jerome Coutant 1:917af0ca86df 276 /* Wait for a delay to ensure the state of registers */
Jerome Coutant 1:917af0ca86df 277 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 278
Jerome Coutant 1:917af0ca86df 279 /* Initialize IO BUS layer */
Jerome Coutant 1:917af0ca86df 280 MFX_IO_Init();
Jerome Coutant 1:917af0ca86df 281
Jerome Coutant 1:917af0ca86df 282 id = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_ID);
Jerome Coutant 1:917af0ca86df 283
Jerome Coutant 1:917af0ca86df 284 /* Return the device ID value */
Jerome Coutant 1:917af0ca86df 285 return (id);
Jerome Coutant 1:917af0ca86df 286 }
Jerome Coutant 1:917af0ca86df 287
Jerome Coutant 1:917af0ca86df 288 /**
Jerome Coutant 1:917af0ca86df 289 * @brief Read the MFXSTM32L152 device firmware version.
Jerome Coutant 1:917af0ca86df 290 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 291 * @retval The Device FW version (two bytes).
Jerome Coutant 1:917af0ca86df 292 */
Jerome Coutant 1:917af0ca86df 293 uint16_t mfxstm32l152_ReadFwVersion(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 294 {
Jerome Coutant 1:917af0ca86df 295 uint8_t data[2];
Jerome Coutant 1:917af0ca86df 296
Jerome Coutant 1:917af0ca86df 297 MFX_IO_ReadMultiple((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_FW_VERSION_MSB, data, sizeof(data)) ;
Jerome Coutant 1:917af0ca86df 298
Jerome Coutant 1:917af0ca86df 299 /* Recompose MFX firmware value */
Jerome Coutant 1:917af0ca86df 300 return ((data[0] << 8) | data[1]);
Jerome Coutant 1:917af0ca86df 301 }
Jerome Coutant 1:917af0ca86df 302
Jerome Coutant 1:917af0ca86df 303 /**
Jerome Coutant 1:917af0ca86df 304 * @brief Enable the interrupt mode for the selected IT source
Jerome Coutant 1:917af0ca86df 305 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 306 * @param Source: The interrupt source to be configured, could be:
Jerome Coutant 1:917af0ca86df 307 * @arg MFXSTM32L152_IRQ_GPIO: IO interrupt
Jerome Coutant 1:917af0ca86df 308 * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
Jerome Coutant 1:917af0ca86df 309 * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
Jerome Coutant 1:917af0ca86df 310 * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
Jerome Coutant 1:917af0ca86df 311 * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
Jerome Coutant 1:917af0ca86df 312 * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
Jerome Coutant 1:917af0ca86df 313 * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
Jerome Coutant 1:917af0ca86df 314 * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
Jerome Coutant 1:917af0ca86df 315 * @retval None
Jerome Coutant 1:917af0ca86df 316 */
Jerome Coutant 1:917af0ca86df 317 void mfxstm32l152_EnableITSource(uint16_t DeviceAddr, uint8_t Source)
Jerome Coutant 1:917af0ca86df 318 {
Jerome Coutant 1:917af0ca86df 319 uint8_t tmp = 0;
Jerome Coutant 1:917af0ca86df 320
Jerome Coutant 1:917af0ca86df 321 /* Get the current value of the INT_EN register */
Jerome Coutant 1:917af0ca86df 322 tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN);
Jerome Coutant 1:917af0ca86df 323
Jerome Coutant 1:917af0ca86df 324 /* Set the interrupts to be Enabled */
Jerome Coutant 1:917af0ca86df 325 tmp |= Source;
Jerome Coutant 1:917af0ca86df 326
Jerome Coutant 1:917af0ca86df 327 /* Set the register */
Jerome Coutant 1:917af0ca86df 328 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN, tmp);
Jerome Coutant 1:917af0ca86df 329 }
Jerome Coutant 1:917af0ca86df 330
Jerome Coutant 1:917af0ca86df 331 /**
Jerome Coutant 1:917af0ca86df 332 * @brief Disable the interrupt mode for the selected IT source
Jerome Coutant 1:917af0ca86df 333 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 334 * @param Source: The interrupt source to be configured, could be:
Jerome Coutant 1:917af0ca86df 335 * @arg MFXSTM32L152_IRQ_GPIO: IO interrupt
Jerome Coutant 1:917af0ca86df 336 * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
Jerome Coutant 1:917af0ca86df 337 * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
Jerome Coutant 1:917af0ca86df 338 * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
Jerome Coutant 1:917af0ca86df 339 * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
Jerome Coutant 1:917af0ca86df 340 * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
Jerome Coutant 1:917af0ca86df 341 * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
Jerome Coutant 1:917af0ca86df 342 * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
Jerome Coutant 1:917af0ca86df 343 * @retval None
Jerome Coutant 1:917af0ca86df 344 */
Jerome Coutant 1:917af0ca86df 345 void mfxstm32l152_DisableITSource(uint16_t DeviceAddr, uint8_t Source)
Jerome Coutant 1:917af0ca86df 346 {
Jerome Coutant 1:917af0ca86df 347 uint8_t tmp = 0;
Jerome Coutant 1:917af0ca86df 348
Jerome Coutant 1:917af0ca86df 349 /* Get the current value of the INT_EN register */
Jerome Coutant 1:917af0ca86df 350 tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN);
Jerome Coutant 1:917af0ca86df 351
Jerome Coutant 1:917af0ca86df 352 /* Set the interrupts to be Enabled */
Jerome Coutant 1:917af0ca86df 353 tmp &= ~Source;
Jerome Coutant 1:917af0ca86df 354
Jerome Coutant 1:917af0ca86df 355 /* Set the register */
Jerome Coutant 1:917af0ca86df 356 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN, tmp);
Jerome Coutant 1:917af0ca86df 357 }
Jerome Coutant 1:917af0ca86df 358
Jerome Coutant 1:917af0ca86df 359
Jerome Coutant 1:917af0ca86df 360 /**
Jerome Coutant 1:917af0ca86df 361 * @brief Returns the selected Global interrupt source pending bit value
Jerome Coutant 1:917af0ca86df 362 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 363 * @param Source: the Global interrupt source to be checked, could be:
Jerome Coutant 1:917af0ca86df 364 * @arg MFXSTM32L152_IRQ_GPIO: IO interrupt
Jerome Coutant 1:917af0ca86df 365 * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
Jerome Coutant 1:917af0ca86df 366 * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
Jerome Coutant 1:917af0ca86df 367 * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
Jerome Coutant 1:917af0ca86df 368 * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
Jerome Coutant 1:917af0ca86df 369 * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
Jerome Coutant 1:917af0ca86df 370 * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
Jerome Coutant 1:917af0ca86df 371 * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
Jerome Coutant 1:917af0ca86df 372 * @retval The value of the checked Global interrupt source status.
Jerome Coutant 1:917af0ca86df 373 */
Jerome Coutant 1:917af0ca86df 374 uint8_t mfxstm32l152_GlobalITStatus(uint16_t DeviceAddr, uint8_t Source)
Jerome Coutant 1:917af0ca86df 375 {
Jerome Coutant 1:917af0ca86df 376 /* Return the global IT source status (pending or not)*/
Jerome Coutant 1:917af0ca86df 377 return((MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_PENDING) & Source));
Jerome Coutant 1:917af0ca86df 378 }
Jerome Coutant 1:917af0ca86df 379
Jerome Coutant 1:917af0ca86df 380 /**
Jerome Coutant 1:917af0ca86df 381 * @brief Clear the selected Global interrupt pending bit(s)
Jerome Coutant 1:917af0ca86df 382 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 383 * @param Source: the Global interrupt source to be cleared, could be any combination
Jerome Coutant 1:917af0ca86df 384 * of the below values. The acknowledge signal for MFXSTM32L152_GPIOs configured in input
Jerome Coutant 1:917af0ca86df 385 * with interrupt is not on this register but in IRQ_GPI_ACK1, IRQ_GPI_ACK2 registers.
Jerome Coutant 1:917af0ca86df 386 * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
Jerome Coutant 1:917af0ca86df 387 * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
Jerome Coutant 1:917af0ca86df 388 * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
Jerome Coutant 1:917af0ca86df 389 * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
Jerome Coutant 1:917af0ca86df 390 * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
Jerome Coutant 1:917af0ca86df 391 * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
Jerome Coutant 1:917af0ca86df 392 * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
Jerome Coutant 1:917af0ca86df 393 * /\/\ IMPORTANT NOTE /\/\ must not use MFXSTM32L152_IRQ_GPIO as argument, see IRQ_GPI_ACK1 and IRQ_GPI_ACK2 registers
Jerome Coutant 1:917af0ca86df 394 * @retval None
Jerome Coutant 1:917af0ca86df 395 */
Jerome Coutant 1:917af0ca86df 396 void mfxstm32l152_ClearGlobalIT(uint16_t DeviceAddr, uint8_t Source)
Jerome Coutant 1:917af0ca86df 397 {
Jerome Coutant 1:917af0ca86df 398 /* Write 1 to the bits that have to be cleared */
Jerome Coutant 1:917af0ca86df 399 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_ACK, Source);
Jerome Coutant 1:917af0ca86df 400 }
Jerome Coutant 1:917af0ca86df 401
Jerome Coutant 1:917af0ca86df 402 /**
Jerome Coutant 1:917af0ca86df 403 * @brief Set the global interrupt Polarity of IRQ_OUT_PIN.
Jerome Coutant 1:917af0ca86df 404 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 405 * @param Polarity: the IT mode polarity, could be one of the following values:
Jerome Coutant 1:917af0ca86df 406 * @arg MFXSTM32L152_OUT_PIN_POLARITY_LOW: Interrupt output line is active Low edge
Jerome Coutant 1:917af0ca86df 407 * @arg MFXSTM32L152_OUT_PIN_POLARITY_HIGH: Interrupt line output is active High edge
Jerome Coutant 1:917af0ca86df 408 * @retval None
Jerome Coutant 1:917af0ca86df 409 */
Jerome Coutant 1:917af0ca86df 410 void mfxstm32l152_SetIrqOutPinPolarity(uint16_t DeviceAddr, uint8_t Polarity)
Jerome Coutant 1:917af0ca86df 411 {
Jerome Coutant 1:917af0ca86df 412 uint8_t tmp = 0;
Jerome Coutant 1:917af0ca86df 413
Jerome Coutant 1:917af0ca86df 414 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 415 tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT);
Jerome Coutant 1:917af0ca86df 416
Jerome Coutant 1:917af0ca86df 417 /* Mask the polarity bits */
Jerome Coutant 1:917af0ca86df 418 tmp &= ~(uint8_t)0x02;
Jerome Coutant 1:917af0ca86df 419
Jerome Coutant 1:917af0ca86df 420 /* Modify the Interrupt Output line configuration */
Jerome Coutant 1:917af0ca86df 421 tmp |= Polarity;
Jerome Coutant 1:917af0ca86df 422
Jerome Coutant 1:917af0ca86df 423 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 424 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT, tmp);
Jerome Coutant 1:917af0ca86df 425
Jerome Coutant 1:917af0ca86df 426 /* Wait for 1 ms for MFX to change IRQ_out pin config, before activate it */
Jerome Coutant 1:917af0ca86df 427 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 428
Jerome Coutant 1:917af0ca86df 429 }
Jerome Coutant 1:917af0ca86df 430
Jerome Coutant 1:917af0ca86df 431 /**
Jerome Coutant 1:917af0ca86df 432 * @brief Set the global interrupt Type of IRQ_OUT_PIN.
Jerome Coutant 1:917af0ca86df 433 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 434 * @param Type: Interrupt line activity type, could be one of the following values:
Jerome Coutant 1:917af0ca86df 435 * @arg MFXSTM32L152_OUT_PIN_TYPE_OPENDRAIN: Open Drain output Interrupt line
Jerome Coutant 1:917af0ca86df 436 * @arg MFXSTM32L152_OUT_PIN_TYPE_PUSHPULL: Push Pull output Interrupt line
Jerome Coutant 1:917af0ca86df 437 * @retval None
Jerome Coutant 1:917af0ca86df 438 */
Jerome Coutant 1:917af0ca86df 439 void mfxstm32l152_SetIrqOutPinType(uint16_t DeviceAddr, uint8_t Type)
Jerome Coutant 1:917af0ca86df 440 {
Jerome Coutant 1:917af0ca86df 441 uint8_t tmp = 0;
Jerome Coutant 1:917af0ca86df 442
Jerome Coutant 1:917af0ca86df 443 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 444 tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT);
Jerome Coutant 1:917af0ca86df 445
Jerome Coutant 1:917af0ca86df 446 /* Mask the type bits */
Jerome Coutant 1:917af0ca86df 447 tmp &= ~(uint8_t)0x01;
Jerome Coutant 1:917af0ca86df 448
Jerome Coutant 1:917af0ca86df 449 /* Modify the Interrupt Output line configuration */
Jerome Coutant 1:917af0ca86df 450 tmp |= Type;
Jerome Coutant 1:917af0ca86df 451
Jerome Coutant 1:917af0ca86df 452 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 453 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT, tmp);
Jerome Coutant 1:917af0ca86df 454
Jerome Coutant 1:917af0ca86df 455 /* Wait for 1 ms for MFX to change IRQ_out pin config, before activate it */
Jerome Coutant 1:917af0ca86df 456 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 457
Jerome Coutant 1:917af0ca86df 458 }
Jerome Coutant 1:917af0ca86df 459
Jerome Coutant 1:917af0ca86df 460
Jerome Coutant 1:917af0ca86df 461 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 462 /* ----------------------- GPIO ------------------------------------- */
Jerome Coutant 1:917af0ca86df 463 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 464
Jerome Coutant 1:917af0ca86df 465
Jerome Coutant 1:917af0ca86df 466 /**
Jerome Coutant 1:917af0ca86df 467 * @brief Start the IO functionality used and enable the AF for selected IO pin(s).
Jerome Coutant 1:917af0ca86df 468 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 469 * @param AF_en: 0 to disable, else enabled.
Jerome Coutant 1:917af0ca86df 470 * @retval None
Jerome Coutant 1:917af0ca86df 471 */
Jerome Coutant 1:917af0ca86df 472 void mfxstm32l152_IO_Start(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 473 {
Jerome Coutant 1:917af0ca86df 474 uint8_t mode;
Jerome Coutant 1:917af0ca86df 475
Jerome Coutant 1:917af0ca86df 476 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 477 mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
Jerome Coutant 1:917af0ca86df 478
Jerome Coutant 1:917af0ca86df 479 /* Set the IO Functionalities to be Enabled */
Jerome Coutant 1:917af0ca86df 480 mode |= MFXSTM32L152_GPIO_EN;
Jerome Coutant 1:917af0ca86df 481
Jerome Coutant 1:917af0ca86df 482 /* Enable ALTERNATE functions */
Jerome Coutant 1:917af0ca86df 483 /* AGPIO[0..3] can be either IDD or GPIO */
Jerome Coutant 1:917af0ca86df 484 /* AGPIO[4..7] can be either TS or GPIO */
Jerome Coutant 1:917af0ca86df 485 /* if IDD or TS are enabled no matter the value this bit GPIO are not available for those pins */
Jerome Coutant 1:917af0ca86df 486 /* however the MFX will waste some cycles to to handle these potential GPIO (pooling, etc) */
Jerome Coutant 1:917af0ca86df 487 /* so if IDD and TS are both active it is better to let ALTERNATE off (0) */
Jerome Coutant 1:917af0ca86df 488 /* if however IDD or TS are not connected then set it on gives more GPIOs availability */
Jerome Coutant 1:917af0ca86df 489 /* remind that AGPIO are less efficient then normal GPIO (They use pooling rather then EXTI */
Jerome Coutant 1:917af0ca86df 490 if (IO_Pin > 0xFFFF)
Jerome Coutant 1:917af0ca86df 491 {
Jerome Coutant 1:917af0ca86df 492 mode |= MFXSTM32L152_ALTERNATE_GPIO_EN;
Jerome Coutant 1:917af0ca86df 493 }
Jerome Coutant 1:917af0ca86df 494 else
Jerome Coutant 1:917af0ca86df 495 {
Jerome Coutant 1:917af0ca86df 496 mode &= ~MFXSTM32L152_ALTERNATE_GPIO_EN;
Jerome Coutant 1:917af0ca86df 497 }
Jerome Coutant 1:917af0ca86df 498
Jerome Coutant 1:917af0ca86df 499 /* Write the new register value */
Jerome Coutant 1:917af0ca86df 500 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
Jerome Coutant 1:917af0ca86df 501
Jerome Coutant 1:917af0ca86df 502 /* Wait for 1 ms for MFX to change IRQ_out pin config, before activate it */
Jerome Coutant 1:917af0ca86df 503 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 504 }
Jerome Coutant 1:917af0ca86df 505
Jerome Coutant 1:917af0ca86df 506 /**
Jerome Coutant 1:917af0ca86df 507 * @brief Configures the IO pin(s) according to IO mode structure value.
Jerome Coutant 1:917af0ca86df 508 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 509 * @param IO_Pin: The output pin to be set or reset. This parameter can be one
Jerome Coutant 1:917af0ca86df 510 * of the following values:
Jerome Coutant 1:917af0ca86df 511 * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 512 * @param IO_Mode: The IO pin mode to configure, could be one of the following values:
Jerome Coutant 1:917af0ca86df 513 * @arg IO_MODE_INPUT
Jerome Coutant 1:917af0ca86df 514 * @arg IO_MODE_OUTPUT
Jerome Coutant 1:917af0ca86df 515 * @arg IO_MODE_IT_RISING_EDGE
Jerome Coutant 1:917af0ca86df 516 * @arg IO_MODE_IT_FALLING_EDGE
Jerome Coutant 1:917af0ca86df 517 * @arg IO_MODE_IT_LOW_LEVEL
Jerome Coutant 1:917af0ca86df 518 * @arg IO_MODE_IT_HIGH_LEVEL
Jerome Coutant 1:917af0ca86df 519 * @arg IO_MODE_INPUT_PU,
Jerome Coutant 1:917af0ca86df 520 * @arg IO_MODE_INPUT_PD,
Jerome Coutant 1:917af0ca86df 521 * @arg IO_MODE_OUTPUT_OD_PU,
Jerome Coutant 1:917af0ca86df 522 * @arg IO_MODE_OUTPUT_OD_PD,
Jerome Coutant 1:917af0ca86df 523 * @arg IO_MODE_OUTPUT_PP_PU,
Jerome Coutant 1:917af0ca86df 524 * @arg IO_MODE_OUTPUT_PP_PD,
Jerome Coutant 1:917af0ca86df 525 * @arg IO_MODE_IT_RISING_EDGE_PU
Jerome Coutant 1:917af0ca86df 526 * @arg IO_MODE_IT_FALLING_EDGE_PU
Jerome Coutant 1:917af0ca86df 527 * @arg IO_MODE_IT_LOW_LEVEL_PU
Jerome Coutant 1:917af0ca86df 528 * @arg IO_MODE_IT_HIGH_LEVEL_PU
Jerome Coutant 1:917af0ca86df 529 * @arg IO_MODE_IT_RISING_EDGE_PD
Jerome Coutant 1:917af0ca86df 530 * @arg IO_MODE_IT_FALLING_EDGE_PD
Jerome Coutant 1:917af0ca86df 531 * @arg IO_MODE_IT_LOW_LEVEL_PD
Jerome Coutant 1:917af0ca86df 532 * @arg IO_MODE_IT_HIGH_LEVEL_PD
Jerome Coutant 1:917af0ca86df 533 * @retval None
Jerome Coutant 1:917af0ca86df 534 */
Jerome Coutant 1:917af0ca86df 535 uint8_t mfxstm32l152_IO_Config(uint16_t DeviceAddr, uint32_t IO_Pin, IO_ModeTypedef IO_Mode)
Jerome Coutant 1:917af0ca86df 536 {
Jerome Coutant 1:917af0ca86df 537 uint8_t error_code = 0;
Jerome Coutant 1:917af0ca86df 538
Jerome Coutant 1:917af0ca86df 539 /* Configure IO pin according to selected IO mode */
Jerome Coutant 1:917af0ca86df 540 switch(IO_Mode)
Jerome Coutant 1:917af0ca86df 541 {
Jerome Coutant 1:917af0ca86df 542 case IO_MODE_OFF: /* Off or analog mode */
Jerome Coutant 1:917af0ca86df 543 case IO_MODE_ANALOG: /* Off or analog mode */
Jerome Coutant 1:917af0ca86df 544 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 545 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 546 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 547 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 548 break;
Jerome Coutant 1:917af0ca86df 549
Jerome Coutant 1:917af0ca86df 550 case IO_MODE_INPUT: /* Input mode */
Jerome Coutant 1:917af0ca86df 551 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 552 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 553 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 554 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 555 break;
Jerome Coutant 1:917af0ca86df 556
Jerome Coutant 1:917af0ca86df 557 case IO_MODE_INPUT_PU: /* Input mode */
Jerome Coutant 1:917af0ca86df 558 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 559 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 560 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 561 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 562 break;
Jerome Coutant 1:917af0ca86df 563
Jerome Coutant 1:917af0ca86df 564 case IO_MODE_INPUT_PD: /* Input mode */
Jerome Coutant 1:917af0ca86df 565 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 566 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 567 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 568 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 569 break;
Jerome Coutant 1:917af0ca86df 570
Jerome Coutant 1:917af0ca86df 571 case IO_MODE_OUTPUT: /* Output mode */
Jerome Coutant 1:917af0ca86df 572 case IO_MODE_OUTPUT_PP_PD: /* Output mode */
Jerome Coutant 1:917af0ca86df 573 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 574 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
Jerome Coutant 1:917af0ca86df 575 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_PUSH_PULL);
Jerome Coutant 1:917af0ca86df 576 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 577 break;
Jerome Coutant 1:917af0ca86df 578
Jerome Coutant 1:917af0ca86df 579 case IO_MODE_OUTPUT_PP_PU: /* Output mode */
Jerome Coutant 1:917af0ca86df 580 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 581 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
Jerome Coutant 1:917af0ca86df 582 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_PUSH_PULL);
Jerome Coutant 1:917af0ca86df 583 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 584 break;
Jerome Coutant 1:917af0ca86df 585
Jerome Coutant 1:917af0ca86df 586 case IO_MODE_OUTPUT_OD_PD: /* Output mode */
Jerome Coutant 1:917af0ca86df 587 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 588 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
Jerome Coutant 1:917af0ca86df 589 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_OPEN_DRAIN);
Jerome Coutant 1:917af0ca86df 590 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 591 break;
Jerome Coutant 1:917af0ca86df 592
Jerome Coutant 1:917af0ca86df 593 case IO_MODE_OUTPUT_OD_PU: /* Output mode */
Jerome Coutant 1:917af0ca86df 594 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 595 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
Jerome Coutant 1:917af0ca86df 596 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_OPEN_DRAIN);
Jerome Coutant 1:917af0ca86df 597 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 598 break;
Jerome Coutant 1:917af0ca86df 599
Jerome Coutant 1:917af0ca86df 600 case IO_MODE_IT_RISING_EDGE: /* Interrupt rising edge mode */
Jerome Coutant 1:917af0ca86df 601 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 602 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 603 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 604 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 605 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
Jerome Coutant 1:917af0ca86df 606 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 607 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 608 break;
Jerome Coutant 1:917af0ca86df 609
Jerome Coutant 1:917af0ca86df 610 case IO_MODE_IT_RISING_EDGE_PU: /* Interrupt rising edge mode */
Jerome Coutant 1:917af0ca86df 611 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 612 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 613 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 614 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 615 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
Jerome Coutant 1:917af0ca86df 616 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 617 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 618 break;
Jerome Coutant 1:917af0ca86df 619
Jerome Coutant 1:917af0ca86df 620 case IO_MODE_IT_RISING_EDGE_PD: /* Interrupt rising edge mode */
Jerome Coutant 1:917af0ca86df 621 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 622 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 623 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 624 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 625 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
Jerome Coutant 1:917af0ca86df 626 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 627 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 628 break;
Jerome Coutant 1:917af0ca86df 629
Jerome Coutant 1:917af0ca86df 630 case IO_MODE_IT_FALLING_EDGE: /* Interrupt falling edge mode */
Jerome Coutant 1:917af0ca86df 631 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 632 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 633 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 634 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 635 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
Jerome Coutant 1:917af0ca86df 636 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 637 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 638 break;
Jerome Coutant 1:917af0ca86df 639
Jerome Coutant 1:917af0ca86df 640 case IO_MODE_IT_FALLING_EDGE_PU: /* Interrupt falling edge mode */
Jerome Coutant 1:917af0ca86df 641 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 642 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 643 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 644 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 645 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
Jerome Coutant 1:917af0ca86df 646 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 647 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 648 break;
Jerome Coutant 1:917af0ca86df 649
Jerome Coutant 1:917af0ca86df 650 case IO_MODE_IT_FALLING_EDGE_PD: /* Interrupt falling edge mode */
Jerome Coutant 1:917af0ca86df 651 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 652 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 653 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 654 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 655 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
Jerome Coutant 1:917af0ca86df 656 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 657 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 658 break;
Jerome Coutant 1:917af0ca86df 659
Jerome Coutant 1:917af0ca86df 660 case IO_MODE_IT_LOW_LEVEL: /* Low level interrupt mode */
Jerome Coutant 1:917af0ca86df 661 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 662 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 663 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 664 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 665 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
Jerome Coutant 1:917af0ca86df 666 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 667 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 668 break;
Jerome Coutant 1:917af0ca86df 669
Jerome Coutant 1:917af0ca86df 670 case IO_MODE_IT_LOW_LEVEL_PU: /* Low level interrupt mode */
Jerome Coutant 1:917af0ca86df 671 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 672 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 673 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 674 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 675 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
Jerome Coutant 1:917af0ca86df 676 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 677 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 678 break;
Jerome Coutant 1:917af0ca86df 679
Jerome Coutant 1:917af0ca86df 680 case IO_MODE_IT_LOW_LEVEL_PD: /* Low level interrupt mode */
Jerome Coutant 1:917af0ca86df 681 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 682 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 683 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 684 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 685 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
Jerome Coutant 1:917af0ca86df 686 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 687 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 688 break;
Jerome Coutant 1:917af0ca86df 689
Jerome Coutant 1:917af0ca86df 690 case IO_MODE_IT_HIGH_LEVEL: /* High level interrupt mode */
Jerome Coutant 1:917af0ca86df 691 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 692 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 693 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 694 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 695 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
Jerome Coutant 1:917af0ca86df 696 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 697 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 698 break;
Jerome Coutant 1:917af0ca86df 699
Jerome Coutant 1:917af0ca86df 700 case IO_MODE_IT_HIGH_LEVEL_PU: /* High level interrupt mode */
Jerome Coutant 1:917af0ca86df 701 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 702 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 703 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 704 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 705 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
Jerome Coutant 1:917af0ca86df 706 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 707 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 708 break;
Jerome Coutant 1:917af0ca86df 709
Jerome Coutant 1:917af0ca86df 710 case IO_MODE_IT_HIGH_LEVEL_PD: /* High level interrupt mode */
Jerome Coutant 1:917af0ca86df 711 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 712 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 713 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 714 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 715 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
Jerome Coutant 1:917af0ca86df 716 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 717 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 718 break;
Jerome Coutant 1:917af0ca86df 719
Jerome Coutant 1:917af0ca86df 720 default:
Jerome Coutant 1:917af0ca86df 721 error_code = (uint8_t) IO_Mode;
Jerome Coutant 1:917af0ca86df 722 break;
Jerome Coutant 1:917af0ca86df 723 }
Jerome Coutant 1:917af0ca86df 724
Jerome Coutant 1:917af0ca86df 725 return error_code;
Jerome Coutant 1:917af0ca86df 726 }
Jerome Coutant 1:917af0ca86df 727
Jerome Coutant 1:917af0ca86df 728 /**
Jerome Coutant 1:917af0ca86df 729 * @brief Initialize the selected IO pin direction.
Jerome Coutant 1:917af0ca86df 730 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 731 * @param IO_Pin: The IO pin to be configured. This parameter could be any
Jerome Coutant 1:917af0ca86df 732 * combination of the following values:
Jerome Coutant 1:917af0ca86df 733 * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 734 * @param Direction: could be MFXSTM32L152_GPIO_DIR_IN or MFXSTM32L152_GPIO_DIR_OUT.
Jerome Coutant 1:917af0ca86df 735 * @retval None
Jerome Coutant 1:917af0ca86df 736 */
Jerome Coutant 1:917af0ca86df 737 void mfxstm32l152_IO_InitPin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Direction)
Jerome Coutant 1:917af0ca86df 738 {
Jerome Coutant 1:917af0ca86df 739 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_DIR1, IO_Pin, Direction);
Jerome Coutant 1:917af0ca86df 740 }
Jerome Coutant 1:917af0ca86df 741
Jerome Coutant 1:917af0ca86df 742 /**
Jerome Coutant 1:917af0ca86df 743 * @brief Set the global interrupt Type.
Jerome Coutant 1:917af0ca86df 744 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 745 * @param IO_Pin: The IO pin to be configured. This parameter could be any
Jerome Coutant 1:917af0ca86df 746 * combination of the following values:
Jerome Coutant 1:917af0ca86df 747 * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 748 * @param Evt: Interrupt line activity type, could be one of the following values:
Jerome Coutant 1:917af0ca86df 749 * @arg MFXSTM32L152_IRQ_GPI_EVT_LEVEL: Interrupt line is active in level model
Jerome Coutant 1:917af0ca86df 750 * @arg MFXSTM32L152_IRQ_GPI_EVT_EDGE: Interrupt line is active in edge model
Jerome Coutant 1:917af0ca86df 751 * @retval None
Jerome Coutant 1:917af0ca86df 752 */
Jerome Coutant 1:917af0ca86df 753 void mfxstm32l152_IO_SetIrqEvtMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Evt)
Jerome Coutant 1:917af0ca86df 754 {
Jerome Coutant 1:917af0ca86df 755 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_EVT1, IO_Pin, Evt);
Jerome Coutant 1:917af0ca86df 756 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 757 }
Jerome Coutant 1:917af0ca86df 758
Jerome Coutant 1:917af0ca86df 759 /**
Jerome Coutant 1:917af0ca86df 760 * @brief Configure the Edge for which a transition is detectable for the
Jerome Coutant 1:917af0ca86df 761 * selected pin.
Jerome Coutant 1:917af0ca86df 762 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 763 * @param IO_Pin: The IO pin to be configured. This parameter could be any
Jerome Coutant 1:917af0ca86df 764 * combination of the following values:
Jerome Coutant 1:917af0ca86df 765 * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 766 * @param Evt: Interrupt line activity type, could be one of the following values:
Jerome Coutant 1:917af0ca86df 767 * @arg MFXSTM32L152_IRQ_GPI_TYPE_LLFE: Interrupt line is active in Low Level or Falling Edge
Jerome Coutant 1:917af0ca86df 768 * @arg MFXSTM32L152_IRQ_GPI_TYPE_HLRE: Interrupt line is active in High Level or Rising Edge
Jerome Coutant 1:917af0ca86df 769 * @retval None
Jerome Coutant 1:917af0ca86df 770 */
Jerome Coutant 1:917af0ca86df 771 void mfxstm32l152_IO_SetIrqTypeMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Type)
Jerome Coutant 1:917af0ca86df 772 {
Jerome Coutant 1:917af0ca86df 773 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_TYPE1, IO_Pin, Type);
Jerome Coutant 1:917af0ca86df 774 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 775 }
Jerome Coutant 1:917af0ca86df 776
Jerome Coutant 1:917af0ca86df 777 /**
Jerome Coutant 1:917af0ca86df 778 * @brief When GPIO is in output mode, puts the corresponding GPO in High (1) or Low (0) level.
Jerome Coutant 1:917af0ca86df 779 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 780 * @param IO_Pin: The output pin to be set or reset. This parameter can be one
Jerome Coutant 1:917af0ca86df 781 * of the following values:
Jerome Coutant 1:917af0ca86df 782 * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 783 * @param PinState: The new IO pin state.
Jerome Coutant 1:917af0ca86df 784 * @retval None
Jerome Coutant 1:917af0ca86df 785 */
Jerome Coutant 1:917af0ca86df 786 void mfxstm32l152_IO_WritePin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t PinState)
Jerome Coutant 1:917af0ca86df 787 {
Jerome Coutant 1:917af0ca86df 788 /* Apply the bit value to the selected pin */
Jerome Coutant 1:917af0ca86df 789 if (PinState != 0)
Jerome Coutant 1:917af0ca86df 790 {
Jerome Coutant 1:917af0ca86df 791 /* Set the SET register */
Jerome Coutant 1:917af0ca86df 792 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPO_SET1, IO_Pin, 1);
Jerome Coutant 1:917af0ca86df 793 }
Jerome Coutant 1:917af0ca86df 794 else
Jerome Coutant 1:917af0ca86df 795 {
Jerome Coutant 1:917af0ca86df 796 /* Set the CLEAR register */
Jerome Coutant 1:917af0ca86df 797 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPO_CLR1, IO_Pin, 1);
Jerome Coutant 1:917af0ca86df 798 }
Jerome Coutant 1:917af0ca86df 799 }
Jerome Coutant 1:917af0ca86df 800
Jerome Coutant 1:917af0ca86df 801 /**
Jerome Coutant 1:917af0ca86df 802 * @brief Return the state of the selected IO pin(s).
Jerome Coutant 1:917af0ca86df 803 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 804 * @param IO_Pin: The output pin to be set or reset. This parameter can be one
Jerome Coutant 1:917af0ca86df 805 * of the following values:
Jerome Coutant 1:917af0ca86df 806 * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 807 * @retval IO pin(s) state.
Jerome Coutant 1:917af0ca86df 808 */
Jerome Coutant 1:917af0ca86df 809 uint32_t mfxstm32l152_IO_ReadPin(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 810 {
Jerome Coutant 1:917af0ca86df 811 uint8_t tmp1;
Jerome Coutant 1:917af0ca86df 812 uint16_t tmp2;
Jerome Coutant 1:917af0ca86df 813 uint32_t tmp3;
Jerome Coutant 1:917af0ca86df 814
Jerome Coutant 1:917af0ca86df 815 tmp1 = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_STATE1);
Jerome Coutant 1:917af0ca86df 816 tmp2 = (uint16_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_STATE2);
Jerome Coutant 1:917af0ca86df 817 tmp3 = (uint32_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_STATE3);
Jerome Coutant 1:917af0ca86df 818 tmp3 = tmp1 + (tmp2 << 8) + (tmp3 << 16);
Jerome Coutant 1:917af0ca86df 819
Jerome Coutant 1:917af0ca86df 820 return(tmp3 & IO_Pin);
Jerome Coutant 1:917af0ca86df 821 }
Jerome Coutant 1:917af0ca86df 822
Jerome Coutant 1:917af0ca86df 823 /**
Jerome Coutant 1:917af0ca86df 824 * @brief Enable the global IO interrupt source.
Jerome Coutant 1:917af0ca86df 825 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 826 * @retval None
Jerome Coutant 1:917af0ca86df 827 */
Jerome Coutant 1:917af0ca86df 828 void mfxstm32l152_IO_EnableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 829 {
Jerome Coutant 1:917af0ca86df 830 MFX_IO_ITConfig();
Jerome Coutant 1:917af0ca86df 831
Jerome Coutant 1:917af0ca86df 832 /* Enable global IO IT source */
Jerome Coutant 1:917af0ca86df 833 mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_GPIO);
Jerome Coutant 1:917af0ca86df 834 }
Jerome Coutant 1:917af0ca86df 835
Jerome Coutant 1:917af0ca86df 836 /**
Jerome Coutant 1:917af0ca86df 837 * @brief Disable the global IO interrupt source.
Jerome Coutant 1:917af0ca86df 838 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 839 * @retval None
Jerome Coutant 1:917af0ca86df 840 */
Jerome Coutant 1:917af0ca86df 841 void mfxstm32l152_IO_DisableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 842 {
Jerome Coutant 1:917af0ca86df 843 /* Disable global IO IT source */
Jerome Coutant 1:917af0ca86df 844 mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_GPIO);
Jerome Coutant 1:917af0ca86df 845 }
Jerome Coutant 1:917af0ca86df 846
Jerome Coutant 1:917af0ca86df 847 /**
Jerome Coutant 1:917af0ca86df 848 * @brief Enable interrupt mode for the selected IO pin(s).
Jerome Coutant 1:917af0ca86df 849 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 850 * @param IO_Pin: The IO interrupt to be enabled. This parameter could be any
Jerome Coutant 1:917af0ca86df 851 * combination of the following values:
Jerome Coutant 1:917af0ca86df 852 * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 853 * @retval None
Jerome Coutant 1:917af0ca86df 854 */
Jerome Coutant 1:917af0ca86df 855 void mfxstm32l152_IO_EnablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 856 {
Jerome Coutant 1:917af0ca86df 857 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_SRC1, IO_Pin, 1);
Jerome Coutant 1:917af0ca86df 858 }
Jerome Coutant 1:917af0ca86df 859
Jerome Coutant 1:917af0ca86df 860 /**
Jerome Coutant 1:917af0ca86df 861 * @brief Disable interrupt mode for the selected IO pin(s).
Jerome Coutant 1:917af0ca86df 862 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 863 * @param IO_Pin: The IO interrupt to be disabled. This parameter could be any
Jerome Coutant 1:917af0ca86df 864 * combination of the following values:
Jerome Coutant 1:917af0ca86df 865 * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 866 * @retval None
Jerome Coutant 1:917af0ca86df 867 */
Jerome Coutant 1:917af0ca86df 868 void mfxstm32l152_IO_DisablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 869 {
Jerome Coutant 1:917af0ca86df 870 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_SRC1, IO_Pin, 0);
Jerome Coutant 1:917af0ca86df 871 }
Jerome Coutant 1:917af0ca86df 872
Jerome Coutant 1:917af0ca86df 873
Jerome Coutant 1:917af0ca86df 874 /**
Jerome Coutant 1:917af0ca86df 875 * @brief Check the status of the selected IO interrupt pending bit
Jerome Coutant 1:917af0ca86df 876 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 877 * @param IO_Pin: The IO interrupt to be checked could be:
Jerome Coutant 1:917af0ca86df 878 * @arg MFXSTM32L152_GPIO_PIN_x Where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 879 * @retval Status of the checked IO pin(s).
Jerome Coutant 1:917af0ca86df 880 */
Jerome Coutant 1:917af0ca86df 881 uint32_t mfxstm32l152_IO_ITStatus(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 882 {
Jerome Coutant 1:917af0ca86df 883 /* Get the Interrupt status */
Jerome Coutant 1:917af0ca86df 884 uint8_t tmp1;
Jerome Coutant 1:917af0ca86df 885 uint16_t tmp2;
Jerome Coutant 1:917af0ca86df 886 uint32_t tmp3;
Jerome Coutant 1:917af0ca86df 887
Jerome Coutant 1:917af0ca86df 888 tmp1 = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING1);
Jerome Coutant 1:917af0ca86df 889 tmp2 = (uint16_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING2);
Jerome Coutant 1:917af0ca86df 890 tmp3 = (uint32_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING3);
Jerome Coutant 1:917af0ca86df 891 tmp3 = tmp1 + (tmp2 << 8) + (tmp3 << 16);
Jerome Coutant 1:917af0ca86df 892
Jerome Coutant 1:917af0ca86df 893 return(tmp3 & IO_Pin);
Jerome Coutant 1:917af0ca86df 894 }
Jerome Coutant 1:917af0ca86df 895
Jerome Coutant 1:917af0ca86df 896 /**
Jerome Coutant 1:917af0ca86df 897 * @brief Clear the selected IO interrupt pending bit(s). It clear automatically also the general MFXSTM32L152_REG_ADR_IRQ_PENDING
Jerome Coutant 1:917af0ca86df 898 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 899 * @param IO_Pin: the IO interrupt to be cleared, could be:
Jerome Coutant 1:917af0ca86df 900 * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 901 * @retval None
Jerome Coutant 1:917af0ca86df 902 */
Jerome Coutant 1:917af0ca86df 903 void mfxstm32l152_IO_ClearIT(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 904 {
Jerome Coutant 1:917af0ca86df 905 /* Clear the IO IT pending bit(s) by acknowledging */
Jerome Coutant 1:917af0ca86df 906 /* it cleans automatically also the Global IRQ_GPIO */
Jerome Coutant 1:917af0ca86df 907 /* normally this function is called under interrupt */
Jerome Coutant 1:917af0ca86df 908 uint8_t pin_0_7, pin_8_15, pin_16_23;
Jerome Coutant 1:917af0ca86df 909
Jerome Coutant 1:917af0ca86df 910 pin_0_7 = IO_Pin & 0x0000ff;
Jerome Coutant 1:917af0ca86df 911 pin_8_15 = IO_Pin >> 8;
Jerome Coutant 1:917af0ca86df 912 pin_8_15 = pin_8_15 & 0x00ff;
Jerome Coutant 1:917af0ca86df 913 pin_16_23 = IO_Pin >> 16;
Jerome Coutant 1:917af0ca86df 914
Jerome Coutant 1:917af0ca86df 915 if (pin_0_7)
Jerome Coutant 1:917af0ca86df 916 {
Jerome Coutant 1:917af0ca86df 917 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_ACK1, pin_0_7);
Jerome Coutant 1:917af0ca86df 918 }
Jerome Coutant 1:917af0ca86df 919 if (pin_8_15)
Jerome Coutant 1:917af0ca86df 920 {
Jerome Coutant 1:917af0ca86df 921 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_ACK2, pin_8_15);
Jerome Coutant 1:917af0ca86df 922 }
Jerome Coutant 1:917af0ca86df 923 if (pin_16_23)
Jerome Coutant 1:917af0ca86df 924 {
Jerome Coutant 1:917af0ca86df 925 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_ACK3, pin_16_23);
Jerome Coutant 1:917af0ca86df 926 }
Jerome Coutant 1:917af0ca86df 927 }
Jerome Coutant 1:917af0ca86df 928
Jerome Coutant 1:917af0ca86df 929
Jerome Coutant 1:917af0ca86df 930 /**
Jerome Coutant 1:917af0ca86df 931 * @brief Enable the AF for aGPIO.
Jerome Coutant 1:917af0ca86df 932 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 933 * @retval None
Jerome Coutant 1:917af0ca86df 934 */
Jerome Coutant 1:917af0ca86df 935 void mfxstm32l152_IO_EnableAF(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 936 {
Jerome Coutant 1:917af0ca86df 937 uint8_t mode;
Jerome Coutant 1:917af0ca86df 938
Jerome Coutant 1:917af0ca86df 939 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 940 mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
Jerome Coutant 1:917af0ca86df 941
Jerome Coutant 1:917af0ca86df 942 /* Enable ALTERNATE functions */
Jerome Coutant 1:917af0ca86df 943 /* AGPIO[0..3] can be either IDD or GPIO */
Jerome Coutant 1:917af0ca86df 944 /* AGPIO[4..7] can be either TS or GPIO */
Jerome Coutant 1:917af0ca86df 945 /* if IDD or TS are enabled no matter the value this bit GPIO are not available for those pins */
Jerome Coutant 1:917af0ca86df 946 /* however the MFX will waste some cycles to to handle these potential GPIO (pooling, etc) */
Jerome Coutant 1:917af0ca86df 947 /* so if IDD and TS are both active it is better to let ALTERNATE disabled (0) */
Jerome Coutant 1:917af0ca86df 948 /* if however IDD or TS are not connected then set it on gives more GPIOs availability */
Jerome Coutant 1:917af0ca86df 949 /* remind that AGPIO are less efficient then normal GPIO (they use pooling rather then EXTI) */
Jerome Coutant 1:917af0ca86df 950 mode |= MFXSTM32L152_ALTERNATE_GPIO_EN;
Jerome Coutant 1:917af0ca86df 951
Jerome Coutant 1:917af0ca86df 952 /* Write the new register value */
Jerome Coutant 1:917af0ca86df 953 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
Jerome Coutant 1:917af0ca86df 954 }
Jerome Coutant 1:917af0ca86df 955
Jerome Coutant 1:917af0ca86df 956 /**
Jerome Coutant 1:917af0ca86df 957 * @brief Disable the AF for aGPIO.
Jerome Coutant 1:917af0ca86df 958 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 959 * @retval None
Jerome Coutant 1:917af0ca86df 960 */
Jerome Coutant 1:917af0ca86df 961 void mfxstm32l152_IO_DisableAF(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 962 {
Jerome Coutant 1:917af0ca86df 963 uint8_t mode;
Jerome Coutant 1:917af0ca86df 964
Jerome Coutant 1:917af0ca86df 965 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 966 mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
Jerome Coutant 1:917af0ca86df 967
Jerome Coutant 1:917af0ca86df 968 /* Enable ALTERNATE functions */
Jerome Coutant 1:917af0ca86df 969 /* AGPIO[0..3] can be either IDD or GPIO */
Jerome Coutant 1:917af0ca86df 970 /* AGPIO[4..7] can be either TS or GPIO */
Jerome Coutant 1:917af0ca86df 971 /* if IDD or TS are enabled no matter the value this bit GPIO are not available for those pins */
Jerome Coutant 1:917af0ca86df 972 /* however the MFX will waste some cycles to to handle these potential GPIO (pooling, etc) */
Jerome Coutant 1:917af0ca86df 973 /* so if IDD and TS are both active it is better to let ALTERNATE disabled (0) */
Jerome Coutant 1:917af0ca86df 974 /* if however IDD or TS are not connected then set it on gives more GPIOs availability */
Jerome Coutant 1:917af0ca86df 975 /* remind that AGPIO are less efficient then normal GPIO (they use pooling rather then EXTI) */
Jerome Coutant 1:917af0ca86df 976 mode &= ~MFXSTM32L152_ALTERNATE_GPIO_EN;
Jerome Coutant 1:917af0ca86df 977
Jerome Coutant 1:917af0ca86df 978 /* Write the new register value */
Jerome Coutant 1:917af0ca86df 979 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
Jerome Coutant 1:917af0ca86df 980
Jerome Coutant 1:917af0ca86df 981 }
Jerome Coutant 1:917af0ca86df 982
Jerome Coutant 1:917af0ca86df 983
Jerome Coutant 1:917af0ca86df 984 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 985 /* --------------------- TOUCH SCREEN ------------------------------- */
Jerome Coutant 1:917af0ca86df 986 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 987
Jerome Coutant 1:917af0ca86df 988 /**
Jerome Coutant 1:917af0ca86df 989 * @brief Configures the touch Screen Controller (Single point detection)
Jerome Coutant 1:917af0ca86df 990 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 991 * @retval None.
Jerome Coutant 1:917af0ca86df 992 */
Jerome Coutant 1:917af0ca86df 993 void mfxstm32l152_TS_Start(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 994 {
Jerome Coutant 1:917af0ca86df 995 uint8_t mode;
Jerome Coutant 1:917af0ca86df 996
Jerome Coutant 1:917af0ca86df 997 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 998 mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
Jerome Coutant 1:917af0ca86df 999
Jerome Coutant 1:917af0ca86df 1000 /* Set the Functionalities to be Enabled */
Jerome Coutant 1:917af0ca86df 1001 mode |= MFXSTM32L152_TS_EN;
Jerome Coutant 1:917af0ca86df 1002
Jerome Coutant 1:917af0ca86df 1003 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 1004 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
Jerome Coutant 1:917af0ca86df 1005
Jerome Coutant 1:917af0ca86df 1006 /* Wait for 2 ms */
Jerome Coutant 1:917af0ca86df 1007 MFX_IO_Delay(2);
Jerome Coutant 1:917af0ca86df 1008
Jerome Coutant 1:917af0ca86df 1009 /* Select 2 nF filter capacitor */
Jerome Coutant 1:917af0ca86df 1010 /* Configuration:
Jerome Coutant 1:917af0ca86df 1011 - Touch average control : 4 samples
Jerome Coutant 1:917af0ca86df 1012 - Touch delay time : 500 uS
Jerome Coutant 1:917af0ca86df 1013 - Panel driver setting time: 500 uS
Jerome Coutant 1:917af0ca86df 1014 */
Jerome Coutant 1:917af0ca86df 1015 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_SETTLING, 0x32);
Jerome Coutant 1:917af0ca86df 1016 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_TOUCH_DET_DELAY, 0x5);
Jerome Coutant 1:917af0ca86df 1017 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_AVE, 0x04);
Jerome Coutant 1:917af0ca86df 1018
Jerome Coutant 1:917af0ca86df 1019 /* Configure the Touch FIFO threshold: single point reading */
Jerome Coutant 1:917af0ca86df 1020 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_FIFO_TH, 0x01);
Jerome Coutant 1:917af0ca86df 1021
Jerome Coutant 1:917af0ca86df 1022 /* Clear the FIFO memory content. */
Jerome Coutant 1:917af0ca86df 1023 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_FIFO_TH, MFXSTM32L152_TS_CLEAR_FIFO);
Jerome Coutant 1:917af0ca86df 1024
Jerome Coutant 1:917af0ca86df 1025 /* Touch screen control configuration :
Jerome Coutant 1:917af0ca86df 1026 - No window tracking index
Jerome Coutant 1:917af0ca86df 1027 */
Jerome Coutant 1:917af0ca86df 1028 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_TRACK, 0x00);
Jerome Coutant 1:917af0ca86df 1029
Jerome Coutant 1:917af0ca86df 1030
Jerome Coutant 1:917af0ca86df 1031 /* Clear all the IT status pending bits if any */
Jerome Coutant 1:917af0ca86df 1032 mfxstm32l152_IO_ClearIT(DeviceAddr, 0xFFFFFF);
Jerome Coutant 1:917af0ca86df 1033
Jerome Coutant 1:917af0ca86df 1034 /* Wait for 1 ms delay */
Jerome Coutant 1:917af0ca86df 1035 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 1036 }
Jerome Coutant 1:917af0ca86df 1037
Jerome Coutant 1:917af0ca86df 1038 /**
Jerome Coutant 1:917af0ca86df 1039 * @brief Return if there is touch detected or not.
Jerome Coutant 1:917af0ca86df 1040 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1041 * @retval Touch detected state.
Jerome Coutant 1:917af0ca86df 1042 */
Jerome Coutant 1:917af0ca86df 1043 uint8_t mfxstm32l152_TS_DetectTouch(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1044 {
Jerome Coutant 1:917af0ca86df 1045 uint8_t state;
Jerome Coutant 1:917af0ca86df 1046 uint8_t ret = 0;
Jerome Coutant 1:917af0ca86df 1047
Jerome Coutant 1:917af0ca86df 1048 state = MFX_IO_Read(DeviceAddr, MFXSTM32L152_TS_FIFO_STA);
Jerome Coutant 1:917af0ca86df 1049 state = ((state & (uint8_t)MFXSTM32L152_TS_CTRL_STATUS) == (uint8_t)MFXSTM32L152_TS_CTRL_STATUS);
Jerome Coutant 1:917af0ca86df 1050
Jerome Coutant 1:917af0ca86df 1051 if(state > 0)
Jerome Coutant 1:917af0ca86df 1052 {
Jerome Coutant 1:917af0ca86df 1053 if(MFX_IO_Read(DeviceAddr, MFXSTM32L152_TS_FIFO_LEVEL) > 0)
Jerome Coutant 1:917af0ca86df 1054 {
Jerome Coutant 1:917af0ca86df 1055 ret = 1;
Jerome Coutant 1:917af0ca86df 1056 }
Jerome Coutant 1:917af0ca86df 1057 }
Jerome Coutant 1:917af0ca86df 1058
Jerome Coutant 1:917af0ca86df 1059 return ret;
Jerome Coutant 1:917af0ca86df 1060 }
Jerome Coutant 1:917af0ca86df 1061
Jerome Coutant 1:917af0ca86df 1062 /**
Jerome Coutant 1:917af0ca86df 1063 * @brief Get the touch screen X and Y positions values
Jerome Coutant 1:917af0ca86df 1064 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1065 * @param X: Pointer to X position value
Jerome Coutant 1:917af0ca86df 1066 * @param Y: Pointer to Y position value
Jerome Coutant 1:917af0ca86df 1067 * @retval None.
Jerome Coutant 1:917af0ca86df 1068 */
Jerome Coutant 1:917af0ca86df 1069 void mfxstm32l152_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
Jerome Coutant 1:917af0ca86df 1070 {
Jerome Coutant 1:917af0ca86df 1071 uint8_t data_xy[3];
Jerome Coutant 1:917af0ca86df 1072
Jerome Coutant 1:917af0ca86df 1073 MFX_IO_ReadMultiple(DeviceAddr, MFXSTM32L152_TS_XY_DATA, data_xy, sizeof(data_xy)) ;
Jerome Coutant 1:917af0ca86df 1074
Jerome Coutant 1:917af0ca86df 1075 /* Calculate positions values */
Jerome Coutant 1:917af0ca86df 1076 *X = (data_xy[1]<<4) + (data_xy[0]>>4);
Jerome Coutant 1:917af0ca86df 1077 *Y = (data_xy[2]<<4) + (data_xy[0]&4);
Jerome Coutant 1:917af0ca86df 1078
Jerome Coutant 1:917af0ca86df 1079 /* Reset the FIFO memory content. */
Jerome Coutant 1:917af0ca86df 1080 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_FIFO_TH, MFXSTM32L152_TS_CLEAR_FIFO);
Jerome Coutant 1:917af0ca86df 1081 }
Jerome Coutant 1:917af0ca86df 1082
Jerome Coutant 1:917af0ca86df 1083 /**
Jerome Coutant 1:917af0ca86df 1084 * @brief Configure the selected source to generate a global interrupt or not
Jerome Coutant 1:917af0ca86df 1085 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1086 * @retval None
Jerome Coutant 1:917af0ca86df 1087 */
Jerome Coutant 1:917af0ca86df 1088 void mfxstm32l152_TS_EnableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1089 {
Jerome Coutant 1:917af0ca86df 1090 MFX_IO_ITConfig();
Jerome Coutant 1:917af0ca86df 1091
Jerome Coutant 1:917af0ca86df 1092 /* Enable global TS IT source */
Jerome Coutant 1:917af0ca86df 1093 mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_TS_DET);
Jerome Coutant 1:917af0ca86df 1094 }
Jerome Coutant 1:917af0ca86df 1095
Jerome Coutant 1:917af0ca86df 1096 /**
Jerome Coutant 1:917af0ca86df 1097 * @brief Configure the selected source to generate a global interrupt or not
Jerome Coutant 1:917af0ca86df 1098 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1099 * @retval None
Jerome Coutant 1:917af0ca86df 1100 */
Jerome Coutant 1:917af0ca86df 1101 void mfxstm32l152_TS_DisableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1102 {
Jerome Coutant 1:917af0ca86df 1103 /* Disable global TS IT source */
Jerome Coutant 1:917af0ca86df 1104 mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_TS_DET);
Jerome Coutant 1:917af0ca86df 1105 }
Jerome Coutant 1:917af0ca86df 1106
Jerome Coutant 1:917af0ca86df 1107 /**
Jerome Coutant 1:917af0ca86df 1108 * @brief Configure the selected source to generate a global interrupt or not
Jerome Coutant 1:917af0ca86df 1109 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1110 * @retval TS interrupts status
Jerome Coutant 1:917af0ca86df 1111 */
Jerome Coutant 1:917af0ca86df 1112 uint8_t mfxstm32l152_TS_ITStatus(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1113 {
Jerome Coutant 1:917af0ca86df 1114 /* Return TS interrupts status */
Jerome Coutant 1:917af0ca86df 1115 return(mfxstm32l152_GlobalITStatus(DeviceAddr, MFXSTM32L152_IRQ_TS));
Jerome Coutant 1:917af0ca86df 1116 }
Jerome Coutant 1:917af0ca86df 1117
Jerome Coutant 1:917af0ca86df 1118 /**
Jerome Coutant 1:917af0ca86df 1119 * @brief Configure the selected source to generate a global interrupt or not
Jerome Coutant 1:917af0ca86df 1120 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1121 * @retval None
Jerome Coutant 1:917af0ca86df 1122 */
Jerome Coutant 1:917af0ca86df 1123 void mfxstm32l152_TS_ClearIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1124 {
Jerome Coutant 1:917af0ca86df 1125 /* Clear the global TS IT source */
Jerome Coutant 1:917af0ca86df 1126 mfxstm32l152_ClearGlobalIT(DeviceAddr, MFXSTM32L152_IRQ_TS);
Jerome Coutant 1:917af0ca86df 1127 }
Jerome Coutant 1:917af0ca86df 1128
Jerome Coutant 1:917af0ca86df 1129 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1130 /* --------------------- IDD MEASUREMENT ---------------------------- */
Jerome Coutant 1:917af0ca86df 1131 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1132
Jerome Coutant 1:917af0ca86df 1133 /**
Jerome Coutant 1:917af0ca86df 1134 * @brief Launch IDD current measurement
Jerome Coutant 1:917af0ca86df 1135 * @param DeviceAddr: Device address on communication Bus
Jerome Coutant 1:917af0ca86df 1136 * @retval None.
Jerome Coutant 1:917af0ca86df 1137 */
Jerome Coutant 1:917af0ca86df 1138 void mfxstm32l152_IDD_Start(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1139 {
Jerome Coutant 1:917af0ca86df 1140 uint8_t mode = 0;
Jerome Coutant 1:917af0ca86df 1141
Jerome Coutant 1:917af0ca86df 1142 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1143 mode = MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL);
Jerome Coutant 1:917af0ca86df 1144
Jerome Coutant 1:917af0ca86df 1145 /* Set the Functionalities to be enabled */
Jerome Coutant 1:917af0ca86df 1146 mode |= MFXSTM32L152_IDD_CTRL_REQ;
Jerome Coutant 1:917af0ca86df 1147
Jerome Coutant 1:917af0ca86df 1148 /* Start measurement campaign */
Jerome Coutant 1:917af0ca86df 1149 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL, mode);
Jerome Coutant 1:917af0ca86df 1150 }
Jerome Coutant 1:917af0ca86df 1151
Jerome Coutant 1:917af0ca86df 1152 /**
Jerome Coutant 1:917af0ca86df 1153 * @brief Configures the IDD current measurement
Jerome Coutant 1:917af0ca86df 1154 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1155 * @param MfxIddConfig: Parameters depending on hardware config.
Jerome Coutant 1:917af0ca86df 1156 * @retval None
Jerome Coutant 1:917af0ca86df 1157 */
Jerome Coutant 1:917af0ca86df 1158 void mfxstm32l152_IDD_Config(uint16_t DeviceAddr, IDD_ConfigTypeDef MfxIddConfig)
Jerome Coutant 1:917af0ca86df 1159 {
Jerome Coutant 1:917af0ca86df 1160 uint8_t value = 0;
Jerome Coutant 1:917af0ca86df 1161 uint8_t mode = 0;
Jerome Coutant 1:917af0ca86df 1162
Jerome Coutant 1:917af0ca86df 1163 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1164 mode = MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
Jerome Coutant 1:917af0ca86df 1165
Jerome Coutant 1:917af0ca86df 1166 if((mode & MFXSTM32L152_IDD_EN) != MFXSTM32L152_IDD_EN)
Jerome Coutant 1:917af0ca86df 1167 {
Jerome Coutant 1:917af0ca86df 1168 /* Set the Functionalities to be enabled */
Jerome Coutant 1:917af0ca86df 1169 mode |= MFXSTM32L152_IDD_EN;
Jerome Coutant 1:917af0ca86df 1170
Jerome Coutant 1:917af0ca86df 1171 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 1172 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
Jerome Coutant 1:917af0ca86df 1173 }
Jerome Coutant 1:917af0ca86df 1174
Jerome Coutant 1:917af0ca86df 1175 /* Control register setting: number of shunts */
Jerome Coutant 1:917af0ca86df 1176 value = ((MfxIddConfig.ShuntNbUsed << 1) & MFXSTM32L152_IDD_CTRL_SHUNT_NB);
Jerome Coutant 1:917af0ca86df 1177 value |= (MfxIddConfig.VrefMeasurement & MFXSTM32L152_IDD_CTRL_VREF_DIS);
Jerome Coutant 1:917af0ca86df 1178 value |= (MfxIddConfig.Calibration & MFXSTM32L152_IDD_CTRL_CAL_DIS);
Jerome Coutant 1:917af0ca86df 1179 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL, value);
Jerome Coutant 1:917af0ca86df 1180
Jerome Coutant 1:917af0ca86df 1181 /* Idd pre delay configuration: unit and value*/
Jerome Coutant 1:917af0ca86df 1182 value = (MfxIddConfig.PreDelayUnit & MFXSTM32L152_IDD_PREDELAY_UNIT) |
Jerome Coutant 1:917af0ca86df 1183 (MfxIddConfig.PreDelayValue & MFXSTM32L152_IDD_PREDELAY_VALUE);
Jerome Coutant 1:917af0ca86df 1184 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_PRE_DELAY, value);
Jerome Coutant 1:917af0ca86df 1185
Jerome Coutant 1:917af0ca86df 1186 /* Shunt 0 register value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1187 value = (uint8_t) (MfxIddConfig.Shunt0Value >> 8);
Jerome Coutant 1:917af0ca86df 1188 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT0_MSB, value);
Jerome Coutant 1:917af0ca86df 1189 value = (uint8_t) (MfxIddConfig.Shunt0Value);
Jerome Coutant 1:917af0ca86df 1190 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT0_LSB, value);
Jerome Coutant 1:917af0ca86df 1191
Jerome Coutant 1:917af0ca86df 1192 /* Shunt 1 register value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1193 value = (uint8_t) (MfxIddConfig.Shunt1Value >> 8);
Jerome Coutant 1:917af0ca86df 1194 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT1_MSB, value);
Jerome Coutant 1:917af0ca86df 1195 value = (uint8_t) (MfxIddConfig.Shunt1Value);
Jerome Coutant 1:917af0ca86df 1196 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT1_LSB, value);
Jerome Coutant 1:917af0ca86df 1197
Jerome Coutant 1:917af0ca86df 1198 /* Shunt 2 register value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1199 value = (uint8_t) (MfxIddConfig.Shunt2Value >> 8);
Jerome Coutant 1:917af0ca86df 1200 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT2_MSB, value);
Jerome Coutant 1:917af0ca86df 1201 value = (uint8_t) (MfxIddConfig.Shunt2Value);
Jerome Coutant 1:917af0ca86df 1202 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT2_LSB, value);
Jerome Coutant 1:917af0ca86df 1203
Jerome Coutant 1:917af0ca86df 1204 /* Shunt 3 register value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1205 value = (uint8_t) (MfxIddConfig.Shunt3Value >> 8);
Jerome Coutant 1:917af0ca86df 1206 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT3_MSB, value);
Jerome Coutant 1:917af0ca86df 1207 value = (uint8_t) (MfxIddConfig.Shunt3Value);
Jerome Coutant 1:917af0ca86df 1208 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT3_LSB, value);
Jerome Coutant 1:917af0ca86df 1209
Jerome Coutant 1:917af0ca86df 1210 /* Shunt 4 register value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1211 value = (uint8_t) (MfxIddConfig.Shunt4Value >> 8);
Jerome Coutant 1:917af0ca86df 1212 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT4_MSB, value);
Jerome Coutant 1:917af0ca86df 1213 value = (uint8_t) (MfxIddConfig.Shunt4Value);
Jerome Coutant 1:917af0ca86df 1214 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT4_LSB, value);
Jerome Coutant 1:917af0ca86df 1215
Jerome Coutant 1:917af0ca86df 1216 /* Shunt 0 stabilization delay */
Jerome Coutant 1:917af0ca86df 1217 value = MfxIddConfig.Shunt0StabDelay;
Jerome Coutant 1:917af0ca86df 1218 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH0_STABILIZATION, value);
Jerome Coutant 1:917af0ca86df 1219
Jerome Coutant 1:917af0ca86df 1220 /* Shunt 1 stabilization delay */
Jerome Coutant 1:917af0ca86df 1221 value = MfxIddConfig.Shunt1StabDelay;
Jerome Coutant 1:917af0ca86df 1222 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH1_STABILIZATION, value);
Jerome Coutant 1:917af0ca86df 1223
Jerome Coutant 1:917af0ca86df 1224 /* Shunt 2 stabilization delay */
Jerome Coutant 1:917af0ca86df 1225 value = MfxIddConfig.Shunt2StabDelay;
Jerome Coutant 1:917af0ca86df 1226 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH2_STABILIZATION, value);
Jerome Coutant 1:917af0ca86df 1227
Jerome Coutant 1:917af0ca86df 1228 /* Shunt 3 stabilization delay */
Jerome Coutant 1:917af0ca86df 1229 value = MfxIddConfig.Shunt3StabDelay;
Jerome Coutant 1:917af0ca86df 1230 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH3_STABILIZATION, value);
Jerome Coutant 1:917af0ca86df 1231
Jerome Coutant 1:917af0ca86df 1232 /* Shunt 4 stabilization delay */
Jerome Coutant 1:917af0ca86df 1233 value = MfxIddConfig.Shunt4StabDelay;
Jerome Coutant 1:917af0ca86df 1234 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH4_STABILIZATION, value);
Jerome Coutant 1:917af0ca86df 1235
Jerome Coutant 1:917af0ca86df 1236 /* Idd ampli gain value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1237 value = (uint8_t) (MfxIddConfig.AmpliGain >> 8);
Jerome Coutant 1:917af0ca86df 1238 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_GAIN_MSB, value);
Jerome Coutant 1:917af0ca86df 1239 value = (uint8_t) (MfxIddConfig.AmpliGain);
Jerome Coutant 1:917af0ca86df 1240 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_GAIN_LSB, value);
Jerome Coutant 1:917af0ca86df 1241
Jerome Coutant 1:917af0ca86df 1242 /* Idd VDD min value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1243 value = (uint8_t) (MfxIddConfig.VddMin >> 8);
Jerome Coutant 1:917af0ca86df 1244 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_VDD_MIN_MSB, value);
Jerome Coutant 1:917af0ca86df 1245 value = (uint8_t) (MfxIddConfig.VddMin);
Jerome Coutant 1:917af0ca86df 1246 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_VDD_MIN_LSB, value);
Jerome Coutant 1:917af0ca86df 1247
Jerome Coutant 1:917af0ca86df 1248 /* Idd number of measurements */
Jerome Coutant 1:917af0ca86df 1249 value = MfxIddConfig.MeasureNb;
Jerome Coutant 1:917af0ca86df 1250 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_NBR_OF_MEAS, value);
Jerome Coutant 1:917af0ca86df 1251
Jerome Coutant 1:917af0ca86df 1252 /* Idd delta delay configuration: unit and value */
Jerome Coutant 1:917af0ca86df 1253 value = (MfxIddConfig.DeltaDelayUnit & MFXSTM32L152_IDD_DELTADELAY_UNIT) |
Jerome Coutant 1:917af0ca86df 1254 (MfxIddConfig.DeltaDelayValue & MFXSTM32L152_IDD_DELTADELAY_VALUE);
Jerome Coutant 1:917af0ca86df 1255 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_MEAS_DELTA_DELAY, value);
Jerome Coutant 1:917af0ca86df 1256
Jerome Coutant 1:917af0ca86df 1257 /* Idd number of shut on board */
Jerome Coutant 1:917af0ca86df 1258 value = MfxIddConfig.ShuntNbOnBoard;
Jerome Coutant 1:917af0ca86df 1259 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNTS_ON_BOARD, value);
Jerome Coutant 1:917af0ca86df 1260 }
Jerome Coutant 1:917af0ca86df 1261
Jerome Coutant 1:917af0ca86df 1262 /**
Jerome Coutant 1:917af0ca86df 1263 * @brief This function allows to modify number of shunt used for a measurement
Jerome Coutant 1:917af0ca86df 1264 * @param DeviceAddr: Device address on communication Bus
Jerome Coutant 1:917af0ca86df 1265 * @retval None.
Jerome Coutant 1:917af0ca86df 1266 */
Jerome Coutant 1:917af0ca86df 1267 void mfxstm32l152_IDD_ConfigShuntNbLimit(uint16_t DeviceAddr, uint8_t ShuntNbLimit)
Jerome Coutant 1:917af0ca86df 1268 {
Jerome Coutant 1:917af0ca86df 1269 uint8_t mode = 0;
Jerome Coutant 1:917af0ca86df 1270
Jerome Coutant 1:917af0ca86df 1271 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1272 mode = MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL);
Jerome Coutant 1:917af0ca86df 1273
Jerome Coutant 1:917af0ca86df 1274 /* Clear number of shunt limit */
Jerome Coutant 1:917af0ca86df 1275 mode &= ~(MFXSTM32L152_IDD_CTRL_SHUNT_NB);
Jerome Coutant 1:917af0ca86df 1276
Jerome Coutant 1:917af0ca86df 1277 /* Clear number of shunt limit */
Jerome Coutant 1:917af0ca86df 1278 mode |= ((ShuntNbLimit << 1) & MFXSTM32L152_IDD_CTRL_SHUNT_NB);
Jerome Coutant 1:917af0ca86df 1279
Jerome Coutant 1:917af0ca86df 1280 /* Write noewx desired limit */
Jerome Coutant 1:917af0ca86df 1281 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL, mode);
Jerome Coutant 1:917af0ca86df 1282 }
Jerome Coutant 1:917af0ca86df 1283
Jerome Coutant 1:917af0ca86df 1284 /**
Jerome Coutant 1:917af0ca86df 1285 * @brief Get Idd current value
Jerome Coutant 1:917af0ca86df 1286 * @param DeviceAddr: Device address on communication Bus
Jerome Coutant 1:917af0ca86df 1287 * @param ReadValue: Pointer on value to be read
Jerome Coutant 1:917af0ca86df 1288 * @retval Idd value in 10 nA.
Jerome Coutant 1:917af0ca86df 1289 */
Jerome Coutant 1:917af0ca86df 1290 void mfxstm32l152_IDD_GetValue(uint16_t DeviceAddr, uint32_t *ReadValue)
Jerome Coutant 1:917af0ca86df 1291 {
Jerome Coutant 1:917af0ca86df 1292 uint8_t data[3];
Jerome Coutant 1:917af0ca86df 1293
Jerome Coutant 1:917af0ca86df 1294 MFX_IO_ReadMultiple((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_VALUE_MSB, data, sizeof(data)) ;
Jerome Coutant 1:917af0ca86df 1295
Jerome Coutant 1:917af0ca86df 1296 /* Recompose Idd current value */
Jerome Coutant 1:917af0ca86df 1297 *ReadValue = (data[0] << 16) | (data[1] << 8) | data[2];
Jerome Coutant 1:917af0ca86df 1298
Jerome Coutant 1:917af0ca86df 1299 }
Jerome Coutant 1:917af0ca86df 1300
Jerome Coutant 1:917af0ca86df 1301 /**
Jerome Coutant 1:917af0ca86df 1302 * @brief Get Last shunt used for measurement
Jerome Coutant 1:917af0ca86df 1303 * @param DeviceAddr: Device address on communication Bus
Jerome Coutant 1:917af0ca86df 1304 * @retval Last shunt used
Jerome Coutant 1:917af0ca86df 1305 */
Jerome Coutant 1:917af0ca86df 1306 uint8_t mfxstm32l152_IDD_GetShuntUsed(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1307 {
Jerome Coutant 1:917af0ca86df 1308 return(MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT_USED));
Jerome Coutant 1:917af0ca86df 1309 }
Jerome Coutant 1:917af0ca86df 1310
Jerome Coutant 1:917af0ca86df 1311 /**
Jerome Coutant 1:917af0ca86df 1312 * @brief Configure mfx to enable Idd interrupt
Jerome Coutant 1:917af0ca86df 1313 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1314 * @retval None
Jerome Coutant 1:917af0ca86df 1315 */
Jerome Coutant 1:917af0ca86df 1316 void mfxstm32l152_IDD_EnableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1317 {
Jerome Coutant 1:917af0ca86df 1318 MFX_IO_ITConfig();
Jerome Coutant 1:917af0ca86df 1319
Jerome Coutant 1:917af0ca86df 1320 /* Enable global IDD interrupt source */
Jerome Coutant 1:917af0ca86df 1321 mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_IDD);
Jerome Coutant 1:917af0ca86df 1322 }
Jerome Coutant 1:917af0ca86df 1323
Jerome Coutant 1:917af0ca86df 1324 /**
Jerome Coutant 1:917af0ca86df 1325 * @brief Clear Idd global interrupt
Jerome Coutant 1:917af0ca86df 1326 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1327 * @retval None
Jerome Coutant 1:917af0ca86df 1328 */
Jerome Coutant 1:917af0ca86df 1329 void mfxstm32l152_IDD_ClearIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1330 {
Jerome Coutant 1:917af0ca86df 1331 /* Clear the global IDD interrupt source */
Jerome Coutant 1:917af0ca86df 1332 mfxstm32l152_ClearGlobalIT(DeviceAddr, MFXSTM32L152_IRQ_IDD);
Jerome Coutant 1:917af0ca86df 1333 }
Jerome Coutant 1:917af0ca86df 1334
Jerome Coutant 1:917af0ca86df 1335 /**
Jerome Coutant 1:917af0ca86df 1336 * @brief get Idd interrupt status
Jerome Coutant 1:917af0ca86df 1337 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1338 * @retval IDD interrupts status
Jerome Coutant 1:917af0ca86df 1339 */
Jerome Coutant 1:917af0ca86df 1340 uint8_t mfxstm32l152_IDD_GetITStatus(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1341 {
Jerome Coutant 1:917af0ca86df 1342 /* Return IDD interrupt status */
Jerome Coutant 1:917af0ca86df 1343 return(mfxstm32l152_GlobalITStatus(DeviceAddr, MFXSTM32L152_IRQ_IDD));
Jerome Coutant 1:917af0ca86df 1344 }
Jerome Coutant 1:917af0ca86df 1345
Jerome Coutant 1:917af0ca86df 1346 /**
Jerome Coutant 1:917af0ca86df 1347 * @brief disable Idd interrupt
Jerome Coutant 1:917af0ca86df 1348 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1349 * @retval None.
Jerome Coutant 1:917af0ca86df 1350 */
Jerome Coutant 1:917af0ca86df 1351 void mfxstm32l152_IDD_DisableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1352 {
Jerome Coutant 1:917af0ca86df 1353 /* Disable global IDD interrupt source */
Jerome Coutant 1:917af0ca86df 1354 mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_IDD);
Jerome Coutant 1:917af0ca86df 1355 }
Jerome Coutant 1:917af0ca86df 1356
Jerome Coutant 1:917af0ca86df 1357
Jerome Coutant 1:917af0ca86df 1358 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1359 /* --------------------- ERROR MANAGEMENT --------------------------- */
Jerome Coutant 1:917af0ca86df 1360 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1361
Jerome Coutant 1:917af0ca86df 1362 /**
Jerome Coutant 1:917af0ca86df 1363 * @brief Read Error Source.
Jerome Coutant 1:917af0ca86df 1364 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1365 * @retval Error message code with error source
Jerome Coutant 1:917af0ca86df 1366 */
Jerome Coutant 1:917af0ca86df 1367 uint8_t mfxstm32l152_Error_ReadSrc(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1368 {
Jerome Coutant 1:917af0ca86df 1369 /* Get the current source register value */
Jerome Coutant 1:917af0ca86df 1370 return(MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_ERROR_SRC));
Jerome Coutant 1:917af0ca86df 1371 }
Jerome Coutant 1:917af0ca86df 1372
Jerome Coutant 1:917af0ca86df 1373 /**
Jerome Coutant 1:917af0ca86df 1374 * @brief Read Error Message
Jerome Coutant 1:917af0ca86df 1375 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1376 * @retval Error message code with error source
Jerome Coutant 1:917af0ca86df 1377 */
Jerome Coutant 1:917af0ca86df 1378 uint8_t mfxstm32l152_Error_ReadMsg(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1379 {
Jerome Coutant 1:917af0ca86df 1380 /* Get the current message register value */
Jerome Coutant 1:917af0ca86df 1381 return(MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_ERROR_MSG));
Jerome Coutant 1:917af0ca86df 1382 }
Jerome Coutant 1:917af0ca86df 1383
Jerome Coutant 1:917af0ca86df 1384 /**
Jerome Coutant 1:917af0ca86df 1385 * @brief Enable Error global interrupt
Jerome Coutant 1:917af0ca86df 1386 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1387 * @retval None
Jerome Coutant 1:917af0ca86df 1388 */
Jerome Coutant 1:917af0ca86df 1389
Jerome Coutant 1:917af0ca86df 1390 void mfxstm32l152_Error_EnableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1391 {
Jerome Coutant 1:917af0ca86df 1392 MFX_IO_ITConfig();
Jerome Coutant 1:917af0ca86df 1393
Jerome Coutant 1:917af0ca86df 1394 /* Enable global Error interrupt source */
Jerome Coutant 1:917af0ca86df 1395 mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_ERROR);
Jerome Coutant 1:917af0ca86df 1396 }
Jerome Coutant 1:917af0ca86df 1397
Jerome Coutant 1:917af0ca86df 1398 /**
Jerome Coutant 1:917af0ca86df 1399 * @brief Clear Error global interrupt
Jerome Coutant 1:917af0ca86df 1400 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1401 * @retval None
Jerome Coutant 1:917af0ca86df 1402 */
Jerome Coutant 1:917af0ca86df 1403 void mfxstm32l152_Error_ClearIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1404 {
Jerome Coutant 1:917af0ca86df 1405 /* Clear the global Error interrupt source */
Jerome Coutant 1:917af0ca86df 1406 mfxstm32l152_ClearGlobalIT(DeviceAddr, MFXSTM32L152_IRQ_ERROR);
Jerome Coutant 1:917af0ca86df 1407 }
Jerome Coutant 1:917af0ca86df 1408
Jerome Coutant 1:917af0ca86df 1409 /**
Jerome Coutant 1:917af0ca86df 1410 * @brief get Error interrupt status
Jerome Coutant 1:917af0ca86df 1411 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1412 * @retval Error interrupts status
Jerome Coutant 1:917af0ca86df 1413 */
Jerome Coutant 1:917af0ca86df 1414 uint8_t mfxstm32l152_Error_GetITStatus(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1415 {
Jerome Coutant 1:917af0ca86df 1416 /* Return Error interrupt status */
Jerome Coutant 1:917af0ca86df 1417 return(mfxstm32l152_GlobalITStatus(DeviceAddr, MFXSTM32L152_IRQ_ERROR));
Jerome Coutant 1:917af0ca86df 1418 }
Jerome Coutant 1:917af0ca86df 1419
Jerome Coutant 1:917af0ca86df 1420 /**
Jerome Coutant 1:917af0ca86df 1421 * @brief disable Error interrupt
Jerome Coutant 1:917af0ca86df 1422 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1423 * @retval None.
Jerome Coutant 1:917af0ca86df 1424 */
Jerome Coutant 1:917af0ca86df 1425 void mfxstm32l152_Error_DisableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1426 {
Jerome Coutant 1:917af0ca86df 1427 /* Disable global Error interrupt source */
Jerome Coutant 1:917af0ca86df 1428 mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_ERROR);
Jerome Coutant 1:917af0ca86df 1429 }
Jerome Coutant 1:917af0ca86df 1430
Jerome Coutant 1:917af0ca86df 1431 /**
Jerome Coutant 1:917af0ca86df 1432 * @brief FOR DEBUG ONLY
Jerome Coutant 1:917af0ca86df 1433 */
Jerome Coutant 1:917af0ca86df 1434 uint8_t mfxstm32l152_ReadReg(uint16_t DeviceAddr, uint8_t RegAddr)
Jerome Coutant 1:917af0ca86df 1435 {
Jerome Coutant 1:917af0ca86df 1436 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1437 return(MFX_IO_Read((uint8_t) DeviceAddr, RegAddr));
Jerome Coutant 1:917af0ca86df 1438 }
Jerome Coutant 1:917af0ca86df 1439
Jerome Coutant 1:917af0ca86df 1440 void mfxstm32l152_WriteReg(uint16_t DeviceAddr, uint8_t RegAddr, uint8_t Value)
Jerome Coutant 1:917af0ca86df 1441 {
Jerome Coutant 1:917af0ca86df 1442 /* set the current register value */
Jerome Coutant 1:917af0ca86df 1443 MFX_IO_Write((uint8_t) DeviceAddr, RegAddr, Value);
Jerome Coutant 1:917af0ca86df 1444 }
Jerome Coutant 1:917af0ca86df 1445
Jerome Coutant 1:917af0ca86df 1446 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1447 /* ----------------------- Private functions ------------------------ */
Jerome Coutant 1:917af0ca86df 1448 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1449 /**
Jerome Coutant 1:917af0ca86df 1450 * @brief Check if the device instance of the selected address is already registered
Jerome Coutant 1:917af0ca86df 1451 * and return its index
Jerome Coutant 1:917af0ca86df 1452 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1453 * @retval Index of the device instance if registered, 0xFF if not.
Jerome Coutant 1:917af0ca86df 1454 */
Jerome Coutant 1:917af0ca86df 1455 static uint8_t mfxstm32l152_GetInstance(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1456 {
Jerome Coutant 1:917af0ca86df 1457 uint8_t idx = 0;
Jerome Coutant 1:917af0ca86df 1458
Jerome Coutant 1:917af0ca86df 1459 /* Check all the registered instances */
Jerome Coutant 1:917af0ca86df 1460 for(idx = 0; idx < MFXSTM32L152_MAX_INSTANCE ; idx ++)
Jerome Coutant 1:917af0ca86df 1461 {
Jerome Coutant 1:917af0ca86df 1462 if(mfxstm32l152[idx] == DeviceAddr)
Jerome Coutant 1:917af0ca86df 1463 {
Jerome Coutant 1:917af0ca86df 1464 return idx;
Jerome Coutant 1:917af0ca86df 1465 }
Jerome Coutant 1:917af0ca86df 1466 }
Jerome Coutant 1:917af0ca86df 1467
Jerome Coutant 1:917af0ca86df 1468 return 0xFF;
Jerome Coutant 1:917af0ca86df 1469 }
Jerome Coutant 1:917af0ca86df 1470
Jerome Coutant 1:917af0ca86df 1471 /**
Jerome Coutant 1:917af0ca86df 1472 * @brief Release registered device instance
Jerome Coutant 1:917af0ca86df 1473 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1474 * @retval Index of released device instance, 0xFF if not.
Jerome Coutant 1:917af0ca86df 1475 */
Jerome Coutant 1:917af0ca86df 1476 static uint8_t mfxstm32l152_ReleaseInstance(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1477 {
Jerome Coutant 1:917af0ca86df 1478 uint8_t idx = 0;
Jerome Coutant 1:917af0ca86df 1479
Jerome Coutant 1:917af0ca86df 1480 /* Check for all the registered instances */
Jerome Coutant 1:917af0ca86df 1481 for(idx = 0; idx < MFXSTM32L152_MAX_INSTANCE ; idx ++)
Jerome Coutant 1:917af0ca86df 1482 {
Jerome Coutant 1:917af0ca86df 1483 if(mfxstm32l152[idx] == DeviceAddr)
Jerome Coutant 1:917af0ca86df 1484 {
Jerome Coutant 1:917af0ca86df 1485 mfxstm32l152[idx] = 0;
Jerome Coutant 1:917af0ca86df 1486 return idx;
Jerome Coutant 1:917af0ca86df 1487 }
Jerome Coutant 1:917af0ca86df 1488 }
Jerome Coutant 1:917af0ca86df 1489 return 0xFF;
Jerome Coutant 1:917af0ca86df 1490 }
Jerome Coutant 1:917af0ca86df 1491
Jerome Coutant 1:917af0ca86df 1492 /**
Jerome Coutant 1:917af0ca86df 1493 * @brief Internal routine
Jerome Coutant 1:917af0ca86df 1494 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1495 * @param RegisterAddr: Register Address
Jerome Coutant 1:917af0ca86df 1496 * @param PinPosition: Pin [0:23]
Jerome Coutant 1:917af0ca86df 1497 * @param PinValue: 0/1
Jerome Coutant 1:917af0ca86df 1498 * @retval None
Jerome Coutant 1:917af0ca86df 1499 */
Jerome Coutant 1:917af0ca86df 1500 void mfxstm32l152_reg24_setPinValue(uint16_t DeviceAddr, uint8_t RegisterAddr, uint32_t PinPosition, uint8_t PinValue )
Jerome Coutant 1:917af0ca86df 1501 {
Jerome Coutant 1:917af0ca86df 1502 uint8_t tmp = 0;
Jerome Coutant 1:917af0ca86df 1503 uint8_t pin_0_7, pin_8_15, pin_16_23;
Jerome Coutant 1:917af0ca86df 1504
Jerome Coutant 1:917af0ca86df 1505 pin_0_7 = PinPosition & 0x0000ff;
Jerome Coutant 1:917af0ca86df 1506 pin_8_15 = PinPosition >> 8;
Jerome Coutant 1:917af0ca86df 1507 pin_8_15 = pin_8_15 & 0x00ff;
Jerome Coutant 1:917af0ca86df 1508 pin_16_23 = PinPosition >> 16;
Jerome Coutant 1:917af0ca86df 1509
Jerome Coutant 1:917af0ca86df 1510 if (pin_0_7)
Jerome Coutant 1:917af0ca86df 1511 {
Jerome Coutant 1:917af0ca86df 1512 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1513 tmp = MFX_IO_Read(DeviceAddr, RegisterAddr);
Jerome Coutant 1:917af0ca86df 1514
Jerome Coutant 1:917af0ca86df 1515 /* Set the selected pin direction */
Jerome Coutant 1:917af0ca86df 1516 if (PinValue != 0)
Jerome Coutant 1:917af0ca86df 1517 {
Jerome Coutant 1:917af0ca86df 1518 tmp |= (uint8_t)pin_0_7;
Jerome Coutant 1:917af0ca86df 1519 }
Jerome Coutant 1:917af0ca86df 1520 else
Jerome Coutant 1:917af0ca86df 1521 {
Jerome Coutant 1:917af0ca86df 1522 tmp &= ~(uint8_t)pin_0_7;
Jerome Coutant 1:917af0ca86df 1523 }
Jerome Coutant 1:917af0ca86df 1524
Jerome Coutant 1:917af0ca86df 1525 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 1526 MFX_IO_Write(DeviceAddr, RegisterAddr, tmp);
Jerome Coutant 1:917af0ca86df 1527 }
Jerome Coutant 1:917af0ca86df 1528
Jerome Coutant 1:917af0ca86df 1529 if (pin_8_15)
Jerome Coutant 1:917af0ca86df 1530 {
Jerome Coutant 1:917af0ca86df 1531 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1532 tmp = MFX_IO_Read(DeviceAddr, RegisterAddr+1);
Jerome Coutant 1:917af0ca86df 1533
Jerome Coutant 1:917af0ca86df 1534 /* Set the selected pin direction */
Jerome Coutant 1:917af0ca86df 1535 if (PinValue != 0)
Jerome Coutant 1:917af0ca86df 1536 {
Jerome Coutant 1:917af0ca86df 1537 tmp |= (uint8_t)pin_8_15;
Jerome Coutant 1:917af0ca86df 1538 }
Jerome Coutant 1:917af0ca86df 1539 else
Jerome Coutant 1:917af0ca86df 1540 {
Jerome Coutant 1:917af0ca86df 1541 tmp &= ~(uint8_t)pin_8_15;
Jerome Coutant 1:917af0ca86df 1542 }
Jerome Coutant 1:917af0ca86df 1543
Jerome Coutant 1:917af0ca86df 1544 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 1545 MFX_IO_Write(DeviceAddr, RegisterAddr+1, tmp);
Jerome Coutant 1:917af0ca86df 1546 }
Jerome Coutant 1:917af0ca86df 1547
Jerome Coutant 1:917af0ca86df 1548 if (pin_16_23)
Jerome Coutant 1:917af0ca86df 1549 {
Jerome Coutant 1:917af0ca86df 1550 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1551 tmp = MFX_IO_Read(DeviceAddr, RegisterAddr+2);
Jerome Coutant 1:917af0ca86df 1552
Jerome Coutant 1:917af0ca86df 1553 /* Set the selected pin direction */
Jerome Coutant 1:917af0ca86df 1554 if (PinValue != 0)
Jerome Coutant 1:917af0ca86df 1555 {
Jerome Coutant 1:917af0ca86df 1556 tmp |= (uint8_t)pin_16_23;
Jerome Coutant 1:917af0ca86df 1557 }
Jerome Coutant 1:917af0ca86df 1558 else
Jerome Coutant 1:917af0ca86df 1559 {
Jerome Coutant 1:917af0ca86df 1560 tmp &= ~(uint8_t)pin_16_23;
Jerome Coutant 1:917af0ca86df 1561 }
Jerome Coutant 1:917af0ca86df 1562
Jerome Coutant 1:917af0ca86df 1563 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 1564 MFX_IO_Write(DeviceAddr, RegisterAddr+2, tmp);
Jerome Coutant 1:917af0ca86df 1565 }
Jerome Coutant 1:917af0ca86df 1566 }
Jerome Coutant 1:917af0ca86df 1567
Jerome Coutant 1:917af0ca86df 1568
Jerome Coutant 1:917af0ca86df 1569 /**
Jerome Coutant 1:917af0ca86df 1570 * @}
Jerome Coutant 1:917af0ca86df 1571 */
Jerome Coutant 1:917af0ca86df 1572
Jerome Coutant 1:917af0ca86df 1573 /**
Jerome Coutant 1:917af0ca86df 1574 * @}
Jerome Coutant 1:917af0ca86df 1575 */
Jerome Coutant 1:917af0ca86df 1576
Jerome Coutant 1:917af0ca86df 1577 /**
Jerome Coutant 1:917af0ca86df 1578 * @}
Jerome Coutant 1:917af0ca86df 1579 */
Jerome Coutant 1:917af0ca86df 1580
Jerome Coutant 1:917af0ca86df 1581 /**
Jerome Coutant 1:917af0ca86df 1582 * @}
Jerome Coutant 1:917af0ca86df 1583 */
Jerome Coutant 1:917af0ca86df 1584 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/