ST / BSP_DISCO_L476VG

STM32L476G-Discovery board drivers V1.0.0

Dependents:   DiscoLogger DISCO_L476VG_GlassLCD DISCO_L476VG_MicrophoneRecorder DISCO_L476VG_UART ... more

Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c@5:4943b15cce9f, 2019-09-24 (annotated)

Committer:
jeromecoutant
Date:
Tue Sep 24 18:00:58 2019 +0200
Revision:
5:4943b15cce9f
Parent:
1:917af0ca86df 
Update BSP files with CubeL4 V1.14.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jeromecoutant 5:4943b15cce9f 1 /**
Jerome Coutant 1:917af0ca86df 2 ******************************************************************************
Jerome Coutant 1:917af0ca86df 3 * @file mfxstm32l152.c
Jerome Coutant 1:917af0ca86df 4 * @author MCD Application Team
Jerome Coutant 1:917af0ca86df 5 * @brief This file provides a set of functions needed to manage the MFXSTM32L152
Jerome Coutant 1:917af0ca86df 6 * IO Expander devices.
Jerome Coutant 1:917af0ca86df 7 ******************************************************************************
Jerome Coutant 1:917af0ca86df 8 * @attention
Jerome Coutant 1:917af0ca86df 9 *
jeromecoutant 5:4943b15cce9f 10 * <h2><center>&copy; Copyright (c) 2015 STMicroelectronics.
jeromecoutant 5:4943b15cce9f 11 * All rights reserved.</center></h2>
Jerome Coutant 1:917af0ca86df 12 *
jeromecoutant 5:4943b15cce9f 13 * This software component is licensed by ST under BSD 3-Clause license,
jeromecoutant 5:4943b15cce9f 14 * the "License"; You may not use this file except in compliance with the
jeromecoutant 5:4943b15cce9f 15 * License. You may obtain a copy of the License at:
jeromecoutant 5:4943b15cce9f 16 * opensource.org/licenses/BSD-3-Clause
Jerome Coutant 1:917af0ca86df 17 *
Jerome Coutant 1:917af0ca86df 18 ******************************************************************************
jeromecoutant 5:4943b15cce9f 19 */
Jerome Coutant 1:917af0ca86df 20
Jerome Coutant 1:917af0ca86df 21 /* Includes ------------------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 22 #include "mfxstm32l152.h"
Jerome Coutant 1:917af0ca86df 23
Jerome Coutant 1:917af0ca86df 24 /** @addtogroup BSP
Jerome Coutant 1:917af0ca86df 25 * @{
Jerome Coutant 1:917af0ca86df 26 */
Jerome Coutant 1:917af0ca86df 27
Jerome Coutant 1:917af0ca86df 28 /** @addtogroup Component
Jerome Coutant 1:917af0ca86df 29 * @{
jeromecoutant 5:4943b15cce9f 30 */
jeromecoutant 5:4943b15cce9f 31
Jerome Coutant 1:917af0ca86df 32 /** @defgroup MFXSTM32L152
Jerome Coutant 1:917af0ca86df 33 * @{
jeromecoutant 5:4943b15cce9f 34 */
jeromecoutant 5:4943b15cce9f 35
Jerome Coutant 1:917af0ca86df 36 /* Private typedef -----------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 37
Jerome Coutant 1:917af0ca86df 38 /** @defgroup MFXSTM32L152_Private_Types_Definitions
Jerome Coutant 1:917af0ca86df 39 * @{
jeromecoutant 5:4943b15cce9f 40 */
jeromecoutant 5:4943b15cce9f 41
Jerome Coutant 1:917af0ca86df 42 /* Private define ------------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 43
Jerome Coutant 1:917af0ca86df 44 /** @defgroup MFXSTM32L152_Private_Defines
Jerome Coutant 1:917af0ca86df 45 * @{
jeromecoutant 5:4943b15cce9f 46 */
Jerome Coutant 1:917af0ca86df 47 #define MFXSTM32L152_MAX_INSTANCE 3
Jerome Coutant 1:917af0ca86df 48
Jerome Coutant 1:917af0ca86df 49 /* Private macro -------------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 50
Jerome Coutant 1:917af0ca86df 51 /** @defgroup MFXSTM32L152_Private_Macros
Jerome Coutant 1:917af0ca86df 52 * @{
jeromecoutant 5:4943b15cce9f 53 */
jeromecoutant 5:4943b15cce9f 54
Jerome Coutant 1:917af0ca86df 55 /* Private variables ---------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 56
Jerome Coutant 1:917af0ca86df 57 /** @defgroup MFXSTM32L152_Private_Variables
Jerome Coutant 1:917af0ca86df 58 * @{
jeromecoutant 5:4943b15cce9f 59 */
Jerome Coutant 1:917af0ca86df 60
jeromecoutant 5:4943b15cce9f 61 /* Touch screen driver structure initialization */
jeromecoutant 5:4943b15cce9f 62 TS_DrvTypeDef mfxstm32l152_ts_drv =
Jerome Coutant 1:917af0ca86df 63 {
Jerome Coutant 1:917af0ca86df 64 mfxstm32l152_Init,
Jerome Coutant 1:917af0ca86df 65 mfxstm32l152_ReadID,
Jerome Coutant 1:917af0ca86df 66 mfxstm32l152_Reset,
jeromecoutant 5:4943b15cce9f 67
Jerome Coutant 1:917af0ca86df 68 mfxstm32l152_TS_Start,
Jerome Coutant 1:917af0ca86df 69 mfxstm32l152_TS_DetectTouch,
Jerome Coutant 1:917af0ca86df 70 mfxstm32l152_TS_GetXY,
jeromecoutant 5:4943b15cce9f 71
Jerome Coutant 1:917af0ca86df 72 mfxstm32l152_TS_EnableIT,
Jerome Coutant 1:917af0ca86df 73 mfxstm32l152_TS_ClearIT,
Jerome Coutant 1:917af0ca86df 74 mfxstm32l152_TS_ITStatus,
Jerome Coutant 1:917af0ca86df 75 mfxstm32l152_TS_DisableIT,
Jerome Coutant 1:917af0ca86df 76 };
Jerome Coutant 1:917af0ca86df 77
jeromecoutant 5:4943b15cce9f 78 /* IO driver structure initialization */
jeromecoutant 5:4943b15cce9f 79 IO_DrvTypeDef mfxstm32l152_io_drv =
Jerome Coutant 1:917af0ca86df 80 {
Jerome Coutant 1:917af0ca86df 81 mfxstm32l152_Init,
Jerome Coutant 1:917af0ca86df 82 mfxstm32l152_ReadID,
Jerome Coutant 1:917af0ca86df 83 mfxstm32l152_Reset,
jeromecoutant 5:4943b15cce9f 84
Jerome Coutant 1:917af0ca86df 85 mfxstm32l152_IO_Start,
Jerome Coutant 1:917af0ca86df 86 mfxstm32l152_IO_Config,
Jerome Coutant 1:917af0ca86df 87 mfxstm32l152_IO_WritePin,
Jerome Coutant 1:917af0ca86df 88 mfxstm32l152_IO_ReadPin,
jeromecoutant 5:4943b15cce9f 89
Jerome Coutant 1:917af0ca86df 90 mfxstm32l152_IO_EnableIT,
Jerome Coutant 1:917af0ca86df 91 mfxstm32l152_IO_DisableIT,
Jerome Coutant 1:917af0ca86df 92 mfxstm32l152_IO_ITStatus,
Jerome Coutant 1:917af0ca86df 93 mfxstm32l152_IO_ClearIT,
Jerome Coutant 1:917af0ca86df 94 };
Jerome Coutant 1:917af0ca86df 95
Jerome Coutant 1:917af0ca86df 96 /* IDD driver structure initialization */
Jerome Coutant 1:917af0ca86df 97 IDD_DrvTypeDef mfxstm32l152_idd_drv =
Jerome Coutant 1:917af0ca86df 98 {
Jerome Coutant 1:917af0ca86df 99 mfxstm32l152_Init,
Jerome Coutant 1:917af0ca86df 100 mfxstm32l152_DeInit,
Jerome Coutant 1:917af0ca86df 101 mfxstm32l152_ReadID,
Jerome Coutant 1:917af0ca86df 102 mfxstm32l152_Reset,
Jerome Coutant 1:917af0ca86df 103 mfxstm32l152_LowPower,
Jerome Coutant 1:917af0ca86df 104 mfxstm32l152_WakeUp,
Jerome Coutant 1:917af0ca86df 105
Jerome Coutant 1:917af0ca86df 106 mfxstm32l152_IDD_Start,
Jerome Coutant 1:917af0ca86df 107 mfxstm32l152_IDD_Config,
Jerome Coutant 1:917af0ca86df 108 mfxstm32l152_IDD_GetValue,
Jerome Coutant 1:917af0ca86df 109
Jerome Coutant 1:917af0ca86df 110 mfxstm32l152_IDD_EnableIT,
Jerome Coutant 1:917af0ca86df 111 mfxstm32l152_IDD_ClearIT,
Jerome Coutant 1:917af0ca86df 112 mfxstm32l152_IDD_GetITStatus,
Jerome Coutant 1:917af0ca86df 113 mfxstm32l152_IDD_DisableIT,
Jerome Coutant 1:917af0ca86df 114
Jerome Coutant 1:917af0ca86df 115 mfxstm32l152_Error_EnableIT,
Jerome Coutant 1:917af0ca86df 116 mfxstm32l152_Error_ClearIT,
Jerome Coutant 1:917af0ca86df 117 mfxstm32l152_Error_GetITStatus,
Jerome Coutant 1:917af0ca86df 118 mfxstm32l152_Error_DisableIT,
Jerome Coutant 1:917af0ca86df 119 mfxstm32l152_Error_ReadSrc,
Jerome Coutant 1:917af0ca86df 120 mfxstm32l152_Error_ReadMsg
Jerome Coutant 1:917af0ca86df 121 };
Jerome Coutant 1:917af0ca86df 122
Jerome Coutant 1:917af0ca86df 123
Jerome Coutant 1:917af0ca86df 124 /* mfxstm32l152 instances by address */
Jerome Coutant 1:917af0ca86df 125 uint8_t mfxstm32l152[MFXSTM32L152_MAX_INSTANCE] = {0};
Jerome Coutant 1:917af0ca86df 126 /**
Jerome Coutant 1:917af0ca86df 127 * @}
jeromecoutant 5:4943b15cce9f 128 */
jeromecoutant 5:4943b15cce9f 129
Jerome Coutant 1:917af0ca86df 130 /* Private function prototypes -----------------------------------------------*/
Jerome Coutant 1:917af0ca86df 131
Jerome Coutant 1:917af0ca86df 132 /** @defgroup MFXSTM32L152_Private_Function_Prototypes
Jerome Coutant 1:917af0ca86df 133 * @{
Jerome Coutant 1:917af0ca86df 134 */
jeromecoutant 5:4943b15cce9f 135 static uint8_t mfxstm32l152_GetInstance(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 136 static uint8_t mfxstm32l152_ReleaseInstance(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 137 static void mfxstm32l152_reg24_setPinValue(uint16_t DeviceAddr, uint8_t RegisterAddr, uint32_t PinPosition, uint8_t PinValue );
Jerome Coutant 1:917af0ca86df 138
Jerome Coutant 1:917af0ca86df 139 /* Private functions ---------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 140
Jerome Coutant 1:917af0ca86df 141 /** @defgroup MFXSTM32L152_Private_Functions
Jerome Coutant 1:917af0ca86df 142 * @{
Jerome Coutant 1:917af0ca86df 143 */
Jerome Coutant 1:917af0ca86df 144
Jerome Coutant 1:917af0ca86df 145 /**
Jerome Coutant 1:917af0ca86df 146 * @brief Initialize the mfxstm32l152 and configure the needed hardware resources
Jerome Coutant 1:917af0ca86df 147 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 148 * @retval None
Jerome Coutant 1:917af0ca86df 149 */
Jerome Coutant 1:917af0ca86df 150 void mfxstm32l152_Init(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 151 {
Jerome Coutant 1:917af0ca86df 152 uint8_t instance;
Jerome Coutant 1:917af0ca86df 153 uint8_t empty;
jeromecoutant 5:4943b15cce9f 154
Jerome Coutant 1:917af0ca86df 155 /* Check if device instance already exists */
Jerome Coutant 1:917af0ca86df 156 instance = mfxstm32l152_GetInstance(DeviceAddr);
jeromecoutant 5:4943b15cce9f 157
Jerome Coutant 1:917af0ca86df 158 /* To prevent double initialization */
Jerome Coutant 1:917af0ca86df 159 if(instance == 0xFF)
Jerome Coutant 1:917af0ca86df 160 {
Jerome Coutant 1:917af0ca86df 161 /* Look for empty instance */
Jerome Coutant 1:917af0ca86df 162 empty = mfxstm32l152_GetInstance(0);
jeromecoutant 5:4943b15cce9f 163
Jerome Coutant 1:917af0ca86df 164 if(empty < MFXSTM32L152_MAX_INSTANCE)
Jerome Coutant 1:917af0ca86df 165 {
Jerome Coutant 1:917af0ca86df 166 /* Register the current device instance */
Jerome Coutant 1:917af0ca86df 167 mfxstm32l152[empty] = DeviceAddr;
jeromecoutant 5:4943b15cce9f 168
Jerome Coutant 1:917af0ca86df 169 /* Initialize IO BUS layer */
Jerome Coutant 1:917af0ca86df 170 MFX_IO_Init();
Jerome Coutant 1:917af0ca86df 171 }
Jerome Coutant 1:917af0ca86df 172 }
jeromecoutant 5:4943b15cce9f 173
Jerome Coutant 1:917af0ca86df 174 mfxstm32l152_SetIrqOutPinPolarity(DeviceAddr, MFXSTM32L152_OUT_PIN_POLARITY_HIGH);
Jerome Coutant 1:917af0ca86df 175 mfxstm32l152_SetIrqOutPinType(DeviceAddr, MFXSTM32L152_OUT_PIN_TYPE_PUSHPULL);
Jerome Coutant 1:917af0ca86df 176 }
Jerome Coutant 1:917af0ca86df 177
Jerome Coutant 1:917af0ca86df 178 /**
Jerome Coutant 1:917af0ca86df 179 * @brief DeInitialize the mfxstm32l152 and unconfigure the needed hardware resources
Jerome Coutant 1:917af0ca86df 180 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 181 * @retval None
Jerome Coutant 1:917af0ca86df 182 */
Jerome Coutant 1:917af0ca86df 183 void mfxstm32l152_DeInit(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 184 {
Jerome Coutant 1:917af0ca86df 185 uint8_t instance;
jeromecoutant 5:4943b15cce9f 186
Jerome Coutant 1:917af0ca86df 187 /* release existing instance */
Jerome Coutant 1:917af0ca86df 188 instance = mfxstm32l152_ReleaseInstance(DeviceAddr);
jeromecoutant 5:4943b15cce9f 189
Jerome Coutant 1:917af0ca86df 190 /* De-Init only if instance was previously registered */
Jerome Coutant 1:917af0ca86df 191 if(instance != 0xFF)
Jerome Coutant 1:917af0ca86df 192 {
Jerome Coutant 1:917af0ca86df 193 /* De-Initialize IO BUS layer */
Jerome Coutant 1:917af0ca86df 194 MFX_IO_DeInit();
Jerome Coutant 1:917af0ca86df 195 }
Jerome Coutant 1:917af0ca86df 196 }
Jerome Coutant 1:917af0ca86df 197
Jerome Coutant 1:917af0ca86df 198 /**
Jerome Coutant 1:917af0ca86df 199 * @brief Reset the mfxstm32l152 by Software.
jeromecoutant 5:4943b15cce9f 200 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 201 * @retval None
Jerome Coutant 1:917af0ca86df 202 */
Jerome Coutant 1:917af0ca86df 203 void mfxstm32l152_Reset(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 204 {
jeromecoutant 5:4943b15cce9f 205 /* Soft Reset */
Jerome Coutant 1:917af0ca86df 206 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, MFXSTM32L152_SWRST);
Jerome Coutant 1:917af0ca86df 207
Jerome Coutant 1:917af0ca86df 208 /* Wait for a delay to ensure registers erasing */
Jerome Coutant 1:917af0ca86df 209 MFX_IO_Delay(10);
Jerome Coutant 1:917af0ca86df 210 }
Jerome Coutant 1:917af0ca86df 211
Jerome Coutant 1:917af0ca86df 212 /**
Jerome Coutant 1:917af0ca86df 213 * @brief Put mfxstm32l152 Device in Low Power standby mode
Jerome Coutant 1:917af0ca86df 214 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 215 * @retval None
Jerome Coutant 1:917af0ca86df 216 */
Jerome Coutant 1:917af0ca86df 217 void mfxstm32l152_LowPower(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 218 {
Jerome Coutant 1:917af0ca86df 219 /* Enter standby mode */
Jerome Coutant 1:917af0ca86df 220 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, MFXSTM32L152_STANDBY);
Jerome Coutant 1:917af0ca86df 221
Jerome Coutant 1:917af0ca86df 222 /* enable wakeup pin */
Jerome Coutant 1:917af0ca86df 223 MFX_IO_EnableWakeupPin();
Jerome Coutant 1:917af0ca86df 224 }
Jerome Coutant 1:917af0ca86df 225
Jerome Coutant 1:917af0ca86df 226 /**
Jerome Coutant 1:917af0ca86df 227 * @brief WakeUp mfxstm32l152 from standby mode
Jerome Coutant 1:917af0ca86df 228 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 229 * @retval None
Jerome Coutant 1:917af0ca86df 230 */
Jerome Coutant 1:917af0ca86df 231 void mfxstm32l152_WakeUp(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 232 {
Jerome Coutant 1:917af0ca86df 233 uint8_t instance;
jeromecoutant 5:4943b15cce9f 234
Jerome Coutant 1:917af0ca86df 235 /* Check if device instance already exists */
Jerome Coutant 1:917af0ca86df 236 instance = mfxstm32l152_GetInstance(DeviceAddr);
jeromecoutant 5:4943b15cce9f 237
Jerome Coutant 1:917af0ca86df 238 /* if instance does not exist, first initialize pins*/
Jerome Coutant 1:917af0ca86df 239 if(instance == 0xFF)
Jerome Coutant 1:917af0ca86df 240 {
Jerome Coutant 1:917af0ca86df 241 /* enable wakeup pin */
Jerome Coutant 1:917af0ca86df 242 MFX_IO_EnableWakeupPin();
Jerome Coutant 1:917af0ca86df 243 }
Jerome Coutant 1:917af0ca86df 244
Jerome Coutant 1:917af0ca86df 245 /* toggle wakeup pin */
Jerome Coutant 1:917af0ca86df 246 MFX_IO_Wakeup();
Jerome Coutant 1:917af0ca86df 247 }
Jerome Coutant 1:917af0ca86df 248
Jerome Coutant 1:917af0ca86df 249 /**
Jerome Coutant 1:917af0ca86df 250 * @brief Read the MFXSTM32L152 IO Expander device ID.
jeromecoutant 5:4943b15cce9f 251 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 252 * @retval The Device ID (two bytes).
Jerome Coutant 1:917af0ca86df 253 */
Jerome Coutant 1:917af0ca86df 254 uint16_t mfxstm32l152_ReadID(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 255 {
Jerome Coutant 1:917af0ca86df 256 uint8_t id;
jeromecoutant 5:4943b15cce9f 257
Jerome Coutant 1:917af0ca86df 258 /* Wait for a delay to ensure the state of registers */
Jerome Coutant 1:917af0ca86df 259 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 260
Jerome Coutant 1:917af0ca86df 261 /* Initialize IO BUS layer */
Jerome Coutant 1:917af0ca86df 262 MFX_IO_Init();
jeromecoutant 5:4943b15cce9f 263
Jerome Coutant 1:917af0ca86df 264 id = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_ID);
jeromecoutant 5:4943b15cce9f 265
Jerome Coutant 1:917af0ca86df 266 /* Return the device ID value */
Jerome Coutant 1:917af0ca86df 267 return (id);
Jerome Coutant 1:917af0ca86df 268 }
Jerome Coutant 1:917af0ca86df 269
Jerome Coutant 1:917af0ca86df 270 /**
Jerome Coutant 1:917af0ca86df 271 * @brief Read the MFXSTM32L152 device firmware version.
jeromecoutant 5:4943b15cce9f 272 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 273 * @retval The Device FW version (two bytes).
Jerome Coutant 1:917af0ca86df 274 */
Jerome Coutant 1:917af0ca86df 275 uint16_t mfxstm32l152_ReadFwVersion(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 276 {
Jerome Coutant 1:917af0ca86df 277 uint8_t data[2];
Jerome Coutant 1:917af0ca86df 278
Jerome Coutant 1:917af0ca86df 279 MFX_IO_ReadMultiple((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_FW_VERSION_MSB, data, sizeof(data)) ;
Jerome Coutant 1:917af0ca86df 280
Jerome Coutant 1:917af0ca86df 281 /* Recompose MFX firmware value */
Jerome Coutant 1:917af0ca86df 282 return ((data[0] << 8) | data[1]);
Jerome Coutant 1:917af0ca86df 283 }
Jerome Coutant 1:917af0ca86df 284
Jerome Coutant 1:917af0ca86df 285 /**
Jerome Coutant 1:917af0ca86df 286 * @brief Enable the interrupt mode for the selected IT source
jeromecoutant 5:4943b15cce9f 287 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 288 * @param Source: The interrupt source to be configured, could be:
jeromecoutant 5:4943b15cce9f 289 * @arg MFXSTM32L152_IRQ_GPIO: IO interrupt
jeromecoutant 5:4943b15cce9f 290 * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
jeromecoutant 5:4943b15cce9f 291 * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
jeromecoutant 5:4943b15cce9f 292 * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
jeromecoutant 5:4943b15cce9f 293 * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
jeromecoutant 5:4943b15cce9f 294 * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
jeromecoutant 5:4943b15cce9f 295 * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
jeromecoutant 5:4943b15cce9f 296 * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
Jerome Coutant 1:917af0ca86df 297 * @retval None
jeromecoutant 5:4943b15cce9f 298 */
Jerome Coutant 1:917af0ca86df 299 void mfxstm32l152_EnableITSource(uint16_t DeviceAddr, uint8_t Source)
Jerome Coutant 1:917af0ca86df 300 {
Jerome Coutant 1:917af0ca86df 301 uint8_t tmp = 0;
jeromecoutant 5:4943b15cce9f 302
Jerome Coutant 1:917af0ca86df 303 /* Get the current value of the INT_EN register */
Jerome Coutant 1:917af0ca86df 304 tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN);
Jerome Coutant 1:917af0ca86df 305
jeromecoutant 5:4943b15cce9f 306 /* Set the interrupts to be Enabled */
jeromecoutant 5:4943b15cce9f 307 tmp |= Source;
jeromecoutant 5:4943b15cce9f 308
Jerome Coutant 1:917af0ca86df 309 /* Set the register */
Jerome Coutant 1:917af0ca86df 310 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN, tmp);
Jerome Coutant 1:917af0ca86df 311 }
Jerome Coutant 1:917af0ca86df 312
Jerome Coutant 1:917af0ca86df 313 /**
Jerome Coutant 1:917af0ca86df 314 * @brief Disable the interrupt mode for the selected IT source
jeromecoutant 5:4943b15cce9f 315 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 316 * @param Source: The interrupt source to be configured, could be:
jeromecoutant 5:4943b15cce9f 317 * @arg MFXSTM32L152_IRQ_GPIO: IO interrupt
jeromecoutant 5:4943b15cce9f 318 * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
jeromecoutant 5:4943b15cce9f 319 * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
jeromecoutant 5:4943b15cce9f 320 * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
jeromecoutant 5:4943b15cce9f 321 * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
jeromecoutant 5:4943b15cce9f 322 * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
jeromecoutant 5:4943b15cce9f 323 * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
jeromecoutant 5:4943b15cce9f 324 * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
Jerome Coutant 1:917af0ca86df 325 * @retval None
Jerome Coutant 1:917af0ca86df 326 */
Jerome Coutant 1:917af0ca86df 327 void mfxstm32l152_DisableITSource(uint16_t DeviceAddr, uint8_t Source)
Jerome Coutant 1:917af0ca86df 328 {
Jerome Coutant 1:917af0ca86df 329 uint8_t tmp = 0;
jeromecoutant 5:4943b15cce9f 330
Jerome Coutant 1:917af0ca86df 331 /* Get the current value of the INT_EN register */
Jerome Coutant 1:917af0ca86df 332 tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN);
Jerome Coutant 1:917af0ca86df 333
jeromecoutant 5:4943b15cce9f 334 /* Set the interrupts to be Enabled */
jeromecoutant 5:4943b15cce9f 335 tmp &= ~Source;
jeromecoutant 5:4943b15cce9f 336
Jerome Coutant 1:917af0ca86df 337 /* Set the register */
Jerome Coutant 1:917af0ca86df 338 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN, tmp);
Jerome Coutant 1:917af0ca86df 339 }
Jerome Coutant 1:917af0ca86df 340
Jerome Coutant 1:917af0ca86df 341
Jerome Coutant 1:917af0ca86df 342 /**
Jerome Coutant 1:917af0ca86df 343 * @brief Returns the selected Global interrupt source pending bit value
jeromecoutant 5:4943b15cce9f 344 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 345 * @param Source: the Global interrupt source to be checked, could be:
jeromecoutant 5:4943b15cce9f 346 * @arg MFXSTM32L152_IRQ_GPIO: IO interrupt
jeromecoutant 5:4943b15cce9f 347 * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
jeromecoutant 5:4943b15cce9f 348 * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
jeromecoutant 5:4943b15cce9f 349 * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
jeromecoutant 5:4943b15cce9f 350 * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
jeromecoutant 5:4943b15cce9f 351 * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
jeromecoutant 5:4943b15cce9f 352 * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
jeromecoutant 5:4943b15cce9f 353 * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
Jerome Coutant 1:917af0ca86df 354 * @retval The value of the checked Global interrupt source status.
Jerome Coutant 1:917af0ca86df 355 */
Jerome Coutant 1:917af0ca86df 356 uint8_t mfxstm32l152_GlobalITStatus(uint16_t DeviceAddr, uint8_t Source)
Jerome Coutant 1:917af0ca86df 357 {
Jerome Coutant 1:917af0ca86df 358 /* Return the global IT source status (pending or not)*/
Jerome Coutant 1:917af0ca86df 359 return((MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_PENDING) & Source));
Jerome Coutant 1:917af0ca86df 360 }
Jerome Coutant 1:917af0ca86df 361
Jerome Coutant 1:917af0ca86df 362 /**
Jerome Coutant 1:917af0ca86df 363 * @brief Clear the selected Global interrupt pending bit(s)
jeromecoutant 5:4943b15cce9f 364 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 365 * @param Source: the Global interrupt source to be cleared, could be any combination
jeromecoutant 5:4943b15cce9f 366 * of the below values. The acknowledge signal for MFXSTM32L152_GPIOs configured in input
jeromecoutant 5:4943b15cce9f 367 * with interrupt is not on this register but in IRQ_GPI_ACK1, IRQ_GPI_ACK2 registers.
jeromecoutant 5:4943b15cce9f 368 * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
jeromecoutant 5:4943b15cce9f 369 * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
jeromecoutant 5:4943b15cce9f 370 * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
jeromecoutant 5:4943b15cce9f 371 * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
jeromecoutant 5:4943b15cce9f 372 * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
jeromecoutant 5:4943b15cce9f 373 * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
jeromecoutant 5:4943b15cce9f 374 * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
jeromecoutant 5:4943b15cce9f 375 * /\/\ IMPORTANT NOTE /\/\ must not use MFXSTM32L152_IRQ_GPIO as argument, see IRQ_GPI_ACK1 and IRQ_GPI_ACK2 registers
Jerome Coutant 1:917af0ca86df 376 * @retval None
Jerome Coutant 1:917af0ca86df 377 */
Jerome Coutant 1:917af0ca86df 378 void mfxstm32l152_ClearGlobalIT(uint16_t DeviceAddr, uint8_t Source)
Jerome Coutant 1:917af0ca86df 379 {
Jerome Coutant 1:917af0ca86df 380 /* Write 1 to the bits that have to be cleared */
Jerome Coutant 1:917af0ca86df 381 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_ACK, Source);
Jerome Coutant 1:917af0ca86df 382 }
Jerome Coutant 1:917af0ca86df 383
Jerome Coutant 1:917af0ca86df 384 /**
Jerome Coutant 1:917af0ca86df 385 * @brief Set the global interrupt Polarity of IRQ_OUT_PIN.
jeromecoutant 5:4943b15cce9f 386 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 387 * @param Polarity: the IT mode polarity, could be one of the following values:
jeromecoutant 5:4943b15cce9f 388 * @arg MFXSTM32L152_OUT_PIN_POLARITY_LOW: Interrupt output line is active Low edge
jeromecoutant 5:4943b15cce9f 389 * @arg MFXSTM32L152_OUT_PIN_POLARITY_HIGH: Interrupt line output is active High edge
Jerome Coutant 1:917af0ca86df 390 * @retval None
Jerome Coutant 1:917af0ca86df 391 */
Jerome Coutant 1:917af0ca86df 392 void mfxstm32l152_SetIrqOutPinPolarity(uint16_t DeviceAddr, uint8_t Polarity)
Jerome Coutant 1:917af0ca86df 393 {
Jerome Coutant 1:917af0ca86df 394 uint8_t tmp = 0;
jeromecoutant 5:4943b15cce9f 395
jeromecoutant 5:4943b15cce9f 396 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 397 tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT);
jeromecoutant 5:4943b15cce9f 398
Jerome Coutant 1:917af0ca86df 399 /* Mask the polarity bits */
Jerome Coutant 1:917af0ca86df 400 tmp &= ~(uint8_t)0x02;
jeromecoutant 5:4943b15cce9f 401
Jerome Coutant 1:917af0ca86df 402 /* Modify the Interrupt Output line configuration */
Jerome Coutant 1:917af0ca86df 403 tmp |= Polarity;
jeromecoutant 5:4943b15cce9f 404
Jerome Coutant 1:917af0ca86df 405 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 406 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT, tmp);
Jerome Coutant 1:917af0ca86df 407
Jerome Coutant 1:917af0ca86df 408 /* Wait for 1 ms for MFX to change IRQ_out pin config, before activate it */
Jerome Coutant 1:917af0ca86df 409 MFX_IO_Delay(1);
jeromecoutant 5:4943b15cce9f 410
Jerome Coutant 1:917af0ca86df 411 }
Jerome Coutant 1:917af0ca86df 412
Jerome Coutant 1:917af0ca86df 413 /**
jeromecoutant 5:4943b15cce9f 414 * @brief Set the global interrupt Type of IRQ_OUT_PIN.
jeromecoutant 5:4943b15cce9f 415 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 416 * @param Type: Interrupt line activity type, could be one of the following values:
jeromecoutant 5:4943b15cce9f 417 * @arg MFXSTM32L152_OUT_PIN_TYPE_OPENDRAIN: Open Drain output Interrupt line
jeromecoutant 5:4943b15cce9f 418 * @arg MFXSTM32L152_OUT_PIN_TYPE_PUSHPULL: Push Pull output Interrupt line
Jerome Coutant 1:917af0ca86df 419 * @retval None
Jerome Coutant 1:917af0ca86df 420 */
Jerome Coutant 1:917af0ca86df 421 void mfxstm32l152_SetIrqOutPinType(uint16_t DeviceAddr, uint8_t Type)
Jerome Coutant 1:917af0ca86df 422 {
Jerome Coutant 1:917af0ca86df 423 uint8_t tmp = 0;
jeromecoutant 5:4943b15cce9f 424
jeromecoutant 5:4943b15cce9f 425 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 426 tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT);
jeromecoutant 5:4943b15cce9f 427
Jerome Coutant 1:917af0ca86df 428 /* Mask the type bits */
Jerome Coutant 1:917af0ca86df 429 tmp &= ~(uint8_t)0x01;
jeromecoutant 5:4943b15cce9f 430
Jerome Coutant 1:917af0ca86df 431 /* Modify the Interrupt Output line configuration */
Jerome Coutant 1:917af0ca86df 432 tmp |= Type;
jeromecoutant 5:4943b15cce9f 433
Jerome Coutant 1:917af0ca86df 434 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 435 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT, tmp);
Jerome Coutant 1:917af0ca86df 436
Jerome Coutant 1:917af0ca86df 437 /* Wait for 1 ms for MFX to change IRQ_out pin config, before activate it */
Jerome Coutant 1:917af0ca86df 438 MFX_IO_Delay(1);
jeromecoutant 5:4943b15cce9f 439
Jerome Coutant 1:917af0ca86df 440 }
Jerome Coutant 1:917af0ca86df 441
Jerome Coutant 1:917af0ca86df 442
Jerome Coutant 1:917af0ca86df 443 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 444 /* ----------------------- GPIO ------------------------------------- */
Jerome Coutant 1:917af0ca86df 445 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 446
Jerome Coutant 1:917af0ca86df 447
Jerome Coutant 1:917af0ca86df 448 /**
Jerome Coutant 1:917af0ca86df 449 * @brief Start the IO functionality used and enable the AF for selected IO pin(s).
jeromecoutant 5:4943b15cce9f 450 * @param DeviceAddr: Device address on communication Bus.
jeromecoutant 5:4943b15cce9f 451 * @param AF_en: 0 to disable, else enabled.
Jerome Coutant 1:917af0ca86df 452 * @retval None
Jerome Coutant 1:917af0ca86df 453 */
Jerome Coutant 1:917af0ca86df 454 void mfxstm32l152_IO_Start(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 455 {
Jerome Coutant 1:917af0ca86df 456 uint8_t mode;
jeromecoutant 5:4943b15cce9f 457
Jerome Coutant 1:917af0ca86df 458 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 459 mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
jeromecoutant 5:4943b15cce9f 460
jeromecoutant 5:4943b15cce9f 461 /* Set the IO Functionalities to be Enabled */
jeromecoutant 5:4943b15cce9f 462 mode |= MFXSTM32L152_GPIO_EN;
jeromecoutant 5:4943b15cce9f 463
Jerome Coutant 1:917af0ca86df 464 /* Enable ALTERNATE functions */
jeromecoutant 5:4943b15cce9f 465 /* AGPIO[0..3] can be either IDD or GPIO */
jeromecoutant 5:4943b15cce9f 466 /* AGPIO[4..7] can be either TS or GPIO */
Jerome Coutant 1:917af0ca86df 467 /* if IDD or TS are enabled no matter the value this bit GPIO are not available for those pins */
jeromecoutant 5:4943b15cce9f 468 /* however the MFX will waste some cycles to to handle these potential GPIO (pooling, etc) */
Jerome Coutant 1:917af0ca86df 469 /* so if IDD and TS are both active it is better to let ALTERNATE off (0) */
Jerome Coutant 1:917af0ca86df 470 /* if however IDD or TS are not connected then set it on gives more GPIOs availability */
Jerome Coutant 1:917af0ca86df 471 /* remind that AGPIO are less efficient then normal GPIO (They use pooling rather then EXTI */
Jerome Coutant 1:917af0ca86df 472 if (IO_Pin > 0xFFFF)
Jerome Coutant 1:917af0ca86df 473 {
jeromecoutant 5:4943b15cce9f 474 mode |= MFXSTM32L152_ALTERNATE_GPIO_EN;
Jerome Coutant 1:917af0ca86df 475 }
Jerome Coutant 1:917af0ca86df 476 else
Jerome Coutant 1:917af0ca86df 477 {
jeromecoutant 5:4943b15cce9f 478 mode &= ~MFXSTM32L152_ALTERNATE_GPIO_EN;
jeromecoutant 5:4943b15cce9f 479 }
Jerome Coutant 1:917af0ca86df 480
jeromecoutant 5:4943b15cce9f 481 /* Write the new register value */
Jerome Coutant 1:917af0ca86df 482 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
jeromecoutant 5:4943b15cce9f 483
Jerome Coutant 1:917af0ca86df 484 /* Wait for 1 ms for MFX to change IRQ_out pin config, before activate it */
Jerome Coutant 1:917af0ca86df 485 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 486 }
Jerome Coutant 1:917af0ca86df 487
Jerome Coutant 1:917af0ca86df 488 /**
Jerome Coutant 1:917af0ca86df 489 * @brief Configures the IO pin(s) according to IO mode structure value.
jeromecoutant 5:4943b15cce9f 490 * @param DeviceAddr: Device address on communication Bus.
jeromecoutant 5:4943b15cce9f 491 * @param IO_Pin: The output pin to be set or reset. This parameter can be one
jeromecoutant 5:4943b15cce9f 492 * of the following values:
Jerome Coutant 1:917af0ca86df 493 * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 494 * @param IO_Mode: The IO pin mode to configure, could be one of the following values:
Jerome Coutant 1:917af0ca86df 495 * @arg IO_MODE_INPUT
Jerome Coutant 1:917af0ca86df 496 * @arg IO_MODE_OUTPUT
Jerome Coutant 1:917af0ca86df 497 * @arg IO_MODE_IT_RISING_EDGE
Jerome Coutant 1:917af0ca86df 498 * @arg IO_MODE_IT_FALLING_EDGE
Jerome Coutant 1:917af0ca86df 499 * @arg IO_MODE_IT_LOW_LEVEL
jeromecoutant 5:4943b15cce9f 500 * @arg IO_MODE_IT_HIGH_LEVEL
Jerome Coutant 1:917af0ca86df 501 * @arg IO_MODE_INPUT_PU,
Jerome Coutant 1:917af0ca86df 502 * @arg IO_MODE_INPUT_PD,
Jerome Coutant 1:917af0ca86df 503 * @arg IO_MODE_OUTPUT_OD_PU,
Jerome Coutant 1:917af0ca86df 504 * @arg IO_MODE_OUTPUT_OD_PD,
Jerome Coutant 1:917af0ca86df 505 * @arg IO_MODE_OUTPUT_PP_PU,
Jerome Coutant 1:917af0ca86df 506 * @arg IO_MODE_OUTPUT_PP_PD,
Jerome Coutant 1:917af0ca86df 507 * @arg IO_MODE_IT_RISING_EDGE_PU
Jerome Coutant 1:917af0ca86df 508 * @arg IO_MODE_IT_FALLING_EDGE_PU
Jerome Coutant 1:917af0ca86df 509 * @arg IO_MODE_IT_LOW_LEVEL_PU
Jerome Coutant 1:917af0ca86df 510 * @arg IO_MODE_IT_HIGH_LEVEL_PU
Jerome Coutant 1:917af0ca86df 511 * @arg IO_MODE_IT_RISING_EDGE_PD
Jerome Coutant 1:917af0ca86df 512 * @arg IO_MODE_IT_FALLING_EDGE_PD
Jerome Coutant 1:917af0ca86df 513 * @arg IO_MODE_IT_LOW_LEVEL_PD
Jerome Coutant 1:917af0ca86df 514 * @arg IO_MODE_IT_HIGH_LEVEL_PD
Jerome Coutant 1:917af0ca86df 515 * @retval None
Jerome Coutant 1:917af0ca86df 516 */
Jerome Coutant 1:917af0ca86df 517 uint8_t mfxstm32l152_IO_Config(uint16_t DeviceAddr, uint32_t IO_Pin, IO_ModeTypedef IO_Mode)
Jerome Coutant 1:917af0ca86df 518 {
Jerome Coutant 1:917af0ca86df 519 uint8_t error_code = 0;
Jerome Coutant 1:917af0ca86df 520
Jerome Coutant 1:917af0ca86df 521 /* Configure IO pin according to selected IO mode */
Jerome Coutant 1:917af0ca86df 522 switch(IO_Mode)
Jerome Coutant 1:917af0ca86df 523 {
Jerome Coutant 1:917af0ca86df 524 case IO_MODE_OFF: /* Off or analog mode */
Jerome Coutant 1:917af0ca86df 525 case IO_MODE_ANALOG: /* Off or analog mode */
Jerome Coutant 1:917af0ca86df 526 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 527 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 528 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 529 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 530 break;
Jerome Coutant 1:917af0ca86df 531
Jerome Coutant 1:917af0ca86df 532 case IO_MODE_INPUT: /* Input mode */
Jerome Coutant 1:917af0ca86df 533 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 534 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 535 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 536 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 537 break;
jeromecoutant 5:4943b15cce9f 538
Jerome Coutant 1:917af0ca86df 539 case IO_MODE_INPUT_PU: /* Input mode */
Jerome Coutant 1:917af0ca86df 540 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 541 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 542 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 543 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 544 break;
jeromecoutant 5:4943b15cce9f 545
Jerome Coutant 1:917af0ca86df 546 case IO_MODE_INPUT_PD: /* Input mode */
Jerome Coutant 1:917af0ca86df 547 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 548 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 549 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 550 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 551 break;
Jerome Coutant 1:917af0ca86df 552
Jerome Coutant 1:917af0ca86df 553 case IO_MODE_OUTPUT: /* Output mode */
Jerome Coutant 1:917af0ca86df 554 case IO_MODE_OUTPUT_PP_PD: /* Output mode */
Jerome Coutant 1:917af0ca86df 555 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 556 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
Jerome Coutant 1:917af0ca86df 557 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_PUSH_PULL);
Jerome Coutant 1:917af0ca86df 558 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 559 break;
Jerome Coutant 1:917af0ca86df 560
Jerome Coutant 1:917af0ca86df 561 case IO_MODE_OUTPUT_PP_PU: /* Output mode */
Jerome Coutant 1:917af0ca86df 562 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 563 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
Jerome Coutant 1:917af0ca86df 564 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_PUSH_PULL);
Jerome Coutant 1:917af0ca86df 565 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 566 break;
Jerome Coutant 1:917af0ca86df 567
Jerome Coutant 1:917af0ca86df 568 case IO_MODE_OUTPUT_OD_PD: /* Output mode */
Jerome Coutant 1:917af0ca86df 569 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 570 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
Jerome Coutant 1:917af0ca86df 571 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_OPEN_DRAIN);
Jerome Coutant 1:917af0ca86df 572 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 573 break;
Jerome Coutant 1:917af0ca86df 574
Jerome Coutant 1:917af0ca86df 575 case IO_MODE_OUTPUT_OD_PU: /* Output mode */
Jerome Coutant 1:917af0ca86df 576 mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
Jerome Coutant 1:917af0ca86df 577 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
Jerome Coutant 1:917af0ca86df 578 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_OPEN_DRAIN);
Jerome Coutant 1:917af0ca86df 579 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 580 break;
Jerome Coutant 1:917af0ca86df 581
Jerome Coutant 1:917af0ca86df 582 case IO_MODE_IT_RISING_EDGE: /* Interrupt rising edge mode */
Jerome Coutant 1:917af0ca86df 583 mfxstm32l152_IO_EnableIT(DeviceAddr);
jeromecoutant 5:4943b15cce9f 584 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 585 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 586 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 587 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
Jerome Coutant 1:917af0ca86df 588 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 589 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 590 break;
Jerome Coutant 1:917af0ca86df 591
Jerome Coutant 1:917af0ca86df 592 case IO_MODE_IT_RISING_EDGE_PU: /* Interrupt rising edge mode */
Jerome Coutant 1:917af0ca86df 593 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 594 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 595 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 596 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 597 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
Jerome Coutant 1:917af0ca86df 598 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 599 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 600 break;
Jerome Coutant 1:917af0ca86df 601
Jerome Coutant 1:917af0ca86df 602 case IO_MODE_IT_RISING_EDGE_PD: /* Interrupt rising edge mode */
Jerome Coutant 1:917af0ca86df 603 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 604 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 605 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 606 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
jeromecoutant 5:4943b15cce9f 607 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
jeromecoutant 5:4943b15cce9f 608 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 609 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 610 break;
Jerome Coutant 1:917af0ca86df 611
Jerome Coutant 1:917af0ca86df 612 case IO_MODE_IT_FALLING_EDGE: /* Interrupt falling edge mode */
Jerome Coutant 1:917af0ca86df 613 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 614 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 615 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 616 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 617 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
Jerome Coutant 1:917af0ca86df 618 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 619 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 620 break;
Jerome Coutant 1:917af0ca86df 621
Jerome Coutant 1:917af0ca86df 622 case IO_MODE_IT_FALLING_EDGE_PU: /* Interrupt falling edge mode */
Jerome Coutant 1:917af0ca86df 623 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 624 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 625 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 626 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 627 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
Jerome Coutant 1:917af0ca86df 628 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 629 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 630 break;
Jerome Coutant 1:917af0ca86df 631
Jerome Coutant 1:917af0ca86df 632 case IO_MODE_IT_FALLING_EDGE_PD: /* Interrupt falling edge mode */
Jerome Coutant 1:917af0ca86df 633 mfxstm32l152_IO_EnableIT(DeviceAddr);
jeromecoutant 5:4943b15cce9f 634 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 635 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 636 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
jeromecoutant 5:4943b15cce9f 637 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
jeromecoutant 5:4943b15cce9f 638 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 639 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 640 break;
Jerome Coutant 1:917af0ca86df 641
Jerome Coutant 1:917af0ca86df 642 case IO_MODE_IT_LOW_LEVEL: /* Low level interrupt mode */
Jerome Coutant 1:917af0ca86df 643 mfxstm32l152_IO_EnableIT(DeviceAddr);
jeromecoutant 5:4943b15cce9f 644 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 645 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 646 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 647 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
Jerome Coutant 1:917af0ca86df 648 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 649 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 650 break;
Jerome Coutant 1:917af0ca86df 651
Jerome Coutant 1:917af0ca86df 652 case IO_MODE_IT_LOW_LEVEL_PU: /* Low level interrupt mode */
Jerome Coutant 1:917af0ca86df 653 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 654 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 655 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 656 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 657 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
Jerome Coutant 1:917af0ca86df 658 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 659 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 660 break;
Jerome Coutant 1:917af0ca86df 661
Jerome Coutant 1:917af0ca86df 662 case IO_MODE_IT_LOW_LEVEL_PD: /* Low level interrupt mode */
Jerome Coutant 1:917af0ca86df 663 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 664 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 665 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 666 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 667 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
jeromecoutant 5:4943b15cce9f 668 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
Jerome Coutant 1:917af0ca86df 669 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 670 break;
jeromecoutant 5:4943b15cce9f 671
Jerome Coutant 1:917af0ca86df 672 case IO_MODE_IT_HIGH_LEVEL: /* High level interrupt mode */
Jerome Coutant 1:917af0ca86df 673 mfxstm32l152_IO_EnableIT(DeviceAddr);
jeromecoutant 5:4943b15cce9f 674 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 675 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 676 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 677 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
Jerome Coutant 1:917af0ca86df 678 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 679 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 680 break;
Jerome Coutant 1:917af0ca86df 681
Jerome Coutant 1:917af0ca86df 682 case IO_MODE_IT_HIGH_LEVEL_PU: /* High level interrupt mode */
Jerome Coutant 1:917af0ca86df 683 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 684 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 685 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 686 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
Jerome Coutant 1:917af0ca86df 687 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
Jerome Coutant 1:917af0ca86df 688 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 689 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
Jerome Coutant 1:917af0ca86df 690 break;
Jerome Coutant 1:917af0ca86df 691
Jerome Coutant 1:917af0ca86df 692 case IO_MODE_IT_HIGH_LEVEL_PD: /* High level interrupt mode */
Jerome Coutant 1:917af0ca86df 693 mfxstm32l152_IO_EnableIT(DeviceAddr);
Jerome Coutant 1:917af0ca86df 694 mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
Jerome Coutant 1:917af0ca86df 695 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
Jerome Coutant 1:917af0ca86df 696 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
Jerome Coutant 1:917af0ca86df 697 mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
jeromecoutant 5:4943b15cce9f 698 mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
Jerome Coutant 1:917af0ca86df 699 mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
jeromecoutant 5:4943b15cce9f 700 break;
jeromecoutant 5:4943b15cce9f 701
Jerome Coutant 1:917af0ca86df 702 default:
Jerome Coutant 1:917af0ca86df 703 error_code = (uint8_t) IO_Mode;
jeromecoutant 5:4943b15cce9f 704 break;
jeromecoutant 5:4943b15cce9f 705 }
Jerome Coutant 1:917af0ca86df 706
Jerome Coutant 1:917af0ca86df 707 return error_code;
Jerome Coutant 1:917af0ca86df 708 }
Jerome Coutant 1:917af0ca86df 709
Jerome Coutant 1:917af0ca86df 710 /**
Jerome Coutant 1:917af0ca86df 711 * @brief Initialize the selected IO pin direction.
Jerome Coutant 1:917af0ca86df 712 * @param DeviceAddr: Device address on communication Bus.
jeromecoutant 5:4943b15cce9f 713 * @param IO_Pin: The IO pin to be configured. This parameter could be any
Jerome Coutant 1:917af0ca86df 714 * combination of the following values:
jeromecoutant 5:4943b15cce9f 715 * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
jeromecoutant 5:4943b15cce9f 716 * @param Direction: could be MFXSTM32L152_GPIO_DIR_IN or MFXSTM32L152_GPIO_DIR_OUT.
Jerome Coutant 1:917af0ca86df 717 * @retval None
Jerome Coutant 1:917af0ca86df 718 */
Jerome Coutant 1:917af0ca86df 719 void mfxstm32l152_IO_InitPin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Direction)
Jerome Coutant 1:917af0ca86df 720 {
Jerome Coutant 1:917af0ca86df 721 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_DIR1, IO_Pin, Direction);
Jerome Coutant 1:917af0ca86df 722 }
Jerome Coutant 1:917af0ca86df 723
Jerome Coutant 1:917af0ca86df 724 /**
jeromecoutant 5:4943b15cce9f 725 * @brief Set the global interrupt Type.
jeromecoutant 5:4943b15cce9f 726 * @param DeviceAddr: Device address on communication Bus.
jeromecoutant 5:4943b15cce9f 727 * @param IO_Pin: The IO pin to be configured. This parameter could be any
Jerome Coutant 1:917af0ca86df 728 * combination of the following values:
jeromecoutant 5:4943b15cce9f 729 * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 730 * @param Evt: Interrupt line activity type, could be one of the following values:
jeromecoutant 5:4943b15cce9f 731 * @arg MFXSTM32L152_IRQ_GPI_EVT_LEVEL: Interrupt line is active in level model
jeromecoutant 5:4943b15cce9f 732 * @arg MFXSTM32L152_IRQ_GPI_EVT_EDGE: Interrupt line is active in edge model
Jerome Coutant 1:917af0ca86df 733 * @retval None
Jerome Coutant 1:917af0ca86df 734 */
Jerome Coutant 1:917af0ca86df 735 void mfxstm32l152_IO_SetIrqEvtMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Evt)
Jerome Coutant 1:917af0ca86df 736 {
Jerome Coutant 1:917af0ca86df 737 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_EVT1, IO_Pin, Evt);
Jerome Coutant 1:917af0ca86df 738 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 739 }
Jerome Coutant 1:917af0ca86df 740
Jerome Coutant 1:917af0ca86df 741 /**
Jerome Coutant 1:917af0ca86df 742 * @brief Configure the Edge for which a transition is detectable for the
Jerome Coutant 1:917af0ca86df 743 * selected pin.
Jerome Coutant 1:917af0ca86df 744 * @param DeviceAddr: Device address on communication Bus.
jeromecoutant 5:4943b15cce9f 745 * @param IO_Pin: The IO pin to be configured. This parameter could be any
Jerome Coutant 1:917af0ca86df 746 * combination of the following values:
jeromecoutant 5:4943b15cce9f 747 * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 748 * @param Evt: Interrupt line activity type, could be one of the following values:
jeromecoutant 5:4943b15cce9f 749 * @arg MFXSTM32L152_IRQ_GPI_TYPE_LLFE: Interrupt line is active in Low Level or Falling Edge
jeromecoutant 5:4943b15cce9f 750 * @arg MFXSTM32L152_IRQ_GPI_TYPE_HLRE: Interrupt line is active in High Level or Rising Edge
Jerome Coutant 1:917af0ca86df 751 * @retval None
Jerome Coutant 1:917af0ca86df 752 */
Jerome Coutant 1:917af0ca86df 753 void mfxstm32l152_IO_SetIrqTypeMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Type)
Jerome Coutant 1:917af0ca86df 754 {
Jerome Coutant 1:917af0ca86df 755 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_TYPE1, IO_Pin, Type);
Jerome Coutant 1:917af0ca86df 756 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 757 }
Jerome Coutant 1:917af0ca86df 758
Jerome Coutant 1:917af0ca86df 759 /**
Jerome Coutant 1:917af0ca86df 760 * @brief When GPIO is in output mode, puts the corresponding GPO in High (1) or Low (0) level.
jeromecoutant 5:4943b15cce9f 761 * @param DeviceAddr: Device address on communication Bus.
jeromecoutant 5:4943b15cce9f 762 * @param IO_Pin: The output pin to be set or reset. This parameter can be one
Jerome Coutant 1:917af0ca86df 763 * of the following values:
jeromecoutant 5:4943b15cce9f 764 * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 765 * @param PinState: The new IO pin state.
Jerome Coutant 1:917af0ca86df 766 * @retval None
Jerome Coutant 1:917af0ca86df 767 */
Jerome Coutant 1:917af0ca86df 768 void mfxstm32l152_IO_WritePin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t PinState)
Jerome Coutant 1:917af0ca86df 769 {
Jerome Coutant 1:917af0ca86df 770 /* Apply the bit value to the selected pin */
Jerome Coutant 1:917af0ca86df 771 if (PinState != 0)
Jerome Coutant 1:917af0ca86df 772 {
Jerome Coutant 1:917af0ca86df 773 /* Set the SET register */
Jerome Coutant 1:917af0ca86df 774 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPO_SET1, IO_Pin, 1);
Jerome Coutant 1:917af0ca86df 775 }
Jerome Coutant 1:917af0ca86df 776 else
Jerome Coutant 1:917af0ca86df 777 {
Jerome Coutant 1:917af0ca86df 778 /* Set the CLEAR register */
Jerome Coutant 1:917af0ca86df 779 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPO_CLR1, IO_Pin, 1);
jeromecoutant 5:4943b15cce9f 780 }
Jerome Coutant 1:917af0ca86df 781 }
Jerome Coutant 1:917af0ca86df 782
Jerome Coutant 1:917af0ca86df 783 /**
Jerome Coutant 1:917af0ca86df 784 * @brief Return the state of the selected IO pin(s).
jeromecoutant 5:4943b15cce9f 785 * @param DeviceAddr: Device address on communication Bus.
jeromecoutant 5:4943b15cce9f 786 * @param IO_Pin: The output pin to be set or reset. This parameter can be one
Jerome Coutant 1:917af0ca86df 787 * of the following values:
jeromecoutant 5:4943b15cce9f 788 * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 789 * @retval IO pin(s) state.
Jerome Coutant 1:917af0ca86df 790 */
Jerome Coutant 1:917af0ca86df 791 uint32_t mfxstm32l152_IO_ReadPin(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 792 {
jeromecoutant 5:4943b15cce9f 793 uint32_t tmp1 = 0;
jeromecoutant 5:4943b15cce9f 794 uint32_t tmp2 = 0;
jeromecoutant 5:4943b15cce9f 795 uint32_t tmp3 = 0;
jeromecoutant 5:4943b15cce9f 796
jeromecoutant 5:4943b15cce9f 797 if(IO_Pin & 0x000000FF)
jeromecoutant 5:4943b15cce9f 798 {
jeromecoutant 5:4943b15cce9f 799 tmp1 = (uint32_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_STATE1);
jeromecoutant 5:4943b15cce9f 800 }
jeromecoutant 5:4943b15cce9f 801 if(IO_Pin & 0x0000FF00)
jeromecoutant 5:4943b15cce9f 802 {
jeromecoutant 5:4943b15cce9f 803 tmp2 = (uint32_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_STATE2);
jeromecoutant 5:4943b15cce9f 804 }
jeromecoutant 5:4943b15cce9f 805 if(IO_Pin & 0x00FF0000)
jeromecoutant 5:4943b15cce9f 806 {
jeromecoutant 5:4943b15cce9f 807 tmp3 = (uint32_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_STATE3);
jeromecoutant 5:4943b15cce9f 808 }
jeromecoutant 5:4943b15cce9f 809
Jerome Coutant 1:917af0ca86df 810 tmp3 = tmp1 + (tmp2 << 8) + (tmp3 << 16);
jeromecoutant 5:4943b15cce9f 811
Jerome Coutant 1:917af0ca86df 812 return(tmp3 & IO_Pin);
Jerome Coutant 1:917af0ca86df 813 }
Jerome Coutant 1:917af0ca86df 814
Jerome Coutant 1:917af0ca86df 815 /**
Jerome Coutant 1:917af0ca86df 816 * @brief Enable the global IO interrupt source.
jeromecoutant 5:4943b15cce9f 817 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 818 * @retval None
Jerome Coutant 1:917af0ca86df 819 */
Jerome Coutant 1:917af0ca86df 820 void mfxstm32l152_IO_EnableIT(uint16_t DeviceAddr)
jeromecoutant 5:4943b15cce9f 821 {
Jerome Coutant 1:917af0ca86df 822 MFX_IO_ITConfig();
jeromecoutant 5:4943b15cce9f 823
Jerome Coutant 1:917af0ca86df 824 /* Enable global IO IT source */
Jerome Coutant 1:917af0ca86df 825 mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_GPIO);
Jerome Coutant 1:917af0ca86df 826 }
Jerome Coutant 1:917af0ca86df 827
Jerome Coutant 1:917af0ca86df 828 /**
Jerome Coutant 1:917af0ca86df 829 * @brief Disable the global IO interrupt source.
jeromecoutant 5:4943b15cce9f 830 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 831 * @retval None
Jerome Coutant 1:917af0ca86df 832 */
Jerome Coutant 1:917af0ca86df 833 void mfxstm32l152_IO_DisableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 834 {
Jerome Coutant 1:917af0ca86df 835 /* Disable global IO IT source */
jeromecoutant 5:4943b15cce9f 836 mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_GPIO);
Jerome Coutant 1:917af0ca86df 837 }
jeromecoutant 5:4943b15cce9f 838
Jerome Coutant 1:917af0ca86df 839 /**
Jerome Coutant 1:917af0ca86df 840 * @brief Enable interrupt mode for the selected IO pin(s).
Jerome Coutant 1:917af0ca86df 841 * @param DeviceAddr: Device address on communication Bus.
jeromecoutant 5:4943b15cce9f 842 * @param IO_Pin: The IO interrupt to be enabled. This parameter could be any
Jerome Coutant 1:917af0ca86df 843 * combination of the following values:
Jerome Coutant 1:917af0ca86df 844 * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 845 * @retval None
Jerome Coutant 1:917af0ca86df 846 */
Jerome Coutant 1:917af0ca86df 847 void mfxstm32l152_IO_EnablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 848 {
Jerome Coutant 1:917af0ca86df 849 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_SRC1, IO_Pin, 1);
Jerome Coutant 1:917af0ca86df 850 }
Jerome Coutant 1:917af0ca86df 851
Jerome Coutant 1:917af0ca86df 852 /**
Jerome Coutant 1:917af0ca86df 853 * @brief Disable interrupt mode for the selected IO pin(s).
Jerome Coutant 1:917af0ca86df 854 * @param DeviceAddr: Device address on communication Bus.
jeromecoutant 5:4943b15cce9f 855 * @param IO_Pin: The IO interrupt to be disabled. This parameter could be any
Jerome Coutant 1:917af0ca86df 856 * combination of the following values:
Jerome Coutant 1:917af0ca86df 857 * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 858 * @retval None
Jerome Coutant 1:917af0ca86df 859 */
Jerome Coutant 1:917af0ca86df 860 void mfxstm32l152_IO_DisablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 861 {
Jerome Coutant 1:917af0ca86df 862 mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_SRC1, IO_Pin, 0);
Jerome Coutant 1:917af0ca86df 863 }
Jerome Coutant 1:917af0ca86df 864
Jerome Coutant 1:917af0ca86df 865
Jerome Coutant 1:917af0ca86df 866 /**
Jerome Coutant 1:917af0ca86df 867 * @brief Check the status of the selected IO interrupt pending bit
Jerome Coutant 1:917af0ca86df 868 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 869 * @param IO_Pin: The IO interrupt to be checked could be:
jeromecoutant 5:4943b15cce9f 870 * @arg MFXSTM32L152_GPIO_PIN_x Where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 871 * @retval Status of the checked IO pin(s).
Jerome Coutant 1:917af0ca86df 872 */
Jerome Coutant 1:917af0ca86df 873 uint32_t mfxstm32l152_IO_ITStatus(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 874 {
Jerome Coutant 1:917af0ca86df 875 /* Get the Interrupt status */
jeromecoutant 5:4943b15cce9f 876 uint8_t tmp1 = 0;
jeromecoutant 5:4943b15cce9f 877 uint16_t tmp2 = 0;
jeromecoutant 5:4943b15cce9f 878 uint32_t tmp3 = 0;
Jerome Coutant 1:917af0ca86df 879
jeromecoutant 5:4943b15cce9f 880 if(IO_Pin & 0xFF)
jeromecoutant 5:4943b15cce9f 881 {
jeromecoutant 5:4943b15cce9f 882 tmp1 = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING1);
jeromecoutant 5:4943b15cce9f 883 }
jeromecoutant 5:4943b15cce9f 884 if(IO_Pin & 0xFFFF00)
jeromecoutant 5:4943b15cce9f 885 {
jeromecoutant 5:4943b15cce9f 886 tmp2 = (uint16_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING2);
jeromecoutant 5:4943b15cce9f 887 }
jeromecoutant 5:4943b15cce9f 888 if(IO_Pin & 0xFFFF0000)
jeromecoutant 5:4943b15cce9f 889 {
jeromecoutant 5:4943b15cce9f 890 tmp3 = (uint32_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING3);
jeromecoutant 5:4943b15cce9f 891 }
jeromecoutant 5:4943b15cce9f 892
Jerome Coutant 1:917af0ca86df 893 tmp3 = tmp1 + (tmp2 << 8) + (tmp3 << 16);
jeromecoutant 5:4943b15cce9f 894
Jerome Coutant 1:917af0ca86df 895 return(tmp3 & IO_Pin);
Jerome Coutant 1:917af0ca86df 896 }
Jerome Coutant 1:917af0ca86df 897
Jerome Coutant 1:917af0ca86df 898 /**
Jerome Coutant 1:917af0ca86df 899 * @brief Clear the selected IO interrupt pending bit(s). It clear automatically also the general MFXSTM32L152_REG_ADR_IRQ_PENDING
Jerome Coutant 1:917af0ca86df 900 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 901 * @param IO_Pin: the IO interrupt to be cleared, could be:
jeromecoutant 5:4943b15cce9f 902 * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
Jerome Coutant 1:917af0ca86df 903 * @retval None
Jerome Coutant 1:917af0ca86df 904 */
Jerome Coutant 1:917af0ca86df 905 void mfxstm32l152_IO_ClearIT(uint16_t DeviceAddr, uint32_t IO_Pin)
Jerome Coutant 1:917af0ca86df 906 {
Jerome Coutant 1:917af0ca86df 907 /* Clear the IO IT pending bit(s) by acknowledging */
Jerome Coutant 1:917af0ca86df 908 /* it cleans automatically also the Global IRQ_GPIO */
Jerome Coutant 1:917af0ca86df 909 /* normally this function is called under interrupt */
Jerome Coutant 1:917af0ca86df 910 uint8_t pin_0_7, pin_8_15, pin_16_23;
Jerome Coutant 1:917af0ca86df 911
Jerome Coutant 1:917af0ca86df 912 pin_0_7 = IO_Pin & 0x0000ff;
Jerome Coutant 1:917af0ca86df 913 pin_8_15 = IO_Pin >> 8;
Jerome Coutant 1:917af0ca86df 914 pin_8_15 = pin_8_15 & 0x00ff;
Jerome Coutant 1:917af0ca86df 915 pin_16_23 = IO_Pin >> 16;
Jerome Coutant 1:917af0ca86df 916
Jerome Coutant 1:917af0ca86df 917 if (pin_0_7)
Jerome Coutant 1:917af0ca86df 918 {
Jerome Coutant 1:917af0ca86df 919 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_ACK1, pin_0_7);
Jerome Coutant 1:917af0ca86df 920 }
Jerome Coutant 1:917af0ca86df 921 if (pin_8_15)
Jerome Coutant 1:917af0ca86df 922 {
Jerome Coutant 1:917af0ca86df 923 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_ACK2, pin_8_15);
Jerome Coutant 1:917af0ca86df 924 }
Jerome Coutant 1:917af0ca86df 925 if (pin_16_23)
Jerome Coutant 1:917af0ca86df 926 {
Jerome Coutant 1:917af0ca86df 927 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_ACK3, pin_16_23);
Jerome Coutant 1:917af0ca86df 928 }
Jerome Coutant 1:917af0ca86df 929 }
Jerome Coutant 1:917af0ca86df 930
Jerome Coutant 1:917af0ca86df 931
Jerome Coutant 1:917af0ca86df 932 /**
Jerome Coutant 1:917af0ca86df 933 * @brief Enable the AF for aGPIO.
jeromecoutant 5:4943b15cce9f 934 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 935 * @retval None
Jerome Coutant 1:917af0ca86df 936 */
Jerome Coutant 1:917af0ca86df 937 void mfxstm32l152_IO_EnableAF(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 938 {
Jerome Coutant 1:917af0ca86df 939 uint8_t mode;
Jerome Coutant 1:917af0ca86df 940
Jerome Coutant 1:917af0ca86df 941 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 942 mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
jeromecoutant 5:4943b15cce9f 943
Jerome Coutant 1:917af0ca86df 944 /* Enable ALTERNATE functions */
jeromecoutant 5:4943b15cce9f 945 /* AGPIO[0..3] can be either IDD or GPIO */
jeromecoutant 5:4943b15cce9f 946 /* AGPIO[4..7] can be either TS or GPIO */
Jerome Coutant 1:917af0ca86df 947 /* if IDD or TS are enabled no matter the value this bit GPIO are not available for those pins */
jeromecoutant 5:4943b15cce9f 948 /* however the MFX will waste some cycles to to handle these potential GPIO (pooling, etc) */
Jerome Coutant 1:917af0ca86df 949 /* so if IDD and TS are both active it is better to let ALTERNATE disabled (0) */
Jerome Coutant 1:917af0ca86df 950 /* if however IDD or TS are not connected then set it on gives more GPIOs availability */
Jerome Coutant 1:917af0ca86df 951 /* remind that AGPIO are less efficient then normal GPIO (they use pooling rather then EXTI) */
jeromecoutant 5:4943b15cce9f 952 mode |= MFXSTM32L152_ALTERNATE_GPIO_EN;
jeromecoutant 5:4943b15cce9f 953
jeromecoutant 5:4943b15cce9f 954 /* Write the new register value */
Jerome Coutant 1:917af0ca86df 955 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
Jerome Coutant 1:917af0ca86df 956 }
Jerome Coutant 1:917af0ca86df 957
Jerome Coutant 1:917af0ca86df 958 /**
Jerome Coutant 1:917af0ca86df 959 * @brief Disable the AF for aGPIO.
jeromecoutant 5:4943b15cce9f 960 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 961 * @retval None
Jerome Coutant 1:917af0ca86df 962 */
Jerome Coutant 1:917af0ca86df 963 void mfxstm32l152_IO_DisableAF(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 964 {
Jerome Coutant 1:917af0ca86df 965 uint8_t mode;
Jerome Coutant 1:917af0ca86df 966
Jerome Coutant 1:917af0ca86df 967 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 968 mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
jeromecoutant 5:4943b15cce9f 969
Jerome Coutant 1:917af0ca86df 970 /* Enable ALTERNATE functions */
jeromecoutant 5:4943b15cce9f 971 /* AGPIO[0..3] can be either IDD or GPIO */
jeromecoutant 5:4943b15cce9f 972 /* AGPIO[4..7] can be either TS or GPIO */
Jerome Coutant 1:917af0ca86df 973 /* if IDD or TS are enabled no matter the value this bit GPIO are not available for those pins */
jeromecoutant 5:4943b15cce9f 974 /* however the MFX will waste some cycles to to handle these potential GPIO (pooling, etc) */
Jerome Coutant 1:917af0ca86df 975 /* so if IDD and TS are both active it is better to let ALTERNATE disabled (0) */
Jerome Coutant 1:917af0ca86df 976 /* if however IDD or TS are not connected then set it on gives more GPIOs availability */
Jerome Coutant 1:917af0ca86df 977 /* remind that AGPIO are less efficient then normal GPIO (they use pooling rather then EXTI) */
jeromecoutant 5:4943b15cce9f 978 mode &= ~MFXSTM32L152_ALTERNATE_GPIO_EN;
jeromecoutant 5:4943b15cce9f 979
jeromecoutant 5:4943b15cce9f 980 /* Write the new register value */
Jerome Coutant 1:917af0ca86df 981 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
jeromecoutant 5:4943b15cce9f 982
Jerome Coutant 1:917af0ca86df 983 }
Jerome Coutant 1:917af0ca86df 984
Jerome Coutant 1:917af0ca86df 985
Jerome Coutant 1:917af0ca86df 986 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 987 /* --------------------- TOUCH SCREEN ------------------------------- */
Jerome Coutant 1:917af0ca86df 988 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 989
Jerome Coutant 1:917af0ca86df 990 /**
Jerome Coutant 1:917af0ca86df 991 * @brief Configures the touch Screen Controller (Single point detection)
Jerome Coutant 1:917af0ca86df 992 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 993 * @retval None.
Jerome Coutant 1:917af0ca86df 994 */
Jerome Coutant 1:917af0ca86df 995 void mfxstm32l152_TS_Start(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 996 {
Jerome Coutant 1:917af0ca86df 997 uint8_t mode;
Jerome Coutant 1:917af0ca86df 998
Jerome Coutant 1:917af0ca86df 999 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1000 mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
jeromecoutant 5:4943b15cce9f 1001
jeromecoutant 5:4943b15cce9f 1002 /* Set the Functionalities to be Enabled */
jeromecoutant 5:4943b15cce9f 1003 mode |= MFXSTM32L152_TS_EN;
jeromecoutant 5:4943b15cce9f 1004
jeromecoutant 5:4943b15cce9f 1005 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 1006 MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
jeromecoutant 5:4943b15cce9f 1007
Jerome Coutant 1:917af0ca86df 1008 /* Wait for 2 ms */
jeromecoutant 5:4943b15cce9f 1009 MFX_IO_Delay(2);
jeromecoutant 5:4943b15cce9f 1010
Jerome Coutant 1:917af0ca86df 1011 /* Select 2 nF filter capacitor */
jeromecoutant 5:4943b15cce9f 1012 /* Configuration:
Jerome Coutant 1:917af0ca86df 1013 - Touch average control : 4 samples
Jerome Coutant 1:917af0ca86df 1014 - Touch delay time : 500 uS
jeromecoutant 5:4943b15cce9f 1015 - Panel driver setting time: 500 uS
Jerome Coutant 1:917af0ca86df 1016 */
Jerome Coutant 1:917af0ca86df 1017 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_SETTLING, 0x32);
Jerome Coutant 1:917af0ca86df 1018 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_TOUCH_DET_DELAY, 0x5);
Jerome Coutant 1:917af0ca86df 1019 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_AVE, 0x04);
jeromecoutant 5:4943b15cce9f 1020
Jerome Coutant 1:917af0ca86df 1021 /* Configure the Touch FIFO threshold: single point reading */
Jerome Coutant 1:917af0ca86df 1022 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_FIFO_TH, 0x01);
jeromecoutant 5:4943b15cce9f 1023
Jerome Coutant 1:917af0ca86df 1024 /* Clear the FIFO memory content. */
Jerome Coutant 1:917af0ca86df 1025 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_FIFO_TH, MFXSTM32L152_TS_CLEAR_FIFO);
Jerome Coutant 1:917af0ca86df 1026
Jerome Coutant 1:917af0ca86df 1027 /* Touch screen control configuration :
Jerome Coutant 1:917af0ca86df 1028 - No window tracking index
Jerome Coutant 1:917af0ca86df 1029 */
Jerome Coutant 1:917af0ca86df 1030 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_TRACK, 0x00);
jeromecoutant 5:4943b15cce9f 1031
jeromecoutant 5:4943b15cce9f 1032
Jerome Coutant 1:917af0ca86df 1033 /* Clear all the IT status pending bits if any */
Jerome Coutant 1:917af0ca86df 1034 mfxstm32l152_IO_ClearIT(DeviceAddr, 0xFFFFFF);
Jerome Coutant 1:917af0ca86df 1035
Jerome Coutant 1:917af0ca86df 1036 /* Wait for 1 ms delay */
Jerome Coutant 1:917af0ca86df 1037 MFX_IO_Delay(1);
Jerome Coutant 1:917af0ca86df 1038 }
Jerome Coutant 1:917af0ca86df 1039
Jerome Coutant 1:917af0ca86df 1040 /**
Jerome Coutant 1:917af0ca86df 1041 * @brief Return if there is touch detected or not.
Jerome Coutant 1:917af0ca86df 1042 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1043 * @retval Touch detected state.
Jerome Coutant 1:917af0ca86df 1044 */
Jerome Coutant 1:917af0ca86df 1045 uint8_t mfxstm32l152_TS_DetectTouch(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1046 {
Jerome Coutant 1:917af0ca86df 1047 uint8_t state;
Jerome Coutant 1:917af0ca86df 1048 uint8_t ret = 0;
jeromecoutant 5:4943b15cce9f 1049
Jerome Coutant 1:917af0ca86df 1050 state = MFX_IO_Read(DeviceAddr, MFXSTM32L152_TS_FIFO_STA);
Jerome Coutant 1:917af0ca86df 1051 state = ((state & (uint8_t)MFXSTM32L152_TS_CTRL_STATUS) == (uint8_t)MFXSTM32L152_TS_CTRL_STATUS);
jeromecoutant 5:4943b15cce9f 1052
Jerome Coutant 1:917af0ca86df 1053 if(state > 0)
Jerome Coutant 1:917af0ca86df 1054 {
Jerome Coutant 1:917af0ca86df 1055 if(MFX_IO_Read(DeviceAddr, MFXSTM32L152_TS_FIFO_LEVEL) > 0)
Jerome Coutant 1:917af0ca86df 1056 {
Jerome Coutant 1:917af0ca86df 1057 ret = 1;
Jerome Coutant 1:917af0ca86df 1058 }
Jerome Coutant 1:917af0ca86df 1059 }
jeromecoutant 5:4943b15cce9f 1060
Jerome Coutant 1:917af0ca86df 1061 return ret;
Jerome Coutant 1:917af0ca86df 1062 }
Jerome Coutant 1:917af0ca86df 1063
Jerome Coutant 1:917af0ca86df 1064 /**
Jerome Coutant 1:917af0ca86df 1065 * @brief Get the touch screen X and Y positions values
Jerome Coutant 1:917af0ca86df 1066 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1067 * @param X: Pointer to X position value
jeromecoutant 5:4943b15cce9f 1068 * @param Y: Pointer to Y position value
Jerome Coutant 1:917af0ca86df 1069 * @retval None.
Jerome Coutant 1:917af0ca86df 1070 */
Jerome Coutant 1:917af0ca86df 1071 void mfxstm32l152_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
Jerome Coutant 1:917af0ca86df 1072 {
Jerome Coutant 1:917af0ca86df 1073 uint8_t data_xy[3];
Jerome Coutant 1:917af0ca86df 1074
Jerome Coutant 1:917af0ca86df 1075 MFX_IO_ReadMultiple(DeviceAddr, MFXSTM32L152_TS_XY_DATA, data_xy, sizeof(data_xy)) ;
jeromecoutant 5:4943b15cce9f 1076
Jerome Coutant 1:917af0ca86df 1077 /* Calculate positions values */
jeromecoutant 5:4943b15cce9f 1078 *X = (data_xy[1]<<4) + (data_xy[0]>>4);
jeromecoutant 5:4943b15cce9f 1079 *Y = (data_xy[2]<<4) + (data_xy[0]&4);
Jerome Coutant 1:917af0ca86df 1080
Jerome Coutant 1:917af0ca86df 1081 /* Reset the FIFO memory content. */
Jerome Coutant 1:917af0ca86df 1082 MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_FIFO_TH, MFXSTM32L152_TS_CLEAR_FIFO);
Jerome Coutant 1:917af0ca86df 1083 }
Jerome Coutant 1:917af0ca86df 1084
Jerome Coutant 1:917af0ca86df 1085 /**
Jerome Coutant 1:917af0ca86df 1086 * @brief Configure the selected source to generate a global interrupt or not
jeromecoutant 5:4943b15cce9f 1087 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1088 * @retval None
Jerome Coutant 1:917af0ca86df 1089 */
Jerome Coutant 1:917af0ca86df 1090 void mfxstm32l152_TS_EnableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1091 {
Jerome Coutant 1:917af0ca86df 1092 MFX_IO_ITConfig();
jeromecoutant 5:4943b15cce9f 1093
Jerome Coutant 1:917af0ca86df 1094 /* Enable global TS IT source */
Jerome Coutant 1:917af0ca86df 1095 mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_TS_DET);
Jerome Coutant 1:917af0ca86df 1096 }
Jerome Coutant 1:917af0ca86df 1097
Jerome Coutant 1:917af0ca86df 1098 /**
Jerome Coutant 1:917af0ca86df 1099 * @brief Configure the selected source to generate a global interrupt or not
jeromecoutant 5:4943b15cce9f 1100 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1101 * @retval None
Jerome Coutant 1:917af0ca86df 1102 */
Jerome Coutant 1:917af0ca86df 1103 void mfxstm32l152_TS_DisableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1104 {
Jerome Coutant 1:917af0ca86df 1105 /* Disable global TS IT source */
jeromecoutant 5:4943b15cce9f 1106 mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_TS_DET);
Jerome Coutant 1:917af0ca86df 1107 }
Jerome Coutant 1:917af0ca86df 1108
Jerome Coutant 1:917af0ca86df 1109 /**
Jerome Coutant 1:917af0ca86df 1110 * @brief Configure the selected source to generate a global interrupt or not
jeromecoutant 5:4943b15cce9f 1111 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1112 * @retval TS interrupts status
Jerome Coutant 1:917af0ca86df 1113 */
Jerome Coutant 1:917af0ca86df 1114 uint8_t mfxstm32l152_TS_ITStatus(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1115 {
Jerome Coutant 1:917af0ca86df 1116 /* Return TS interrupts status */
Jerome Coutant 1:917af0ca86df 1117 return(mfxstm32l152_GlobalITStatus(DeviceAddr, MFXSTM32L152_IRQ_TS));
Jerome Coutant 1:917af0ca86df 1118 }
Jerome Coutant 1:917af0ca86df 1119
Jerome Coutant 1:917af0ca86df 1120 /**
Jerome Coutant 1:917af0ca86df 1121 * @brief Configure the selected source to generate a global interrupt or not
jeromecoutant 5:4943b15cce9f 1122 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1123 * @retval None
Jerome Coutant 1:917af0ca86df 1124 */
Jerome Coutant 1:917af0ca86df 1125 void mfxstm32l152_TS_ClearIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1126 {
Jerome Coutant 1:917af0ca86df 1127 /* Clear the global TS IT source */
Jerome Coutant 1:917af0ca86df 1128 mfxstm32l152_ClearGlobalIT(DeviceAddr, MFXSTM32L152_IRQ_TS);
Jerome Coutant 1:917af0ca86df 1129 }
Jerome Coutant 1:917af0ca86df 1130
Jerome Coutant 1:917af0ca86df 1131 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1132 /* --------------------- IDD MEASUREMENT ---------------------------- */
Jerome Coutant 1:917af0ca86df 1133 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1134
Jerome Coutant 1:917af0ca86df 1135 /**
Jerome Coutant 1:917af0ca86df 1136 * @brief Launch IDD current measurement
Jerome Coutant 1:917af0ca86df 1137 * @param DeviceAddr: Device address on communication Bus
Jerome Coutant 1:917af0ca86df 1138 * @retval None.
Jerome Coutant 1:917af0ca86df 1139 */
Jerome Coutant 1:917af0ca86df 1140 void mfxstm32l152_IDD_Start(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1141 {
Jerome Coutant 1:917af0ca86df 1142 uint8_t mode = 0;
Jerome Coutant 1:917af0ca86df 1143
Jerome Coutant 1:917af0ca86df 1144 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1145 mode = MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL);
Jerome Coutant 1:917af0ca86df 1146
Jerome Coutant 1:917af0ca86df 1147 /* Set the Functionalities to be enabled */
Jerome Coutant 1:917af0ca86df 1148 mode |= MFXSTM32L152_IDD_CTRL_REQ;
Jerome Coutant 1:917af0ca86df 1149
Jerome Coutant 1:917af0ca86df 1150 /* Start measurement campaign */
Jerome Coutant 1:917af0ca86df 1151 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL, mode);
Jerome Coutant 1:917af0ca86df 1152 }
Jerome Coutant 1:917af0ca86df 1153
Jerome Coutant 1:917af0ca86df 1154 /**
Jerome Coutant 1:917af0ca86df 1155 * @brief Configures the IDD current measurement
Jerome Coutant 1:917af0ca86df 1156 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1157 * @param MfxIddConfig: Parameters depending on hardware config.
Jerome Coutant 1:917af0ca86df 1158 * @retval None
Jerome Coutant 1:917af0ca86df 1159 */
Jerome Coutant 1:917af0ca86df 1160 void mfxstm32l152_IDD_Config(uint16_t DeviceAddr, IDD_ConfigTypeDef MfxIddConfig)
Jerome Coutant 1:917af0ca86df 1161 {
Jerome Coutant 1:917af0ca86df 1162 uint8_t value = 0;
Jerome Coutant 1:917af0ca86df 1163 uint8_t mode = 0;
Jerome Coutant 1:917af0ca86df 1164
Jerome Coutant 1:917af0ca86df 1165 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1166 mode = MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
Jerome Coutant 1:917af0ca86df 1167
Jerome Coutant 1:917af0ca86df 1168 if((mode & MFXSTM32L152_IDD_EN) != MFXSTM32L152_IDD_EN)
Jerome Coutant 1:917af0ca86df 1169 {
Jerome Coutant 1:917af0ca86df 1170 /* Set the Functionalities to be enabled */
Jerome Coutant 1:917af0ca86df 1171 mode |= MFXSTM32L152_IDD_EN;
Jerome Coutant 1:917af0ca86df 1172
Jerome Coutant 1:917af0ca86df 1173 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 1174 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
Jerome Coutant 1:917af0ca86df 1175 }
Jerome Coutant 1:917af0ca86df 1176
Jerome Coutant 1:917af0ca86df 1177 /* Control register setting: number of shunts */
Jerome Coutant 1:917af0ca86df 1178 value = ((MfxIddConfig.ShuntNbUsed << 1) & MFXSTM32L152_IDD_CTRL_SHUNT_NB);
Jerome Coutant 1:917af0ca86df 1179 value |= (MfxIddConfig.VrefMeasurement & MFXSTM32L152_IDD_CTRL_VREF_DIS);
Jerome Coutant 1:917af0ca86df 1180 value |= (MfxIddConfig.Calibration & MFXSTM32L152_IDD_CTRL_CAL_DIS);
Jerome Coutant 1:917af0ca86df 1181 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL, value);
Jerome Coutant 1:917af0ca86df 1182
Jerome Coutant 1:917af0ca86df 1183 /* Idd pre delay configuration: unit and value*/
Jerome Coutant 1:917af0ca86df 1184 value = (MfxIddConfig.PreDelayUnit & MFXSTM32L152_IDD_PREDELAY_UNIT) |
Jerome Coutant 1:917af0ca86df 1185 (MfxIddConfig.PreDelayValue & MFXSTM32L152_IDD_PREDELAY_VALUE);
Jerome Coutant 1:917af0ca86df 1186 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_PRE_DELAY, value);
Jerome Coutant 1:917af0ca86df 1187
Jerome Coutant 1:917af0ca86df 1188 /* Shunt 0 register value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1189 value = (uint8_t) (MfxIddConfig.Shunt0Value >> 8);
Jerome Coutant 1:917af0ca86df 1190 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT0_MSB, value);
Jerome Coutant 1:917af0ca86df 1191 value = (uint8_t) (MfxIddConfig.Shunt0Value);
Jerome Coutant 1:917af0ca86df 1192 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT0_LSB, value);
Jerome Coutant 1:917af0ca86df 1193
Jerome Coutant 1:917af0ca86df 1194 /* Shunt 1 register value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1195 value = (uint8_t) (MfxIddConfig.Shunt1Value >> 8);
Jerome Coutant 1:917af0ca86df 1196 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT1_MSB, value);
Jerome Coutant 1:917af0ca86df 1197 value = (uint8_t) (MfxIddConfig.Shunt1Value);
Jerome Coutant 1:917af0ca86df 1198 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT1_LSB, value);
Jerome Coutant 1:917af0ca86df 1199
Jerome Coutant 1:917af0ca86df 1200 /* Shunt 2 register value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1201 value = (uint8_t) (MfxIddConfig.Shunt2Value >> 8);
Jerome Coutant 1:917af0ca86df 1202 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT2_MSB, value);
Jerome Coutant 1:917af0ca86df 1203 value = (uint8_t) (MfxIddConfig.Shunt2Value);
Jerome Coutant 1:917af0ca86df 1204 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT2_LSB, value);
Jerome Coutant 1:917af0ca86df 1205
Jerome Coutant 1:917af0ca86df 1206 /* Shunt 3 register value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1207 value = (uint8_t) (MfxIddConfig.Shunt3Value >> 8);
Jerome Coutant 1:917af0ca86df 1208 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT3_MSB, value);
Jerome Coutant 1:917af0ca86df 1209 value = (uint8_t) (MfxIddConfig.Shunt3Value);
Jerome Coutant 1:917af0ca86df 1210 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT3_LSB, value);
Jerome Coutant 1:917af0ca86df 1211
Jerome Coutant 1:917af0ca86df 1212 /* Shunt 4 register value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1213 value = (uint8_t) (MfxIddConfig.Shunt4Value >> 8);
Jerome Coutant 1:917af0ca86df 1214 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT4_MSB, value);
Jerome Coutant 1:917af0ca86df 1215 value = (uint8_t) (MfxIddConfig.Shunt4Value);
Jerome Coutant 1:917af0ca86df 1216 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT4_LSB, value);
Jerome Coutant 1:917af0ca86df 1217
Jerome Coutant 1:917af0ca86df 1218 /* Shunt 0 stabilization delay */
Jerome Coutant 1:917af0ca86df 1219 value = MfxIddConfig.Shunt0StabDelay;
Jerome Coutant 1:917af0ca86df 1220 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH0_STABILIZATION, value);
Jerome Coutant 1:917af0ca86df 1221
Jerome Coutant 1:917af0ca86df 1222 /* Shunt 1 stabilization delay */
Jerome Coutant 1:917af0ca86df 1223 value = MfxIddConfig.Shunt1StabDelay;
Jerome Coutant 1:917af0ca86df 1224 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH1_STABILIZATION, value);
Jerome Coutant 1:917af0ca86df 1225
Jerome Coutant 1:917af0ca86df 1226 /* Shunt 2 stabilization delay */
Jerome Coutant 1:917af0ca86df 1227 value = MfxIddConfig.Shunt2StabDelay;
Jerome Coutant 1:917af0ca86df 1228 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH2_STABILIZATION, value);
Jerome Coutant 1:917af0ca86df 1229
Jerome Coutant 1:917af0ca86df 1230 /* Shunt 3 stabilization delay */
Jerome Coutant 1:917af0ca86df 1231 value = MfxIddConfig.Shunt3StabDelay;
Jerome Coutant 1:917af0ca86df 1232 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH3_STABILIZATION, value);
Jerome Coutant 1:917af0ca86df 1233
Jerome Coutant 1:917af0ca86df 1234 /* Shunt 4 stabilization delay */
Jerome Coutant 1:917af0ca86df 1235 value = MfxIddConfig.Shunt4StabDelay;
Jerome Coutant 1:917af0ca86df 1236 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH4_STABILIZATION, value);
Jerome Coutant 1:917af0ca86df 1237
Jerome Coutant 1:917af0ca86df 1238 /* Idd ampli gain value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1239 value = (uint8_t) (MfxIddConfig.AmpliGain >> 8);
Jerome Coutant 1:917af0ca86df 1240 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_GAIN_MSB, value);
Jerome Coutant 1:917af0ca86df 1241 value = (uint8_t) (MfxIddConfig.AmpliGain);
Jerome Coutant 1:917af0ca86df 1242 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_GAIN_LSB, value);
Jerome Coutant 1:917af0ca86df 1243
Jerome Coutant 1:917af0ca86df 1244 /* Idd VDD min value: MSB then LSB */
Jerome Coutant 1:917af0ca86df 1245 value = (uint8_t) (MfxIddConfig.VddMin >> 8);
Jerome Coutant 1:917af0ca86df 1246 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_VDD_MIN_MSB, value);
Jerome Coutant 1:917af0ca86df 1247 value = (uint8_t) (MfxIddConfig.VddMin);
Jerome Coutant 1:917af0ca86df 1248 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_VDD_MIN_LSB, value);
Jerome Coutant 1:917af0ca86df 1249
Jerome Coutant 1:917af0ca86df 1250 /* Idd number of measurements */
Jerome Coutant 1:917af0ca86df 1251 value = MfxIddConfig.MeasureNb;
Jerome Coutant 1:917af0ca86df 1252 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_NBR_OF_MEAS, value);
Jerome Coutant 1:917af0ca86df 1253
Jerome Coutant 1:917af0ca86df 1254 /* Idd delta delay configuration: unit and value */
Jerome Coutant 1:917af0ca86df 1255 value = (MfxIddConfig.DeltaDelayUnit & MFXSTM32L152_IDD_DELTADELAY_UNIT) |
Jerome Coutant 1:917af0ca86df 1256 (MfxIddConfig.DeltaDelayValue & MFXSTM32L152_IDD_DELTADELAY_VALUE);
Jerome Coutant 1:917af0ca86df 1257 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_MEAS_DELTA_DELAY, value);
Jerome Coutant 1:917af0ca86df 1258
Jerome Coutant 1:917af0ca86df 1259 /* Idd number of shut on board */
Jerome Coutant 1:917af0ca86df 1260 value = MfxIddConfig.ShuntNbOnBoard;
Jerome Coutant 1:917af0ca86df 1261 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNTS_ON_BOARD, value);
Jerome Coutant 1:917af0ca86df 1262 }
Jerome Coutant 1:917af0ca86df 1263
Jerome Coutant 1:917af0ca86df 1264 /**
Jerome Coutant 1:917af0ca86df 1265 * @brief This function allows to modify number of shunt used for a measurement
Jerome Coutant 1:917af0ca86df 1266 * @param DeviceAddr: Device address on communication Bus
Jerome Coutant 1:917af0ca86df 1267 * @retval None.
Jerome Coutant 1:917af0ca86df 1268 */
Jerome Coutant 1:917af0ca86df 1269 void mfxstm32l152_IDD_ConfigShuntNbLimit(uint16_t DeviceAddr, uint8_t ShuntNbLimit)
Jerome Coutant 1:917af0ca86df 1270 {
Jerome Coutant 1:917af0ca86df 1271 uint8_t mode = 0;
Jerome Coutant 1:917af0ca86df 1272
Jerome Coutant 1:917af0ca86df 1273 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1274 mode = MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL);
Jerome Coutant 1:917af0ca86df 1275
Jerome Coutant 1:917af0ca86df 1276 /* Clear number of shunt limit */
Jerome Coutant 1:917af0ca86df 1277 mode &= ~(MFXSTM32L152_IDD_CTRL_SHUNT_NB);
Jerome Coutant 1:917af0ca86df 1278
Jerome Coutant 1:917af0ca86df 1279 /* Clear number of shunt limit */
Jerome Coutant 1:917af0ca86df 1280 mode |= ((ShuntNbLimit << 1) & MFXSTM32L152_IDD_CTRL_SHUNT_NB);
Jerome Coutant 1:917af0ca86df 1281
Jerome Coutant 1:917af0ca86df 1282 /* Write noewx desired limit */
Jerome Coutant 1:917af0ca86df 1283 MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL, mode);
Jerome Coutant 1:917af0ca86df 1284 }
Jerome Coutant 1:917af0ca86df 1285
Jerome Coutant 1:917af0ca86df 1286 /**
Jerome Coutant 1:917af0ca86df 1287 * @brief Get Idd current value
Jerome Coutant 1:917af0ca86df 1288 * @param DeviceAddr: Device address on communication Bus
Jerome Coutant 1:917af0ca86df 1289 * @param ReadValue: Pointer on value to be read
Jerome Coutant 1:917af0ca86df 1290 * @retval Idd value in 10 nA.
Jerome Coutant 1:917af0ca86df 1291 */
Jerome Coutant 1:917af0ca86df 1292 void mfxstm32l152_IDD_GetValue(uint16_t DeviceAddr, uint32_t *ReadValue)
Jerome Coutant 1:917af0ca86df 1293 {
Jerome Coutant 1:917af0ca86df 1294 uint8_t data[3];
Jerome Coutant 1:917af0ca86df 1295
Jerome Coutant 1:917af0ca86df 1296 MFX_IO_ReadMultiple((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_VALUE_MSB, data, sizeof(data)) ;
Jerome Coutant 1:917af0ca86df 1297
Jerome Coutant 1:917af0ca86df 1298 /* Recompose Idd current value */
Jerome Coutant 1:917af0ca86df 1299 *ReadValue = (data[0] << 16) | (data[1] << 8) | data[2];
Jerome Coutant 1:917af0ca86df 1300
Jerome Coutant 1:917af0ca86df 1301 }
Jerome Coutant 1:917af0ca86df 1302
Jerome Coutant 1:917af0ca86df 1303 /**
Jerome Coutant 1:917af0ca86df 1304 * @brief Get Last shunt used for measurement
Jerome Coutant 1:917af0ca86df 1305 * @param DeviceAddr: Device address on communication Bus
jeromecoutant 5:4943b15cce9f 1306 * @retval Last shunt used
Jerome Coutant 1:917af0ca86df 1307 */
Jerome Coutant 1:917af0ca86df 1308 uint8_t mfxstm32l152_IDD_GetShuntUsed(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1309 {
Jerome Coutant 1:917af0ca86df 1310 return(MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT_USED));
Jerome Coutant 1:917af0ca86df 1311 }
Jerome Coutant 1:917af0ca86df 1312
Jerome Coutant 1:917af0ca86df 1313 /**
Jerome Coutant 1:917af0ca86df 1314 * @brief Configure mfx to enable Idd interrupt
Jerome Coutant 1:917af0ca86df 1315 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1316 * @retval None
Jerome Coutant 1:917af0ca86df 1317 */
Jerome Coutant 1:917af0ca86df 1318 void mfxstm32l152_IDD_EnableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1319 {
Jerome Coutant 1:917af0ca86df 1320 MFX_IO_ITConfig();
Jerome Coutant 1:917af0ca86df 1321
Jerome Coutant 1:917af0ca86df 1322 /* Enable global IDD interrupt source */
Jerome Coutant 1:917af0ca86df 1323 mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_IDD);
Jerome Coutant 1:917af0ca86df 1324 }
Jerome Coutant 1:917af0ca86df 1325
Jerome Coutant 1:917af0ca86df 1326 /**
Jerome Coutant 1:917af0ca86df 1327 * @brief Clear Idd global interrupt
Jerome Coutant 1:917af0ca86df 1328 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1329 * @retval None
Jerome Coutant 1:917af0ca86df 1330 */
Jerome Coutant 1:917af0ca86df 1331 void mfxstm32l152_IDD_ClearIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1332 {
Jerome Coutant 1:917af0ca86df 1333 /* Clear the global IDD interrupt source */
Jerome Coutant 1:917af0ca86df 1334 mfxstm32l152_ClearGlobalIT(DeviceAddr, MFXSTM32L152_IRQ_IDD);
Jerome Coutant 1:917af0ca86df 1335 }
Jerome Coutant 1:917af0ca86df 1336
Jerome Coutant 1:917af0ca86df 1337 /**
Jerome Coutant 1:917af0ca86df 1338 * @brief get Idd interrupt status
Jerome Coutant 1:917af0ca86df 1339 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1340 * @retval IDD interrupts status
Jerome Coutant 1:917af0ca86df 1341 */
Jerome Coutant 1:917af0ca86df 1342 uint8_t mfxstm32l152_IDD_GetITStatus(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1343 {
Jerome Coutant 1:917af0ca86df 1344 /* Return IDD interrupt status */
Jerome Coutant 1:917af0ca86df 1345 return(mfxstm32l152_GlobalITStatus(DeviceAddr, MFXSTM32L152_IRQ_IDD));
Jerome Coutant 1:917af0ca86df 1346 }
Jerome Coutant 1:917af0ca86df 1347
Jerome Coutant 1:917af0ca86df 1348 /**
Jerome Coutant 1:917af0ca86df 1349 * @brief disable Idd interrupt
Jerome Coutant 1:917af0ca86df 1350 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1351 * @retval None.
Jerome Coutant 1:917af0ca86df 1352 */
Jerome Coutant 1:917af0ca86df 1353 void mfxstm32l152_IDD_DisableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1354 {
Jerome Coutant 1:917af0ca86df 1355 /* Disable global IDD interrupt source */
Jerome Coutant 1:917af0ca86df 1356 mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_IDD);
Jerome Coutant 1:917af0ca86df 1357 }
Jerome Coutant 1:917af0ca86df 1358
Jerome Coutant 1:917af0ca86df 1359
Jerome Coutant 1:917af0ca86df 1360 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1361 /* --------------------- ERROR MANAGEMENT --------------------------- */
Jerome Coutant 1:917af0ca86df 1362 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1363
Jerome Coutant 1:917af0ca86df 1364 /**
Jerome Coutant 1:917af0ca86df 1365 * @brief Read Error Source.
Jerome Coutant 1:917af0ca86df 1366 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1367 * @retval Error message code with error source
Jerome Coutant 1:917af0ca86df 1368 */
Jerome Coutant 1:917af0ca86df 1369 uint8_t mfxstm32l152_Error_ReadSrc(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1370 {
Jerome Coutant 1:917af0ca86df 1371 /* Get the current source register value */
Jerome Coutant 1:917af0ca86df 1372 return(MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_ERROR_SRC));
Jerome Coutant 1:917af0ca86df 1373 }
Jerome Coutant 1:917af0ca86df 1374
Jerome Coutant 1:917af0ca86df 1375 /**
Jerome Coutant 1:917af0ca86df 1376 * @brief Read Error Message
Jerome Coutant 1:917af0ca86df 1377 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1378 * @retval Error message code with error source
Jerome Coutant 1:917af0ca86df 1379 */
Jerome Coutant 1:917af0ca86df 1380 uint8_t mfxstm32l152_Error_ReadMsg(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1381 {
Jerome Coutant 1:917af0ca86df 1382 /* Get the current message register value */
Jerome Coutant 1:917af0ca86df 1383 return(MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_ERROR_MSG));
Jerome Coutant 1:917af0ca86df 1384 }
Jerome Coutant 1:917af0ca86df 1385
Jerome Coutant 1:917af0ca86df 1386 /**
Jerome Coutant 1:917af0ca86df 1387 * @brief Enable Error global interrupt
Jerome Coutant 1:917af0ca86df 1388 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1389 * @retval None
Jerome Coutant 1:917af0ca86df 1390 */
Jerome Coutant 1:917af0ca86df 1391
Jerome Coutant 1:917af0ca86df 1392 void mfxstm32l152_Error_EnableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1393 {
Jerome Coutant 1:917af0ca86df 1394 MFX_IO_ITConfig();
Jerome Coutant 1:917af0ca86df 1395
Jerome Coutant 1:917af0ca86df 1396 /* Enable global Error interrupt source */
Jerome Coutant 1:917af0ca86df 1397 mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_ERROR);
Jerome Coutant 1:917af0ca86df 1398 }
Jerome Coutant 1:917af0ca86df 1399
Jerome Coutant 1:917af0ca86df 1400 /**
Jerome Coutant 1:917af0ca86df 1401 * @brief Clear Error global interrupt
Jerome Coutant 1:917af0ca86df 1402 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1403 * @retval None
Jerome Coutant 1:917af0ca86df 1404 */
Jerome Coutant 1:917af0ca86df 1405 void mfxstm32l152_Error_ClearIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1406 {
Jerome Coutant 1:917af0ca86df 1407 /* Clear the global Error interrupt source */
Jerome Coutant 1:917af0ca86df 1408 mfxstm32l152_ClearGlobalIT(DeviceAddr, MFXSTM32L152_IRQ_ERROR);
Jerome Coutant 1:917af0ca86df 1409 }
Jerome Coutant 1:917af0ca86df 1410
Jerome Coutant 1:917af0ca86df 1411 /**
Jerome Coutant 1:917af0ca86df 1412 * @brief get Error interrupt status
Jerome Coutant 1:917af0ca86df 1413 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1414 * @retval Error interrupts status
Jerome Coutant 1:917af0ca86df 1415 */
Jerome Coutant 1:917af0ca86df 1416 uint8_t mfxstm32l152_Error_GetITStatus(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1417 {
Jerome Coutant 1:917af0ca86df 1418 /* Return Error interrupt status */
Jerome Coutant 1:917af0ca86df 1419 return(mfxstm32l152_GlobalITStatus(DeviceAddr, MFXSTM32L152_IRQ_ERROR));
Jerome Coutant 1:917af0ca86df 1420 }
Jerome Coutant 1:917af0ca86df 1421
Jerome Coutant 1:917af0ca86df 1422 /**
Jerome Coutant 1:917af0ca86df 1423 * @brief disable Error interrupt
Jerome Coutant 1:917af0ca86df 1424 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1425 * @retval None.
Jerome Coutant 1:917af0ca86df 1426 */
Jerome Coutant 1:917af0ca86df 1427 void mfxstm32l152_Error_DisableIT(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1428 {
Jerome Coutant 1:917af0ca86df 1429 /* Disable global Error interrupt source */
Jerome Coutant 1:917af0ca86df 1430 mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_ERROR);
Jerome Coutant 1:917af0ca86df 1431 }
Jerome Coutant 1:917af0ca86df 1432
Jerome Coutant 1:917af0ca86df 1433 /**
Jerome Coutant 1:917af0ca86df 1434 * @brief FOR DEBUG ONLY
Jerome Coutant 1:917af0ca86df 1435 */
Jerome Coutant 1:917af0ca86df 1436 uint8_t mfxstm32l152_ReadReg(uint16_t DeviceAddr, uint8_t RegAddr)
Jerome Coutant 1:917af0ca86df 1437 {
jeromecoutant 5:4943b15cce9f 1438 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1439 return(MFX_IO_Read((uint8_t) DeviceAddr, RegAddr));
Jerome Coutant 1:917af0ca86df 1440 }
Jerome Coutant 1:917af0ca86df 1441
Jerome Coutant 1:917af0ca86df 1442 void mfxstm32l152_WriteReg(uint16_t DeviceAddr, uint8_t RegAddr, uint8_t Value)
Jerome Coutant 1:917af0ca86df 1443 {
jeromecoutant 5:4943b15cce9f 1444 /* set the current register value */
Jerome Coutant 1:917af0ca86df 1445 MFX_IO_Write((uint8_t) DeviceAddr, RegAddr, Value);
Jerome Coutant 1:917af0ca86df 1446 }
Jerome Coutant 1:917af0ca86df 1447
Jerome Coutant 1:917af0ca86df 1448 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1449 /* ----------------------- Private functions ------------------------ */
Jerome Coutant 1:917af0ca86df 1450 /* ------------------------------------------------------------------ */
Jerome Coutant 1:917af0ca86df 1451 /**
Jerome Coutant 1:917af0ca86df 1452 * @brief Check if the device instance of the selected address is already registered
jeromecoutant 5:4943b15cce9f 1453 * and return its index
Jerome Coutant 1:917af0ca86df 1454 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1455 * @retval Index of the device instance if registered, 0xFF if not.
Jerome Coutant 1:917af0ca86df 1456 */
Jerome Coutant 1:917af0ca86df 1457 static uint8_t mfxstm32l152_GetInstance(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1458 {
Jerome Coutant 1:917af0ca86df 1459 uint8_t idx = 0;
jeromecoutant 5:4943b15cce9f 1460
Jerome Coutant 1:917af0ca86df 1461 /* Check all the registered instances */
Jerome Coutant 1:917af0ca86df 1462 for(idx = 0; idx < MFXSTM32L152_MAX_INSTANCE ; idx ++)
Jerome Coutant 1:917af0ca86df 1463 {
Jerome Coutant 1:917af0ca86df 1464 if(mfxstm32l152[idx] == DeviceAddr)
Jerome Coutant 1:917af0ca86df 1465 {
jeromecoutant 5:4943b15cce9f 1466 return idx;
Jerome Coutant 1:917af0ca86df 1467 }
Jerome Coutant 1:917af0ca86df 1468 }
jeromecoutant 5:4943b15cce9f 1469
Jerome Coutant 1:917af0ca86df 1470 return 0xFF;
Jerome Coutant 1:917af0ca86df 1471 }
Jerome Coutant 1:917af0ca86df 1472
Jerome Coutant 1:917af0ca86df 1473 /**
Jerome Coutant 1:917af0ca86df 1474 * @brief Release registered device instance
Jerome Coutant 1:917af0ca86df 1475 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1476 * @retval Index of released device instance, 0xFF if not.
Jerome Coutant 1:917af0ca86df 1477 */
Jerome Coutant 1:917af0ca86df 1478 static uint8_t mfxstm32l152_ReleaseInstance(uint16_t DeviceAddr)
Jerome Coutant 1:917af0ca86df 1479 {
Jerome Coutant 1:917af0ca86df 1480 uint8_t idx = 0;
jeromecoutant 5:4943b15cce9f 1481
Jerome Coutant 1:917af0ca86df 1482 /* Check for all the registered instances */
Jerome Coutant 1:917af0ca86df 1483 for(idx = 0; idx < MFXSTM32L152_MAX_INSTANCE ; idx ++)
Jerome Coutant 1:917af0ca86df 1484 {
Jerome Coutant 1:917af0ca86df 1485 if(mfxstm32l152[idx] == DeviceAddr)
Jerome Coutant 1:917af0ca86df 1486 {
Jerome Coutant 1:917af0ca86df 1487 mfxstm32l152[idx] = 0;
Jerome Coutant 1:917af0ca86df 1488 return idx;
Jerome Coutant 1:917af0ca86df 1489 }
Jerome Coutant 1:917af0ca86df 1490 }
Jerome Coutant 1:917af0ca86df 1491 return 0xFF;
Jerome Coutant 1:917af0ca86df 1492 }
Jerome Coutant 1:917af0ca86df 1493
Jerome Coutant 1:917af0ca86df 1494 /**
Jerome Coutant 1:917af0ca86df 1495 * @brief Internal routine
jeromecoutant 5:4943b15cce9f 1496 * @param DeviceAddr: Device address on communication Bus.
Jerome Coutant 1:917af0ca86df 1497 * @param RegisterAddr: Register Address
Jerome Coutant 1:917af0ca86df 1498 * @param PinPosition: Pin [0:23]
Jerome Coutant 1:917af0ca86df 1499 * @param PinValue: 0/1
Jerome Coutant 1:917af0ca86df 1500 * @retval None
Jerome Coutant 1:917af0ca86df 1501 */
Jerome Coutant 1:917af0ca86df 1502 void mfxstm32l152_reg24_setPinValue(uint16_t DeviceAddr, uint8_t RegisterAddr, uint32_t PinPosition, uint8_t PinValue )
Jerome Coutant 1:917af0ca86df 1503 {
Jerome Coutant 1:917af0ca86df 1504 uint8_t tmp = 0;
Jerome Coutant 1:917af0ca86df 1505 uint8_t pin_0_7, pin_8_15, pin_16_23;
Jerome Coutant 1:917af0ca86df 1506
Jerome Coutant 1:917af0ca86df 1507 pin_0_7 = PinPosition & 0x0000ff;
Jerome Coutant 1:917af0ca86df 1508 pin_8_15 = PinPosition >> 8;
Jerome Coutant 1:917af0ca86df 1509 pin_8_15 = pin_8_15 & 0x00ff;
Jerome Coutant 1:917af0ca86df 1510 pin_16_23 = PinPosition >> 16;
jeromecoutant 5:4943b15cce9f 1511
Jerome Coutant 1:917af0ca86df 1512 if (pin_0_7)
jeromecoutant 5:4943b15cce9f 1513 {
jeromecoutant 5:4943b15cce9f 1514 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1515 tmp = MFX_IO_Read(DeviceAddr, RegisterAddr);
jeromecoutant 5:4943b15cce9f 1516
Jerome Coutant 1:917af0ca86df 1517 /* Set the selected pin direction */
Jerome Coutant 1:917af0ca86df 1518 if (PinValue != 0)
Jerome Coutant 1:917af0ca86df 1519 {
Jerome Coutant 1:917af0ca86df 1520 tmp |= (uint8_t)pin_0_7;
jeromecoutant 5:4943b15cce9f 1521 }
jeromecoutant 5:4943b15cce9f 1522 else
Jerome Coutant 1:917af0ca86df 1523 {
Jerome Coutant 1:917af0ca86df 1524 tmp &= ~(uint8_t)pin_0_7;
Jerome Coutant 1:917af0ca86df 1525 }
jeromecoutant 5:4943b15cce9f 1526
Jerome Coutant 1:917af0ca86df 1527 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 1528 MFX_IO_Write(DeviceAddr, RegisterAddr, tmp);
Jerome Coutant 1:917af0ca86df 1529 }
Jerome Coutant 1:917af0ca86df 1530
Jerome Coutant 1:917af0ca86df 1531 if (pin_8_15)
Jerome Coutant 1:917af0ca86df 1532 {
jeromecoutant 5:4943b15cce9f 1533 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1534 tmp = MFX_IO_Read(DeviceAddr, RegisterAddr+1);
jeromecoutant 5:4943b15cce9f 1535
Jerome Coutant 1:917af0ca86df 1536 /* Set the selected pin direction */
Jerome Coutant 1:917af0ca86df 1537 if (PinValue != 0)
Jerome Coutant 1:917af0ca86df 1538 {
Jerome Coutant 1:917af0ca86df 1539 tmp |= (uint8_t)pin_8_15;
jeromecoutant 5:4943b15cce9f 1540 }
jeromecoutant 5:4943b15cce9f 1541 else
Jerome Coutant 1:917af0ca86df 1542 {
Jerome Coutant 1:917af0ca86df 1543 tmp &= ~(uint8_t)pin_8_15;
Jerome Coutant 1:917af0ca86df 1544 }
jeromecoutant 5:4943b15cce9f 1545
Jerome Coutant 1:917af0ca86df 1546 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 1547 MFX_IO_Write(DeviceAddr, RegisterAddr+1, tmp);
jeromecoutant 5:4943b15cce9f 1548 }
Jerome Coutant 1:917af0ca86df 1549
Jerome Coutant 1:917af0ca86df 1550 if (pin_16_23)
Jerome Coutant 1:917af0ca86df 1551 {
jeromecoutant 5:4943b15cce9f 1552 /* Get the current register value */
Jerome Coutant 1:917af0ca86df 1553 tmp = MFX_IO_Read(DeviceAddr, RegisterAddr+2);
jeromecoutant 5:4943b15cce9f 1554
Jerome Coutant 1:917af0ca86df 1555 /* Set the selected pin direction */
Jerome Coutant 1:917af0ca86df 1556 if (PinValue != 0)
Jerome Coutant 1:917af0ca86df 1557 {
Jerome Coutant 1:917af0ca86df 1558 tmp |= (uint8_t)pin_16_23;
jeromecoutant 5:4943b15cce9f 1559 }
jeromecoutant 5:4943b15cce9f 1560 else
Jerome Coutant 1:917af0ca86df 1561 {
Jerome Coutant 1:917af0ca86df 1562 tmp &= ~(uint8_t)pin_16_23;
Jerome Coutant 1:917af0ca86df 1563 }
jeromecoutant 5:4943b15cce9f 1564
Jerome Coutant 1:917af0ca86df 1565 /* Set the new register value */
Jerome Coutant 1:917af0ca86df 1566 MFX_IO_Write(DeviceAddr, RegisterAddr+2, tmp);
jeromecoutant 5:4943b15cce9f 1567 }
Jerome Coutant 1:917af0ca86df 1568 }
Jerome Coutant 1:917af0ca86df 1569
Jerome Coutant 1:917af0ca86df 1570
Jerome Coutant 1:917af0ca86df 1571 /**
Jerome Coutant 1:917af0ca86df 1572 * @}
jeromecoutant 5:4943b15cce9f 1573 */
Jerome Coutant 1:917af0ca86df 1574
Jerome Coutant 1:917af0ca86df 1575 /**
Jerome Coutant 1:917af0ca86df 1576 * @}
jeromecoutant 5:4943b15cce9f 1577 */
Jerome Coutant 1:917af0ca86df 1578
Jerome Coutant 1:917af0ca86df 1579 /**
Jerome Coutant 1:917af0ca86df 1580 * @}
jeromecoutant 5:4943b15cce9f 1581 */
Jerome Coutant 1:917af0ca86df 1582
Jerome Coutant 1:917af0ca86df 1583 /**
Jerome Coutant 1:917af0ca86df 1584 * @}
jeromecoutant 5:4943b15cce9f 1585 */
Jerome Coutant 1:917af0ca86df 1586 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/