ST / BSP_DISCO_F469NI

STM32F469NI Discovery board drivers

Dependents:   DISCO-F469NI_LCDTS_GUI_demo Configurable_Robots DISCO-F469NI_LCD_demo DISCO-F469NI_SD_demo ... more

Drivers/BSP/STM32469I-Discovery/stm32469i_discovery_sdram.c@2:123b894b49dd, 2017-05-16 (annotated)

Committer:
Jerome Coutant
Date:
Tue May 16 10:50:26 2017 +0200
Revision:
2:123b894b49dd
Child:
3:3cdfcc4f7c9d
STM32Cube_FW_BSP_DISCO_F469NI

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Jerome Coutant 2:123b894b49dd 1 /**
Jerome Coutant 2:123b894b49dd 2 ******************************************************************************
Jerome Coutant 2:123b894b49dd 3 * @file stm32469i_discovery_sdram.c
Jerome Coutant 2:123b894b49dd 4 * @author MCD Application Team
Jerome Coutant 2:123b894b49dd 5 * @version V2.0.0
Jerome Coutant 2:123b894b49dd 6 * @date 27-January-2017
Jerome Coutant 2:123b894b49dd 7 * @brief This file includes the SDRAM driver for the MT48LC4M32B2B5-7 memory
Jerome Coutant 2:123b894b49dd 8 * device mounted on STM32469I-Discovery board.
Jerome Coutant 2:123b894b49dd 9 ******************************************************************************
Jerome Coutant 2:123b894b49dd 10 * @attention
Jerome Coutant 2:123b894b49dd 11 *
Jerome Coutant 2:123b894b49dd 12 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
Jerome Coutant 2:123b894b49dd 13 *
Jerome Coutant 2:123b894b49dd 14 * Redistribution and use in source and binary forms, with or without modification,
Jerome Coutant 2:123b894b49dd 15 * are permitted provided that the following conditions are met:
Jerome Coutant 2:123b894b49dd 16 * 1. Redistributions of source code must retain the above copyright notice,
Jerome Coutant 2:123b894b49dd 17 * this list of conditions and the following disclaimer.
Jerome Coutant 2:123b894b49dd 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
Jerome Coutant 2:123b894b49dd 19 * this list of conditions and the following disclaimer in the documentation
Jerome Coutant 2:123b894b49dd 20 * and/or other materials provided with the distribution.
Jerome Coutant 2:123b894b49dd 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Jerome Coutant 2:123b894b49dd 22 * may be used to endorse or promote products derived from this software
Jerome Coutant 2:123b894b49dd 23 * without specific prior written permission.
Jerome Coutant 2:123b894b49dd 24 *
Jerome Coutant 2:123b894b49dd 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Jerome Coutant 2:123b894b49dd 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Jerome Coutant 2:123b894b49dd 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Jerome Coutant 2:123b894b49dd 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Jerome Coutant 2:123b894b49dd 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Jerome Coutant 2:123b894b49dd 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Jerome Coutant 2:123b894b49dd 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Jerome Coutant 2:123b894b49dd 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Jerome Coutant 2:123b894b49dd 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Jerome Coutant 2:123b894b49dd 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Jerome Coutant 2:123b894b49dd 35 *
Jerome Coutant 2:123b894b49dd 36 ******************************************************************************
Jerome Coutant 2:123b894b49dd 37 */
Jerome Coutant 2:123b894b49dd 38
Jerome Coutant 2:123b894b49dd 39 /* File Info : -----------------------------------------------------------------
Jerome Coutant 2:123b894b49dd 40 User NOTES
Jerome Coutant 2:123b894b49dd 41 1. How To use this driver:
Jerome Coutant 2:123b894b49dd 42 --------------------------
Jerome Coutant 2:123b894b49dd 43 - This driver is used to drive the MT48LC4M32B2B5-7 SDRAM external memory mounted
Jerome Coutant 2:123b894b49dd 44 on STM32469I-Discovery board.
Jerome Coutant 2:123b894b49dd 45 - This driver does not need a specific component driver for the SDRAM device
Jerome Coutant 2:123b894b49dd 46 to be included with.
Jerome Coutant 2:123b894b49dd 47
Jerome Coutant 2:123b894b49dd 48 2. Driver description:
Jerome Coutant 2:123b894b49dd 49 ---------------------
Jerome Coutant 2:123b894b49dd 50 + Initialization steps:
Jerome Coutant 2:123b894b49dd 51 o Initialize the SDRAM external memory using the BSP_SDRAM_Init() function. This
Jerome Coutant 2:123b894b49dd 52 function includes the MSP layer hardware resources initialization and the
Jerome Coutant 2:123b894b49dd 53 FMC controller configuration to interface with the external SDRAM memory.
Jerome Coutant 2:123b894b49dd 54 o It contains the SDRAM initialization sequence to program the SDRAM external
Jerome Coutant 2:123b894b49dd 55 device using the function BSP_SDRAM_Initialization_sequence(). Note that this
Jerome Coutant 2:123b894b49dd 56 sequence is standard for all SDRAM devices, but can include some differences
Jerome Coutant 2:123b894b49dd 57 from a device to another. If it is the case, the right sequence should be
Jerome Coutant 2:123b894b49dd 58 implemented separately.
Jerome Coutant 2:123b894b49dd 59
Jerome Coutant 2:123b894b49dd 60 + SDRAM read/write operations
Jerome Coutant 2:123b894b49dd 61 o SDRAM external memory can be accessed with read/write operations once it is
Jerome Coutant 2:123b894b49dd 62 initialized.
Jerome Coutant 2:123b894b49dd 63 Read/write operation can be performed with AHB access using the functions
Jerome Coutant 2:123b894b49dd 64 BSP_SDRAM_ReadData()/BSP_SDRAM_WriteData(), or by DMA transfer using the functions
Jerome Coutant 2:123b894b49dd 65 BSP_SDRAM_ReadData_DMA()/BSP_SDRAM_WriteData_DMA().
Jerome Coutant 2:123b894b49dd 66 o The AHB access is performed with 32-bit width transaction, the DMA transfer
Jerome Coutant 2:123b894b49dd 67 configuration is fixed at single (no burst) word transfer (see the
Jerome Coutant 2:123b894b49dd 68 BSP_SDRAM_MspInit() weak function).
Jerome Coutant 2:123b894b49dd 69 o User can implement his own functions for read/write access with his desired
Jerome Coutant 2:123b894b49dd 70 configurations.
Jerome Coutant 2:123b894b49dd 71 o If interrupt mode is used for DMA transfer, the function BSP_SDRAM_DMA_IRQHandler()
Jerome Coutant 2:123b894b49dd 72 is called in IRQ handler file, to serve the generated interrupt once the DMA
Jerome Coutant 2:123b894b49dd 73 transfer is complete.
Jerome Coutant 2:123b894b49dd 74 o You can send a command to the SDRAM device in runtime using the function
Jerome Coutant 2:123b894b49dd 75 BSP_SDRAM_Sendcmd(), and giving the desired command as parameter chosen between
Jerome Coutant 2:123b894b49dd 76 the predefined commands of the "FMC_SDRAM_CommandTypeDef" structure.
Jerome Coutant 2:123b894b49dd 77
Jerome Coutant 2:123b894b49dd 78 ------------------------------------------------------------------------------*/
Jerome Coutant 2:123b894b49dd 79
Jerome Coutant 2:123b894b49dd 80 /* Includes ------------------------------------------------------------------*/
Jerome Coutant 2:123b894b49dd 81 #include "stm32469i_discovery_sdram.h"
Jerome Coutant 2:123b894b49dd 82
Jerome Coutant 2:123b894b49dd 83 // mbed
Jerome Coutant 2:123b894b49dd 84 void wait_ms(int ms);
Jerome Coutant 2:123b894b49dd 85
Jerome Coutant 2:123b894b49dd 86 /** @addtogroup BSP
Jerome Coutant 2:123b894b49dd 87 * @{
Jerome Coutant 2:123b894b49dd 88 */
Jerome Coutant 2:123b894b49dd 89
Jerome Coutant 2:123b894b49dd 90 /** @addtogroup STM32469I_Discovery
Jerome Coutant 2:123b894b49dd 91 * @{
Jerome Coutant 2:123b894b49dd 92 */
Jerome Coutant 2:123b894b49dd 93
Jerome Coutant 2:123b894b49dd 94 /** @defgroup STM32469I-Discovery_SDRAM STM32469I Discovery SDRAM
Jerome Coutant 2:123b894b49dd 95 * @{
Jerome Coutant 2:123b894b49dd 96 */
Jerome Coutant 2:123b894b49dd 97
Jerome Coutant 2:123b894b49dd 98 /** @defgroup STM32469I-Discovery_SDRAM_Private_Types_Definitions STM32469I Discovery SDRAM Private TypesDef
Jerome Coutant 2:123b894b49dd 99 * @{
Jerome Coutant 2:123b894b49dd 100 */
Jerome Coutant 2:123b894b49dd 101 /**
Jerome Coutant 2:123b894b49dd 102 * @}
Jerome Coutant 2:123b894b49dd 103 */
Jerome Coutant 2:123b894b49dd 104
Jerome Coutant 2:123b894b49dd 105 /** @defgroup STM32469I-Discovery_SDRAM_Private_Defines STM32469I Discovery SDRAM Private Defines
Jerome Coutant 2:123b894b49dd 106 * @{
Jerome Coutant 2:123b894b49dd 107 */
Jerome Coutant 2:123b894b49dd 108 /**
Jerome Coutant 2:123b894b49dd 109 * @}
Jerome Coutant 2:123b894b49dd 110 */
Jerome Coutant 2:123b894b49dd 111
Jerome Coutant 2:123b894b49dd 112 /** @defgroup STM32469I-Discovery_SDRAM_Private_Macros STM32469I Discovery SDRAM Private Macros
Jerome Coutant 2:123b894b49dd 113 * @{
Jerome Coutant 2:123b894b49dd 114 */
Jerome Coutant 2:123b894b49dd 115 /**
Jerome Coutant 2:123b894b49dd 116 * @}
Jerome Coutant 2:123b894b49dd 117 */
Jerome Coutant 2:123b894b49dd 118
Jerome Coutant 2:123b894b49dd 119 /** @defgroup STM32469I-Discovery_SDRAM_Private_Variables STM32469I Discovery SDRAM Private Variables
Jerome Coutant 2:123b894b49dd 120 * @{
Jerome Coutant 2:123b894b49dd 121 */
Jerome Coutant 2:123b894b49dd 122 static SDRAM_HandleTypeDef sdramHandle;
Jerome Coutant 2:123b894b49dd 123 static FMC_SDRAM_TimingTypeDef Timing;
Jerome Coutant 2:123b894b49dd 124 static FMC_SDRAM_CommandTypeDef Command;
Jerome Coutant 2:123b894b49dd 125 /**
Jerome Coutant 2:123b894b49dd 126 * @}
Jerome Coutant 2:123b894b49dd 127 */
Jerome Coutant 2:123b894b49dd 128
Jerome Coutant 2:123b894b49dd 129 /** @defgroup STM32469I-Discovery_SDRAM_Private_Function_Prototypes STM32469I Discovery SDRAM Private Prototypes
Jerome Coutant 2:123b894b49dd 130 * @{
Jerome Coutant 2:123b894b49dd 131 */
Jerome Coutant 2:123b894b49dd 132
Jerome Coutant 2:123b894b49dd 133 /**
Jerome Coutant 2:123b894b49dd 134 * @}
Jerome Coutant 2:123b894b49dd 135 */
Jerome Coutant 2:123b894b49dd 136
Jerome Coutant 2:123b894b49dd 137 /** @defgroup STM32469I-Discovery_SDRAM_Private_Functions STM32469I Discovery SDRAM Private Functions
Jerome Coutant 2:123b894b49dd 138 * @{
Jerome Coutant 2:123b894b49dd 139 */
Jerome Coutant 2:123b894b49dd 140
Jerome Coutant 2:123b894b49dd 141 /**
Jerome Coutant 2:123b894b49dd 142 * @}
Jerome Coutant 2:123b894b49dd 143 */
Jerome Coutant 2:123b894b49dd 144
Jerome Coutant 2:123b894b49dd 145 /** @defgroup STM32469I_Discovery_SDRAM_Exported_Functions STM32469I Discovery SDRAM Exported Functions
Jerome Coutant 2:123b894b49dd 146 * @{
Jerome Coutant 2:123b894b49dd 147 */
Jerome Coutant 2:123b894b49dd 148
Jerome Coutant 2:123b894b49dd 149 /**
Jerome Coutant 2:123b894b49dd 150 * @brief Initializes the SDRAM device.
Jerome Coutant 2:123b894b49dd 151 * @retval SDRAM status
Jerome Coutant 2:123b894b49dd 152 */
Jerome Coutant 2:123b894b49dd 153 uint8_t BSP_SDRAM_Init(void)
Jerome Coutant 2:123b894b49dd 154 {
Jerome Coutant 2:123b894b49dd 155 static uint8_t sdramstatus = SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 156
Jerome Coutant 2:123b894b49dd 157 /* SDRAM device configuration */
Jerome Coutant 2:123b894b49dd 158 sdramHandle.Instance = FMC_SDRAM_DEVICE;
Jerome Coutant 2:123b894b49dd 159
Jerome Coutant 2:123b894b49dd 160 /* Timing configuration for 90 MHz as SD clock frequency (System clock is up to 180 MHz) */
Jerome Coutant 2:123b894b49dd 161 Timing.LoadToActiveDelay = 2;
Jerome Coutant 2:123b894b49dd 162 Timing.ExitSelfRefreshDelay = 7;
Jerome Coutant 2:123b894b49dd 163 Timing.SelfRefreshTime = 4;
Jerome Coutant 2:123b894b49dd 164 Timing.RowCycleDelay = 7;
Jerome Coutant 2:123b894b49dd 165 Timing.WriteRecoveryTime = 2;
Jerome Coutant 2:123b894b49dd 166 Timing.RPDelay = 2;
Jerome Coutant 2:123b894b49dd 167 Timing.RCDDelay = 2;
Jerome Coutant 2:123b894b49dd 168
Jerome Coutant 2:123b894b49dd 169 sdramHandle.Init.SDBank = FMC_SDRAM_BANK1;
Jerome Coutant 2:123b894b49dd 170 sdramHandle.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
Jerome Coutant 2:123b894b49dd 171 sdramHandle.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
Jerome Coutant 2:123b894b49dd 172 sdramHandle.Init.MemoryDataWidth = SDRAM_MEMORY_WIDTH;
Jerome Coutant 2:123b894b49dd 173 sdramHandle.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
Jerome Coutant 2:123b894b49dd 174 sdramHandle.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
Jerome Coutant 2:123b894b49dd 175 sdramHandle.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
Jerome Coutant 2:123b894b49dd 176 sdramHandle.Init.SDClockPeriod = SDCLOCK_PERIOD;
Jerome Coutant 2:123b894b49dd 177 sdramHandle.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
Jerome Coutant 2:123b894b49dd 178 sdramHandle.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
Jerome Coutant 2:123b894b49dd 179
Jerome Coutant 2:123b894b49dd 180 /* SDRAM controller initialization */
Jerome Coutant 2:123b894b49dd 181 /* __weak function can be surcharged by the application code */
Jerome Coutant 2:123b894b49dd 182 BSP_SDRAM_MspInit(&sdramHandle, (void *)NULL);
Jerome Coutant 2:123b894b49dd 183 if(HAL_SDRAM_Init(&sdramHandle, &Timing) != HAL_OK)
Jerome Coutant 2:123b894b49dd 184 {
Jerome Coutant 2:123b894b49dd 185 sdramstatus = SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 186 }
Jerome Coutant 2:123b894b49dd 187 else
Jerome Coutant 2:123b894b49dd 188 {
Jerome Coutant 2:123b894b49dd 189 sdramstatus = SDRAM_OK;
Jerome Coutant 2:123b894b49dd 190 }
Jerome Coutant 2:123b894b49dd 191
Jerome Coutant 2:123b894b49dd 192 /* SDRAM initialization sequence */
Jerome Coutant 2:123b894b49dd 193 BSP_SDRAM_Initialization_sequence(REFRESH_COUNT);
Jerome Coutant 2:123b894b49dd 194
Jerome Coutant 2:123b894b49dd 195 return sdramstatus;
Jerome Coutant 2:123b894b49dd 196 }
Jerome Coutant 2:123b894b49dd 197
Jerome Coutant 2:123b894b49dd 198 /**
Jerome Coutant 2:123b894b49dd 199 * @brief DeInitializes the SDRAM device.
Jerome Coutant 2:123b894b49dd 200 * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 201 */
Jerome Coutant 2:123b894b49dd 202 uint8_t BSP_SDRAM_DeInit(void)
Jerome Coutant 2:123b894b49dd 203 {
Jerome Coutant 2:123b894b49dd 204 static uint8_t sdramstatus = SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 205
Jerome Coutant 2:123b894b49dd 206 /* SDRAM device configuration */
Jerome Coutant 2:123b894b49dd 207 sdramHandle.Instance = FMC_SDRAM_DEVICE;
Jerome Coutant 2:123b894b49dd 208
Jerome Coutant 2:123b894b49dd 209 if(HAL_SDRAM_DeInit(&sdramHandle) == HAL_OK)
Jerome Coutant 2:123b894b49dd 210 {
Jerome Coutant 2:123b894b49dd 211 sdramstatus = SDRAM_OK;
Jerome Coutant 2:123b894b49dd 212
Jerome Coutant 2:123b894b49dd 213 /* SDRAM controller De-initialization */
Jerome Coutant 2:123b894b49dd 214 BSP_SDRAM_MspDeInit(&sdramHandle, (void *)NULL);
Jerome Coutant 2:123b894b49dd 215 }
Jerome Coutant 2:123b894b49dd 216
Jerome Coutant 2:123b894b49dd 217 return sdramstatus;
Jerome Coutant 2:123b894b49dd 218 }
Jerome Coutant 2:123b894b49dd 219
Jerome Coutant 2:123b894b49dd 220
Jerome Coutant 2:123b894b49dd 221 /**
Jerome Coutant 2:123b894b49dd 222 * @brief Programs the SDRAM device.
Jerome Coutant 2:123b894b49dd 223 * @param RefreshCount: SDRAM refresh counter value
Jerome Coutant 2:123b894b49dd 224 */
Jerome Coutant 2:123b894b49dd 225 void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount)
Jerome Coutant 2:123b894b49dd 226 {
Jerome Coutant 2:123b894b49dd 227 __IO uint32_t tmpmrd = 0;
Jerome Coutant 2:123b894b49dd 228
Jerome Coutant 2:123b894b49dd 229 /* Step 1: Configure a clock configuration enable command */
Jerome Coutant 2:123b894b49dd 230 Command.CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
Jerome Coutant 2:123b894b49dd 231 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Jerome Coutant 2:123b894b49dd 232 Command.AutoRefreshNumber = 1;
Jerome Coutant 2:123b894b49dd 233 Command.ModeRegisterDefinition = 0;
Jerome Coutant 2:123b894b49dd 234
Jerome Coutant 2:123b894b49dd 235 /* Send the command */
Jerome Coutant 2:123b894b49dd 236 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 2:123b894b49dd 237
Jerome Coutant 2:123b894b49dd 238 /* Step 2: Insert 100 us minimum delay */
Jerome Coutant 2:123b894b49dd 239 /* Inserted delay is equal to 1 ms due to systick time base unit (ms) */
Jerome Coutant 2:123b894b49dd 240 //HAL_Delay(1);
Jerome Coutant 2:123b894b49dd 241 wait_ms(1);
Jerome Coutant 2:123b894b49dd 242
Jerome Coutant 2:123b894b49dd 243 /* Step 3: Configure a PALL (precharge all) command */
Jerome Coutant 2:123b894b49dd 244 Command.CommandMode = FMC_SDRAM_CMD_PALL;
Jerome Coutant 2:123b894b49dd 245 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Jerome Coutant 2:123b894b49dd 246 Command.AutoRefreshNumber = 1;
Jerome Coutant 2:123b894b49dd 247 Command.ModeRegisterDefinition = 0;
Jerome Coutant 2:123b894b49dd 248
Jerome Coutant 2:123b894b49dd 249 /* Send the command */
Jerome Coutant 2:123b894b49dd 250 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 2:123b894b49dd 251
Jerome Coutant 2:123b894b49dd 252 /* Step 4: Configure an Auto Refresh command */
Jerome Coutant 2:123b894b49dd 253 Command.CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
Jerome Coutant 2:123b894b49dd 254 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Jerome Coutant 2:123b894b49dd 255 Command.AutoRefreshNumber = 8;
Jerome Coutant 2:123b894b49dd 256 Command.ModeRegisterDefinition = 0;
Jerome Coutant 2:123b894b49dd 257
Jerome Coutant 2:123b894b49dd 258 /* Send the command */
Jerome Coutant 2:123b894b49dd 259 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 2:123b894b49dd 260
Jerome Coutant 2:123b894b49dd 261 /* Step 5: Program the external memory mode register */
Jerome Coutant 2:123b894b49dd 262 tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |\
Jerome Coutant 2:123b894b49dd 263 SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |\
Jerome Coutant 2:123b894b49dd 264 SDRAM_MODEREG_CAS_LATENCY_3 |\
Jerome Coutant 2:123b894b49dd 265 SDRAM_MODEREG_OPERATING_MODE_STANDARD |\
Jerome Coutant 2:123b894b49dd 266 SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
Jerome Coutant 2:123b894b49dd 267
Jerome Coutant 2:123b894b49dd 268 Command.CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
Jerome Coutant 2:123b894b49dd 269 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Jerome Coutant 2:123b894b49dd 270 Command.AutoRefreshNumber = 1;
Jerome Coutant 2:123b894b49dd 271 Command.ModeRegisterDefinition = tmpmrd;
Jerome Coutant 2:123b894b49dd 272
Jerome Coutant 2:123b894b49dd 273 /* Send the command */
Jerome Coutant 2:123b894b49dd 274 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 2:123b894b49dd 275
Jerome Coutant 2:123b894b49dd 276 /* Step 6: Set the refresh rate counter */
Jerome Coutant 2:123b894b49dd 277 /* Set the device refresh rate */
Jerome Coutant 2:123b894b49dd 278 HAL_SDRAM_ProgramRefreshRate(&sdramHandle, RefreshCount);
Jerome Coutant 2:123b894b49dd 279 }
Jerome Coutant 2:123b894b49dd 280
Jerome Coutant 2:123b894b49dd 281 /**
Jerome Coutant 2:123b894b49dd 282 * @brief Reads an mount of data from the SDRAM memory in polling mode.
Jerome Coutant 2:123b894b49dd 283 * @param uwStartAddress: Read start address
Jerome Coutant 2:123b894b49dd 284 * @param pData: Pointer to data to be read
Jerome Coutant 2:123b894b49dd 285 * @param uwDataSize: Size of read data from the memory
Jerome Coutant 2:123b894b49dd 286 * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 287 */
Jerome Coutant 2:123b894b49dd 288 uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 2:123b894b49dd 289 {
Jerome Coutant 2:123b894b49dd 290 if(HAL_SDRAM_Read_32b(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 2:123b894b49dd 291 {
Jerome Coutant 2:123b894b49dd 292 return SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 293 }
Jerome Coutant 2:123b894b49dd 294 else
Jerome Coutant 2:123b894b49dd 295 {
Jerome Coutant 2:123b894b49dd 296 return SDRAM_OK;
Jerome Coutant 2:123b894b49dd 297 }
Jerome Coutant 2:123b894b49dd 298 }
Jerome Coutant 2:123b894b49dd 299
Jerome Coutant 2:123b894b49dd 300 /**
Jerome Coutant 2:123b894b49dd 301 * @brief Reads an mount of data from the SDRAM memory in DMA mode.
Jerome Coutant 2:123b894b49dd 302 * @param uwStartAddress: Read start address
Jerome Coutant 2:123b894b49dd 303 * @param pData: Pointer to data to be read
Jerome Coutant 2:123b894b49dd 304 * @param uwDataSize: Size of read data from the memory
Jerome Coutant 2:123b894b49dd 305 * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 306 */
Jerome Coutant 2:123b894b49dd 307 uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 2:123b894b49dd 308 {
Jerome Coutant 2:123b894b49dd 309 if(HAL_SDRAM_Read_DMA(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 2:123b894b49dd 310 {
Jerome Coutant 2:123b894b49dd 311 return SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 312 }
Jerome Coutant 2:123b894b49dd 313 else
Jerome Coutant 2:123b894b49dd 314 {
Jerome Coutant 2:123b894b49dd 315 return SDRAM_OK;
Jerome Coutant 2:123b894b49dd 316 }
Jerome Coutant 2:123b894b49dd 317 }
Jerome Coutant 2:123b894b49dd 318
Jerome Coutant 2:123b894b49dd 319 /**
Jerome Coutant 2:123b894b49dd 320 * @brief Writes an mount of data to the SDRAM memory in polling mode.
Jerome Coutant 2:123b894b49dd 321 * @param uwStartAddress: Write start address
Jerome Coutant 2:123b894b49dd 322 * @param pData: Pointer to data to be written
Jerome Coutant 2:123b894b49dd 323 * @param uwDataSize: Size of written data from the memory
Jerome Coutant 2:123b894b49dd 324 * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 325 */
Jerome Coutant 2:123b894b49dd 326 uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 2:123b894b49dd 327 {
Jerome Coutant 2:123b894b49dd 328 if(HAL_SDRAM_Write_32b(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 2:123b894b49dd 329 {
Jerome Coutant 2:123b894b49dd 330 return SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 331 }
Jerome Coutant 2:123b894b49dd 332 else
Jerome Coutant 2:123b894b49dd 333 {
Jerome Coutant 2:123b894b49dd 334 return SDRAM_OK;
Jerome Coutant 2:123b894b49dd 335 }
Jerome Coutant 2:123b894b49dd 336 }
Jerome Coutant 2:123b894b49dd 337
Jerome Coutant 2:123b894b49dd 338 /**
Jerome Coutant 2:123b894b49dd 339 * @brief Writes an mount of data to the SDRAM memory in DMA mode.
Jerome Coutant 2:123b894b49dd 340 * @param uwStartAddress: Write start address
Jerome Coutant 2:123b894b49dd 341 * @param pData: Pointer to data to be written
Jerome Coutant 2:123b894b49dd 342 * @param uwDataSize: Size of written data from the memory
Jerome Coutant 2:123b894b49dd 343 * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 344 */
Jerome Coutant 2:123b894b49dd 345 uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 2:123b894b49dd 346 {
Jerome Coutant 2:123b894b49dd 347 if(HAL_SDRAM_Write_DMA(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 2:123b894b49dd 348 {
Jerome Coutant 2:123b894b49dd 349 return SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 350 }
Jerome Coutant 2:123b894b49dd 351 else
Jerome Coutant 2:123b894b49dd 352 {
Jerome Coutant 2:123b894b49dd 353 return SDRAM_OK;
Jerome Coutant 2:123b894b49dd 354 }
Jerome Coutant 2:123b894b49dd 355 }
Jerome Coutant 2:123b894b49dd 356
Jerome Coutant 2:123b894b49dd 357 /**
Jerome Coutant 2:123b894b49dd 358 * @brief Sends command to the SDRAM bank.
Jerome Coutant 2:123b894b49dd 359 * @param SdramCmd: Pointer to SDRAM command structure
Jerome Coutant 2:123b894b49dd 360 * @retval HAL status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 361 */
Jerome Coutant 2:123b894b49dd 362 uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd)
Jerome Coutant 2:123b894b49dd 363 {
Jerome Coutant 2:123b894b49dd 364 if(HAL_SDRAM_SendCommand(&sdramHandle, SdramCmd, SDRAM_TIMEOUT) != HAL_OK)
Jerome Coutant 2:123b894b49dd 365 {
Jerome Coutant 2:123b894b49dd 366 return SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 367 }
Jerome Coutant 2:123b894b49dd 368 else
Jerome Coutant 2:123b894b49dd 369 {
Jerome Coutant 2:123b894b49dd 370 return SDRAM_OK;
Jerome Coutant 2:123b894b49dd 371 }
Jerome Coutant 2:123b894b49dd 372 }
Jerome Coutant 2:123b894b49dd 373
Jerome Coutant 2:123b894b49dd 374 /**
Jerome Coutant 2:123b894b49dd 375 * @brief Handles SDRAM DMA transfer interrupt request.
Jerome Coutant 2:123b894b49dd 376 */
Jerome Coutant 2:123b894b49dd 377 void BSP_SDRAM_DMA_IRQHandler(void)
Jerome Coutant 2:123b894b49dd 378 {
Jerome Coutant 2:123b894b49dd 379 HAL_DMA_IRQHandler(sdramHandle.hdma);
Jerome Coutant 2:123b894b49dd 380 }
Jerome Coutant 2:123b894b49dd 381
Jerome Coutant 2:123b894b49dd 382 /**
Jerome Coutant 2:123b894b49dd 383 * @brief Initializes SDRAM MSP.
Jerome Coutant 2:123b894b49dd 384 * @note This function can be surcharged by application code.
Jerome Coutant 2:123b894b49dd 385 * @param hsdram: pointer on SDRAM handle
Jerome Coutant 2:123b894b49dd 386 * @param Params: pointer on additional configuration parameters, can be NULL.
Jerome Coutant 2:123b894b49dd 387 */
Jerome Coutant 2:123b894b49dd 388 __weak void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params)
Jerome Coutant 2:123b894b49dd 389 {
Jerome Coutant 2:123b894b49dd 390 static DMA_HandleTypeDef dma_handle;
Jerome Coutant 2:123b894b49dd 391 GPIO_InitTypeDef gpio_init_structure;
Jerome Coutant 2:123b894b49dd 392
Jerome Coutant 2:123b894b49dd 393 if(hsdram != (SDRAM_HandleTypeDef *)NULL)
Jerome Coutant 2:123b894b49dd 394 {
Jerome Coutant 2:123b894b49dd 395 /* Enable FMC clock */
Jerome Coutant 2:123b894b49dd 396 __HAL_RCC_FMC_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 397
Jerome Coutant 2:123b894b49dd 398 /* Enable chosen DMAx clock */
Jerome Coutant 2:123b894b49dd 399 __DMAx_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 400
Jerome Coutant 2:123b894b49dd 401 /* Enable GPIOs clock */
Jerome Coutant 2:123b894b49dd 402 __HAL_RCC_GPIOC_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 403 __HAL_RCC_GPIOD_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 404 __HAL_RCC_GPIOE_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 405 __HAL_RCC_GPIOF_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 406 __HAL_RCC_GPIOG_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 407 __HAL_RCC_GPIOH_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 408 __HAL_RCC_GPIOI_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 409
Jerome Coutant 2:123b894b49dd 410 /* Common GPIO configuration */
Jerome Coutant 2:123b894b49dd 411 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
Jerome Coutant 2:123b894b49dd 412 gpio_init_structure.Pull = GPIO_PULLUP;
Jerome Coutant 2:123b894b49dd 413 gpio_init_structure.Speed = GPIO_SPEED_FAST;
Jerome Coutant 2:123b894b49dd 414 gpio_init_structure.Alternate = GPIO_AF12_FMC;
Jerome Coutant 2:123b894b49dd 415
Jerome Coutant 2:123b894b49dd 416 /* GPIOC configuration : PC0 is SDNWE */
Jerome Coutant 2:123b894b49dd 417 gpio_init_structure.Pin = GPIO_PIN_0;
Jerome Coutant 2:123b894b49dd 418 HAL_GPIO_Init(GPIOC, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 419
Jerome Coutant 2:123b894b49dd 420 /* GPIOD configuration */
Jerome Coutant 2:123b894b49dd 421 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8| GPIO_PIN_9 | GPIO_PIN_10 |\
Jerome Coutant 2:123b894b49dd 422 GPIO_PIN_14 | GPIO_PIN_15;
Jerome Coutant 2:123b894b49dd 423
Jerome Coutant 2:123b894b49dd 424
Jerome Coutant 2:123b894b49dd 425 HAL_GPIO_Init(GPIOD, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 426
Jerome Coutant 2:123b894b49dd 427 /* GPIOE configuration */
Jerome Coutant 2:123b894b49dd 428 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7| GPIO_PIN_8 | GPIO_PIN_9 |\
Jerome Coutant 2:123b894b49dd 429 GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
Jerome Coutant 2:123b894b49dd 430 GPIO_PIN_15;
Jerome Coutant 2:123b894b49dd 431
Jerome Coutant 2:123b894b49dd 432 HAL_GPIO_Init(GPIOE, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 433
Jerome Coutant 2:123b894b49dd 434 /* GPIOF configuration */
Jerome Coutant 2:123b894b49dd 435 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
Jerome Coutant 2:123b894b49dd 436 GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
Jerome Coutant 2:123b894b49dd 437 GPIO_PIN_15;
Jerome Coutant 2:123b894b49dd 438
Jerome Coutant 2:123b894b49dd 439 HAL_GPIO_Init(GPIOF, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 440
Jerome Coutant 2:123b894b49dd 441 /* GPIOG configuration */
Jerome Coutant 2:123b894b49dd 442 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4| GPIO_PIN_5 | GPIO_PIN_8 |\
Jerome Coutant 2:123b894b49dd 443 GPIO_PIN_15;
Jerome Coutant 2:123b894b49dd 444 HAL_GPIO_Init(GPIOG, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 445
Jerome Coutant 2:123b894b49dd 446 /* GPIOH configuration */
Jerome Coutant 2:123b894b49dd 447 gpio_init_structure.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_8 | GPIO_PIN_9 |\
Jerome Coutant 2:123b894b49dd 448 GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
Jerome Coutant 2:123b894b49dd 449 GPIO_PIN_15;
Jerome Coutant 2:123b894b49dd 450 HAL_GPIO_Init(GPIOH, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 451
Jerome Coutant 2:123b894b49dd 452 /* GPIOI configuration */
Jerome Coutant 2:123b894b49dd 453 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 |\
Jerome Coutant 2:123b894b49dd 454 GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_9 | GPIO_PIN_10;
Jerome Coutant 2:123b894b49dd 455 HAL_GPIO_Init(GPIOI, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 456
Jerome Coutant 2:123b894b49dd 457 /* Configure common DMA parameters */
Jerome Coutant 2:123b894b49dd 458 dma_handle.Init.Channel = SDRAM_DMAx_CHANNEL;
Jerome Coutant 2:123b894b49dd 459 dma_handle.Init.Direction = DMA_MEMORY_TO_MEMORY;
Jerome Coutant 2:123b894b49dd 460 dma_handle.Init.PeriphInc = DMA_PINC_ENABLE;
Jerome Coutant 2:123b894b49dd 461 dma_handle.Init.MemInc = DMA_MINC_ENABLE;
Jerome Coutant 2:123b894b49dd 462 dma_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
Jerome Coutant 2:123b894b49dd 463 dma_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
Jerome Coutant 2:123b894b49dd 464 dma_handle.Init.Mode = DMA_NORMAL;
Jerome Coutant 2:123b894b49dd 465 dma_handle.Init.Priority = DMA_PRIORITY_HIGH;
Jerome Coutant 2:123b894b49dd 466 dma_handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
Jerome Coutant 2:123b894b49dd 467 dma_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
Jerome Coutant 2:123b894b49dd 468 dma_handle.Init.MemBurst = DMA_MBURST_SINGLE;
Jerome Coutant 2:123b894b49dd 469 dma_handle.Init.PeriphBurst = DMA_PBURST_SINGLE;
Jerome Coutant 2:123b894b49dd 470
Jerome Coutant 2:123b894b49dd 471 dma_handle.Instance = SDRAM_DMAx_STREAM;
Jerome Coutant 2:123b894b49dd 472
Jerome Coutant 2:123b894b49dd 473 /* Associate the DMA handle */
Jerome Coutant 2:123b894b49dd 474 __HAL_LINKDMA(hsdram, hdma, dma_handle);
Jerome Coutant 2:123b894b49dd 475
Jerome Coutant 2:123b894b49dd 476 /* Deinitialize the stream for new transfer */
Jerome Coutant 2:123b894b49dd 477 HAL_DMA_DeInit(&dma_handle);
Jerome Coutant 2:123b894b49dd 478
Jerome Coutant 2:123b894b49dd 479 /* Configure the DMA stream */
Jerome Coutant 2:123b894b49dd 480 HAL_DMA_Init(&dma_handle);
Jerome Coutant 2:123b894b49dd 481
Jerome Coutant 2:123b894b49dd 482 /* NVIC configuration for DMA transfer complete interrupt */
Jerome Coutant 2:123b894b49dd 483 HAL_NVIC_SetPriority(SDRAM_DMAx_IRQn, 5, 0);
Jerome Coutant 2:123b894b49dd 484 HAL_NVIC_EnableIRQ(SDRAM_DMAx_IRQn);
Jerome Coutant 2:123b894b49dd 485
Jerome Coutant 2:123b894b49dd 486 } /* of if(hsdram != (SDRAM_HandleTypeDef *)NULL) */
Jerome Coutant 2:123b894b49dd 487 }
Jerome Coutant 2:123b894b49dd 488
Jerome Coutant 2:123b894b49dd 489 /**
Jerome Coutant 2:123b894b49dd 490 * @brief DeInitializes SDRAM MSP.
Jerome Coutant 2:123b894b49dd 491 * @note This function can be surcharged by application code.
Jerome Coutant 2:123b894b49dd 492 * @param hsdram: pointer on SDRAM handle
Jerome Coutant 2:123b894b49dd 493 * @param Params: pointer on additional configuration parameters, can be NULL.
Jerome Coutant 2:123b894b49dd 494 */
Jerome Coutant 2:123b894b49dd 495 __weak void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params)
Jerome Coutant 2:123b894b49dd 496 {
Jerome Coutant 2:123b894b49dd 497 static DMA_HandleTypeDef dma_handle;
Jerome Coutant 2:123b894b49dd 498
Jerome Coutant 2:123b894b49dd 499 if(hsdram != (SDRAM_HandleTypeDef *)NULL)
Jerome Coutant 2:123b894b49dd 500 {
Jerome Coutant 2:123b894b49dd 501 /* Disable NVIC configuration for DMA interrupt */
Jerome Coutant 2:123b894b49dd 502 HAL_NVIC_DisableIRQ(SDRAM_DMAx_IRQn);
Jerome Coutant 2:123b894b49dd 503
Jerome Coutant 2:123b894b49dd 504 /* Deinitialize the stream for new transfer */
Jerome Coutant 2:123b894b49dd 505 dma_handle.Instance = SDRAM_DMAx_STREAM;
Jerome Coutant 2:123b894b49dd 506 HAL_DMA_DeInit(&dma_handle);
Jerome Coutant 2:123b894b49dd 507
Jerome Coutant 2:123b894b49dd 508 /* DeInit GPIO pins can be done in the application
Jerome Coutant 2:123b894b49dd 509 (by surcharging this __weak function) */
Jerome Coutant 2:123b894b49dd 510
Jerome Coutant 2:123b894b49dd 511 /* GPIO pins clock, FMC clock and DMA clock can be shut down in the application
Jerome Coutant 2:123b894b49dd 512 by surcharging this __weak function */
Jerome Coutant 2:123b894b49dd 513
Jerome Coutant 2:123b894b49dd 514 } /* of if(hsdram != (SDRAM_HandleTypeDef *)NULL) */
Jerome Coutant 2:123b894b49dd 515 }
Jerome Coutant 2:123b894b49dd 516
Jerome Coutant 2:123b894b49dd 517 /**
Jerome Coutant 2:123b894b49dd 518 * @}
Jerome Coutant 2:123b894b49dd 519 */
Jerome Coutant 2:123b894b49dd 520
Jerome Coutant 2:123b894b49dd 521 /**
Jerome Coutant 2:123b894b49dd 522 * @}
Jerome Coutant 2:123b894b49dd 523 */
Jerome Coutant 2:123b894b49dd 524
Jerome Coutant 2:123b894b49dd 525 /**
Jerome Coutant 2:123b894b49dd 526 * @}
Jerome Coutant 2:123b894b49dd 527 */
Jerome Coutant 2:123b894b49dd 528
Jerome Coutant 2:123b894b49dd 529 /**
Jerome Coutant 2:123b894b49dd 530 * @}
Jerome Coutant 2:123b894b49dd 531 */
Jerome Coutant 2:123b894b49dd 532
Jerome Coutant 2:123b894b49dd 533 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/