ST / BSP_DISCO_F469NI

STM32F469NI Discovery board drivers

Dependents:   DISCO-F469NI_LCDTS_GUI_demo Configurable_Robots DISCO-F469NI_LCD_demo DISCO-F469NI_SD_demo ... more

Drivers/BSP/STM32469I-Discovery/stm32469i_discovery_sdram.c@3:3cdfcc4f7c9d, 2018-02-28 (annotated)

Committer:
Jerome Coutant
Date:
Wed Feb 28 13:17:15 2018 +0100
Revision:
3:3cdfcc4f7c9d
Parent:
2:123b894b49dd
Child:
4:27609b3a44ed
STM32Cube_FW_F4_V1.19.0 BSP_DISCO_F469NI

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Jerome Coutant 2:123b894b49dd 1 /**
Jerome Coutant 2:123b894b49dd 2 ******************************************************************************
Jerome Coutant 2:123b894b49dd 3 * @file stm32469i_discovery_sdram.c
Jerome Coutant 2:123b894b49dd 4 * @author MCD Application Team
Jerome Coutant 2:123b894b49dd 5 * @brief This file includes the SDRAM driver for the MT48LC4M32B2B5-7 memory
Jerome Coutant 2:123b894b49dd 6 * device mounted on STM32469I-Discovery board.
Jerome Coutant 2:123b894b49dd 7 ******************************************************************************
Jerome Coutant 2:123b894b49dd 8 * @attention
Jerome Coutant 2:123b894b49dd 9 *
Jerome Coutant 2:123b894b49dd 10 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
Jerome Coutant 2:123b894b49dd 11 *
Jerome Coutant 2:123b894b49dd 12 * Redistribution and use in source and binary forms, with or without modification,
Jerome Coutant 2:123b894b49dd 13 * are permitted provided that the following conditions are met:
Jerome Coutant 2:123b894b49dd 14 * 1. Redistributions of source code must retain the above copyright notice,
Jerome Coutant 2:123b894b49dd 15 * this list of conditions and the following disclaimer.
Jerome Coutant 2:123b894b49dd 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
Jerome Coutant 2:123b894b49dd 17 * this list of conditions and the following disclaimer in the documentation
Jerome Coutant 2:123b894b49dd 18 * and/or other materials provided with the distribution.
Jerome Coutant 2:123b894b49dd 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Jerome Coutant 2:123b894b49dd 20 * may be used to endorse or promote products derived from this software
Jerome Coutant 2:123b894b49dd 21 * without specific prior written permission.
Jerome Coutant 2:123b894b49dd 22 *
Jerome Coutant 2:123b894b49dd 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Jerome Coutant 2:123b894b49dd 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Jerome Coutant 2:123b894b49dd 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Jerome Coutant 2:123b894b49dd 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Jerome Coutant 2:123b894b49dd 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Jerome Coutant 2:123b894b49dd 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Jerome Coutant 2:123b894b49dd 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Jerome Coutant 2:123b894b49dd 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Jerome Coutant 2:123b894b49dd 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Jerome Coutant 2:123b894b49dd 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Jerome Coutant 2:123b894b49dd 33 *
Jerome Coutant 2:123b894b49dd 34 ******************************************************************************
Jerome Coutant 2:123b894b49dd 35 */
Jerome Coutant 2:123b894b49dd 36
Jerome Coutant 2:123b894b49dd 37 /* File Info : -----------------------------------------------------------------
Jerome Coutant 2:123b894b49dd 38 User NOTES
Jerome Coutant 2:123b894b49dd 39 1. How To use this driver:
Jerome Coutant 2:123b894b49dd 40 --------------------------
Jerome Coutant 2:123b894b49dd 41 - This driver is used to drive the MT48LC4M32B2B5-7 SDRAM external memory mounted
Jerome Coutant 2:123b894b49dd 42 on STM32469I-Discovery board.
Jerome Coutant 2:123b894b49dd 43 - This driver does not need a specific component driver for the SDRAM device
Jerome Coutant 2:123b894b49dd 44 to be included with.
Jerome Coutant 2:123b894b49dd 45
Jerome Coutant 2:123b894b49dd 46 2. Driver description:
Jerome Coutant 2:123b894b49dd 47 ---------------------
Jerome Coutant 2:123b894b49dd 48 + Initialization steps:
Jerome Coutant 2:123b894b49dd 49 o Initialize the SDRAM external memory using the BSP_SDRAM_Init() function. This
Jerome Coutant 2:123b894b49dd 50 function includes the MSP layer hardware resources initialization and the
Jerome Coutant 2:123b894b49dd 51 FMC controller configuration to interface with the external SDRAM memory.
Jerome Coutant 2:123b894b49dd 52 o It contains the SDRAM initialization sequence to program the SDRAM external
Jerome Coutant 2:123b894b49dd 53 device using the function BSP_SDRAM_Initialization_sequence(). Note that this
Jerome Coutant 2:123b894b49dd 54 sequence is standard for all SDRAM devices, but can include some differences
Jerome Coutant 2:123b894b49dd 55 from a device to another. If it is the case, the right sequence should be
Jerome Coutant 2:123b894b49dd 56 implemented separately.
Jerome Coutant 2:123b894b49dd 57
Jerome Coutant 2:123b894b49dd 58 + SDRAM read/write operations
Jerome Coutant 2:123b894b49dd 59 o SDRAM external memory can be accessed with read/write operations once it is
Jerome Coutant 2:123b894b49dd 60 initialized.
Jerome Coutant 2:123b894b49dd 61 Read/write operation can be performed with AHB access using the functions
Jerome Coutant 2:123b894b49dd 62 BSP_SDRAM_ReadData()/BSP_SDRAM_WriteData(), or by DMA transfer using the functions
Jerome Coutant 2:123b894b49dd 63 BSP_SDRAM_ReadData_DMA()/BSP_SDRAM_WriteData_DMA().
Jerome Coutant 2:123b894b49dd 64 o The AHB access is performed with 32-bit width transaction, the DMA transfer
Jerome Coutant 2:123b894b49dd 65 configuration is fixed at single (no burst) word transfer (see the
Jerome Coutant 2:123b894b49dd 66 BSP_SDRAM_MspInit() weak function).
Jerome Coutant 2:123b894b49dd 67 o User can implement his own functions for read/write access with his desired
Jerome Coutant 2:123b894b49dd 68 configurations.
Jerome Coutant 2:123b894b49dd 69 o If interrupt mode is used for DMA transfer, the function BSP_SDRAM_DMA_IRQHandler()
Jerome Coutant 2:123b894b49dd 70 is called in IRQ handler file, to serve the generated interrupt once the DMA
Jerome Coutant 2:123b894b49dd 71 transfer is complete.
Jerome Coutant 2:123b894b49dd 72 o You can send a command to the SDRAM device in runtime using the function
Jerome Coutant 2:123b894b49dd 73 BSP_SDRAM_Sendcmd(), and giving the desired command as parameter chosen between
Jerome Coutant 2:123b894b49dd 74 the predefined commands of the "FMC_SDRAM_CommandTypeDef" structure.
Jerome Coutant 2:123b894b49dd 75
Jerome Coutant 2:123b894b49dd 76 ------------------------------------------------------------------------------*/
Jerome Coutant 2:123b894b49dd 77
Jerome Coutant 2:123b894b49dd 78 /* Includes ------------------------------------------------------------------*/
Jerome Coutant 2:123b894b49dd 79 #include "stm32469i_discovery_sdram.h"
Jerome Coutant 2:123b894b49dd 80
Jerome Coutant 2:123b894b49dd 81 // mbed
Jerome Coutant 2:123b894b49dd 82 void wait_ms(int ms);
Jerome Coutant 2:123b894b49dd 83
Jerome Coutant 2:123b894b49dd 84 /** @addtogroup BSP
Jerome Coutant 2:123b894b49dd 85 * @{
Jerome Coutant 2:123b894b49dd 86 */
Jerome Coutant 2:123b894b49dd 87
Jerome Coutant 2:123b894b49dd 88 /** @addtogroup STM32469I_Discovery
Jerome Coutant 2:123b894b49dd 89 * @{
Jerome Coutant 2:123b894b49dd 90 */
Jerome Coutant 2:123b894b49dd 91
Jerome Coutant 2:123b894b49dd 92 /** @defgroup STM32469I-Discovery_SDRAM STM32469I Discovery SDRAM
Jerome Coutant 2:123b894b49dd 93 * @{
Jerome Coutant 2:123b894b49dd 94 */
Jerome Coutant 2:123b894b49dd 95
Jerome Coutant 2:123b894b49dd 96 /** @defgroup STM32469I-Discovery_SDRAM_Private_Types_Definitions STM32469I Discovery SDRAM Private TypesDef
Jerome Coutant 2:123b894b49dd 97 * @{
Jerome Coutant 2:123b894b49dd 98 */
Jerome Coutant 2:123b894b49dd 99 /**
Jerome Coutant 2:123b894b49dd 100 * @}
Jerome Coutant 2:123b894b49dd 101 */
Jerome Coutant 2:123b894b49dd 102
Jerome Coutant 2:123b894b49dd 103 /** @defgroup STM32469I-Discovery_SDRAM_Private_Defines STM32469I Discovery SDRAM Private Defines
Jerome Coutant 2:123b894b49dd 104 * @{
Jerome Coutant 2:123b894b49dd 105 */
Jerome Coutant 2:123b894b49dd 106 /**
Jerome Coutant 2:123b894b49dd 107 * @}
Jerome Coutant 2:123b894b49dd 108 */
Jerome Coutant 2:123b894b49dd 109
Jerome Coutant 2:123b894b49dd 110 /** @defgroup STM32469I-Discovery_SDRAM_Private_Macros STM32469I Discovery SDRAM Private Macros
Jerome Coutant 2:123b894b49dd 111 * @{
Jerome Coutant 2:123b894b49dd 112 */
Jerome Coutant 2:123b894b49dd 113 /**
Jerome Coutant 2:123b894b49dd 114 * @}
Jerome Coutant 2:123b894b49dd 115 */
Jerome Coutant 2:123b894b49dd 116
Jerome Coutant 2:123b894b49dd 117 /** @defgroup STM32469I-Discovery_SDRAM_Private_Variables STM32469I Discovery SDRAM Private Variables
Jerome Coutant 2:123b894b49dd 118 * @{
Jerome Coutant 2:123b894b49dd 119 */
Jerome Coutant 2:123b894b49dd 120 static SDRAM_HandleTypeDef sdramHandle;
Jerome Coutant 2:123b894b49dd 121 static FMC_SDRAM_TimingTypeDef Timing;
Jerome Coutant 2:123b894b49dd 122 static FMC_SDRAM_CommandTypeDef Command;
Jerome Coutant 2:123b894b49dd 123 /**
Jerome Coutant 2:123b894b49dd 124 * @}
Jerome Coutant 2:123b894b49dd 125 */
Jerome Coutant 2:123b894b49dd 126
Jerome Coutant 2:123b894b49dd 127 /** @defgroup STM32469I-Discovery_SDRAM_Private_Function_Prototypes STM32469I Discovery SDRAM Private Prototypes
Jerome Coutant 2:123b894b49dd 128 * @{
Jerome Coutant 2:123b894b49dd 129 */
Jerome Coutant 2:123b894b49dd 130
Jerome Coutant 2:123b894b49dd 131 /**
Jerome Coutant 2:123b894b49dd 132 * @}
Jerome Coutant 2:123b894b49dd 133 */
Jerome Coutant 2:123b894b49dd 134
Jerome Coutant 2:123b894b49dd 135 /** @defgroup STM32469I-Discovery_SDRAM_Private_Functions STM32469I Discovery SDRAM Private Functions
Jerome Coutant 2:123b894b49dd 136 * @{
Jerome Coutant 2:123b894b49dd 137 */
Jerome Coutant 2:123b894b49dd 138
Jerome Coutant 2:123b894b49dd 139 /**
Jerome Coutant 2:123b894b49dd 140 * @}
Jerome Coutant 2:123b894b49dd 141 */
Jerome Coutant 2:123b894b49dd 142
Jerome Coutant 2:123b894b49dd 143 /** @defgroup STM32469I_Discovery_SDRAM_Exported_Functions STM32469I Discovery SDRAM Exported Functions
Jerome Coutant 2:123b894b49dd 144 * @{
Jerome Coutant 2:123b894b49dd 145 */
Jerome Coutant 2:123b894b49dd 146
Jerome Coutant 2:123b894b49dd 147 /**
Jerome Coutant 2:123b894b49dd 148 * @brief Initializes the SDRAM device.
Jerome Coutant 2:123b894b49dd 149 * @retval SDRAM status
Jerome Coutant 2:123b894b49dd 150 */
Jerome Coutant 2:123b894b49dd 151 uint8_t BSP_SDRAM_Init(void)
Jerome Coutant 2:123b894b49dd 152 {
Jerome Coutant 2:123b894b49dd 153 static uint8_t sdramstatus = SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 154
Jerome Coutant 2:123b894b49dd 155 /* SDRAM device configuration */
Jerome Coutant 2:123b894b49dd 156 sdramHandle.Instance = FMC_SDRAM_DEVICE;
Jerome Coutant 2:123b894b49dd 157
Jerome Coutant 2:123b894b49dd 158 /* Timing configuration for 90 MHz as SD clock frequency (System clock is up to 180 MHz) */
Jerome Coutant 2:123b894b49dd 159 Timing.LoadToActiveDelay = 2;
Jerome Coutant 2:123b894b49dd 160 Timing.ExitSelfRefreshDelay = 7;
Jerome Coutant 2:123b894b49dd 161 Timing.SelfRefreshTime = 4;
Jerome Coutant 2:123b894b49dd 162 Timing.RowCycleDelay = 7;
Jerome Coutant 2:123b894b49dd 163 Timing.WriteRecoveryTime = 2;
Jerome Coutant 2:123b894b49dd 164 Timing.RPDelay = 2;
Jerome Coutant 2:123b894b49dd 165 Timing.RCDDelay = 2;
Jerome Coutant 2:123b894b49dd 166
Jerome Coutant 2:123b894b49dd 167 sdramHandle.Init.SDBank = FMC_SDRAM_BANK1;
Jerome Coutant 2:123b894b49dd 168 sdramHandle.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
Jerome Coutant 2:123b894b49dd 169 sdramHandle.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
Jerome Coutant 2:123b894b49dd 170 sdramHandle.Init.MemoryDataWidth = SDRAM_MEMORY_WIDTH;
Jerome Coutant 2:123b894b49dd 171 sdramHandle.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
Jerome Coutant 2:123b894b49dd 172 sdramHandle.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
Jerome Coutant 2:123b894b49dd 173 sdramHandle.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
Jerome Coutant 2:123b894b49dd 174 sdramHandle.Init.SDClockPeriod = SDCLOCK_PERIOD;
Jerome Coutant 2:123b894b49dd 175 sdramHandle.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
Jerome Coutant 2:123b894b49dd 176 sdramHandle.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
Jerome Coutant 2:123b894b49dd 177
Jerome Coutant 2:123b894b49dd 178 /* SDRAM controller initialization */
Jerome Coutant 2:123b894b49dd 179 /* __weak function can be surcharged by the application code */
Jerome Coutant 2:123b894b49dd 180 BSP_SDRAM_MspInit(&sdramHandle, (void *)NULL);
Jerome Coutant 2:123b894b49dd 181 if(HAL_SDRAM_Init(&sdramHandle, &Timing) != HAL_OK)
Jerome Coutant 2:123b894b49dd 182 {
Jerome Coutant 2:123b894b49dd 183 sdramstatus = SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 184 }
Jerome Coutant 2:123b894b49dd 185 else
Jerome Coutant 2:123b894b49dd 186 {
Jerome Coutant 2:123b894b49dd 187 sdramstatus = SDRAM_OK;
Jerome Coutant 2:123b894b49dd 188 }
Jerome Coutant 2:123b894b49dd 189
Jerome Coutant 2:123b894b49dd 190 /* SDRAM initialization sequence */
Jerome Coutant 2:123b894b49dd 191 BSP_SDRAM_Initialization_sequence(REFRESH_COUNT);
Jerome Coutant 2:123b894b49dd 192
Jerome Coutant 2:123b894b49dd 193 return sdramstatus;
Jerome Coutant 2:123b894b49dd 194 }
Jerome Coutant 2:123b894b49dd 195
Jerome Coutant 2:123b894b49dd 196 /**
Jerome Coutant 2:123b894b49dd 197 * @brief DeInitializes the SDRAM device.
Jerome Coutant 2:123b894b49dd 198 * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 199 */
Jerome Coutant 2:123b894b49dd 200 uint8_t BSP_SDRAM_DeInit(void)
Jerome Coutant 2:123b894b49dd 201 {
Jerome Coutant 2:123b894b49dd 202 static uint8_t sdramstatus = SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 203
Jerome Coutant 2:123b894b49dd 204 /* SDRAM device configuration */
Jerome Coutant 2:123b894b49dd 205 sdramHandle.Instance = FMC_SDRAM_DEVICE;
Jerome Coutant 2:123b894b49dd 206
Jerome Coutant 2:123b894b49dd 207 if(HAL_SDRAM_DeInit(&sdramHandle) == HAL_OK)
Jerome Coutant 2:123b894b49dd 208 {
Jerome Coutant 2:123b894b49dd 209 sdramstatus = SDRAM_OK;
Jerome Coutant 2:123b894b49dd 210
Jerome Coutant 2:123b894b49dd 211 /* SDRAM controller De-initialization */
Jerome Coutant 2:123b894b49dd 212 BSP_SDRAM_MspDeInit(&sdramHandle, (void *)NULL);
Jerome Coutant 2:123b894b49dd 213 }
Jerome Coutant 2:123b894b49dd 214
Jerome Coutant 2:123b894b49dd 215 return sdramstatus;
Jerome Coutant 2:123b894b49dd 216 }
Jerome Coutant 2:123b894b49dd 217
Jerome Coutant 2:123b894b49dd 218
Jerome Coutant 2:123b894b49dd 219 /**
Jerome Coutant 2:123b894b49dd 220 * @brief Programs the SDRAM device.
Jerome Coutant 2:123b894b49dd 221 * @param RefreshCount: SDRAM refresh counter value
Jerome Coutant 2:123b894b49dd 222 */
Jerome Coutant 2:123b894b49dd 223 void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount)
Jerome Coutant 2:123b894b49dd 224 {
Jerome Coutant 2:123b894b49dd 225 __IO uint32_t tmpmrd = 0;
Jerome Coutant 2:123b894b49dd 226
Jerome Coutant 2:123b894b49dd 227 /* Step 1: Configure a clock configuration enable command */
Jerome Coutant 2:123b894b49dd 228 Command.CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
Jerome Coutant 2:123b894b49dd 229 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Jerome Coutant 2:123b894b49dd 230 Command.AutoRefreshNumber = 1;
Jerome Coutant 2:123b894b49dd 231 Command.ModeRegisterDefinition = 0;
Jerome Coutant 2:123b894b49dd 232
Jerome Coutant 2:123b894b49dd 233 /* Send the command */
Jerome Coutant 2:123b894b49dd 234 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 2:123b894b49dd 235
Jerome Coutant 2:123b894b49dd 236 /* Step 2: Insert 100 us minimum delay */
Jerome Coutant 2:123b894b49dd 237 /* Inserted delay is equal to 1 ms due to systick time base unit (ms) */
Jerome Coutant 2:123b894b49dd 238 //HAL_Delay(1);
Jerome Coutant 2:123b894b49dd 239 wait_ms(1);
Jerome Coutant 2:123b894b49dd 240
Jerome Coutant 2:123b894b49dd 241 /* Step 3: Configure a PALL (precharge all) command */
Jerome Coutant 2:123b894b49dd 242 Command.CommandMode = FMC_SDRAM_CMD_PALL;
Jerome Coutant 2:123b894b49dd 243 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Jerome Coutant 2:123b894b49dd 244 Command.AutoRefreshNumber = 1;
Jerome Coutant 2:123b894b49dd 245 Command.ModeRegisterDefinition = 0;
Jerome Coutant 2:123b894b49dd 246
Jerome Coutant 2:123b894b49dd 247 /* Send the command */
Jerome Coutant 2:123b894b49dd 248 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 2:123b894b49dd 249
Jerome Coutant 2:123b894b49dd 250 /* Step 4: Configure an Auto Refresh command */
Jerome Coutant 2:123b894b49dd 251 Command.CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
Jerome Coutant 2:123b894b49dd 252 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Jerome Coutant 2:123b894b49dd 253 Command.AutoRefreshNumber = 8;
Jerome Coutant 2:123b894b49dd 254 Command.ModeRegisterDefinition = 0;
Jerome Coutant 2:123b894b49dd 255
Jerome Coutant 2:123b894b49dd 256 /* Send the command */
Jerome Coutant 2:123b894b49dd 257 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 2:123b894b49dd 258
Jerome Coutant 2:123b894b49dd 259 /* Step 5: Program the external memory mode register */
Jerome Coutant 2:123b894b49dd 260 tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |\
Jerome Coutant 2:123b894b49dd 261 SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |\
Jerome Coutant 2:123b894b49dd 262 SDRAM_MODEREG_CAS_LATENCY_3 |\
Jerome Coutant 2:123b894b49dd 263 SDRAM_MODEREG_OPERATING_MODE_STANDARD |\
Jerome Coutant 2:123b894b49dd 264 SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
Jerome Coutant 2:123b894b49dd 265
Jerome Coutant 2:123b894b49dd 266 Command.CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
Jerome Coutant 2:123b894b49dd 267 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Jerome Coutant 2:123b894b49dd 268 Command.AutoRefreshNumber = 1;
Jerome Coutant 2:123b894b49dd 269 Command.ModeRegisterDefinition = tmpmrd;
Jerome Coutant 2:123b894b49dd 270
Jerome Coutant 2:123b894b49dd 271 /* Send the command */
Jerome Coutant 2:123b894b49dd 272 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 2:123b894b49dd 273
Jerome Coutant 2:123b894b49dd 274 /* Step 6: Set the refresh rate counter */
Jerome Coutant 2:123b894b49dd 275 /* Set the device refresh rate */
Jerome Coutant 2:123b894b49dd 276 HAL_SDRAM_ProgramRefreshRate(&sdramHandle, RefreshCount);
Jerome Coutant 2:123b894b49dd 277 }
Jerome Coutant 2:123b894b49dd 278
Jerome Coutant 2:123b894b49dd 279 /**
Jerome Coutant 2:123b894b49dd 280 * @brief Reads an mount of data from the SDRAM memory in polling mode.
Jerome Coutant 2:123b894b49dd 281 * @param uwStartAddress: Read start address
Jerome Coutant 2:123b894b49dd 282 * @param pData: Pointer to data to be read
Jerome Coutant 2:123b894b49dd 283 * @param uwDataSize: Size of read data from the memory
Jerome Coutant 2:123b894b49dd 284 * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 285 */
Jerome Coutant 2:123b894b49dd 286 uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 2:123b894b49dd 287 {
Jerome Coutant 2:123b894b49dd 288 if(HAL_SDRAM_Read_32b(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 2:123b894b49dd 289 {
Jerome Coutant 2:123b894b49dd 290 return SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 291 }
Jerome Coutant 2:123b894b49dd 292 else
Jerome Coutant 2:123b894b49dd 293 {
Jerome Coutant 2:123b894b49dd 294 return SDRAM_OK;
Jerome Coutant 2:123b894b49dd 295 }
Jerome Coutant 2:123b894b49dd 296 }
Jerome Coutant 2:123b894b49dd 297
Jerome Coutant 2:123b894b49dd 298 /**
Jerome Coutant 2:123b894b49dd 299 * @brief Reads an mount of data from the SDRAM memory in DMA mode.
Jerome Coutant 2:123b894b49dd 300 * @param uwStartAddress: Read start address
Jerome Coutant 2:123b894b49dd 301 * @param pData: Pointer to data to be read
Jerome Coutant 2:123b894b49dd 302 * @param uwDataSize: Size of read data from the memory
Jerome Coutant 2:123b894b49dd 303 * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 304 */
Jerome Coutant 2:123b894b49dd 305 uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 2:123b894b49dd 306 {
Jerome Coutant 2:123b894b49dd 307 if(HAL_SDRAM_Read_DMA(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 2:123b894b49dd 308 {
Jerome Coutant 2:123b894b49dd 309 return SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 310 }
Jerome Coutant 2:123b894b49dd 311 else
Jerome Coutant 2:123b894b49dd 312 {
Jerome Coutant 2:123b894b49dd 313 return SDRAM_OK;
Jerome Coutant 2:123b894b49dd 314 }
Jerome Coutant 2:123b894b49dd 315 }
Jerome Coutant 2:123b894b49dd 316
Jerome Coutant 2:123b894b49dd 317 /**
Jerome Coutant 2:123b894b49dd 318 * @brief Writes an mount of data to the SDRAM memory in polling mode.
Jerome Coutant 2:123b894b49dd 319 * @param uwStartAddress: Write start address
Jerome Coutant 2:123b894b49dd 320 * @param pData: Pointer to data to be written
Jerome Coutant 2:123b894b49dd 321 * @param uwDataSize: Size of written data from the memory
Jerome Coutant 2:123b894b49dd 322 * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 323 */
Jerome Coutant 2:123b894b49dd 324 uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 2:123b894b49dd 325 {
Jerome Coutant 2:123b894b49dd 326 if(HAL_SDRAM_Write_32b(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 2:123b894b49dd 327 {
Jerome Coutant 2:123b894b49dd 328 return SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 329 }
Jerome Coutant 2:123b894b49dd 330 else
Jerome Coutant 2:123b894b49dd 331 {
Jerome Coutant 2:123b894b49dd 332 return SDRAM_OK;
Jerome Coutant 2:123b894b49dd 333 }
Jerome Coutant 2:123b894b49dd 334 }
Jerome Coutant 2:123b894b49dd 335
Jerome Coutant 2:123b894b49dd 336 /**
Jerome Coutant 2:123b894b49dd 337 * @brief Writes an mount of data to the SDRAM memory in DMA mode.
Jerome Coutant 2:123b894b49dd 338 * @param uwStartAddress: Write start address
Jerome Coutant 2:123b894b49dd 339 * @param pData: Pointer to data to be written
Jerome Coutant 2:123b894b49dd 340 * @param uwDataSize: Size of written data from the memory
Jerome Coutant 2:123b894b49dd 341 * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 342 */
Jerome Coutant 2:123b894b49dd 343 uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 2:123b894b49dd 344 {
Jerome Coutant 2:123b894b49dd 345 if(HAL_SDRAM_Write_DMA(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 2:123b894b49dd 346 {
Jerome Coutant 2:123b894b49dd 347 return SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 348 }
Jerome Coutant 2:123b894b49dd 349 else
Jerome Coutant 2:123b894b49dd 350 {
Jerome Coutant 2:123b894b49dd 351 return SDRAM_OK;
Jerome Coutant 2:123b894b49dd 352 }
Jerome Coutant 2:123b894b49dd 353 }
Jerome Coutant 2:123b894b49dd 354
Jerome Coutant 2:123b894b49dd 355 /**
Jerome Coutant 2:123b894b49dd 356 * @brief Sends command to the SDRAM bank.
Jerome Coutant 2:123b894b49dd 357 * @param SdramCmd: Pointer to SDRAM command structure
Jerome Coutant 2:123b894b49dd 358 * @retval HAL status : SDRAM_OK or SDRAM_ERROR.
Jerome Coutant 2:123b894b49dd 359 */
Jerome Coutant 2:123b894b49dd 360 uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd)
Jerome Coutant 2:123b894b49dd 361 {
Jerome Coutant 2:123b894b49dd 362 if(HAL_SDRAM_SendCommand(&sdramHandle, SdramCmd, SDRAM_TIMEOUT) != HAL_OK)
Jerome Coutant 2:123b894b49dd 363 {
Jerome Coutant 2:123b894b49dd 364 return SDRAM_ERROR;
Jerome Coutant 2:123b894b49dd 365 }
Jerome Coutant 2:123b894b49dd 366 else
Jerome Coutant 2:123b894b49dd 367 {
Jerome Coutant 2:123b894b49dd 368 return SDRAM_OK;
Jerome Coutant 2:123b894b49dd 369 }
Jerome Coutant 2:123b894b49dd 370 }
Jerome Coutant 2:123b894b49dd 371
Jerome Coutant 2:123b894b49dd 372 /**
Jerome Coutant 2:123b894b49dd 373 * @brief Handles SDRAM DMA transfer interrupt request.
Jerome Coutant 2:123b894b49dd 374 */
Jerome Coutant 2:123b894b49dd 375 void BSP_SDRAM_DMA_IRQHandler(void)
Jerome Coutant 2:123b894b49dd 376 {
Jerome Coutant 2:123b894b49dd 377 HAL_DMA_IRQHandler(sdramHandle.hdma);
Jerome Coutant 2:123b894b49dd 378 }
Jerome Coutant 2:123b894b49dd 379
Jerome Coutant 2:123b894b49dd 380 /**
Jerome Coutant 2:123b894b49dd 381 * @brief Initializes SDRAM MSP.
Jerome Coutant 2:123b894b49dd 382 * @note This function can be surcharged by application code.
Jerome Coutant 2:123b894b49dd 383 * @param hsdram: pointer on SDRAM handle
Jerome Coutant 2:123b894b49dd 384 * @param Params: pointer on additional configuration parameters, can be NULL.
Jerome Coutant 2:123b894b49dd 385 */
Jerome Coutant 2:123b894b49dd 386 __weak void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params)
Jerome Coutant 2:123b894b49dd 387 {
Jerome Coutant 2:123b894b49dd 388 static DMA_HandleTypeDef dma_handle;
Jerome Coutant 2:123b894b49dd 389 GPIO_InitTypeDef gpio_init_structure;
Jerome Coutant 2:123b894b49dd 390
Jerome Coutant 2:123b894b49dd 391 if(hsdram != (SDRAM_HandleTypeDef *)NULL)
Jerome Coutant 2:123b894b49dd 392 {
Jerome Coutant 2:123b894b49dd 393 /* Enable FMC clock */
Jerome Coutant 2:123b894b49dd 394 __HAL_RCC_FMC_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 395
Jerome Coutant 2:123b894b49dd 396 /* Enable chosen DMAx clock */
Jerome Coutant 2:123b894b49dd 397 __DMAx_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 398
Jerome Coutant 2:123b894b49dd 399 /* Enable GPIOs clock */
Jerome Coutant 2:123b894b49dd 400 __HAL_RCC_GPIOC_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 401 __HAL_RCC_GPIOD_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 402 __HAL_RCC_GPIOE_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 403 __HAL_RCC_GPIOF_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 404 __HAL_RCC_GPIOG_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 405 __HAL_RCC_GPIOH_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 406 __HAL_RCC_GPIOI_CLK_ENABLE();
Jerome Coutant 2:123b894b49dd 407
Jerome Coutant 2:123b894b49dd 408 /* Common GPIO configuration */
Jerome Coutant 2:123b894b49dd 409 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
Jerome Coutant 2:123b894b49dd 410 gpio_init_structure.Pull = GPIO_PULLUP;
Jerome Coutant 2:123b894b49dd 411 gpio_init_structure.Speed = GPIO_SPEED_FAST;
Jerome Coutant 2:123b894b49dd 412 gpio_init_structure.Alternate = GPIO_AF12_FMC;
Jerome Coutant 2:123b894b49dd 413
Jerome Coutant 2:123b894b49dd 414 /* GPIOC configuration : PC0 is SDNWE */
Jerome Coutant 2:123b894b49dd 415 gpio_init_structure.Pin = GPIO_PIN_0;
Jerome Coutant 2:123b894b49dd 416 HAL_GPIO_Init(GPIOC, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 417
Jerome Coutant 2:123b894b49dd 418 /* GPIOD configuration */
Jerome Coutant 2:123b894b49dd 419 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8| GPIO_PIN_9 | GPIO_PIN_10 |\
Jerome Coutant 2:123b894b49dd 420 GPIO_PIN_14 | GPIO_PIN_15;
Jerome Coutant 2:123b894b49dd 421
Jerome Coutant 2:123b894b49dd 422
Jerome Coutant 2:123b894b49dd 423 HAL_GPIO_Init(GPIOD, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 424
Jerome Coutant 2:123b894b49dd 425 /* GPIOE configuration */
Jerome Coutant 2:123b894b49dd 426 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7| GPIO_PIN_8 | GPIO_PIN_9 |\
Jerome Coutant 2:123b894b49dd 427 GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
Jerome Coutant 2:123b894b49dd 428 GPIO_PIN_15;
Jerome Coutant 2:123b894b49dd 429
Jerome Coutant 2:123b894b49dd 430 HAL_GPIO_Init(GPIOE, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 431
Jerome Coutant 2:123b894b49dd 432 /* GPIOF configuration */
Jerome Coutant 2:123b894b49dd 433 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
Jerome Coutant 2:123b894b49dd 434 GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
Jerome Coutant 2:123b894b49dd 435 GPIO_PIN_15;
Jerome Coutant 2:123b894b49dd 436
Jerome Coutant 2:123b894b49dd 437 HAL_GPIO_Init(GPIOF, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 438
Jerome Coutant 2:123b894b49dd 439 /* GPIOG configuration */
Jerome Coutant 2:123b894b49dd 440 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4| GPIO_PIN_5 | GPIO_PIN_8 |\
Jerome Coutant 2:123b894b49dd 441 GPIO_PIN_15;
Jerome Coutant 2:123b894b49dd 442 HAL_GPIO_Init(GPIOG, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 443
Jerome Coutant 2:123b894b49dd 444 /* GPIOH configuration */
Jerome Coutant 2:123b894b49dd 445 gpio_init_structure.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_8 | GPIO_PIN_9 |\
Jerome Coutant 2:123b894b49dd 446 GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
Jerome Coutant 2:123b894b49dd 447 GPIO_PIN_15;
Jerome Coutant 2:123b894b49dd 448 HAL_GPIO_Init(GPIOH, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 449
Jerome Coutant 2:123b894b49dd 450 /* GPIOI configuration */
Jerome Coutant 2:123b894b49dd 451 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 |\
Jerome Coutant 2:123b894b49dd 452 GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_9 | GPIO_PIN_10;
Jerome Coutant 2:123b894b49dd 453 HAL_GPIO_Init(GPIOI, &gpio_init_structure);
Jerome Coutant 2:123b894b49dd 454
Jerome Coutant 2:123b894b49dd 455 /* Configure common DMA parameters */
Jerome Coutant 2:123b894b49dd 456 dma_handle.Init.Channel = SDRAM_DMAx_CHANNEL;
Jerome Coutant 2:123b894b49dd 457 dma_handle.Init.Direction = DMA_MEMORY_TO_MEMORY;
Jerome Coutant 2:123b894b49dd 458 dma_handle.Init.PeriphInc = DMA_PINC_ENABLE;
Jerome Coutant 2:123b894b49dd 459 dma_handle.Init.MemInc = DMA_MINC_ENABLE;
Jerome Coutant 2:123b894b49dd 460 dma_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
Jerome Coutant 2:123b894b49dd 461 dma_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
Jerome Coutant 2:123b894b49dd 462 dma_handle.Init.Mode = DMA_NORMAL;
Jerome Coutant 2:123b894b49dd 463 dma_handle.Init.Priority = DMA_PRIORITY_HIGH;
Jerome Coutant 2:123b894b49dd 464 dma_handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
Jerome Coutant 2:123b894b49dd 465 dma_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
Jerome Coutant 2:123b894b49dd 466 dma_handle.Init.MemBurst = DMA_MBURST_SINGLE;
Jerome Coutant 2:123b894b49dd 467 dma_handle.Init.PeriphBurst = DMA_PBURST_SINGLE;
Jerome Coutant 2:123b894b49dd 468
Jerome Coutant 2:123b894b49dd 469 dma_handle.Instance = SDRAM_DMAx_STREAM;
Jerome Coutant 2:123b894b49dd 470
Jerome Coutant 2:123b894b49dd 471 /* Associate the DMA handle */
Jerome Coutant 2:123b894b49dd 472 __HAL_LINKDMA(hsdram, hdma, dma_handle);
Jerome Coutant 2:123b894b49dd 473
Jerome Coutant 2:123b894b49dd 474 /* Deinitialize the stream for new transfer */
Jerome Coutant 2:123b894b49dd 475 HAL_DMA_DeInit(&dma_handle);
Jerome Coutant 2:123b894b49dd 476
Jerome Coutant 2:123b894b49dd 477 /* Configure the DMA stream */
Jerome Coutant 2:123b894b49dd 478 HAL_DMA_Init(&dma_handle);
Jerome Coutant 2:123b894b49dd 479
Jerome Coutant 2:123b894b49dd 480 /* NVIC configuration for DMA transfer complete interrupt */
Jerome Coutant 2:123b894b49dd 481 HAL_NVIC_SetPriority(SDRAM_DMAx_IRQn, 5, 0);
Jerome Coutant 2:123b894b49dd 482 HAL_NVIC_EnableIRQ(SDRAM_DMAx_IRQn);
Jerome Coutant 2:123b894b49dd 483
Jerome Coutant 2:123b894b49dd 484 } /* of if(hsdram != (SDRAM_HandleTypeDef *)NULL) */
Jerome Coutant 2:123b894b49dd 485 }
Jerome Coutant 2:123b894b49dd 486
Jerome Coutant 2:123b894b49dd 487 /**
Jerome Coutant 2:123b894b49dd 488 * @brief DeInitializes SDRAM MSP.
Jerome Coutant 2:123b894b49dd 489 * @note This function can be surcharged by application code.
Jerome Coutant 2:123b894b49dd 490 * @param hsdram: pointer on SDRAM handle
Jerome Coutant 2:123b894b49dd 491 * @param Params: pointer on additional configuration parameters, can be NULL.
Jerome Coutant 2:123b894b49dd 492 */
Jerome Coutant 2:123b894b49dd 493 __weak void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params)
Jerome Coutant 2:123b894b49dd 494 {
Jerome Coutant 2:123b894b49dd 495 static DMA_HandleTypeDef dma_handle;
Jerome Coutant 2:123b894b49dd 496
Jerome Coutant 2:123b894b49dd 497 if(hsdram != (SDRAM_HandleTypeDef *)NULL)
Jerome Coutant 2:123b894b49dd 498 {
Jerome Coutant 2:123b894b49dd 499 /* Disable NVIC configuration for DMA interrupt */
Jerome Coutant 2:123b894b49dd 500 HAL_NVIC_DisableIRQ(SDRAM_DMAx_IRQn);
Jerome Coutant 2:123b894b49dd 501
Jerome Coutant 2:123b894b49dd 502 /* Deinitialize the stream for new transfer */
Jerome Coutant 2:123b894b49dd 503 dma_handle.Instance = SDRAM_DMAx_STREAM;
Jerome Coutant 2:123b894b49dd 504 HAL_DMA_DeInit(&dma_handle);
Jerome Coutant 2:123b894b49dd 505
Jerome Coutant 2:123b894b49dd 506 /* DeInit GPIO pins can be done in the application
Jerome Coutant 2:123b894b49dd 507 (by surcharging this __weak function) */
Jerome Coutant 2:123b894b49dd 508
Jerome Coutant 2:123b894b49dd 509 /* GPIO pins clock, FMC clock and DMA clock can be shut down in the application
Jerome Coutant 2:123b894b49dd 510 by surcharging this __weak function */
Jerome Coutant 2:123b894b49dd 511
Jerome Coutant 2:123b894b49dd 512 } /* of if(hsdram != (SDRAM_HandleTypeDef *)NULL) */
Jerome Coutant 2:123b894b49dd 513 }
Jerome Coutant 2:123b894b49dd 514
Jerome Coutant 2:123b894b49dd 515 /**
Jerome Coutant 2:123b894b49dd 516 * @}
Jerome Coutant 2:123b894b49dd 517 */
Jerome Coutant 2:123b894b49dd 518
Jerome Coutant 2:123b894b49dd 519 /**
Jerome Coutant 2:123b894b49dd 520 * @}
Jerome Coutant 2:123b894b49dd 521 */
Jerome Coutant 2:123b894b49dd 522
Jerome Coutant 2:123b894b49dd 523 /**
Jerome Coutant 2:123b894b49dd 524 * @}
Jerome Coutant 2:123b894b49dd 525 */
Jerome Coutant 2:123b894b49dd 526
Jerome Coutant 2:123b894b49dd 527 /**
Jerome Coutant 2:123b894b49dd 528 * @}
Jerome Coutant 2:123b894b49dd 529 */
Jerome Coutant 2:123b894b49dd 530
Jerome Coutant 2:123b894b49dd 531 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/