Diff: C12832_lcd.cpp

Revision:

11:045ceacdd1af

Parent:

3:468cdccff7af

Child:

12:a66fded29327

--- a/C12832_lcd.cpp	Wed Dec 05 07:17:51 2012 +0000
+++ b/C12832_lcd.cpp	Sat Jul 16 18:46:12 2016 +0000
@@ -27,9 +27,10 @@
 #define BPP    1       // Bits per pixel
 
 C12832_LCD::C12832_LCD(const char* name)
-    : _spi(p5,NC,p7),_reset(p6),_A0(p8),_CS(p11),GraphicsDisplay(name)
+    : GraphicsDisplay(name), _spi(SPI_MOSI, NC, SPI_SCK), _reset(D7), _A0(D9), _CS(D8)
 {
     orientation = 1;
+    contrast = 23;
     draw_mode = NORMAL;
     char_x = 0;
     lcd_reset();
@@ -37,14 +38,14 @@
 
 int C12832_LCD::width()
 {
-    if (orientation == 0 || orientation == 2) return 32;
+    if (orientation == 0 || orientation == 2) return 64;
     else return 128;
 }
 
 int C12832_LCD::height()
 {
     if (orientation == 0 || orientation == 2) return 128;
-    else return 32;
+    else return 64;
 }
 
 
@@ -99,14 +100,8 @@
 {
     _A0 = 0;
     _CS = 0;
-#if defined TARGET_LPC1768     // fast without mbed lib
-    LPC_SSP1->DR = cmd;
-    do {
-    } while ((LPC_SSP1->SR & 0x10) == 0x10); // wait for SPI1 idle
-#else
     _spi.write(cmd);
-#endif
-_CS = 1;
+    _CS = 1;
 }
 
 // write data to lcd controller
@@ -115,13 +110,7 @@
 {
     _A0 = 1;
     _CS = 0;
-#if defined TARGET_LPC1768     // fast without mbed lib
-    LPC_SSP1->DR = dat;
-    do {
-    } while ((LPC_SSP1->SR & 0x10) == 0x10); // wait for SPI1 idle
-#else
     _spi.write(dat);
-#endif
     _CS = 1;
 }
 
@@ -132,7 +121,6 @@
 
     _spi.format(8,3);                 // 8 bit spi mode 3
     _spi.frequency(20000000);          // 19,2 Mhz SPI clock
-    DigitalOut _reset(p6);
     _A0 = 0;
     _CS = 1;
     _reset = 0;                        // display reset
@@ -159,16 +147,8 @@
 
     wr_cmd(0xA6);     // display normal
 
-    
-#if defined TARGET_LPC1768          //setup DMA channel 0       
-    LPC_SC->PCONP |= (1UL << 29);   // Power up the GPDMA
-    LPC_GPDMA->DMACConfig = 1;      // enable DMA controller
-    LPC_GPDMA->DMACIntTCClear = 0x1;
-    LPC_GPDMA->DMACIntErrClr = 0x1;
-    LPC_GPDMACH0->DMACCLLI = 0;
-#endif
     // clear and update LCD
-    memset(buffer,0x00,512);  // clear display buffer
+    memset(buffer,0x00,1024);  // clear display buffer
     copy_to_lcd();
     auto_up = 1;              // switch on auto update
     claim(stdout);           // redirekt printf to lcd
@@ -181,7 +161,7 @@
 void C12832_LCD::pixel(int x, int y, int color)
 {
     // first check parameter
-    if(x > 128 || y > 32 || x < 0 || y < 0) return;
+    if(x > 128 || y > 64 || x < 0 || y < 0) return;
 
     if(draw_mode == NORMAL) {
         if(color == 0)
@@ -198,116 +178,52 @@
 
 void C12832_LCD::copy_to_lcd(void)
 {
-#ifndef TARGET_LPC1768 
     int i;
-#endif
+
     //page 0
     wr_cmd(0x00);      // set column low nibble 0
     wr_cmd(0x10);      // set column hi  nibble 0
     wr_cmd(0xB0);      // set page address  0
     _A0 = 1;
-#if defined TARGET_LPC1768     
-    _CS = 0;
-    // start 128 byte DMA transfer to SPI1
-    LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
-    LPC_SSP1->DMACR = 0x2;  // Enable SSP1 for DMA.
-    LPC_GPDMA->DMACIntTCClear = 0x1;
-    LPC_GPDMA->DMACIntErrClr = 0x1;
-    LPC_GPDMACH0->DMACCSrcAddr = (uint32_t) (buffer);
-    LPC_GPDMACH0->DMACCControl = 128 | (1UL << 31) |  DMA_CHANNEL_SRC_INC ; // 8 bit transfer , address increment, interrupt
-    LPC_GPDMACH0->DMACCConfig  = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | DMA_DEST_SSP1_TX;
-    LPC_GPDMA->DMACSoftSReq = 0x1;
-    do {
-    } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
-    do {
-    } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
-    _CS = 1;
-#else  // no DMA
-    for(i=0;i<128;i++){
+    
+    for (i=0;i<128;i++) {
         wr_dat(buffer[i]);
-        }
-#endif 
+    }
 
     // page 1
     wr_cmd(0x00);      // set column low nibble 0
     wr_cmd(0x10);      // set column hi  nibble 0
     wr_cmd(0xB1);      // set page address  1
     _A0 = 1;
-#if defined TARGET_LPC1768         
-    _CS = 0;
-    // start 128 byte DMA transfer to SPI1
-    LPC_GPDMA->DMACIntTCClear = 0x1;
-    LPC_GPDMA->DMACIntErrClr = 0x1;
-    LPC_GPDMACH0->DMACCSrcAddr = (uint32_t) (buffer + 128);
-    LPC_GPDMACH0->DMACCControl = 128 | (1UL << 31) |  DMA_CHANNEL_SRC_INC ; // 8 bit transfer , address increment, interrupt
-    LPC_GPDMACH0->DMACCConfig  = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | DMA_DEST_SSP1_TX;
-    LPC_GPDMA->DMACSoftSReq = 0x1;
-    do {
-    } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
-    do {
-    } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
-    _CS = 1;
-#else // no DMA
-    for(i=128;i<256;i++){
+
+    for (i=128;i<256;i++) {
         wr_dat(buffer[i]);
-        }
-#endif     
+    } 
 
     //page 2
     wr_cmd(0x00);      // set column low nibble 0
     wr_cmd(0x10);      // set column hi  nibble 0
     wr_cmd(0xB2);      // set page address  2
     _A0 = 1;
-#if defined TARGET_LPC1768      
-    _CS = 0;
-    // start 128 byte DMA transfer to SPI1
-    LPC_GPDMA->DMACIntTCClear = 0x1;
-    LPC_GPDMA->DMACIntErrClr = 0x1;
-    LPC_GPDMACH0->DMACCSrcAddr = (uint32_t) (buffer + 256);
-    LPC_GPDMACH0->DMACCControl = 128 | (1UL << 31) |  DMA_CHANNEL_SRC_INC ; // 8 bit transfer , address increment, interrupt
-    LPC_GPDMACH0->DMACCConfig  = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | DMA_DEST_SSP1_TX ;
-    LPC_GPDMA->DMACSoftSReq = 0x1;
-    do {
-    } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
-    do {
-    } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
-    _CS = 1;
-#else // no DMA
-    for(i=256;i<384;i++){
+    
+    for (i=256;i<384;i++) {
         wr_dat(buffer[i]);
-        }
-#endif         
+    }        
 
     //page 3
     wr_cmd(0x00);      // set column low nibble 0
     wr_cmd(0x10);      // set column hi  nibble 0
     wr_cmd(0xB3);      // set page address  3
     _A0 = 1;
-    
-     _CS = 0;
-#if defined TARGET_LPC1768     
-    // start 128 byte DMA transfer to SPI1
-    LPC_GPDMA->DMACIntTCClear = 0x1;
-    LPC_GPDMA->DMACIntErrClr = 0x1;
-    LPC_GPDMACH0->DMACCSrcAddr = (uint32_t) (buffer + 384);
-    LPC_GPDMACH0->DMACCControl = 128  | (1UL << 31) |  DMA_CHANNEL_SRC_INC ; // 8 bit transfer , address increment, interrupt
-    LPC_GPDMACH0->DMACCConfig  = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | DMA_DEST_SSP1_TX;
-    LPC_GPDMA->DMACSoftSReq = 0x1;
-    do {
-    } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
-    do {
-    } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
-    _CS = 1;
-#else // no DMA
-    for(i=384;i<512;i++){
+
+    for (i=384;i<512;i++) {
         wr_dat(buffer[i]);
-        }
-#endif   
+    } 
 }
 
 void C12832_LCD::cls(void)
 {
-    memset(buffer,0x00,512);  // clear display buffer
+    memset(buffer,0x00,1024);  // clear display buffer
     copy_to_lcd();
 }