MAX11410 high speed 24-bit Delta-Sigma ADC
Dependents: MAX11410BOB_24bit_ADC MAX11410BOB_Serial_Tester
MAX11410.cpp@35:f94470c95dde, 2020-10-27 (annotated)
- Committer:
- whismanoid
- Date:
- Tue Oct 27 00:53:50 2020 +0000
- Revision:
- 35:f94470c95dde
- Parent:
- 34:1b72865fa71f
improve response time Measure_Voltage (for MAX11410 EMC testing)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
whismanoid | 0:68e64068330f | 1 | // /******************************************************************************* |
whismanoid | 4:c169ba85d673 | 2 | // * Copyright (C) 2020 Maxim Integrated Products, Inc., All Rights Reserved. |
whismanoid | 0:68e64068330f | 3 | // * |
whismanoid | 0:68e64068330f | 4 | // * Permission is hereby granted, free of charge, to any person obtaining a |
whismanoid | 0:68e64068330f | 5 | // * copy of this software and associated documentation files (the "Software"), |
whismanoid | 0:68e64068330f | 6 | // * to deal in the Software without restriction, including without limitation |
whismanoid | 0:68e64068330f | 7 | // * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
whismanoid | 0:68e64068330f | 8 | // * and/or sell copies of the Software, and to permit persons to whom the |
whismanoid | 0:68e64068330f | 9 | // * Software is furnished to do so, subject to the following conditions: |
whismanoid | 0:68e64068330f | 10 | // * |
whismanoid | 0:68e64068330f | 11 | // * The above copyright notice and this permission notice shall be included |
whismanoid | 0:68e64068330f | 12 | // * in all copies or substantial portions of the Software. |
whismanoid | 0:68e64068330f | 13 | // * |
whismanoid | 0:68e64068330f | 14 | // * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
whismanoid | 0:68e64068330f | 15 | // * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
whismanoid | 0:68e64068330f | 16 | // * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
whismanoid | 0:68e64068330f | 17 | // * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
whismanoid | 0:68e64068330f | 18 | // * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
whismanoid | 0:68e64068330f | 19 | // * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
whismanoid | 0:68e64068330f | 20 | // * OTHER DEALINGS IN THE SOFTWARE. |
whismanoid | 0:68e64068330f | 21 | // * |
whismanoid | 0:68e64068330f | 22 | // * Except as contained in this notice, the name of Maxim Integrated |
whismanoid | 0:68e64068330f | 23 | // * Products, Inc. shall not be used except as stated in the Maxim Integrated |
whismanoid | 0:68e64068330f | 24 | // * Products, Inc. Branding Policy. |
whismanoid | 0:68e64068330f | 25 | // * |
whismanoid | 0:68e64068330f | 26 | // * The mere transfer of this software does not imply any licenses |
whismanoid | 0:68e64068330f | 27 | // * of trade secrets, proprietary technology, copyrights, patents, |
whismanoid | 0:68e64068330f | 28 | // * trademarks, maskwork rights, or any other form of intellectual |
whismanoid | 0:68e64068330f | 29 | // * property whatsoever. Maxim Integrated Products, Inc. retains all |
whismanoid | 0:68e64068330f | 30 | // * ownership rights. |
whismanoid | 0:68e64068330f | 31 | // ******************************************************************************* |
whismanoid | 0:68e64068330f | 32 | // */ |
whismanoid | 0:68e64068330f | 33 | // ********************************************************************* |
whismanoid | 0:68e64068330f | 34 | // @file MAX11410.cpp |
whismanoid | 0:68e64068330f | 35 | // ********************************************************************* |
whismanoid | 0:68e64068330f | 36 | // Device Driver file |
whismanoid | 0:68e64068330f | 37 | // DO NOT EDIT; except areas designated "CUSTOMIZE". Automatically generated file. |
whismanoid | 0:68e64068330f | 38 | // generated by XMLSystemOfDevicesToMBED.py |
whismanoid | 0:68e64068330f | 39 | // System Name = ExampleSystem |
whismanoid | 0:68e64068330f | 40 | // System Description = Device driver example |
whismanoid | 0:68e64068330f | 41 | |
whismanoid | 0:68e64068330f | 42 | #include "MAX11410.h" |
whismanoid | 0:68e64068330f | 43 | |
whismanoid | 0:68e64068330f | 44 | // Device Name = MAX11410 |
whismanoid | 0:68e64068330f | 45 | // Device Description = 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC |
whismanoid | 0:68e64068330f | 46 | // Device DeviceBriefDescription = 24-bit 1.9ksps Delta-Sigma ADC |
whismanoid | 0:68e64068330f | 47 | // Device Manufacturer = Maxim Integrated |
whismanoid | 0:68e64068330f | 48 | // Device PartNumber = MAX11410ATI+ |
whismanoid | 0:68e64068330f | 49 | // Device RegValue_Width = DataWidth16bit_HL |
whismanoid | 0:68e64068330f | 50 | // |
whismanoid | 0:68e64068330f | 51 | // ADC MaxOutputDataRate = 1.9ksps |
whismanoid | 0:68e64068330f | 52 | // ADC NumChannels = 10 |
whismanoid | 0:68e64068330f | 53 | // ADC ResolutionBits = 24 |
whismanoid | 0:68e64068330f | 54 | // |
whismanoid | 0:68e64068330f | 55 | // SPI CS = ActiveLow |
whismanoid | 0:68e64068330f | 56 | // SPI FrameStart = CS |
whismanoid | 0:68e64068330f | 57 | // SPI CPOL = 0 |
whismanoid | 0:68e64068330f | 58 | // SPI CPHA = 0 |
whismanoid | 0:68e64068330f | 59 | // SPI MOSI and MISO Data are both stable on Rising edge of SCLK |
whismanoid | 0:68e64068330f | 60 | // SPI SCLK Idle Low |
whismanoid | 0:68e64068330f | 61 | // SPI SCLKMaxMHz = 8 |
whismanoid | 0:68e64068330f | 62 | // SPI SCLKMinMHz = 0 |
whismanoid | 0:68e64068330f | 63 | // |
whismanoid | 0:68e64068330f | 64 | |
whismanoid | 0:68e64068330f | 65 | // CODE GENERATOR: class constructor definition |
whismanoid | 0:68e64068330f | 66 | MAX11410::MAX11410(SPI &spi, DigitalOut &cs_pin, // SPI interface |
whismanoid | 0:68e64068330f | 67 | // CODE GENERATOR: class constructor definition gpio InputPin pins |
whismanoid | 0:68e64068330f | 68 | // CODE GENERATOR: class constructor definition gpio OutputPin pins |
whismanoid | 0:68e64068330f | 69 | // CODE GENERATOR: class constructor definition ic_variant |
whismanoid | 0:68e64068330f | 70 | MAX11410_ic_t ic_variant) |
whismanoid | 0:68e64068330f | 71 | // CODE GENERATOR: class constructor initializer list |
whismanoid | 0:68e64068330f | 72 | : m_spi(spi), m_cs_pin(cs_pin), // SPI interface |
whismanoid | 0:68e64068330f | 73 | // CODE GENERATOR: class constructor initializer list gpio InputPin pins |
whismanoid | 0:68e64068330f | 74 | // CODE GENERATOR: class constructor initializer list gpio OutputPin pins |
whismanoid | 0:68e64068330f | 75 | // CODE GENERATOR: class constructor initializer list ic_variant |
whismanoid | 0:68e64068330f | 76 | m_ic_variant(ic_variant) |
whismanoid | 0:68e64068330f | 77 | { |
whismanoid | 0:68e64068330f | 78 | // CODE GENERATOR: class constructor definition SPI interface initialization |
whismanoid | 0:68e64068330f | 79 | // |
whismanoid | 0:68e64068330f | 80 | // SPI CS = ActiveLow |
whismanoid | 0:68e64068330f | 81 | // SPI FrameStart = CS |
whismanoid | 0:68e64068330f | 82 | m_SPI_cs_state = 1; |
whismanoid | 13:df96a784cda6 | 83 | if (m_cs_pin.is_connected()) { // avoid mbed runtime error if pin is NC not connected |
whismanoid | 13:df96a784cda6 | 84 | m_cs_pin = m_SPI_cs_state; |
whismanoid | 13:df96a784cda6 | 85 | } |
whismanoid | 0:68e64068330f | 86 | |
whismanoid | 0:68e64068330f | 87 | // SPI CPOL = 0 |
whismanoid | 0:68e64068330f | 88 | // SPI CPHA = 0 |
whismanoid | 0:68e64068330f | 89 | // SPI MOSI and MISO Data are both stable on Rising edge of SCLK |
whismanoid | 0:68e64068330f | 90 | // SPI SCLK Idle Low |
whismanoid | 0:68e64068330f | 91 | m_SPI_dataMode = 0; //SPI_MODE0; // CPOL=0,CPHA=0: Rising Edge stable; SCLK idle Low |
whismanoid | 0:68e64068330f | 92 | m_spi.format(8,m_SPI_dataMode); // int bits_must_be_8, int mode=0_3 CPOL=0,CPHA=0 |
whismanoid | 0:68e64068330f | 93 | |
whismanoid | 0:68e64068330f | 94 | // SPI SCLKMaxMHz = 8 |
whismanoid | 0:68e64068330f | 95 | // SPI SCLKMinMHz = 0 |
whismanoid | 0:68e64068330f | 96 | //#define SPI_SCLK_Hz 48000000 // 48MHz |
whismanoid | 0:68e64068330f | 97 | //#define SPI_SCLK_Hz 24000000 // 24MHz |
whismanoid | 0:68e64068330f | 98 | //#define SPI_SCLK_Hz 12000000 // 12MHz |
whismanoid | 0:68e64068330f | 99 | //#define SPI_SCLK_Hz 6000000 // 6MHz |
whismanoid | 0:68e64068330f | 100 | //#define SPI_SCLK_Hz 4000000 // 4MHz |
whismanoid | 0:68e64068330f | 101 | //#define SPI_SCLK_Hz 2000000 // 2MHz |
whismanoid | 0:68e64068330f | 102 | //#define SPI_SCLK_Hz 1000000 // 1MHz |
whismanoid | 0:68e64068330f | 103 | m_SPI_SCLK_Hz = 8000000; // 8MHz; MAX11410 limit is 8MHz |
whismanoid | 0:68e64068330f | 104 | m_spi.frequency(m_SPI_SCLK_Hz); |
whismanoid | 0:68e64068330f | 105 | |
whismanoid | 0:68e64068330f | 106 | } |
whismanoid | 0:68e64068330f | 107 | |
whismanoid | 0:68e64068330f | 108 | // CODE GENERATOR: class destructor definition |
whismanoid | 0:68e64068330f | 109 | MAX11410::~MAX11410() |
whismanoid | 0:68e64068330f | 110 | { |
whismanoid | 0:68e64068330f | 111 | // do nothing |
whismanoid | 0:68e64068330f | 112 | } |
whismanoid | 0:68e64068330f | 113 | |
whismanoid | 0:68e64068330f | 114 | // CODE GENERATOR: spi_frequency setter definition |
whismanoid | 0:68e64068330f | 115 | /// set SPI SCLK frequency |
whismanoid | 0:68e64068330f | 116 | void MAX11410::spi_frequency(int spi_sclk_Hz) |
whismanoid | 0:68e64068330f | 117 | { |
whismanoid | 0:68e64068330f | 118 | m_SPI_SCLK_Hz = spi_sclk_Hz; |
whismanoid | 0:68e64068330f | 119 | m_spi.frequency(m_SPI_SCLK_Hz); |
whismanoid | 0:68e64068330f | 120 | } |
whismanoid | 0:68e64068330f | 121 | |
whismanoid | 0:68e64068330f | 122 | // CODE GENERATOR: omit global g_MAX11410_device |
whismanoid | 0:68e64068330f | 123 | // CODE GENERATOR: extern function declarations |
whismanoid | 0:68e64068330f | 124 | // CODE GENERATOR: extern function requirement MAX11410::SPIoutputCS |
whismanoid | 0:68e64068330f | 125 | // Assert SPI Chip Select |
whismanoid | 0:68e64068330f | 126 | // SPI chip-select for MAX11410 |
whismanoid | 0:68e64068330f | 127 | // |
whismanoid | 12:daecd93dd33a | 128 | inline void MAX11410::SPIoutputCS(int isLogicHigh) |
whismanoid | 0:68e64068330f | 129 | { |
whismanoid | 0:68e64068330f | 130 | // CODE GENERATOR: extern function definition for function SPIoutputCS |
whismanoid | 0:68e64068330f | 131 | // CODE GENERATOR: extern function definition for standard SPI interface function SPIoutputCS(int isLogicHigh) |
whismanoid | 0:68e64068330f | 132 | m_SPI_cs_state = isLogicHigh; |
whismanoid | 13:df96a784cda6 | 133 | if (m_cs_pin.is_connected()) { // avoid mbed runtime error if pin is NC not connected |
whismanoid | 13:df96a784cda6 | 134 | m_cs_pin = m_SPI_cs_state; |
whismanoid | 13:df96a784cda6 | 135 | } |
whismanoid | 0:68e64068330f | 136 | } |
whismanoid | 0:68e64068330f | 137 | |
whismanoid | 0:68e64068330f | 138 | // CODE GENERATOR: extern function requirement MAX11410::SPIwrite16bits |
whismanoid | 0:68e64068330f | 139 | // SPI write 16 bits |
whismanoid | 0:68e64068330f | 140 | // SPI interface to MAX11410 shift 16 bits mosiData into MAX11410 DIN |
whismanoid | 0:68e64068330f | 141 | // |
whismanoid | 0:68e64068330f | 142 | void MAX11410::SPIwrite16bits(int16_t mosiData16) |
whismanoid | 0:68e64068330f | 143 | { |
whismanoid | 0:68e64068330f | 144 | // CODE GENERATOR: extern function definition for function SPIwrite16bits |
whismanoid | 0:68e64068330f | 145 | // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIwrite16bits(int16_t mosiData16) |
whismanoid | 0:68e64068330f | 146 | size_t byteCount = 2; |
whismanoid | 0:68e64068330f | 147 | static char mosiData[2]; |
whismanoid | 0:68e64068330f | 148 | static char misoData[2]; |
whismanoid | 0:68e64068330f | 149 | mosiData[0] = (char)((mosiData16 >> 8) & 0xFF); // MSByte |
whismanoid | 0:68e64068330f | 150 | mosiData[1] = (char)((mosiData16 >> 0) & 0xFF); // LSByte |
whismanoid | 0:68e64068330f | 151 | // |
whismanoid | 0:68e64068330f | 152 | // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts() |
whismanoid | 0:68e64068330f | 153 | //~ noInterrupts(); |
whismanoid | 0:68e64068330f | 154 | // |
whismanoid | 0:68e64068330f | 155 | //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin |
whismanoid | 0:68e64068330f | 156 | // |
whismanoid | 0:68e64068330f | 157 | unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount); |
whismanoid | 0:68e64068330f | 158 | //~ m_spi.transfer(mosiData8_FF0000); |
whismanoid | 0:68e64068330f | 159 | //~ m_spi.transfer(mosiData16_00FF00); |
whismanoid | 0:68e64068330f | 160 | //~ m_spi.transfer(mosiData16_0000FF); |
whismanoid | 0:68e64068330f | 161 | // |
whismanoid | 0:68e64068330f | 162 | //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin |
whismanoid | 0:68e64068330f | 163 | // |
whismanoid | 0:68e64068330f | 164 | // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts() |
whismanoid | 0:68e64068330f | 165 | //~ interrupts(); |
whismanoid | 0:68e64068330f | 166 | // Optional Diagnostic function to print SPI transactions |
whismanoid | 0:68e64068330f | 167 | if (onSPIprint) |
whismanoid | 0:68e64068330f | 168 | { |
whismanoid | 0:68e64068330f | 169 | onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData); |
whismanoid | 0:68e64068330f | 170 | } |
whismanoid | 0:68e64068330f | 171 | // |
whismanoid | 0:68e64068330f | 172 | // VERIFY: SPIwrite24bits print diagnostic information |
whismanoid | 0:68e64068330f | 173 | //cmdLine.serial().printf(" MOSI->")); |
whismanoid | 0:68e64068330f | 174 | //cmdLine.serial().printf(" 0x")); |
whismanoid | 0:68e64068330f | 175 | //Serial.print( (mosiData8_FF0000 & 0xFF), HEX); |
whismanoid | 0:68e64068330f | 176 | //cmdLine.serial().printf(" 0x")); |
whismanoid | 0:68e64068330f | 177 | //Serial.print( (mosiData16_00FF00 & 0xFF), HEX); |
whismanoid | 0:68e64068330f | 178 | //cmdLine.serial().printf(" 0x")); |
whismanoid | 0:68e64068330f | 179 | //Serial.print( (mosiData16_0000FF & 0xFF), HEX); |
whismanoid | 0:68e64068330f | 180 | // hex dump mosiData[0..byteCount-1] |
whismanoid | 0:68e64068330f | 181 | #if 0 // HAS_MICROUSBSERIAL |
whismanoid | 0:68e64068330f | 182 | cmdLine_microUSBserial.serial().printf("\r\nSPI"); |
whismanoid | 0:68e64068330f | 183 | if (byteCount > 7) { |
whismanoid | 0:68e64068330f | 184 | cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount); |
whismanoid | 0:68e64068330f | 185 | } |
whismanoid | 0:68e64068330f | 186 | cmdLine_microUSBserial.serial().printf(" MOSI->"); |
whismanoid | 0:68e64068330f | 187 | for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++) |
whismanoid | 0:68e64068330f | 188 | { |
whismanoid | 0:68e64068330f | 189 | cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]); |
whismanoid | 0:68e64068330f | 190 | } |
whismanoid | 0:68e64068330f | 191 | // hex dump misoData[0..byteCount-1] |
whismanoid | 25:c4be3afbfafd | 192 | cmdLine_microUSBserial.serial().printf(" MISO<-"); |
whismanoid | 0:68e64068330f | 193 | for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++) |
whismanoid | 0:68e64068330f | 194 | { |
whismanoid | 0:68e64068330f | 195 | cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]); |
whismanoid | 0:68e64068330f | 196 | } |
whismanoid | 0:68e64068330f | 197 | cmdLine_microUSBserial.serial().printf(" "); |
whismanoid | 0:68e64068330f | 198 | #endif |
whismanoid | 0:68e64068330f | 199 | #if 0 // HAS_DAPLINK_SERIAL |
whismanoid | 0:68e64068330f | 200 | cmdLine_DAPLINKserial.serial().printf("\r\nSPI"); |
whismanoid | 0:68e64068330f | 201 | if (byteCount > 7) { |
whismanoid | 0:68e64068330f | 202 | cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount); |
whismanoid | 0:68e64068330f | 203 | } |
whismanoid | 0:68e64068330f | 204 | cmdLine_DAPLINKserial.serial().printf(" MOSI->"); |
whismanoid | 0:68e64068330f | 205 | for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++) |
whismanoid | 0:68e64068330f | 206 | { |
whismanoid | 0:68e64068330f | 207 | cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]); |
whismanoid | 0:68e64068330f | 208 | } |
whismanoid | 0:68e64068330f | 209 | // hex dump misoData[0..byteCount-1] |
whismanoid | 25:c4be3afbfafd | 210 | cmdLine_DAPLINKserial.serial().printf(" MISO<-"); |
whismanoid | 0:68e64068330f | 211 | for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++) |
whismanoid | 0:68e64068330f | 212 | { |
whismanoid | 0:68e64068330f | 213 | cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]); |
whismanoid | 0:68e64068330f | 214 | } |
whismanoid | 0:68e64068330f | 215 | cmdLine_DAPLINKserial.serial().printf(" "); |
whismanoid | 0:68e64068330f | 216 | #endif |
whismanoid | 0:68e64068330f | 217 | // VERIFY: DIAGNOSTIC: print MAX5715 device register write |
whismanoid | 0:68e64068330f | 218 | // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF); |
whismanoid | 0:68e64068330f | 219 | // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF); |
whismanoid | 0:68e64068330f | 220 | // |
whismanoid | 0:68e64068330f | 221 | // int misoData16 = (misoData16_FF00 << 8) | misoData16_00FF; |
whismanoid | 0:68e64068330f | 222 | // return misoData16; |
whismanoid | 0:68e64068330f | 223 | } |
whismanoid | 0:68e64068330f | 224 | |
whismanoid | 0:68e64068330f | 225 | // CODE GENERATOR: extern function requirement MAX11410::SPIreadWrite16bits |
whismanoid | 0:68e64068330f | 226 | // SPI read and write 16 bits |
whismanoid | 0:68e64068330f | 227 | // SPI interface to MAX11410 shift 16 bits mosiData16 into MAX11410 DIN |
whismanoid | 0:68e64068330f | 228 | // while simultaneously capturing 16 bits miso data from MAX11410 DOUT |
whismanoid | 0:68e64068330f | 229 | // |
whismanoid | 0:68e64068330f | 230 | int16_t MAX11410::SPIreadWrite16bits(int16_t mosiData16) |
whismanoid | 0:68e64068330f | 231 | { |
whismanoid | 0:68e64068330f | 232 | // CODE GENERATOR: extern function definition for function SPIreadWrite16bits |
whismanoid | 0:68e64068330f | 233 | // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIreadWrite16bits(int16_t mosiData16) |
whismanoid | 0:68e64068330f | 234 | size_t byteCount = 2; |
whismanoid | 0:68e64068330f | 235 | static char mosiData[2]; |
whismanoid | 0:68e64068330f | 236 | static char misoData[2]; |
whismanoid | 0:68e64068330f | 237 | mosiData[0] = (char)((mosiData16 >> 8) & 0xFF); // MSByte |
whismanoid | 0:68e64068330f | 238 | mosiData[1] = (char)((mosiData16 >> 0) & 0xFF); // LSByte |
whismanoid | 0:68e64068330f | 239 | // |
whismanoid | 0:68e64068330f | 240 | // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts() |
whismanoid | 0:68e64068330f | 241 | //~ noInterrupts(); |
whismanoid | 0:68e64068330f | 242 | // |
whismanoid | 0:68e64068330f | 243 | //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin |
whismanoid | 0:68e64068330f | 244 | // |
whismanoid | 0:68e64068330f | 245 | unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount); |
whismanoid | 0:68e64068330f | 246 | //~ m_spi.transfer(mosiData8_FF0000); |
whismanoid | 0:68e64068330f | 247 | //~ m_spi.transfer(mosiData16_00FF00); |
whismanoid | 0:68e64068330f | 248 | //~ m_spi.transfer(mosiData16_0000FF); |
whismanoid | 0:68e64068330f | 249 | // |
whismanoid | 0:68e64068330f | 250 | //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin |
whismanoid | 0:68e64068330f | 251 | // |
whismanoid | 0:68e64068330f | 252 | // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts() |
whismanoid | 0:68e64068330f | 253 | //~ interrupts(); |
whismanoid | 0:68e64068330f | 254 | // Optional Diagnostic function to print SPI transactions |
whismanoid | 0:68e64068330f | 255 | if (onSPIprint) |
whismanoid | 0:68e64068330f | 256 | { |
whismanoid | 0:68e64068330f | 257 | onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData); |
whismanoid | 0:68e64068330f | 258 | } |
whismanoid | 0:68e64068330f | 259 | // |
whismanoid | 0:68e64068330f | 260 | // VERIFY: SPIwrite24bits print diagnostic information |
whismanoid | 0:68e64068330f | 261 | //cmdLine.serial().printf(" MOSI->")); |
whismanoid | 0:68e64068330f | 262 | //cmdLine.serial().printf(" 0x")); |
whismanoid | 0:68e64068330f | 263 | //Serial.print( (mosiData8_FF0000 & 0xFF), HEX); |
whismanoid | 0:68e64068330f | 264 | //cmdLine.serial().printf(" 0x")); |
whismanoid | 0:68e64068330f | 265 | //Serial.print( (mosiData16_00FF00 & 0xFF), HEX); |
whismanoid | 0:68e64068330f | 266 | //cmdLine.serial().printf(" 0x")); |
whismanoid | 0:68e64068330f | 267 | //Serial.print( (mosiData16_0000FF & 0xFF), HEX); |
whismanoid | 0:68e64068330f | 268 | // hex dump mosiData[0..byteCount-1] |
whismanoid | 0:68e64068330f | 269 | #if 0 // HAS_MICROUSBSERIAL |
whismanoid | 0:68e64068330f | 270 | cmdLine_microUSBserial.serial().printf("\r\nSPI"); |
whismanoid | 0:68e64068330f | 271 | if (byteCount > 7) { |
whismanoid | 0:68e64068330f | 272 | cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount); |
whismanoid | 0:68e64068330f | 273 | } |
whismanoid | 0:68e64068330f | 274 | cmdLine_microUSBserial.serial().printf(" MOSI->"); |
whismanoid | 0:68e64068330f | 275 | for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++) |
whismanoid | 0:68e64068330f | 276 | { |
whismanoid | 0:68e64068330f | 277 | cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]); |
whismanoid | 0:68e64068330f | 278 | } |
whismanoid | 0:68e64068330f | 279 | // hex dump misoData[0..byteCount-1] |
whismanoid | 25:c4be3afbfafd | 280 | cmdLine_microUSBserial.serial().printf(" MISO<-"); |
whismanoid | 0:68e64068330f | 281 | for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++) |
whismanoid | 0:68e64068330f | 282 | { |
whismanoid | 0:68e64068330f | 283 | cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]); |
whismanoid | 0:68e64068330f | 284 | } |
whismanoid | 0:68e64068330f | 285 | cmdLine_microUSBserial.serial().printf(" "); |
whismanoid | 0:68e64068330f | 286 | #endif |
whismanoid | 0:68e64068330f | 287 | #if 0 // HAS_DAPLINK_SERIAL |
whismanoid | 0:68e64068330f | 288 | cmdLine_DAPLINKserial.serial().printf("\r\nSPI"); |
whismanoid | 0:68e64068330f | 289 | if (byteCount > 7) { |
whismanoid | 0:68e64068330f | 290 | cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount); |
whismanoid | 0:68e64068330f | 291 | } |
whismanoid | 0:68e64068330f | 292 | cmdLine_DAPLINKserial.serial().printf(" MOSI->"); |
whismanoid | 0:68e64068330f | 293 | for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++) |
whismanoid | 0:68e64068330f | 294 | { |
whismanoid | 0:68e64068330f | 295 | cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]); |
whismanoid | 0:68e64068330f | 296 | } |
whismanoid | 0:68e64068330f | 297 | // hex dump misoData[0..byteCount-1] |
whismanoid | 25:c4be3afbfafd | 298 | cmdLine_DAPLINKserial.serial().printf(" MISO<-"); |
whismanoid | 0:68e64068330f | 299 | for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++) |
whismanoid | 0:68e64068330f | 300 | { |
whismanoid | 0:68e64068330f | 301 | cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]); |
whismanoid | 0:68e64068330f | 302 | } |
whismanoid | 0:68e64068330f | 303 | cmdLine_DAPLINKserial.serial().printf(" "); |
whismanoid | 0:68e64068330f | 304 | #endif |
whismanoid | 0:68e64068330f | 305 | // VERIFY: DIAGNOSTIC: print MAX5715 device register write |
whismanoid | 0:68e64068330f | 306 | // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF); |
whismanoid | 0:68e64068330f | 307 | // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF); |
whismanoid | 0:68e64068330f | 308 | // |
whismanoid | 0:68e64068330f | 309 | //int misoData16 = (misoData16_FF00 << 8) | misoData16_00FF; |
whismanoid | 0:68e64068330f | 310 | int misoData16 = (misoData[0] << 8) | misoData[1]; |
whismanoid | 0:68e64068330f | 311 | return misoData16; |
whismanoid | 0:68e64068330f | 312 | } |
whismanoid | 0:68e64068330f | 313 | |
whismanoid | 0:68e64068330f | 314 | // CODE GENERATOR: extern function requirement MAX11410::SPIreadWrite32bits |
whismanoid | 0:68e64068330f | 315 | // SPI read and write 32 bits |
whismanoid | 0:68e64068330f | 316 | // SPI interface to MAX11410 shift 32 bits mosiData into MAX11410 DIN |
whismanoid | 0:68e64068330f | 317 | // while simultaneously capturing 32 bits miso data from MAX11410 DOUT |
whismanoid | 0:68e64068330f | 318 | // |
whismanoid | 0:68e64068330f | 319 | int32_t MAX11410::SPIreadWrite32bits(int32_t mosiData32) |
whismanoid | 0:68e64068330f | 320 | { |
whismanoid | 0:68e64068330f | 321 | // CODE GENERATOR: extern function definition for function SPIreadWrite32bits |
whismanoid | 0:68e64068330f | 322 | // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIreadWrite32bits(int32_t mosiData32) |
whismanoid | 0:68e64068330f | 323 | size_t byteCount = 4; |
whismanoid | 0:68e64068330f | 324 | static char mosiData[4]; |
whismanoid | 0:68e64068330f | 325 | static char misoData[4]; |
whismanoid | 0:68e64068330f | 326 | mosiData[0] = (char)((mosiData32 >> 24) & 0xFF); // MSByte |
whismanoid | 0:68e64068330f | 327 | mosiData[1] = (char)((mosiData32 >> 16) & 0xFF); |
whismanoid | 0:68e64068330f | 328 | mosiData[2] = (char)((mosiData32 >> 8) & 0xFF); |
whismanoid | 0:68e64068330f | 329 | mosiData[3] = (char)((mosiData32 >> 0) & 0xFF); // LSByte |
whismanoid | 0:68e64068330f | 330 | // |
whismanoid | 0:68e64068330f | 331 | // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts() |
whismanoid | 0:68e64068330f | 332 | //~ noInterrupts(); |
whismanoid | 0:68e64068330f | 333 | // |
whismanoid | 0:68e64068330f | 334 | //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin |
whismanoid | 0:68e64068330f | 335 | // |
whismanoid | 0:68e64068330f | 336 | unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount); |
whismanoid | 0:68e64068330f | 337 | //~ m_spi.transfer(mosiData8_FF0000); |
whismanoid | 0:68e64068330f | 338 | //~ m_spi.transfer(mosiData16_00FF00); |
whismanoid | 0:68e64068330f | 339 | //~ m_spi.transfer(mosiData16_0000FF); |
whismanoid | 0:68e64068330f | 340 | // |
whismanoid | 0:68e64068330f | 341 | //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin |
whismanoid | 0:68e64068330f | 342 | // |
whismanoid | 0:68e64068330f | 343 | // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts() |
whismanoid | 0:68e64068330f | 344 | //~ interrupts(); |
whismanoid | 0:68e64068330f | 345 | // Optional Diagnostic function to print SPI transactions |
whismanoid | 0:68e64068330f | 346 | if (onSPIprint) |
whismanoid | 0:68e64068330f | 347 | { |
whismanoid | 0:68e64068330f | 348 | onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData); |
whismanoid | 0:68e64068330f | 349 | } |
whismanoid | 0:68e64068330f | 350 | // |
whismanoid | 0:68e64068330f | 351 | // VERIFY: SPIwrite24bits print diagnostic information |
whismanoid | 0:68e64068330f | 352 | //cmdLine.serial().printf(" MOSI->")); |
whismanoid | 0:68e64068330f | 353 | //cmdLine.serial().printf(" 0x")); |
whismanoid | 0:68e64068330f | 354 | //Serial.print( (mosiData8_FF0000 & 0xFF), HEX); |
whismanoid | 0:68e64068330f | 355 | //cmdLine.serial().printf(" 0x")); |
whismanoid | 0:68e64068330f | 356 | //Serial.print( (mosiData16_00FF00 & 0xFF), HEX); |
whismanoid | 0:68e64068330f | 357 | //cmdLine.serial().printf(" 0x")); |
whismanoid | 0:68e64068330f | 358 | //Serial.print( (mosiData16_0000FF & 0xFF), HEX); |
whismanoid | 0:68e64068330f | 359 | // hex dump mosiData[0..byteCount-1] |
whismanoid | 0:68e64068330f | 360 | #if 0 // HAS_MICROUSBSERIAL |
whismanoid | 0:68e64068330f | 361 | cmdLine_microUSBserial.serial().printf("\r\nSPI"); |
whismanoid | 0:68e64068330f | 362 | if (byteCount > 7) { |
whismanoid | 0:68e64068330f | 363 | cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount); |
whismanoid | 0:68e64068330f | 364 | } |
whismanoid | 0:68e64068330f | 365 | cmdLine_microUSBserial.serial().printf(" MOSI->"); |
whismanoid | 0:68e64068330f | 366 | for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++) |
whismanoid | 0:68e64068330f | 367 | { |
whismanoid | 0:68e64068330f | 368 | cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]); |
whismanoid | 0:68e64068330f | 369 | } |
whismanoid | 0:68e64068330f | 370 | // hex dump misoData[0..byteCount-1] |
whismanoid | 25:c4be3afbfafd | 371 | cmdLine_microUSBserial.serial().printf(" MISO<-"); |
whismanoid | 0:68e64068330f | 372 | for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++) |
whismanoid | 0:68e64068330f | 373 | { |
whismanoid | 0:68e64068330f | 374 | cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]); |
whismanoid | 0:68e64068330f | 375 | } |
whismanoid | 0:68e64068330f | 376 | cmdLine_microUSBserial.serial().printf(" "); |
whismanoid | 0:68e64068330f | 377 | #endif |
whismanoid | 0:68e64068330f | 378 | #if 0 // HAS_DAPLINK_SERIAL |
whismanoid | 0:68e64068330f | 379 | cmdLine_DAPLINKserial.serial().printf("\r\nSPI"); |
whismanoid | 0:68e64068330f | 380 | if (byteCount > 7) { |
whismanoid | 0:68e64068330f | 381 | cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount); |
whismanoid | 0:68e64068330f | 382 | } |
whismanoid | 0:68e64068330f | 383 | cmdLine_DAPLINKserial.serial().printf(" MOSI->"); |
whismanoid | 0:68e64068330f | 384 | for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++) |
whismanoid | 0:68e64068330f | 385 | { |
whismanoid | 0:68e64068330f | 386 | cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]); |
whismanoid | 0:68e64068330f | 387 | } |
whismanoid | 0:68e64068330f | 388 | // hex dump misoData[0..byteCount-1] |
whismanoid | 25:c4be3afbfafd | 389 | cmdLine_DAPLINKserial.serial().printf(" MISO<-"); |
whismanoid | 0:68e64068330f | 390 | for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++) |
whismanoid | 0:68e64068330f | 391 | { |
whismanoid | 0:68e64068330f | 392 | cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]); |
whismanoid | 0:68e64068330f | 393 | } |
whismanoid | 0:68e64068330f | 394 | cmdLine_DAPLINKserial.serial().printf(" "); |
whismanoid | 0:68e64068330f | 395 | #endif |
whismanoid | 0:68e64068330f | 396 | // VERIFY: DIAGNOSTIC: print MAX5715 device register write |
whismanoid | 0:68e64068330f | 397 | // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF); |
whismanoid | 0:68e64068330f | 398 | // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF); |
whismanoid | 0:68e64068330f | 399 | // |
whismanoid | 0:68e64068330f | 400 | //int misoData32 = (misoData32_FF000000 << 24) | (misoData32_FF0000 << 16) | (misoData32_0000FF00 << 8) | misoData32_000000FF; |
whismanoid | 0:68e64068330f | 401 | int misoData32 = (misoData[0] << 24) | (misoData[1] << 16) | (misoData[2] << 8) | misoData[3]; |
whismanoid | 0:68e64068330f | 402 | return misoData32; |
whismanoid | 0:68e64068330f | 403 | } |
whismanoid | 0:68e64068330f | 404 | |
whismanoid | 0:68e64068330f | 405 | // CODE GENERATOR: class member function definitions |
whismanoid | 0:68e64068330f | 406 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 407 | // Menu item '!' |
whismanoid | 0:68e64068330f | 408 | // Initialize device |
whismanoid | 19:50cf5da53d36 | 409 | // |
whismanoid | 19:50cf5da53d36 | 410 | // @test Init() expect 1 |
whismanoid | 19:50cf5da53d36 | 411 | // |
whismanoid | 29:a677458ac250 | 412 | // @test group POR // verify initial register values |
whismanoid | 27:1cb6c42c6a93 | 413 | // @test group PORverbose // verify initial register values |
whismanoid | 27:1cb6c42c6a93 | 414 | // @test group PORverbose tinyTester.print("PART_ID value") |
whismanoid | 22:c6812214a933 | 415 | // @test group POR RegRead(MAX11410::CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID, buffer) expect 1 expect-buffer 0x000F02 |
whismanoid | 20:fb7527415308 | 416 | // |
whismanoid | 27:1cb6c42c6a93 | 417 | // @test group PORverbose tinyTester.print("POR value 0x04 CMD_r000_0100_dddd_xddd_GP0_CTRL") |
whismanoid | 22:c6812214a933 | 418 | // @test group POR RegRead(MAX11410::CMD_r000_0100_dddd_xddd_GP0_CTRL, buffer) expect 1 expect-buffer 0x00 |
whismanoid | 20:fb7527415308 | 419 | // |
whismanoid | 27:1cb6c42c6a93 | 420 | // @test group PORverbose tinyTester.print("POR value 0x05 CMD_r000_0101_dddd_xddd_GP1_CTRL") |
whismanoid | 22:c6812214a933 | 421 | // @test group POR RegRead(MAX11410::CMD_r000_0101_dddd_xddd_GP1_CTRL, buffer) expect 1 expect-buffer 0x00 |
whismanoid | 20:fb7527415308 | 422 | // |
whismanoid | 27:1cb6c42c6a93 | 423 | // @test group PORverbose tinyTester.print("POR value 0x07 CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR") |
whismanoid | 22:c6812214a933 | 424 | // @test group POR RegRead(MAX11410::CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR, buffer) expect 1 expect-buffer 0x00003a |
whismanoid | 19:50cf5da53d36 | 425 | // |
whismanoid | 27:1cb6c42c6a93 | 426 | // @test group PORverbose tinyTester.print("POR value 0x08 CMD_r000_1000_x0dd_dddd_FILTER") |
whismanoid | 22:c6812214a933 | 427 | // @test group POR RegRead(MAX11410::CMD_r000_1000_x0dd_dddd_FILTER, buffer) expect 1 expect-buffer 0x00 |
whismanoid | 20:fb7527415308 | 428 | // |
whismanoid | 27:1cb6c42c6a93 | 429 | // @test group PORverbose tinyTester.print("POR value 0x09 CMD_r000_1001_dddd_dddd_CTRL") |
whismanoid | 22:c6812214a933 | 430 | // @test group POR RegRead(MAX11410::CMD_r000_1001_dddd_dddd_CTRL, buffer) expect 1 expect-buffer 0x000001 |
whismanoid | 20:fb7527415308 | 431 | // |
whismanoid | 27:1cb6c42c6a93 | 432 | // @test group PORverbose tinyTester.print("POR value 0x0a CMD_r000_1010_dddd_dddd_SOURCE") |
whismanoid | 22:c6812214a933 | 433 | // @test group POR RegRead(MAX11410::CMD_r000_1010_dddd_dddd_SOURCE, buffer) expect 1 expect-buffer 0x00 |
whismanoid | 20:fb7527415308 | 434 | // |
whismanoid | 27:1cb6c42c6a93 | 435 | // @test group PORverbose tinyTester.print("POR value 0x0b CMD_r000_1011_dddd_dddd_MUX_CTRL0") |
whismanoid | 22:c6812214a933 | 436 | // @test group POR RegRead(MAX11410::CMD_r000_1011_dddd_dddd_MUX_CTRL0, buffer) expect 1 expect-buffer 0x0000ff |
whismanoid | 20:fb7527415308 | 437 | // |
whismanoid | 27:1cb6c42c6a93 | 438 | // @test group PORverbose tinyTester.print("POR value 0x0c CMD_r000_1100_dddd_dddd_MUX_CTRL1") |
whismanoid | 22:c6812214a933 | 439 | // @test group POR RegRead(MAX11410::CMD_r000_1100_dddd_dddd_MUX_CTRL1, buffer) expect 1 expect-buffer 0x0000ff |
whismanoid | 20:fb7527415308 | 440 | // |
whismanoid | 27:1cb6c42c6a93 | 441 | // @test group PORverbose tinyTester.print("POR value 0x0d CMD_r000_1101_dddd_dddd_MUX_CTRL2") |
whismanoid | 22:c6812214a933 | 442 | // @test group POR RegRead(MAX11410::CMD_r000_1101_dddd_dddd_MUX_CTRL2, buffer) expect 1 expect-buffer 0x00 |
whismanoid | 20:fb7527415308 | 443 | // |
whismanoid | 27:1cb6c42c6a93 | 444 | // @test group PORverbose tinyTester.print("POR value 0x0e CMD_r000_1110_00ss_0ggg_PGA") |
whismanoid | 23:22e7830bcccb | 445 | // @test group POR RegRead(MAX11410::CMD_r000_1110_00ss_0ggg_PGA, buffer) expect 1 expect-buffer 0x00 |
whismanoid | 20:fb7527415308 | 446 | // |
whismanoid | 20:fb7527415308 | 447 | // @future test CMD_r000_1111_dddd_dddd_WAIT_EXT = 0x0f, //!< 0b0001111 |
whismanoid | 20:fb7527415308 | 448 | // @future test CMD_r001_0000_xxxx_xxxx_WAIT_START = 0x10, //!< 0b0010000 |
whismanoid | 20:fb7527415308 | 449 | // |
whismanoid | 27:1cb6c42c6a93 | 450 | // @test group RES1KA2A3TOGND // measure a 1kohm resistor between (AIN2,AIN3) and AGND to verify ref2_v (disabled by default) |
whismanoid | 27:1cb6c42c6a93 | 451 | // @test group RES1KA2A3TOGNDMORE // measure a 1kohm resistor between (AIN2,AIN3) and AGND to verify ref2_v in more detail |
whismanoid | 27:1cb6c42c6a93 | 452 | // @test group RES1KA2A3TOGNDMORE tinyTester.print("measure a 1kohm resistor between (AIN2,AIN3) and AGND to verify ref2_v") |
whismanoid | 27:1cb6c42c6a93 | 453 | // @test group RES1KA2A3TOGND tinyTester.settle_time_msec = 1000 // default 250 |
whismanoid | 27:1cb6c42c6a93 | 454 | // @test group RES1KA2A3TOGND RegWrite(0x0C, 0xF3) expect 1 // *mux_ctrl1=0xf3 drives current source from AIN3 |
whismanoid | 22:c6812214a933 | 455 | // |
whismanoid | 27:1cb6c42c6a93 | 456 | // @test group RES1KA2A3TOGNDMORE RegWrite(0x0A, 0x03) expect 1 // *source=0x03 idac_mode=100uA, 1k resistor 0.1V |
whismanoid | 27:1cb6c42c6a93 | 457 | // @test group RES1KA2A3TOGNDMORE tinyTester.print("idac_mode=100uA, 1k resistor 0.1V") |
whismanoid | 27:1cb6c42c6a93 | 458 | // @test group RES1KA2A3TOGNDMORE tinyTester.Wait_Output_Settling() |
whismanoid | 27:1cb6c42c6a93 | 459 | // @test group RES1KA2A3TOGNDMORE Measure_Voltage(2,10) expect 0.1 |
whismanoid | 27:1cb6c42c6a93 | 460 | // @test group RES1KA2A3TOGNDMORE AINcode[2] expect (uint32_t)337731 within 33773 // idac_mode=100uA, 1k resistor 0.1V |
whismanoid | 22:c6812214a933 | 461 | // |
whismanoid | 27:1cb6c42c6a93 | 462 | // @test group RES1KA2A3TOGNDMORE RegWrite(0x0A, 0x0D) expect 1 // *source=0x0d idac_mode=800uA, 1k resistor 0.8V |
whismanoid | 27:1cb6c42c6a93 | 463 | // @test group RES1KA2A3TOGNDMORE tinyTester.print("idac_mode=800uA, 1k resistor 0.8V") |
whismanoid | 27:1cb6c42c6a93 | 464 | // @test group RES1KA2A3TOGNDMORE tinyTester.Wait_Output_Settling() |
whismanoid | 27:1cb6c42c6a93 | 465 | // @test group RES1KA2A3TOGNDMORE Measure_Voltage(2,10) expect 0.8 |
whismanoid | 27:1cb6c42c6a93 | 466 | // @test group RES1KA2A3TOGNDMORE AINcode[2] expect (uint32_t)2724467 within 33773 // idac_mode=800uA, 1k resistor 0.8V |
whismanoid | 22:c6812214a933 | 467 | // |
whismanoid | 27:1cb6c42c6a93 | 468 | // @test group RES1KA2A3TOGND RegWrite(0x0A, 0x0B) expect 1 // *source=0x0b idac_mode=400uA, 1k resistor 0.4V |
whismanoid | 27:1cb6c42c6a93 | 469 | // @test group RES1KA2A3TOGNDMORE tinyTester.print("idac_mode=400uA, 1k resistor 0.4V") |
whismanoid | 27:1cb6c42c6a93 | 470 | // @test group RES1KA2A3TOGND tinyTester.Wait_Output_Settling() |
whismanoid | 27:1cb6c42c6a93 | 471 | // @test group RES1KA2A3TOGND Measure_Voltage(2,10) expect 0.4 |
whismanoid | 27:1cb6c42c6a93 | 472 | // @test group RES1KA2A3TOGNDMORE AINcode[2] expect (uint32_t)1343163 within 33773 // idac_mode=400uA, 1k resistor 0.4V |
whismanoid | 20:fb7527415308 | 473 | // |
whismanoid | 19:50cf5da53d36 | 474 | // @test tinyTester.print("check filter register is writeable") |
whismanoid | 19:50cf5da53d36 | 475 | // @future test tinyTester.print("this is a real mess dealing with the custom types") |
whismanoid | 19:50cf5da53d36 | 476 | // @test RegWrite(0x08, 0x34) expect 1 |
whismanoid | 19:50cf5da53d36 | 477 | // @future test tinyTester.print("error: no matching function for call to 'MaximTinyTester::FunctionCall_Expect(const char [18], uint8_t (&)(MAX11410::CMD_enum_t, uint32_t), MAX11410::CMD_enum_t, uint32_t, int)'") |
whismanoid | 19:50cf5da53d36 | 478 | // @future test RegWrite(CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1 |
whismanoid | 19:50cf5da53d36 | 479 | // @future test RegWrite(CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1 |
whismanoid | 19:50cf5da53d36 | 480 | // @future test RegWrite(MAX11410::CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1 |
whismanoid | 19:50cf5da53d36 | 481 | // |
whismanoid | 19:50cf5da53d36 | 482 | // @test tinyTester.print("check filter register is readable") |
whismanoid | 19:50cf5da53d36 | 483 | // @test RegRead(0x08, buffer) expect 1 expect-buffer 0x34 |
whismanoid | 19:50cf5da53d36 | 484 | // @future test RegRead(MAX11410::CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, &buffer) expect 1 expect-buffer 0x34 |
whismanoid | 19:50cf5da53d36 | 485 | // |
whismanoid | 19:50cf5da53d36 | 486 | // @test tinyTester.settle_time_msec = 250 // default 250 |
whismanoid | 19:50cf5da53d36 | 487 | // @test tinyTester.blink_time_msec = 75 // default 75 resume hardware self test |
whismanoid | 19:50cf5da53d36 | 488 | // @test tinyTester.input_timeout_time_msec = 250 // default 250 |
whismanoid | 19:50cf5da53d36 | 489 | // @test tinyTester.settle_time_msec = 20 // default 250 |
whismanoid | 19:50cf5da53d36 | 490 | // @test tinyTester.blink_time_msec = 20 // quickly speed through the software verification |
whismanoid | 19:50cf5da53d36 | 491 | // @test tinyTester.input_timeout_time_msec = 100 // default 250 |
whismanoid | 19:50cf5da53d36 | 492 | // |
whismanoid | 19:50cf5da53d36 | 493 | // @test tinyTester.Wait_Output_Settling() |
whismanoid | 19:50cf5da53d36 | 494 | // |
whismanoid | 19:50cf5da53d36 | 495 | // @future test tinyTester.DigitalIn_Read_Expect_WarnOnly(DigitalIn& digitalInPin, const char* pinName, int expect_result, const char *expect_description) |
whismanoid | 19:50cf5da53d36 | 496 | // |
whismanoid | 0:68e64068330f | 497 | // @return 1 on success; 0 on failure |
whismanoid | 0:68e64068330f | 498 | uint8_t MAX11410::Init(void) |
whismanoid | 0:68e64068330f | 499 | { |
whismanoid | 0:68e64068330f | 500 | |
whismanoid | 0:68e64068330f | 501 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 502 | // AIN0-AIN1 reference voltage, in Volts |
whismanoid | 22:c6812214a933 | 503 | ref0_v = 2.500; |
whismanoid | 1:d57c1a2cb83c | 504 | |
whismanoid | 1:d57c1a2cb83c | 505 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 506 | // REF1P-REF1N reference resistance, in Ohms |
whismanoid | 22:c6812214a933 | 507 | ref1_v = 4999; |
whismanoid | 1:d57c1a2cb83c | 508 | |
whismanoid | 1:d57c1a2cb83c | 509 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 510 | // REF2P-REF2N reference voltage, in Volts |
whismanoid | 22:c6812214a933 | 511 | ref2_v = 2.500; |
whismanoid | 1:d57c1a2cb83c | 512 | |
whismanoid | 1:d57c1a2cb83c | 513 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 514 | // AVDD-AGND supply voltage, in Volts |
whismanoid | 22:c6812214a933 | 515 | avdd_v = 3.300; |
whismanoid | 1:d57c1a2cb83c | 516 | |
whismanoid | 1:d57c1a2cb83c | 517 | //---------------------------------------- |
whismanoid | 5:a2e74357cfc0 | 518 | // RTD Resistance measurement; Thermocouple Cold Junction, in Ohms |
whismanoid | 22:c6812214a933 | 519 | rtd_ohm = 1000.0; |
whismanoid | 5:a2e74357cfc0 | 520 | |
whismanoid | 5:a2e74357cfc0 | 521 | //---------------------------------------- |
whismanoid | 3:658a93dfb2d8 | 522 | // Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C |
whismanoid | 22:c6812214a933 | 523 | rtd_degc = 25.0; |
whismanoid | 3:658a93dfb2d8 | 524 | |
whismanoid | 3:658a93dfb2d8 | 525 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 526 | // shadow of register ctrl CMD_r000_1001_dddd_dddd_CTRL |
whismanoid | 1:d57c1a2cb83c | 527 | ctrl = 0x01; |
whismanoid | 1:d57c1a2cb83c | 528 | |
whismanoid | 1:d57c1a2cb83c | 529 | //---------------------------------------- |
whismanoid | 23:22e7830bcccb | 530 | // set by Configure_PGA gain index register pga CMD_r000_1110_00ss_0ggg_PGA |
whismanoid | 9:06ca88952f1c | 531 | pgaGain = 1; |
whismanoid | 9:06ca88952f1c | 532 | |
whismanoid | 9:06ca88952f1c | 533 | //---------------------------------------- |
whismanoid | 21:847b2220e96e | 534 | // When driver polls status of a pin signal or a register status bit, |
whismanoid | 21:847b2220e96e | 535 | // and there is no device physically connected, the driver must |
whismanoid | 21:847b2220e96e | 536 | // be able to halt and report failure if too many tries. Each attempt |
whismanoid | 22:c6812214a933 | 537 | // counts down until loop_limit is reached or exceeded. |
whismanoid | 21:847b2220e96e | 538 | // |
whismanoid | 21:847b2220e96e | 539 | // If driver seems to hang or takes too long to decide that device |
whismanoid | 21:847b2220e96e | 540 | // is not connected, reduce the futility countdown limit value. |
whismanoid | 21:847b2220e96e | 541 | // |
whismanoid | 21:847b2220e96e | 542 | // If driver sometimes works but sometimes intermittently fails to |
whismanoid | 21:847b2220e96e | 543 | // recognize device is attached, increase the futility countdown limit. |
whismanoid | 22:c6812214a933 | 544 | loop_limit = 30; |
whismanoid | 22:c6812214a933 | 545 | |
whismanoid | 22:c6812214a933 | 546 | //---------------------------------------- |
whismanoid | 22:c6812214a933 | 547 | // timing delay after enable RTD bias current in Measure_RTD() |
whismanoid | 22:c6812214a933 | 548 | rtd_ms = 100; |
whismanoid | 21:847b2220e96e | 549 | |
whismanoid | 21:847b2220e96e | 550 | //---------------------------------------- |
whismanoid | 23:22e7830bcccb | 551 | // filter register configuration in Measure_RTD() -- 0x34 LINEF_11_SINC4 RATE_0100 output data rate 60SPS |
whismanoid | 23:22e7830bcccb | 552 | rtd_filter = 0x34; |
whismanoid | 23:22e7830bcccb | 553 | |
whismanoid | 23:22e7830bcccb | 554 | //---------------------------------------- |
whismanoid | 23:22e7830bcccb | 555 | // ctrl register configuration in Measure_RTD() -- 0x40 unipolar, 0x01 REF_SEL_001_REF1P_REF1N |
whismanoid | 23:22e7830bcccb | 556 | rtd_ctrl = 0x41; |
whismanoid | 23:22e7830bcccb | 557 | |
whismanoid | 23:22e7830bcccb | 558 | //---------------------------------------- |
whismanoid | 23:22e7830bcccb | 559 | // source register configuration in Measure_RTD() -- 0x0B IDAC_MODE_1011_400uA |
whismanoid | 23:22e7830bcccb | 560 | rtd_source = 0x0B; |
whismanoid | 23:22e7830bcccb | 561 | |
whismanoid | 23:22e7830bcccb | 562 | //---------------------------------------- |
whismanoid | 23:22e7830bcccb | 563 | // pga register configuration in Measure_RTD() -- 0x21 SIG_PATH_10_PGA GAIN_001_2 |
whismanoid | 23:22e7830bcccb | 564 | rtd_pga = 0x21; |
whismanoid | 23:22e7830bcccb | 565 | |
whismanoid | 23:22e7830bcccb | 566 | //---------------------------------------- |
whismanoid | 34:1b72865fa71f | 567 | // filter register configuration in Measure_Voltage() -- 0x34 LINEF_11_SINC4 RATE_0100 output data rate 60SPS |
whismanoid | 34:1b72865fa71f | 568 | v_filter = 0x34; |
whismanoid | 34:1b72865fa71f | 569 | |
whismanoid | 34:1b72865fa71f | 570 | //---------------------------------------- |
whismanoid | 34:1b72865fa71f | 571 | // ctrl register configuration in Measure_Voltage() -- 0x02 bipolar REF_SEL_010_REF2P_REF2N |
whismanoid | 34:1b72865fa71f | 572 | v_ctrl = 0x02; |
whismanoid | 34:1b72865fa71f | 573 | |
whismanoid | 34:1b72865fa71f | 574 | //---------------------------------------- |
whismanoid | 34:1b72865fa71f | 575 | // pga register configuration in Measure_Voltage() -- 0x00 SIG_PATH_00_BUFFERED GAIN_000_1 |
whismanoid | 34:1b72865fa71f | 576 | v_pga = 0x00; |
whismanoid | 34:1b72865fa71f | 577 | |
whismanoid | 34:1b72865fa71f | 578 | //---------------------------------------- |
whismanoid | 21:847b2220e96e | 579 | // list of registers to be read by menu item * with no arguments |
whismanoid | 21:847b2220e96e | 580 | static MAX11410::MAX11410_CMD_enum_t readAllStatusListValues[] = { |
whismanoid | 21:847b2220e96e | 581 | MAX11410::CMD_r000_0000_xxxx_xxdd_PD, |
whismanoid | 21:847b2220e96e | 582 | MAX11410::CMD_r000_0001_xddd_xxdd_CONV_START, |
whismanoid | 21:847b2220e96e | 583 | MAX11410::CMD_r000_0010_xddd_dddd_SEQ_START, |
whismanoid | 21:847b2220e96e | 584 | MAX11410::CMD_r000_0011_xxxx_xddd_CAL_START, |
whismanoid | 21:847b2220e96e | 585 | MAX11410::CMD_r000_0100_dddd_xddd_GP0_CTRL, |
whismanoid | 21:847b2220e96e | 586 | MAX11410::CMD_r000_0101_dddd_xddd_GP1_CTRL, |
whismanoid | 21:847b2220e96e | 587 | MAX11410::CMD_r000_0110_xddd_xxdd_GP_CONV, |
whismanoid | 21:847b2220e96e | 588 | MAX11410::CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR, |
whismanoid | 21:847b2220e96e | 589 | MAX11410::CMD_r000_1000_x0dd_dddd_FILTER, |
whismanoid | 21:847b2220e96e | 590 | MAX11410::CMD_r000_1001_dddd_dddd_CTRL, |
whismanoid | 21:847b2220e96e | 591 | MAX11410::CMD_r000_1010_dddd_dddd_SOURCE, |
whismanoid | 21:847b2220e96e | 592 | MAX11410::CMD_r000_1011_dddd_dddd_MUX_CTRL0, |
whismanoid | 21:847b2220e96e | 593 | MAX11410::CMD_r000_1100_dddd_dddd_MUX_CTRL1, |
whismanoid | 21:847b2220e96e | 594 | MAX11410::CMD_r000_1101_dddd_dddd_MUX_CTRL2, |
whismanoid | 23:22e7830bcccb | 595 | MAX11410::CMD_r000_1110_00ss_0ggg_PGA, |
whismanoid | 21:847b2220e96e | 596 | MAX11410::CMD_r000_1111_dddd_dddd_WAIT_EXT, |
whismanoid | 21:847b2220e96e | 597 | MAX11410::CMD_r001_0000_xxxx_xxxx_WAIT_START, |
whismanoid | 21:847b2220e96e | 598 | }; |
whismanoid | 21:847b2220e96e | 599 | readAllStatusList = readAllStatusListValues; |
whismanoid | 21:847b2220e96e | 600 | |
whismanoid | 21:847b2220e96e | 601 | //---------------------------------------- |
whismanoid | 21:847b2220e96e | 602 | // number of registers to be read by menu item * with no arguments |
whismanoid | 21:847b2220e96e | 603 | readAllStatusListLen = 17; |
whismanoid | 21:847b2220e96e | 604 | |
whismanoid | 21:847b2220e96e | 605 | //---------------------------------------- |
whismanoid | 9:06ca88952f1c | 606 | // Device ID Validation |
whismanoid | 9:06ca88952f1c | 607 | const uint32_t part_id_expect = 0x000F02; |
whismanoid | 9:06ca88952f1c | 608 | uint32_t part_id_readback; |
whismanoid | 9:06ca88952f1c | 609 | RegRead(CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID, &part_id_readback); |
whismanoid | 9:06ca88952f1c | 610 | if (part_id_readback != part_id_expect) return 0; |
whismanoid | 9:06ca88952f1c | 611 | |
whismanoid | 9:06ca88952f1c | 612 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 613 | // write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode) |
whismanoid | 1:d57c1a2cb83c | 614 | RegWrite(CMD_r000_0000_xxxx_xxdd_PD, PD_11_Reset); |
whismanoid | 1:d57c1a2cb83c | 615 | |
whismanoid | 1:d57c1a2cb83c | 616 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 617 | // write8 0x00 PD = 0x00 (NOP) |
whismanoid | 1:d57c1a2cb83c | 618 | RegWrite(CMD_r000_0000_xxxx_xxdd_PD, PD_00_Normal); |
whismanoid | 0:68e64068330f | 619 | |
whismanoid | 0:68e64068330f | 620 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 621 | // success |
whismanoid | 0:68e64068330f | 622 | return 1; |
whismanoid | 0:68e64068330f | 623 | } |
whismanoid | 0:68e64068330f | 624 | |
whismanoid | 0:68e64068330f | 625 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 626 | // Return the physical voltage corresponding to conversion result, |
whismanoid | 1:d57c1a2cb83c | 627 | // for unipolar mode. |
whismanoid | 0:68e64068330f | 628 | // Does not perform any offset or gain correction. |
whismanoid | 0:68e64068330f | 629 | // |
whismanoid | 1:d57c1a2cb83c | 630 | // @pre CTRL::U_BN = 1 -- Unipolar mode |
whismanoid | 1:d57c1a2cb83c | 631 | // @pre CTRL::FORMAT = x |
whismanoid | 0:68e64068330f | 632 | // @pre VRef = Voltage of REF input, in Volts |
whismanoid | 0:68e64068330f | 633 | // @param[in] value_u24: raw 24-bit MAX11410 code (right justified). |
whismanoid | 0:68e64068330f | 634 | // @return physical voltage corresponding to MAX11410 code. |
whismanoid | 14:b49eecf7e4d8 | 635 | // |
whismanoid | 21:847b2220e96e | 636 | // @test group UNIPOLAR // Verify function VoltageOfCode_Unipolar |
whismanoid | 21:847b2220e96e | 637 | // @test group UNIPOLAR tinyTester.blink_time_msec = 20 // quickly speed through the software verification |
whismanoid | 21:847b2220e96e | 638 | // @test group UNIPOLAR Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V |
whismanoid | 21:847b2220e96e | 639 | // @test group UNIPOLAR Configure_PGA(0,0) expect 1 // These tests require PGA gain=1 |
whismanoid | 19:50cf5da53d36 | 640 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0xFFFFFF) expect 2.500 within 0.030 // Full Scale |
whismanoid | 19:50cf5da53d36 | 641 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0xFFFFFE) expect 2.500 // Full Scale |
whismanoid | 19:50cf5da53d36 | 642 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0xCCCCCC) expect 2.000 // Two Volts |
whismanoid | 19:50cf5da53d36 | 643 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0xC00000) expect 1.875 // 75% Scale |
whismanoid | 19:50cf5da53d36 | 644 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0x800000) expect 1.250 // Mid Scale |
whismanoid | 19:50cf5da53d36 | 645 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0x666666) expect 1.000 // One Volt |
whismanoid | 19:50cf5da53d36 | 646 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0x400000) expect 0.625 // 25% Scale |
whismanoid | 19:50cf5da53d36 | 647 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0x0A3D70) expect 0.100 // 100mV |
whismanoid | 19:50cf5da53d36 | 648 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0x000064) expect 0.000014901162 // 100 LSB |
whismanoid | 19:50cf5da53d36 | 649 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0x00000A) expect 0.0000014901162 // Ten LSB |
whismanoid | 19:50cf5da53d36 | 650 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0x000003) expect 0.00000044703483 // Three LSB |
whismanoid | 19:50cf5da53d36 | 651 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0x000002) expect 0.00000029802326 // Two LSB |
whismanoid | 19:50cf5da53d36 | 652 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0x000001) expect 0.00000014901162 // One LSB |
whismanoid | 19:50cf5da53d36 | 653 | // @test group UNIPOLAR VoltageOfCode_Unipolar(0x000000) expect 0.0 // Zero Scale |
whismanoid | 21:847b2220e96e | 654 | // @test group UNIPOLAR tinyTester.blink_time_msec = 75 // default 75 resume hardware self test |
whismanoid | 1:d57c1a2cb83c | 655 | // |
whismanoid | 1:d57c1a2cb83c | 656 | double MAX11410::VoltageOfCode_Unipolar(uint32_t value_u24) |
whismanoid | 0:68e64068330f | 657 | { |
whismanoid | 0:68e64068330f | 658 | |
whismanoid | 0:68e64068330f | 659 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 660 | // Linear map min and max endpoints |
whismanoid | 22:c6812214a933 | 661 | double VRef = ref2_v; |
whismanoid | 1:d57c1a2cb83c | 662 | uint8_t ref_sel = (ctrl & 0x03); // MAX11410_REF_SEL_enum_t |
whismanoid | 1:d57c1a2cb83c | 663 | switch(ref_sel) |
whismanoid | 1:d57c1a2cb83c | 664 | { |
whismanoid | 22:c6812214a933 | 665 | case REF_SEL_000_AIN0_AIN1: VRef = ref0_v; break; |
whismanoid | 22:c6812214a933 | 666 | case REF_SEL_001_REF1P_REF1N: VRef = ref1_v; break; |
whismanoid | 22:c6812214a933 | 667 | case REF_SEL_010_REF2P_REF2N: VRef = ref2_v; break; |
whismanoid | 22:c6812214a933 | 668 | case REF_SEL_011_AVDD_AGND: VRef = avdd_v; break; |
whismanoid | 22:c6812214a933 | 669 | case REF_SEL_100_AIN0_AGND: VRef = ref0_v; break; |
whismanoid | 22:c6812214a933 | 670 | case REF_SEL_101_REF1P_AGND: VRef = ref1_v; break; |
whismanoid | 22:c6812214a933 | 671 | case REF_SEL_110_REF2P_AGND: VRef = ref2_v; break; |
whismanoid | 22:c6812214a933 | 672 | case REF_SEL_111_AVDD_AGND: VRef = avdd_v; break; |
whismanoid | 1:d57c1a2cb83c | 673 | } |
whismanoid | 0:68e64068330f | 674 | double MaxScaleVoltage = VRef; // voltage of maximum code 0xffffff |
whismanoid | 0:68e64068330f | 675 | double MinScaleVoltage = 0.0; // voltage of minimum code 0x000 |
whismanoid | 0:68e64068330f | 676 | const uint32_t FULL_SCALE_CODE_24BIT = 0xffffff; |
whismanoid | 0:68e64068330f | 677 | const uint32_t MaxCode = FULL_SCALE_CODE_24BIT; |
whismanoid | 0:68e64068330f | 678 | const uint32_t MinCode = 0x000; |
whismanoid | 0:68e64068330f | 679 | double codeFraction = ((double)value_u24 - MinCode) / (MaxCode - MinCode + 1); |
whismanoid | 1:d57c1a2cb83c | 680 | return (MinScaleVoltage + ((MaxScaleVoltage - MinScaleVoltage) * codeFraction)) / pgaGain; |
whismanoid | 1:d57c1a2cb83c | 681 | } |
whismanoid | 1:d57c1a2cb83c | 682 | |
whismanoid | 1:d57c1a2cb83c | 683 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 684 | // Return the physical voltage corresponding to conversion result, |
whismanoid | 1:d57c1a2cb83c | 685 | // when conversion format is Bipolar mode, offset binary. |
whismanoid | 1:d57c1a2cb83c | 686 | // Does not perform any offset or gain correction. |
whismanoid | 1:d57c1a2cb83c | 687 | // |
whismanoid | 1:d57c1a2cb83c | 688 | // @pre CTRL::U_BN = 0 -- Bipolar mode |
whismanoid | 1:d57c1a2cb83c | 689 | // @pre CTRL::FORMAT = 1 -- offset binary |
whismanoid | 1:d57c1a2cb83c | 690 | // @pre VRef = Voltage of REF input, in Volts |
whismanoid | 1:d57c1a2cb83c | 691 | // @param[in] value_u24: raw 24-bit MAX11410 code (right justified). |
whismanoid | 1:d57c1a2cb83c | 692 | // @return physical voltage corresponding to MAX11410 code. |
whismanoid | 14:b49eecf7e4d8 | 693 | // |
whismanoid | 21:847b2220e96e | 694 | // @test group BIPOB // Verify function VoltageOfCode_Bipolar_OffsetBinary |
whismanoid | 21:847b2220e96e | 695 | // @test group BIPOB tinyTester.blink_time_msec = 20 // quickly speed through the software verification |
whismanoid | 21:847b2220e96e | 696 | // @test group BIPOB Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V |
whismanoid | 21:847b2220e96e | 697 | // @test group BIPOB Configure_PGA(0,0) expect 1 // These tests require PGA gain=1 |
whismanoid | 19:50cf5da53d36 | 698 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xFFFFFF) expect 2.5 within 0.030 // Full Scale |
whismanoid | 19:50cf5da53d36 | 699 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xFFFFFE) expect 2.5 // Full Scale |
whismanoid | 19:50cf5da53d36 | 700 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xC00000) expect 1.25 // Mid Scale |
whismanoid | 19:50cf5da53d36 | 701 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800003) expect 0.00000894069671 // Three LSB |
whismanoid | 19:50cf5da53d36 | 702 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800002) expect 0.00000596046447 // Two LSB |
whismanoid | 19:50cf5da53d36 | 703 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800001) expect 0.0000029802326 // One LSB |
whismanoid | 19:50cf5da53d36 | 704 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800000) expect 0.0 // Zero Scale |
whismanoid | 19:50cf5da53d36 | 705 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFF) expect -0.0000029802326 // Negative One LSB |
whismanoid | 19:50cf5da53d36 | 706 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFE) expect -0.0000059604644 // Negative Two LSB |
whismanoid | 19:50cf5da53d36 | 707 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFD) expect -0.0000089406967 // Negative Three LSB |
whismanoid | 19:50cf5da53d36 | 708 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x400000) expect -1.25 // Negative Mid Scale |
whismanoid | 19:50cf5da53d36 | 709 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x000001) expect -2.5 // Negative Full Scale |
whismanoid | 19:50cf5da53d36 | 710 | // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x000000) expect -2.5 // Negative Full Scale |
whismanoid | 21:847b2220e96e | 711 | // @test group BIPOB tinyTester.blink_time_msec = 75 // default 75 resume hardware self test |
whismanoid | 1:d57c1a2cb83c | 712 | // |
whismanoid | 1:d57c1a2cb83c | 713 | double MAX11410::VoltageOfCode_Bipolar_OffsetBinary(uint32_t value_u24) |
whismanoid | 1:d57c1a2cb83c | 714 | { |
whismanoid | 1:d57c1a2cb83c | 715 | |
whismanoid | 1:d57c1a2cb83c | 716 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 717 | // Linear map min and max endpoints |
whismanoid | 22:c6812214a933 | 718 | double VRef = ref2_v; |
whismanoid | 1:d57c1a2cb83c | 719 | uint8_t ref_sel = (ctrl & 0x03); // MAX11410_REF_SEL_enum_t |
whismanoid | 1:d57c1a2cb83c | 720 | switch(ref_sel) |
whismanoid | 1:d57c1a2cb83c | 721 | { |
whismanoid | 22:c6812214a933 | 722 | case REF_SEL_000_AIN0_AIN1: VRef = ref0_v; break; |
whismanoid | 22:c6812214a933 | 723 | case REF_SEL_001_REF1P_REF1N: VRef = ref1_v; break; |
whismanoid | 22:c6812214a933 | 724 | case REF_SEL_010_REF2P_REF2N: VRef = ref2_v; break; |
whismanoid | 22:c6812214a933 | 725 | case REF_SEL_011_AVDD_AGND: VRef = avdd_v; break; |
whismanoid | 22:c6812214a933 | 726 | case REF_SEL_100_AIN0_AGND: VRef = ref0_v; break; |
whismanoid | 22:c6812214a933 | 727 | case REF_SEL_101_REF1P_AGND: VRef = ref1_v; break; |
whismanoid | 22:c6812214a933 | 728 | case REF_SEL_110_REF2P_AGND: VRef = ref2_v; break; |
whismanoid | 22:c6812214a933 | 729 | case REF_SEL_111_AVDD_AGND: VRef = avdd_v; break; |
whismanoid | 1:d57c1a2cb83c | 730 | } |
whismanoid | 32:4c183afd82f6 | 731 | double MaxScaleVoltage = 2 * VRef; // voltage of maximum code 0x7fffff |
whismanoid | 1:d57c1a2cb83c | 732 | double MinScaleVoltage = 0; // voltage of minimum code 0x800000; |
whismanoid | 32:4c183afd82f6 | 733 | // const uint32_t FULL_SCALE_CODE_24BIT = 0x7fffff; |
whismanoid | 32:4c183afd82f6 | 734 | // const uint32_t MaxCode = FULL_SCALE_CODE_24BIT; |
whismanoid | 1:d57c1a2cb83c | 735 | const int32_t CodeSpan = 0x1000000; |
whismanoid | 1:d57c1a2cb83c | 736 | const uint32_t MinCode = 0x800000; |
whismanoid | 1:d57c1a2cb83c | 737 | double codeFraction = ((double)value_u24 - MinCode) / CodeSpan; |
whismanoid | 1:d57c1a2cb83c | 738 | return (MinScaleVoltage + ((MaxScaleVoltage - MinScaleVoltage) * codeFraction)) / pgaGain; |
whismanoid | 1:d57c1a2cb83c | 739 | } |
whismanoid | 1:d57c1a2cb83c | 740 | |
whismanoid | 1:d57c1a2cb83c | 741 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 742 | // Return the physical voltage corresponding to conversion result, |
whismanoid | 1:d57c1a2cb83c | 743 | // when conversion format is Bipolar mode, 2's complement. |
whismanoid | 1:d57c1a2cb83c | 744 | // Does not perform any offset or gain correction. |
whismanoid | 1:d57c1a2cb83c | 745 | // |
whismanoid | 1:d57c1a2cb83c | 746 | // @pre CTRL::U_BN = 0 -- Bipolar mode |
whismanoid | 1:d57c1a2cb83c | 747 | // @pre CTRL::FORMAT = 0 -- 2's complement |
whismanoid | 1:d57c1a2cb83c | 748 | // @pre VRef = Voltage of REF input, in Volts |
whismanoid | 1:d57c1a2cb83c | 749 | // @param[in] value_u24: raw 24-bit MAX11410 code (right justified). |
whismanoid | 1:d57c1a2cb83c | 750 | // @return physical voltage corresponding to MAX11410 code. |
whismanoid | 14:b49eecf7e4d8 | 751 | // |
whismanoid | 21:847b2220e96e | 752 | // @test group BIP2C // Verify function VoltageOfCode_Bipolar_2sComplement |
whismanoid | 21:847b2220e96e | 753 | // @test group BIP2C tinyTester.blink_time_msec = 20 // quickly speed through the software verification |
whismanoid | 21:847b2220e96e | 754 | // @test group BIP2C Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V |
whismanoid | 21:847b2220e96e | 755 | // @test group BIP2C Configure_PGA(0,0) expect 1 // These tests require PGA gain=1 |
whismanoid | 19:50cf5da53d36 | 756 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x7FFFFF) expect 2.500 within 0.030 // Full Scale |
whismanoid | 19:50cf5da53d36 | 757 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x7FFFFE) expect 2.500 // Full Scale |
whismanoid | 19:50cf5da53d36 | 758 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x666666) expect 2.000 // Two Volts |
whismanoid | 19:50cf5da53d36 | 759 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x600000) expect 1.875 // 75% Scale |
whismanoid | 19:50cf5da53d36 | 760 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x400000) expect 1.250 // Mid Scale |
whismanoid | 19:50cf5da53d36 | 761 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x333333) expect 1.000 // One Volt |
whismanoid | 19:50cf5da53d36 | 762 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x200000) expect 0.625 // 25% Scale |
whismanoid | 19:50cf5da53d36 | 763 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x051eb8) expect 0.100 // 100mV |
whismanoid | 19:50cf5da53d36 | 764 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000003) expect 0.00000894069671 // Three LSB |
whismanoid | 19:50cf5da53d36 | 765 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000002) expect 0.00000596046447 // Two LSB |
whismanoid | 19:50cf5da53d36 | 766 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000001) expect 0.0000029802326 // One LSB |
whismanoid | 19:50cf5da53d36 | 767 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000000) expect 0.0 // Zero Scale |
whismanoid | 19:50cf5da53d36 | 768 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFF) expect -0.0000029802326 // Negative One LSB |
whismanoid | 19:50cf5da53d36 | 769 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFE) expect -0.0000059604644 // Negative Two LSB |
whismanoid | 19:50cf5da53d36 | 770 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFD) expect -0.0000089406967 // Negative Three LSB |
whismanoid | 19:50cf5da53d36 | 771 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFAE148) expect -0.100 // Negative 100mV |
whismanoid | 19:50cf5da53d36 | 772 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xE00000) expect -0.625 // Negative 25% Scale |
whismanoid | 19:50cf5da53d36 | 773 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xCCCCCD) expect -1.000 // Negative One Volt |
whismanoid | 19:50cf5da53d36 | 774 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xC00000) expect -1.250 // Negative Mid Scale |
whismanoid | 19:50cf5da53d36 | 775 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xA00000) expect -1.875 // Negative 75% Scale |
whismanoid | 19:50cf5da53d36 | 776 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x99999A) expect -2.000 // Negative Two Volts |
whismanoid | 19:50cf5da53d36 | 777 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x800001) expect -2.500 // Negative Full Scale |
whismanoid | 19:50cf5da53d36 | 778 | // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x800000) expect -2.500 // Negative Full Scale |
whismanoid | 21:847b2220e96e | 779 | // @test group BIP2C tinyTester.blink_time_msec = 75 // default 75 resume hardware self test |
whismanoid | 1:d57c1a2cb83c | 780 | // |
whismanoid | 1:d57c1a2cb83c | 781 | double MAX11410::VoltageOfCode_Bipolar_2sComplement(uint32_t value_u24) |
whismanoid | 1:d57c1a2cb83c | 782 | { |
whismanoid | 1:d57c1a2cb83c | 783 | |
whismanoid | 1:d57c1a2cb83c | 784 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 785 | // Linear map min and max endpoints |
whismanoid | 22:c6812214a933 | 786 | double VRef = ref2_v; |
whismanoid | 1:d57c1a2cb83c | 787 | uint8_t ref_sel = (ctrl & 0x03); // MAX11410_REF_SEL_enum_t |
whismanoid | 1:d57c1a2cb83c | 788 | switch(ref_sel) |
whismanoid | 1:d57c1a2cb83c | 789 | { |
whismanoid | 22:c6812214a933 | 790 | case REF_SEL_000_AIN0_AIN1: VRef = ref0_v; break; |
whismanoid | 22:c6812214a933 | 791 | case REF_SEL_001_REF1P_REF1N: VRef = ref1_v; break; |
whismanoid | 22:c6812214a933 | 792 | case REF_SEL_010_REF2P_REF2N: VRef = ref2_v; break; |
whismanoid | 22:c6812214a933 | 793 | case REF_SEL_011_AVDD_AGND: VRef = avdd_v; break; |
whismanoid | 22:c6812214a933 | 794 | case REF_SEL_100_AIN0_AGND: VRef = ref0_v; break; |
whismanoid | 22:c6812214a933 | 795 | case REF_SEL_101_REF1P_AGND: VRef = ref1_v; break; |
whismanoid | 22:c6812214a933 | 796 | case REF_SEL_110_REF2P_AGND: VRef = ref2_v; break; |
whismanoid | 22:c6812214a933 | 797 | case REF_SEL_111_AVDD_AGND: VRef = avdd_v; break; |
whismanoid | 1:d57c1a2cb83c | 798 | } |
whismanoid | 1:d57c1a2cb83c | 799 | double MaxScaleVoltage = 2 * VRef; // voltage of maximum code 0x7fffff |
whismanoid | 1:d57c1a2cb83c | 800 | double MinScaleVoltage = 0; // voltage of minimum code 0x800000 |
whismanoid | 32:4c183afd82f6 | 801 | // const int32_t FULL_SCALE_CODE_24BIT_2S_COMPLEMENT = 0x7fffff; |
whismanoid | 1:d57c1a2cb83c | 802 | const int32_t SIGN_BIT_24BIT_2S_COMPLEMENT = 0x800000; |
whismanoid | 1:d57c1a2cb83c | 803 | if (value_u24 >= SIGN_BIT_24BIT_2S_COMPLEMENT) { value_u24 = value_u24 - (2 * SIGN_BIT_24BIT_2S_COMPLEMENT); } |
whismanoid | 32:4c183afd82f6 | 804 | // const int32_t MaxCode = FULL_SCALE_CODE_24BIT_2S_COMPLEMENT; |
whismanoid | 1:d57c1a2cb83c | 805 | const int32_t CodeSpan = 0x1000000; |
whismanoid | 1:d57c1a2cb83c | 806 | const int32_t MinCode = 0; |
whismanoid | 1:d57c1a2cb83c | 807 | double codeFraction = ((double)((int32_t)value_u24) - MinCode) / CodeSpan; |
whismanoid | 1:d57c1a2cb83c | 808 | return (MinScaleVoltage + ((MaxScaleVoltage - MinScaleVoltage) * codeFraction)) / pgaGain; |
whismanoid | 1:d57c1a2cb83c | 809 | } |
whismanoid | 1:d57c1a2cb83c | 810 | |
whismanoid | 1:d57c1a2cb83c | 811 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 812 | // Return the physical voltage corresponding to conversion result, |
whismanoid | 1:d57c1a2cb83c | 813 | // when conversion format is determined by the CTRL register. |
whismanoid | 1:d57c1a2cb83c | 814 | // Does not perform any offset or gain correction. |
whismanoid | 1:d57c1a2cb83c | 815 | // |
whismanoid | 1:d57c1a2cb83c | 816 | // @pre CTRL::U_BN and CTRL::FORMAT = 0 select offset binary, 2's complement, or straight binary |
whismanoid | 1:d57c1a2cb83c | 817 | // @pre VRef = Voltage of REF input, in Volts |
whismanoid | 1:d57c1a2cb83c | 818 | // @param[in] value_u24: raw 24-bit MAX11410 code (right justified). |
whismanoid | 1:d57c1a2cb83c | 819 | // @return physical voltage corresponding to MAX11410 code. |
whismanoid | 1:d57c1a2cb83c | 820 | double MAX11410::VoltageOfCode(uint32_t value_u24) |
whismanoid | 1:d57c1a2cb83c | 821 | { |
whismanoid | 1:d57c1a2cb83c | 822 | |
whismanoid | 1:d57c1a2cb83c | 823 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 824 | // Determine format from CTRL register U_BN and FORMAT |
whismanoid | 1:d57c1a2cb83c | 825 | uint8_t u_bn_bitmask = (1 << 6); |
whismanoid | 1:d57c1a2cb83c | 826 | uint8_t format_bitmask = (1 << 5); |
whismanoid | 1:d57c1a2cb83c | 827 | if ((ctrl & u_bn_bitmask) != 0) |
whismanoid | 1:d57c1a2cb83c | 828 | { |
whismanoid | 1:d57c1a2cb83c | 829 | return VoltageOfCode_Unipolar(value_u24); |
whismanoid | 1:d57c1a2cb83c | 830 | } |
whismanoid | 1:d57c1a2cb83c | 831 | if ((ctrl & format_bitmask) != 0) |
whismanoid | 1:d57c1a2cb83c | 832 | { |
whismanoid | 1:d57c1a2cb83c | 833 | return VoltageOfCode_Bipolar_OffsetBinary(value_u24); |
whismanoid | 1:d57c1a2cb83c | 834 | } |
whismanoid | 1:d57c1a2cb83c | 835 | return VoltageOfCode_Bipolar_2sComplement(value_u24); |
whismanoid | 0:68e64068330f | 836 | } |
whismanoid | 0:68e64068330f | 837 | |
whismanoid | 0:68e64068330f | 838 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 839 | // Write a MAX11410 register. |
whismanoid | 0:68e64068330f | 840 | // |
whismanoid | 11:abde565b8497 | 841 | // CMDOP_1aaa_aaaa_ReadRegister bit is cleared 0 indicating a write operation. |
whismanoid | 0:68e64068330f | 842 | // |
whismanoid | 0:68e64068330f | 843 | // MAX11410 register length can be determined by function RegSize. |
whismanoid | 0:68e64068330f | 844 | // |
whismanoid | 0:68e64068330f | 845 | // For 8-bit register size: |
whismanoid | 0:68e64068330f | 846 | // |
whismanoid | 0:68e64068330f | 847 | // SPI 16-bit transfer |
whismanoid | 0:68e64068330f | 848 | // |
whismanoid | 0:68e64068330f | 849 | // SPI MOSI = 0aaa_aaaa_dddd_dddd |
whismanoid | 0:68e64068330f | 850 | // |
whismanoid | 0:68e64068330f | 851 | // SPI MISO = xxxx_xxxx_xxxx_xxxx |
whismanoid | 0:68e64068330f | 852 | // |
whismanoid | 0:68e64068330f | 853 | // For 16-bit register size: |
whismanoid | 0:68e64068330f | 854 | // |
whismanoid | 0:68e64068330f | 855 | // SPI 24-bit or 32-bit transfer |
whismanoid | 0:68e64068330f | 856 | // |
whismanoid | 0:68e64068330f | 857 | // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd |
whismanoid | 0:68e64068330f | 858 | // |
whismanoid | 0:68e64068330f | 859 | // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx |
whismanoid | 0:68e64068330f | 860 | // |
whismanoid | 0:68e64068330f | 861 | // For 24-bit register size: |
whismanoid | 0:68e64068330f | 862 | // |
whismanoid | 0:68e64068330f | 863 | // SPI 32-bit transfer |
whismanoid | 0:68e64068330f | 864 | // |
whismanoid | 0:68e64068330f | 865 | // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd |
whismanoid | 0:68e64068330f | 866 | // |
whismanoid | 0:68e64068330f | 867 | // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx |
whismanoid | 0:68e64068330f | 868 | // |
whismanoid | 0:68e64068330f | 869 | // @return 1 on success; 0 on failure |
whismanoid | 10:7adee48a7f82 | 870 | uint8_t MAX11410::RegWrite(MAX11410_CMD_enum_t commandByte, uint32_t regData) |
whismanoid | 0:68e64068330f | 871 | { |
whismanoid | 0:68e64068330f | 872 | |
whismanoid | 0:68e64068330f | 873 | //---------------------------------------- |
whismanoid | 21:847b2220e96e | 874 | // switch based on register address size RegSize(commandByte) |
whismanoid | 11:abde565b8497 | 875 | commandByte = (MAX11410_CMD_enum_t)((commandByte &~ CMDOP_1aaa_aaaa_ReadRegister) & 0xFF); |
whismanoid | 10:7adee48a7f82 | 876 | switch(RegSize(commandByte)) |
whismanoid | 0:68e64068330f | 877 | { |
whismanoid | 0:68e64068330f | 878 | case 8: // 8-bit register size |
whismanoid | 0:68e64068330f | 879 | { |
whismanoid | 0:68e64068330f | 880 | // SPI 16-bit transfer |
whismanoid | 0:68e64068330f | 881 | // SPI MOSI = 0aaa_aaaa_dddd_dddd |
whismanoid | 0:68e64068330f | 882 | // SPI MISO = xxxx_xxxx_xxxx_xxxx |
whismanoid | 10:7adee48a7f82 | 883 | int16_t mosiData16 = ((int16_t)commandByte << 8) | ((int16_t)regData & 0xFF); |
whismanoid | 0:68e64068330f | 884 | SPIoutputCS(0); |
whismanoid | 0:68e64068330f | 885 | SPIwrite16bits(mosiData16); |
whismanoid | 0:68e64068330f | 886 | SPIoutputCS(1); |
whismanoid | 24:428b7670e45f | 887 | // |
whismanoid | 26:298726bd5a3f | 888 | if (commandByte == CMD_r000_1110_00ss_0ggg_PGA) |
whismanoid | 26:298726bd5a3f | 889 | { |
whismanoid | 26:298726bd5a3f | 890 | // update pgaGain with 1, 2, 4, 8, 16, 32, 64, or 128 based on gain index |
whismanoid | 26:298726bd5a3f | 891 | static uint8_t pgaGainTable[8] = {1, 2, 4, 8, 16, 32, 64, 128}; |
whismanoid | 26:298726bd5a3f | 892 | pgaGain = (((regData >> 4) & 2) == SIG_PATH_10_PGA) |
whismanoid | 26:298726bd5a3f | 893 | ? pgaGainTable[(uint8_t)(regData & 7)] |
whismanoid | 26:298726bd5a3f | 894 | : 1; |
whismanoid | 26:298726bd5a3f | 895 | } |
whismanoid | 24:428b7670e45f | 896 | if (commandByte == CMD_r000_0011_xxxx_xddd_CAL_START) |
whismanoid | 24:428b7670e45f | 897 | { |
whismanoid | 24:428b7670e45f | 898 | // after RegWrite CMD_r000_0011_xxxx_xddd_CAL_START, poll status until 0x000004 CAL_RDY |
whismanoid | 24:428b7670e45f | 899 | RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status); |
whismanoid | 29:a677458ac250 | 900 | switch(regData & 0x07) |
whismanoid | 24:428b7670e45f | 901 | { |
whismanoid | 29:a677458ac250 | 902 | case 2: // CAL_TYPE_010_reserved = 0x02, //!< 0b010 |
whismanoid | 29:a677458ac250 | 903 | case 3: // CAL_TYPE_011_reserved = 0x03, //!< 0b011 |
whismanoid | 29:a677458ac250 | 904 | break; // do not wait for status |
whismanoid | 29:a677458ac250 | 905 | case 1: // CAL_TYPE_001_PGA_GAIN = 0x01, //!< 0b001 |
whismanoid | 32:4c183afd82f6 | 906 | // |
whismanoid | 32:4c183afd82f6 | 907 | // Note: this case may fall through, by design. |
whismanoid | 32:4c183afd82f6 | 908 | #if __GNUC__ |
whismanoid | 32:4c183afd82f6 | 909 | #pragma GCC diagnostic ignored "-Wimplicit-fallthrough" |
whismanoid | 32:4c183afd82f6 | 910 | #endif |
whismanoid | 29:a677458ac250 | 911 | if (pgaGain == 1) break; // do not wait for status |
whismanoid | 29:a677458ac250 | 912 | // fall through to case 0,4,5,6,7 |
whismanoid | 32:4c183afd82f6 | 913 | #if __GNUC__ |
whismanoid | 32:4c183afd82f6 | 914 | #pragma GCC diagnostic pop |
whismanoid | 32:4c183afd82f6 | 915 | #endif |
whismanoid | 32:4c183afd82f6 | 916 | // Note: this case may fall through, by design. |
whismanoid | 29:a677458ac250 | 917 | case 0: // CAL_TYPE_000_SELF_CAL = 0x00, //!< 0b000 |
whismanoid | 29:a677458ac250 | 918 | case 4: // CAL_TYPE_100_SYS_OFF_A = 0x04, //!< 0b100 |
whismanoid | 29:a677458ac250 | 919 | case 5: // CAL_TYPE_101_SYS_GAIN_A = 0x05, //!< 0b101 |
whismanoid | 29:a677458ac250 | 920 | case 6: // CAL_TYPE_110_SYS_OFF_B = 0x06, //!< 0b110 |
whismanoid | 29:a677458ac250 | 921 | case 7: // CAL_TYPE_111_SYS_GAIN_B = 0x07, //!< 0b111 |
whismanoid | 25:c4be3afbfafd | 922 | { |
whismanoid | 32:4c183afd82f6 | 923 | // wait for status CAL_RDY |
whismanoid | 32:4c183afd82f6 | 924 | // Worst-case (longest) calibration time = 2 x 1 sample/second = 2 seconds |
whismanoid | 32:4c183afd82f6 | 925 | for (int futility_countdown = loop_limit; |
whismanoid | 32:4c183afd82f6 | 926 | ((futility_countdown > 0) && |
whismanoid | 26:298726bd5a3f | 927 | ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000004_CAL_RDY) == 0)); |
whismanoid | 32:4c183afd82f6 | 928 | futility_countdown--) |
whismanoid | 26:298726bd5a3f | 929 | { |
whismanoid | 32:4c183afd82f6 | 930 | for (int futility_countdown_inner = 32767; |
whismanoid | 32:4c183afd82f6 | 931 | ((futility_countdown_inner > 0) && |
whismanoid | 32:4c183afd82f6 | 932 | ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000004_CAL_RDY) == 0)); |
whismanoid | 32:4c183afd82f6 | 933 | futility_countdown_inner--) |
whismanoid | 32:4c183afd82f6 | 934 | { |
whismanoid | 32:4c183afd82f6 | 935 | RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status); |
whismanoid | 32:4c183afd82f6 | 936 | } |
whismanoid | 26:298726bd5a3f | 937 | } |
whismanoid | 25:c4be3afbfafd | 938 | } |
whismanoid | 29:a677458ac250 | 939 | break; |
whismanoid | 24:428b7670e45f | 940 | } |
whismanoid | 24:428b7670e45f | 941 | } |
whismanoid | 0:68e64068330f | 942 | } |
whismanoid | 0:68e64068330f | 943 | break; |
whismanoid | 0:68e64068330f | 944 | case 16: // 16-bit register size |
whismanoid | 0:68e64068330f | 945 | { |
whismanoid | 0:68e64068330f | 946 | // SPI 24-bit or 32-bit transfer |
whismanoid | 0:68e64068330f | 947 | // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd |
whismanoid | 0:68e64068330f | 948 | // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx |
whismanoid | 0:68e64068330f | 949 | // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_0000_0000 |
whismanoid | 0:68e64068330f | 950 | // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx |
whismanoid | 10:7adee48a7f82 | 951 | int32_t mosiData32 = ((int32_t)commandByte << 24) | (((int32_t)regData & 0xFFFF) << 8); |
whismanoid | 0:68e64068330f | 952 | SPIoutputCS(0); |
whismanoid | 0:68e64068330f | 953 | SPIreadWrite32bits(mosiData32); |
whismanoid | 0:68e64068330f | 954 | SPIoutputCS(1); |
whismanoid | 0:68e64068330f | 955 | } |
whismanoid | 0:68e64068330f | 956 | break; |
whismanoid | 0:68e64068330f | 957 | case 24: // 24-bit register size |
whismanoid | 0:68e64068330f | 958 | { |
whismanoid | 0:68e64068330f | 959 | // SPI 32-bit transfer |
whismanoid | 0:68e64068330f | 960 | // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd |
whismanoid | 0:68e64068330f | 961 | // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx |
whismanoid | 10:7adee48a7f82 | 962 | int32_t mosiData32 = ((int32_t)commandByte << 24) | ((int32_t)regData & 0x00FFFFFF); |
whismanoid | 0:68e64068330f | 963 | SPIoutputCS(0); |
whismanoid | 0:68e64068330f | 964 | SPIreadWrite32bits(mosiData32); |
whismanoid | 0:68e64068330f | 965 | SPIoutputCS(1); |
whismanoid | 0:68e64068330f | 966 | } |
whismanoid | 0:68e64068330f | 967 | break; |
whismanoid | 0:68e64068330f | 968 | } |
whismanoid | 0:68e64068330f | 969 | |
whismanoid | 0:68e64068330f | 970 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 971 | // success |
whismanoid | 0:68e64068330f | 972 | return 1; |
whismanoid | 0:68e64068330f | 973 | } |
whismanoid | 0:68e64068330f | 974 | |
whismanoid | 0:68e64068330f | 975 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 976 | // Read an 8-bit MAX11410 register |
whismanoid | 0:68e64068330f | 977 | // |
whismanoid | 11:abde565b8497 | 978 | // CMDOP_1aaa_aaaa_ReadRegister bit is set 1 indicating a read operation. |
whismanoid | 0:68e64068330f | 979 | // |
whismanoid | 0:68e64068330f | 980 | // MAX11410 register length can be determined by function RegSize. |
whismanoid | 0:68e64068330f | 981 | // |
whismanoid | 0:68e64068330f | 982 | // For 8-bit register size: |
whismanoid | 0:68e64068330f | 983 | // |
whismanoid | 0:68e64068330f | 984 | // SPI 16-bit transfer |
whismanoid | 0:68e64068330f | 985 | // |
whismanoid | 0:68e64068330f | 986 | // SPI MOSI = 1aaa_aaaa_0000_0000 |
whismanoid | 0:68e64068330f | 987 | // |
whismanoid | 0:68e64068330f | 988 | // SPI MISO = xxxx_xxxx_dddd_dddd |
whismanoid | 0:68e64068330f | 989 | // |
whismanoid | 0:68e64068330f | 990 | // For 16-bit register size: |
whismanoid | 0:68e64068330f | 991 | // |
whismanoid | 0:68e64068330f | 992 | // SPI 24-bit or 32-bit transfer |
whismanoid | 0:68e64068330f | 993 | // |
whismanoid | 0:68e64068330f | 994 | // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000 |
whismanoid | 0:68e64068330f | 995 | // |
whismanoid | 0:68e64068330f | 996 | // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd |
whismanoid | 0:68e64068330f | 997 | // |
whismanoid | 0:68e64068330f | 998 | // For 24-bit register size: |
whismanoid | 0:68e64068330f | 999 | // |
whismanoid | 0:68e64068330f | 1000 | // SPI 32-bit transfer |
whismanoid | 0:68e64068330f | 1001 | // |
whismanoid | 0:68e64068330f | 1002 | // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000 |
whismanoid | 0:68e64068330f | 1003 | // |
whismanoid | 0:68e64068330f | 1004 | // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd |
whismanoid | 0:68e64068330f | 1005 | // |
whismanoid | 0:68e64068330f | 1006 | // |
whismanoid | 0:68e64068330f | 1007 | // @return 1 on success; 0 on failure |
whismanoid | 10:7adee48a7f82 | 1008 | uint8_t MAX11410::RegRead(MAX11410_CMD_enum_t commandByte, uint32_t* ptrRegData) |
whismanoid | 0:68e64068330f | 1009 | { |
whismanoid | 0:68e64068330f | 1010 | |
whismanoid | 0:68e64068330f | 1011 | //---------------------------------------- |
whismanoid | 21:847b2220e96e | 1012 | // switch based on register address size RegSize(regAddress) |
whismanoid | 11:abde565b8497 | 1013 | commandByte = (MAX11410_CMD_enum_t)((commandByte &~ CMDOP_1aaa_aaaa_ReadRegister) & 0xFF); |
whismanoid | 10:7adee48a7f82 | 1014 | switch(RegSize(commandByte)) |
whismanoid | 0:68e64068330f | 1015 | { |
whismanoid | 0:68e64068330f | 1016 | case 8: // 8-bit register size |
whismanoid | 0:68e64068330f | 1017 | { |
whismanoid | 0:68e64068330f | 1018 | // SPI 16-bit transfer |
whismanoid | 0:68e64068330f | 1019 | // SPI MOSI = 1aaa_aaaa_0000_0000 |
whismanoid | 0:68e64068330f | 1020 | // SPI MISO = xxxx_xxxx_dddd_dddd |
whismanoid | 11:abde565b8497 | 1021 | int16_t mosiData16 = ((CMDOP_1aaa_aaaa_ReadRegister | (int16_t)commandByte) << 8) | ((int16_t)0); |
whismanoid | 0:68e64068330f | 1022 | SPIoutputCS(0); |
whismanoid | 0:68e64068330f | 1023 | int16_t misoData16 = SPIreadWrite16bits(mosiData16); |
whismanoid | 0:68e64068330f | 1024 | SPIoutputCS(1); |
whismanoid | 0:68e64068330f | 1025 | (*ptrRegData) = (misoData16 & 0x00FF); |
whismanoid | 0:68e64068330f | 1026 | } |
whismanoid | 0:68e64068330f | 1027 | break; |
whismanoid | 0:68e64068330f | 1028 | case 16: // 16-bit register size |
whismanoid | 0:68e64068330f | 1029 | { |
whismanoid | 0:68e64068330f | 1030 | // SPI 24-bit or 32-bit transfer |
whismanoid | 0:68e64068330f | 1031 | // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000 |
whismanoid | 0:68e64068330f | 1032 | // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd |
whismanoid | 0:68e64068330f | 1033 | // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000 |
whismanoid | 0:68e64068330f | 1034 | // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_xxxx_xxxx |
whismanoid | 11:abde565b8497 | 1035 | int32_t mosiData32 = ((CMDOP_1aaa_aaaa_ReadRegister | (int32_t)commandByte) << 24); |
whismanoid | 0:68e64068330f | 1036 | SPIoutputCS(0); |
whismanoid | 0:68e64068330f | 1037 | int32_t misoData32 = SPIreadWrite32bits(mosiData32); |
whismanoid | 0:68e64068330f | 1038 | SPIoutputCS(1); |
whismanoid | 0:68e64068330f | 1039 | (*ptrRegData) = ((misoData32 >> 8) & 0x00FFFF); |
whismanoid | 0:68e64068330f | 1040 | } |
whismanoid | 0:68e64068330f | 1041 | break; |
whismanoid | 0:68e64068330f | 1042 | case 24: // 24-bit register size |
whismanoid | 0:68e64068330f | 1043 | { |
whismanoid | 0:68e64068330f | 1044 | // SPI 32-bit transfer |
whismanoid | 0:68e64068330f | 1045 | // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000 |
whismanoid | 0:68e64068330f | 1046 | // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd |
whismanoid | 11:abde565b8497 | 1047 | int32_t mosiData32 = ((CMDOP_1aaa_aaaa_ReadRegister | (int32_t)commandByte) << 24); |
whismanoid | 0:68e64068330f | 1048 | SPIoutputCS(0); |
whismanoid | 0:68e64068330f | 1049 | int32_t misoData32 = SPIreadWrite32bits(mosiData32); |
whismanoid | 0:68e64068330f | 1050 | SPIoutputCS(1); |
whismanoid | 0:68e64068330f | 1051 | (*ptrRegData) = (misoData32 & 0x00FFFFFF); |
whismanoid | 0:68e64068330f | 1052 | } |
whismanoid | 0:68e64068330f | 1053 | break; |
whismanoid | 0:68e64068330f | 1054 | } |
whismanoid | 0:68e64068330f | 1055 | |
whismanoid | 0:68e64068330f | 1056 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 1057 | // success |
whismanoid | 0:68e64068330f | 1058 | return 1; |
whismanoid | 0:68e64068330f | 1059 | } |
whismanoid | 0:68e64068330f | 1060 | |
whismanoid | 0:68e64068330f | 1061 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 1062 | // Return the size of a MAX11410 register |
whismanoid | 0:68e64068330f | 1063 | // |
whismanoid | 0:68e64068330f | 1064 | // @return 8 for 8-bit, 16 for 16-bit, 24 for 24-bit, else 0 for undefined register size |
whismanoid | 10:7adee48a7f82 | 1065 | uint8_t MAX11410::RegSize(MAX11410_CMD_enum_t commandByte) |
whismanoid | 0:68e64068330f | 1066 | { |
whismanoid | 0:68e64068330f | 1067 | |
whismanoid | 0:68e64068330f | 1068 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 1069 | // switch based on register address value regAddress |
whismanoid | 11:abde565b8497 | 1070 | commandByte = (MAX11410_CMD_enum_t)((commandByte &~ CMDOP_1aaa_aaaa_ReadRegister) & 0xFF); |
whismanoid | 10:7adee48a7f82 | 1071 | switch(commandByte) |
whismanoid | 0:68e64068330f | 1072 | { |
whismanoid | 0:68e64068330f | 1073 | default: |
whismanoid | 0:68e64068330f | 1074 | return 0; // undefined register size |
whismanoid | 0:68e64068330f | 1075 | case CMD_r000_0000_xxxx_xxdd_PD: |
whismanoid | 0:68e64068330f | 1076 | case CMD_r000_0001_xddd_xxdd_CONV_START: |
whismanoid | 0:68e64068330f | 1077 | case CMD_r000_0010_xddd_dddd_SEQ_START: |
whismanoid | 0:68e64068330f | 1078 | case CMD_r000_0011_xxxx_xddd_CAL_START: |
whismanoid | 0:68e64068330f | 1079 | case CMD_r000_0100_dddd_xddd_GP0_CTRL: |
whismanoid | 0:68e64068330f | 1080 | case CMD_r000_0101_dddd_xddd_GP1_CTRL: |
whismanoid | 0:68e64068330f | 1081 | case CMD_r000_0110_xddd_xxdd_GP_CONV: |
whismanoid | 0:68e64068330f | 1082 | case CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR: |
whismanoid | 0:68e64068330f | 1083 | case CMD_r000_1000_x0dd_dddd_FILTER: |
whismanoid | 0:68e64068330f | 1084 | case CMD_r000_1001_dddd_dddd_CTRL: |
whismanoid | 0:68e64068330f | 1085 | case CMD_r000_1010_dddd_dddd_SOURCE: |
whismanoid | 0:68e64068330f | 1086 | case CMD_r000_1011_dddd_dddd_MUX_CTRL0: |
whismanoid | 0:68e64068330f | 1087 | case CMD_r000_1100_dddd_dddd_MUX_CTRL1: |
whismanoid | 0:68e64068330f | 1088 | case CMD_r000_1101_dddd_dddd_MUX_CTRL2: |
whismanoid | 23:22e7830bcccb | 1089 | case CMD_r000_1110_00ss_0ggg_PGA: |
whismanoid | 0:68e64068330f | 1090 | case CMD_r000_1111_dddd_dddd_WAIT_EXT: |
whismanoid | 0:68e64068330f | 1091 | case CMD_r001_0000_xxxx_xxxx_WAIT_START: |
whismanoid | 0:68e64068330f | 1092 | return 8; // 8-bit register size |
whismanoid | 0:68e64068330f | 1093 | case CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID: |
whismanoid | 0:68e64068330f | 1094 | case CMD_r001_0010_xxxx_xxxx_dddd_xxdd_dddd_dddd_SYSC_SEL: |
whismanoid | 0:68e64068330f | 1095 | case CMD_r001_0011_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_A: |
whismanoid | 0:68e64068330f | 1096 | case CMD_r001_0100_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_B: |
whismanoid | 0:68e64068330f | 1097 | case CMD_r001_0101_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_A: |
whismanoid | 0:68e64068330f | 1098 | case CMD_r001_0110_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_B: |
whismanoid | 0:68e64068330f | 1099 | case CMD_r001_0111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_OFF: |
whismanoid | 0:68e64068330f | 1100 | case CMD_r001_1000_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_1: |
whismanoid | 0:68e64068330f | 1101 | case CMD_r001_1001_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_2: |
whismanoid | 0:68e64068330f | 1102 | case CMD_r001_1010_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_4: |
whismanoid | 0:68e64068330f | 1103 | case CMD_r001_1011_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_8: |
whismanoid | 0:68e64068330f | 1104 | case CMD_r001_1100_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_16: |
whismanoid | 0:68e64068330f | 1105 | case CMD_r001_1101_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_32: |
whismanoid | 0:68e64068330f | 1106 | case CMD_r001_1110_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_64: |
whismanoid | 0:68e64068330f | 1107 | case CMD_r001_1111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_128: |
whismanoid | 0:68e64068330f | 1108 | case CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0: |
whismanoid | 0:68e64068330f | 1109 | case CMD_r010_0001_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH1: |
whismanoid | 0:68e64068330f | 1110 | case CMD_r010_0010_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH2: |
whismanoid | 0:68e64068330f | 1111 | case CMD_r010_0011_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH3: |
whismanoid | 0:68e64068330f | 1112 | case CMD_r010_0100_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH4: |
whismanoid | 0:68e64068330f | 1113 | case CMD_r010_0101_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH5: |
whismanoid | 0:68e64068330f | 1114 | case CMD_r010_0110_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH6: |
whismanoid | 0:68e64068330f | 1115 | case CMD_r010_0111_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH7: |
whismanoid | 0:68e64068330f | 1116 | case CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0: |
whismanoid | 0:68e64068330f | 1117 | case CMD_r010_1001_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH1: |
whismanoid | 0:68e64068330f | 1118 | case CMD_r010_1010_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH2: |
whismanoid | 0:68e64068330f | 1119 | case CMD_r010_1011_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH3: |
whismanoid | 0:68e64068330f | 1120 | case CMD_r010_1100_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH4: |
whismanoid | 0:68e64068330f | 1121 | case CMD_r010_1101_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH5: |
whismanoid | 0:68e64068330f | 1122 | case CMD_r010_1110_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH6: |
whismanoid | 0:68e64068330f | 1123 | case CMD_r010_1111_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH7: |
whismanoid | 0:68e64068330f | 1124 | case CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0: |
whismanoid | 0:68e64068330f | 1125 | case CMD_r011_0001_dddd_dddd_dddd_dddd_dddd_dddd_DATA1: |
whismanoid | 0:68e64068330f | 1126 | case CMD_r011_0010_dddd_dddd_dddd_dddd_dddd_dddd_DATA2: |
whismanoid | 0:68e64068330f | 1127 | case CMD_r011_0011_dddd_dddd_dddd_dddd_dddd_dddd_DATA3: |
whismanoid | 0:68e64068330f | 1128 | case CMD_r011_0100_dddd_dddd_dddd_dddd_dddd_dddd_DATA4: |
whismanoid | 0:68e64068330f | 1129 | case CMD_r011_0101_dddd_dddd_dddd_dddd_dddd_dddd_DATA5: |
whismanoid | 0:68e64068330f | 1130 | case CMD_r011_0110_dddd_dddd_dddd_dddd_dddd_dddd_DATA6: |
whismanoid | 0:68e64068330f | 1131 | case CMD_r011_0111_dddd_dddd_dddd_dddd_dddd_dddd_DATA7: |
whismanoid | 0:68e64068330f | 1132 | case CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS: |
whismanoid | 0:68e64068330f | 1133 | case CMD_r011_1001_dddd_dddd_dddd_dddd_dxxd_dddd_STATUS_IE: |
whismanoid | 0:68e64068330f | 1134 | return 24; // 24-bit register size |
whismanoid | 0:68e64068330f | 1135 | case CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0: |
whismanoid | 0:68e64068330f | 1136 | case CMD_r011_1011_xaaa_aaaa_dddd_dddd_UC_1: |
whismanoid | 0:68e64068330f | 1137 | case CMD_r011_1100_xaaa_aaaa_dddd_dddd_UC_2: |
whismanoid | 0:68e64068330f | 1138 | case CMD_r011_1101_xaaa_aaaa_dddd_dddd_UC_3: |
whismanoid | 0:68e64068330f | 1139 | case CMD_r011_1110_xaaa_aaaa_dddd_dddd_UC_4: |
whismanoid | 0:68e64068330f | 1140 | case CMD_r011_1111_xaaa_aaaa_dddd_dddd_UC_5: |
whismanoid | 0:68e64068330f | 1141 | case CMD_r100_0000_xaaa_aaaa_dddd_dddd_UC_6: |
whismanoid | 0:68e64068330f | 1142 | case CMD_r100_0001_xaaa_aaaa_dddd_dddd_UC_7: |
whismanoid | 0:68e64068330f | 1143 | case CMD_r100_0010_xaaa_aaaa_dddd_dddd_UC_8: |
whismanoid | 0:68e64068330f | 1144 | case CMD_r100_0011_xaaa_aaaa_dddd_dddd_UC_9: |
whismanoid | 0:68e64068330f | 1145 | case CMD_r100_0100_xaaa_aaaa_dddd_dddd_UC_10: |
whismanoid | 0:68e64068330f | 1146 | case CMD_r100_0101_xaaa_aaaa_dddd_dddd_UC_11: |
whismanoid | 0:68e64068330f | 1147 | case CMD_r100_0110_xaaa_aaaa_dddd_dddd_UC_12: |
whismanoid | 0:68e64068330f | 1148 | case CMD_r100_0111_xaaa_aaaa_dddd_dddd_UC_13: |
whismanoid | 0:68e64068330f | 1149 | case CMD_r100_1000_xaaa_aaaa_dddd_dddd_UC_14: |
whismanoid | 0:68e64068330f | 1150 | case CMD_r100_1001_xaaa_aaaa_dddd_dddd_UC_15: |
whismanoid | 0:68e64068330f | 1151 | case CMD_r100_1010_xaaa_aaaa_dddd_dddd_UC_16: |
whismanoid | 0:68e64068330f | 1152 | case CMD_r100_1011_xaaa_aaaa_dddd_dddd_UC_17: |
whismanoid | 0:68e64068330f | 1153 | case CMD_r100_1100_xaaa_aaaa_dddd_dddd_UC_18: |
whismanoid | 0:68e64068330f | 1154 | case CMD_r100_1101_xaaa_aaaa_dddd_dddd_UC_19: |
whismanoid | 0:68e64068330f | 1155 | case CMD_r100_1110_xaaa_aaaa_dddd_dddd_UC_20: |
whismanoid | 0:68e64068330f | 1156 | case CMD_r100_1111_xaaa_aaaa_dddd_dddd_UC_21: |
whismanoid | 0:68e64068330f | 1157 | case CMD_r101_0000_xaaa_aaaa_dddd_dddd_UC_22: |
whismanoid | 0:68e64068330f | 1158 | case CMD_r101_0001_xaaa_aaaa_dddd_dddd_UC_23: |
whismanoid | 0:68e64068330f | 1159 | case CMD_r101_0010_xaaa_aaaa_dddd_dddd_UC_24: |
whismanoid | 0:68e64068330f | 1160 | case CMD_r101_0011_xaaa_aaaa_dddd_dddd_UC_25: |
whismanoid | 0:68e64068330f | 1161 | case CMD_r101_0100_xaaa_aaaa_dddd_dddd_UC_26: |
whismanoid | 0:68e64068330f | 1162 | case CMD_r101_0101_xaaa_aaaa_dddd_dddd_UC_27: |
whismanoid | 0:68e64068330f | 1163 | case CMD_r101_0110_xaaa_aaaa_dddd_dddd_UC_28: |
whismanoid | 0:68e64068330f | 1164 | case CMD_r101_0111_xaaa_aaaa_dddd_dddd_UC_29: |
whismanoid | 0:68e64068330f | 1165 | case CMD_r101_1000_xaaa_aaaa_dddd_dddd_UC_30: |
whismanoid | 0:68e64068330f | 1166 | case CMD_r101_1001_xaaa_aaaa_dddd_dddd_UC_31: |
whismanoid | 0:68e64068330f | 1167 | case CMD_r101_1010_xaaa_aaaa_dddd_dddd_UC_32: |
whismanoid | 0:68e64068330f | 1168 | case CMD_r101_1011_xaaa_aaaa_dddd_dddd_UC_33: |
whismanoid | 0:68e64068330f | 1169 | case CMD_r101_1100_xaaa_aaaa_dddd_dddd_UC_34: |
whismanoid | 0:68e64068330f | 1170 | case CMD_r101_1101_xaaa_aaaa_dddd_dddd_UC_35: |
whismanoid | 0:68e64068330f | 1171 | case CMD_r101_1110_xaaa_aaaa_dddd_dddd_UC_36: |
whismanoid | 0:68e64068330f | 1172 | case CMD_r101_1111_xaaa_aaaa_dddd_dddd_UC_37: |
whismanoid | 0:68e64068330f | 1173 | case CMD_r110_0000_xaaa_aaaa_dddd_dddd_UC_38: |
whismanoid | 0:68e64068330f | 1174 | case CMD_r110_0001_xaaa_aaaa_dddd_dddd_UC_39: |
whismanoid | 0:68e64068330f | 1175 | case CMD_r110_0010_xaaa_aaaa_dddd_dddd_UC_40: |
whismanoid | 0:68e64068330f | 1176 | case CMD_r110_0011_xaaa_aaaa_dddd_dddd_UC_41: |
whismanoid | 0:68e64068330f | 1177 | case CMD_r110_0100_xaaa_aaaa_dddd_dddd_UC_42: |
whismanoid | 0:68e64068330f | 1178 | case CMD_r110_0101_xaaa_aaaa_dddd_dddd_UC_43: |
whismanoid | 0:68e64068330f | 1179 | case CMD_r110_0110_xaaa_aaaa_dddd_dddd_UC_44: |
whismanoid | 0:68e64068330f | 1180 | case CMD_r110_0111_xaaa_aaaa_dddd_dddd_UC_45: |
whismanoid | 0:68e64068330f | 1181 | case CMD_r110_1000_xaaa_aaaa_dddd_dddd_UC_46: |
whismanoid | 0:68e64068330f | 1182 | case CMD_r110_1001_xaaa_aaaa_dddd_dddd_UC_47: |
whismanoid | 0:68e64068330f | 1183 | case CMD_r110_1010_xaaa_aaaa_dddd_dddd_UC_48: |
whismanoid | 0:68e64068330f | 1184 | case CMD_r110_1011_xaaa_aaaa_dddd_dddd_UC_49: |
whismanoid | 0:68e64068330f | 1185 | case CMD_r110_1100_xaaa_aaaa_dddd_dddd_UC_50: |
whismanoid | 0:68e64068330f | 1186 | case CMD_r110_1101_xaaa_aaaa_dddd_dddd_UC_51: |
whismanoid | 0:68e64068330f | 1187 | case CMD_r110_1110_xaaa_aaaa_dddd_dddd_UC_52: |
whismanoid | 0:68e64068330f | 1188 | case CMD_r110_1111_xxxx_xxxx_xaaa_aaaa_UCADDR: |
whismanoid | 0:68e64068330f | 1189 | return 16; // 16-bit register size |
whismanoid | 0:68e64068330f | 1190 | } |
whismanoid | 0:68e64068330f | 1191 | } |
whismanoid | 0:68e64068330f | 1192 | |
whismanoid | 0:68e64068330f | 1193 | //---------------------------------------- |
whismanoid | 11:abde565b8497 | 1194 | // Decode operation from commandByte |
whismanoid | 11:abde565b8497 | 1195 | // |
whismanoid | 11:abde565b8497 | 1196 | // @return operation such as idle, read register, write register, etc. |
whismanoid | 11:abde565b8497 | 1197 | MAX11410::MAX11410_CMDOP_enum_t MAX11410::DecodeCommand(MAX11410_CMD_enum_t commandByte) |
whismanoid | 11:abde565b8497 | 1198 | { |
whismanoid | 11:abde565b8497 | 1199 | |
whismanoid | 11:abde565b8497 | 1200 | //---------------------------------------- |
whismanoid | 11:abde565b8497 | 1201 | // decode operation from command byte |
whismanoid | 11:abde565b8497 | 1202 | switch (commandByte & 0x80) |
whismanoid | 11:abde565b8497 | 1203 | { |
whismanoid | 11:abde565b8497 | 1204 | default: |
whismanoid | 11:abde565b8497 | 1205 | case CMDOP_0aaa_aaaa_WriteRegister: |
whismanoid | 11:abde565b8497 | 1206 | return CMDOP_0aaa_aaaa_WriteRegister; |
whismanoid | 11:abde565b8497 | 1207 | case CMDOP_1aaa_aaaa_ReadRegister: |
whismanoid | 11:abde565b8497 | 1208 | return CMDOP_1aaa_aaaa_ReadRegister; |
whismanoid | 11:abde565b8497 | 1209 | } |
whismanoid | 11:abde565b8497 | 1210 | } |
whismanoid | 11:abde565b8497 | 1211 | |
whismanoid | 11:abde565b8497 | 1212 | //---------------------------------------- |
whismanoid | 10:7adee48a7f82 | 1213 | // Return the address field of a MAX11410 register |
whismanoid | 10:7adee48a7f82 | 1214 | // |
whismanoid | 10:7adee48a7f82 | 1215 | // @return register address field as given in datasheet |
whismanoid | 10:7adee48a7f82 | 1216 | uint8_t MAX11410::RegAddrOfCommand(MAX11410_CMD_enum_t commandByte) |
whismanoid | 10:7adee48a7f82 | 1217 | { |
whismanoid | 10:7adee48a7f82 | 1218 | |
whismanoid | 10:7adee48a7f82 | 1219 | //---------------------------------------- |
whismanoid | 10:7adee48a7f82 | 1220 | // extract register address value from command byte |
whismanoid | 11:abde565b8497 | 1221 | return (uint8_t)((commandByte &~ CMDOP_1aaa_aaaa_ReadRegister) & 0xFF); |
whismanoid | 10:7adee48a7f82 | 1222 | } |
whismanoid | 10:7adee48a7f82 | 1223 | |
whismanoid | 10:7adee48a7f82 | 1224 | //---------------------------------------- |
whismanoid | 10:7adee48a7f82 | 1225 | // Test whether a command byte is a register read command |
whismanoid | 10:7adee48a7f82 | 1226 | // |
whismanoid | 10:7adee48a7f82 | 1227 | // @return true if command byte is a register read command |
whismanoid | 10:7adee48a7f82 | 1228 | uint8_t MAX11410::IsRegReadCommand(MAX11410_CMD_enum_t commandByte) |
whismanoid | 10:7adee48a7f82 | 1229 | { |
whismanoid | 10:7adee48a7f82 | 1230 | |
whismanoid | 10:7adee48a7f82 | 1231 | //---------------------------------------- |
whismanoid | 10:7adee48a7f82 | 1232 | // Test whether a command byte is a register read command |
whismanoid | 11:abde565b8497 | 1233 | return (commandByte & CMDOP_1aaa_aaaa_ReadRegister) ? 1 : 0; |
whismanoid | 10:7adee48a7f82 | 1234 | } |
whismanoid | 10:7adee48a7f82 | 1235 | |
whismanoid | 10:7adee48a7f82 | 1236 | //---------------------------------------- |
whismanoid | 32:4c183afd82f6 | 1237 | // Test whether a command byte is a register write command |
whismanoid | 32:4c183afd82f6 | 1238 | // |
whismanoid | 32:4c183afd82f6 | 1239 | // @return true if command byte is a register write command |
whismanoid | 32:4c183afd82f6 | 1240 | uint8_t MAX11410::IsRegWriteCommand(MAX11410_CMD_enum_t commandByte) |
whismanoid | 32:4c183afd82f6 | 1241 | { |
whismanoid | 32:4c183afd82f6 | 1242 | |
whismanoid | 32:4c183afd82f6 | 1243 | //---------------------------------------- |
whismanoid | 32:4c183afd82f6 | 1244 | // Test whether a command byte is a register write command |
whismanoid | 32:4c183afd82f6 | 1245 | return (commandByte & CMDOP_1aaa_aaaa_ReadRegister) ? 0 : 1; |
whismanoid | 32:4c183afd82f6 | 1246 | } |
whismanoid | 32:4c183afd82f6 | 1247 | |
whismanoid | 32:4c183afd82f6 | 1248 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 1249 | // Return the name of a MAX11410 register |
whismanoid | 0:68e64068330f | 1250 | // |
whismanoid | 0:68e64068330f | 1251 | // @return null-terminated constant C string containing register name or empty string |
whismanoid | 10:7adee48a7f82 | 1252 | const char* MAX11410::RegName(MAX11410_CMD_enum_t commandByte) |
whismanoid | 0:68e64068330f | 1253 | { |
whismanoid | 0:68e64068330f | 1254 | |
whismanoid | 0:68e64068330f | 1255 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 1256 | // switch based on register address value regAddress |
whismanoid | 11:abde565b8497 | 1257 | commandByte = (MAX11410_CMD_enum_t)((commandByte &~ CMDOP_1aaa_aaaa_ReadRegister) & 0xFF); |
whismanoid | 10:7adee48a7f82 | 1258 | switch(commandByte) |
whismanoid | 0:68e64068330f | 1259 | { |
whismanoid | 0:68e64068330f | 1260 | default: |
whismanoid | 0:68e64068330f | 1261 | return ""; // undefined register |
whismanoid | 0:68e64068330f | 1262 | case CMD_r000_0000_xxxx_xxdd_PD: return "PD"; |
whismanoid | 0:68e64068330f | 1263 | case CMD_r000_0001_xddd_xxdd_CONV_START: return "CONV_START"; |
whismanoid | 0:68e64068330f | 1264 | case CMD_r000_0010_xddd_dddd_SEQ_START: return "SEQ_START"; |
whismanoid | 0:68e64068330f | 1265 | case CMD_r000_0011_xxxx_xddd_CAL_START: return "CAL_START"; |
whismanoid | 0:68e64068330f | 1266 | case CMD_r000_0100_dddd_xddd_GP0_CTRL: return "GP0_CTRL"; |
whismanoid | 0:68e64068330f | 1267 | case CMD_r000_0101_dddd_xddd_GP1_CTRL: return "GP1_CTRL"; |
whismanoid | 0:68e64068330f | 1268 | case CMD_r000_0110_xddd_xxdd_GP_CONV: return "GP_CONV"; |
whismanoid | 0:68e64068330f | 1269 | case CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR: return "GP_SEQ_ADDR"; |
whismanoid | 0:68e64068330f | 1270 | case CMD_r000_1000_x0dd_dddd_FILTER: return "FILTER"; |
whismanoid | 0:68e64068330f | 1271 | case CMD_r000_1001_dddd_dddd_CTRL: return "CTRL"; |
whismanoid | 0:68e64068330f | 1272 | case CMD_r000_1010_dddd_dddd_SOURCE: return "SOURCE"; |
whismanoid | 0:68e64068330f | 1273 | case CMD_r000_1011_dddd_dddd_MUX_CTRL0: return "MUX_CTRL0"; |
whismanoid | 0:68e64068330f | 1274 | case CMD_r000_1100_dddd_dddd_MUX_CTRL1: return "MUX_CTRL1"; |
whismanoid | 0:68e64068330f | 1275 | case CMD_r000_1101_dddd_dddd_MUX_CTRL2: return "MUX_CTRL2"; |
whismanoid | 23:22e7830bcccb | 1276 | case CMD_r000_1110_00ss_0ggg_PGA: return "PGA"; |
whismanoid | 0:68e64068330f | 1277 | case CMD_r000_1111_dddd_dddd_WAIT_EXT: return "WAIT_EXT"; |
whismanoid | 0:68e64068330f | 1278 | case CMD_r001_0000_xxxx_xxxx_WAIT_START: return "WAIT_START"; |
whismanoid | 0:68e64068330f | 1279 | case CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID: return "PART_ID"; |
whismanoid | 0:68e64068330f | 1280 | case CMD_r001_0010_xxxx_xxxx_dddd_xxdd_dddd_dddd_SYSC_SEL: return "SYSC_SEL"; |
whismanoid | 0:68e64068330f | 1281 | case CMD_r001_0011_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_A: return "SYS_OFF_A"; |
whismanoid | 0:68e64068330f | 1282 | case CMD_r001_0100_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_B: return "SYS_OFF_B"; |
whismanoid | 0:68e64068330f | 1283 | case CMD_r001_0101_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_A: return "SYS_GAIN_A"; |
whismanoid | 0:68e64068330f | 1284 | case CMD_r001_0110_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_B: return "SYS_GAIN_B"; |
whismanoid | 0:68e64068330f | 1285 | case CMD_r001_0111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_OFF: return "SELF_OFF"; |
whismanoid | 0:68e64068330f | 1286 | case CMD_r001_1000_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_1: return "SELF_GAIN_1"; |
whismanoid | 0:68e64068330f | 1287 | case CMD_r001_1001_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_2: return "SELF_GAIN_2"; |
whismanoid | 0:68e64068330f | 1288 | case CMD_r001_1010_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_4: return "SELF_GAIN_4"; |
whismanoid | 0:68e64068330f | 1289 | case CMD_r001_1011_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_8: return "SELF_GAIN_8"; |
whismanoid | 0:68e64068330f | 1290 | case CMD_r001_1100_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_16: return "SELF_GAIN_16"; |
whismanoid | 0:68e64068330f | 1291 | case CMD_r001_1101_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_32: return "SELF_GAIN_32"; |
whismanoid | 0:68e64068330f | 1292 | case CMD_r001_1110_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_64: return "SELF_GAIN_64"; |
whismanoid | 0:68e64068330f | 1293 | case CMD_r001_1111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_128: return "SELF_GAIN_128"; |
whismanoid | 31:49a827a1fdc8 | 1294 | // Condense register names LTHRESH0..LTHRESH7 from CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0 |
whismanoid | 31:49a827a1fdc8 | 1295 | case CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0: |
whismanoid | 31:49a827a1fdc8 | 1296 | case CMD_r010_0001_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH1: |
whismanoid | 31:49a827a1fdc8 | 1297 | case CMD_r010_0010_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH2: |
whismanoid | 31:49a827a1fdc8 | 1298 | case CMD_r010_0011_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH3: |
whismanoid | 31:49a827a1fdc8 | 1299 | case CMD_r010_0100_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH4: |
whismanoid | 31:49a827a1fdc8 | 1300 | case CMD_r010_0101_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH5: |
whismanoid | 31:49a827a1fdc8 | 1301 | case CMD_r010_0110_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH6: |
whismanoid | 31:49a827a1fdc8 | 1302 | case CMD_r010_0111_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH7: |
whismanoid | 31:49a827a1fdc8 | 1303 | { |
whismanoid | 31:49a827a1fdc8 | 1304 | // Condense register names "LTHRESH#" from CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0 |
whismanoid | 31:49a827a1fdc8 | 1305 | int index = commandByte - CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0; |
whismanoid | 31:49a827a1fdc8 | 1306 | static char retValueString[] = "LTHRESH#"; |
whismanoid | 31:49a827a1fdc8 | 1307 | retValueString[7] = (index % 10) + '0'; |
whismanoid | 31:49a827a1fdc8 | 1308 | return retValueString; |
whismanoid | 31:49a827a1fdc8 | 1309 | }; |
whismanoid | 31:49a827a1fdc8 | 1310 | // Condense register names UTHRESH0..UTHRESH7 from CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0 |
whismanoid | 31:49a827a1fdc8 | 1311 | case CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0: |
whismanoid | 31:49a827a1fdc8 | 1312 | case CMD_r010_1001_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH1: |
whismanoid | 31:49a827a1fdc8 | 1313 | case CMD_r010_1010_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH2: |
whismanoid | 31:49a827a1fdc8 | 1314 | case CMD_r010_1011_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH3: |
whismanoid | 31:49a827a1fdc8 | 1315 | case CMD_r010_1100_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH4: |
whismanoid | 31:49a827a1fdc8 | 1316 | case CMD_r010_1101_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH5: |
whismanoid | 31:49a827a1fdc8 | 1317 | case CMD_r010_1110_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH6: |
whismanoid | 31:49a827a1fdc8 | 1318 | case CMD_r010_1111_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH7: |
whismanoid | 31:49a827a1fdc8 | 1319 | { |
whismanoid | 31:49a827a1fdc8 | 1320 | // Condense register names "UTHRESH#" from CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0 |
whismanoid | 31:49a827a1fdc8 | 1321 | int index = commandByte - CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0; |
whismanoid | 31:49a827a1fdc8 | 1322 | static char retValueString[] = "UTHRESH#"; |
whismanoid | 31:49a827a1fdc8 | 1323 | retValueString[7] = (index % 10) + '0'; |
whismanoid | 31:49a827a1fdc8 | 1324 | return retValueString; |
whismanoid | 31:49a827a1fdc8 | 1325 | }; |
whismanoid | 31:49a827a1fdc8 | 1326 | // Condense register names DATA0..DATA7 from CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0 |
whismanoid | 31:49a827a1fdc8 | 1327 | case CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0: |
whismanoid | 31:49a827a1fdc8 | 1328 | case CMD_r011_0001_dddd_dddd_dddd_dddd_dddd_dddd_DATA1: |
whismanoid | 31:49a827a1fdc8 | 1329 | case CMD_r011_0010_dddd_dddd_dddd_dddd_dddd_dddd_DATA2: |
whismanoid | 31:49a827a1fdc8 | 1330 | case CMD_r011_0011_dddd_dddd_dddd_dddd_dddd_dddd_DATA3: |
whismanoid | 31:49a827a1fdc8 | 1331 | case CMD_r011_0100_dddd_dddd_dddd_dddd_dddd_dddd_DATA4: |
whismanoid | 31:49a827a1fdc8 | 1332 | case CMD_r011_0101_dddd_dddd_dddd_dddd_dddd_dddd_DATA5: |
whismanoid | 31:49a827a1fdc8 | 1333 | case CMD_r011_0110_dddd_dddd_dddd_dddd_dddd_dddd_DATA6: |
whismanoid | 31:49a827a1fdc8 | 1334 | case CMD_r011_0111_dddd_dddd_dddd_dddd_dddd_dddd_DATA7: |
whismanoid | 31:49a827a1fdc8 | 1335 | { |
whismanoid | 31:49a827a1fdc8 | 1336 | // Condense register names "DATA#" from CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0 |
whismanoid | 31:49a827a1fdc8 | 1337 | int index = commandByte - CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0; |
whismanoid | 31:49a827a1fdc8 | 1338 | static char retValueString[] = "DATA#"; |
whismanoid | 31:49a827a1fdc8 | 1339 | retValueString[4] = (index % 10) + '0'; |
whismanoid | 31:49a827a1fdc8 | 1340 | return retValueString; |
whismanoid | 31:49a827a1fdc8 | 1341 | }; |
whismanoid | 0:68e64068330f | 1342 | case CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS: return "STATUS"; |
whismanoid | 0:68e64068330f | 1343 | case CMD_r011_1001_dddd_dddd_dddd_dddd_dxxd_dddd_STATUS_IE: return "STATUS_IE"; |
whismanoid | 31:49a827a1fdc8 | 1344 | // Condense register names UC_00..UC_52 from CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0 |
whismanoid | 30:980556537d9f | 1345 | case CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0: |
whismanoid | 30:980556537d9f | 1346 | case CMD_r011_1011_xaaa_aaaa_dddd_dddd_UC_1: |
whismanoid | 30:980556537d9f | 1347 | case CMD_r011_1100_xaaa_aaaa_dddd_dddd_UC_2: |
whismanoid | 30:980556537d9f | 1348 | case CMD_r011_1101_xaaa_aaaa_dddd_dddd_UC_3: |
whismanoid | 30:980556537d9f | 1349 | case CMD_r011_1110_xaaa_aaaa_dddd_dddd_UC_4: |
whismanoid | 30:980556537d9f | 1350 | case CMD_r011_1111_xaaa_aaaa_dddd_dddd_UC_5: |
whismanoid | 30:980556537d9f | 1351 | case CMD_r100_0000_xaaa_aaaa_dddd_dddd_UC_6: |
whismanoid | 30:980556537d9f | 1352 | case CMD_r100_0001_xaaa_aaaa_dddd_dddd_UC_7: |
whismanoid | 30:980556537d9f | 1353 | case CMD_r100_0010_xaaa_aaaa_dddd_dddd_UC_8: |
whismanoid | 30:980556537d9f | 1354 | case CMD_r100_0011_xaaa_aaaa_dddd_dddd_UC_9: |
whismanoid | 30:980556537d9f | 1355 | case CMD_r100_0100_xaaa_aaaa_dddd_dddd_UC_10: |
whismanoid | 30:980556537d9f | 1356 | case CMD_r100_0101_xaaa_aaaa_dddd_dddd_UC_11: |
whismanoid | 30:980556537d9f | 1357 | case CMD_r100_0110_xaaa_aaaa_dddd_dddd_UC_12: |
whismanoid | 30:980556537d9f | 1358 | case CMD_r100_0111_xaaa_aaaa_dddd_dddd_UC_13: |
whismanoid | 30:980556537d9f | 1359 | case CMD_r100_1000_xaaa_aaaa_dddd_dddd_UC_14: |
whismanoid | 30:980556537d9f | 1360 | case CMD_r100_1001_xaaa_aaaa_dddd_dddd_UC_15: |
whismanoid | 30:980556537d9f | 1361 | case CMD_r100_1010_xaaa_aaaa_dddd_dddd_UC_16: |
whismanoid | 30:980556537d9f | 1362 | case CMD_r100_1011_xaaa_aaaa_dddd_dddd_UC_17: |
whismanoid | 30:980556537d9f | 1363 | case CMD_r100_1100_xaaa_aaaa_dddd_dddd_UC_18: |
whismanoid | 30:980556537d9f | 1364 | case CMD_r100_1101_xaaa_aaaa_dddd_dddd_UC_19: |
whismanoid | 30:980556537d9f | 1365 | case CMD_r100_1110_xaaa_aaaa_dddd_dddd_UC_20: |
whismanoid | 30:980556537d9f | 1366 | case CMD_r100_1111_xaaa_aaaa_dddd_dddd_UC_21: |
whismanoid | 30:980556537d9f | 1367 | case CMD_r101_0000_xaaa_aaaa_dddd_dddd_UC_22: |
whismanoid | 30:980556537d9f | 1368 | case CMD_r101_0001_xaaa_aaaa_dddd_dddd_UC_23: |
whismanoid | 30:980556537d9f | 1369 | case CMD_r101_0010_xaaa_aaaa_dddd_dddd_UC_24: |
whismanoid | 30:980556537d9f | 1370 | case CMD_r101_0011_xaaa_aaaa_dddd_dddd_UC_25: |
whismanoid | 30:980556537d9f | 1371 | case CMD_r101_0100_xaaa_aaaa_dddd_dddd_UC_26: |
whismanoid | 30:980556537d9f | 1372 | case CMD_r101_0101_xaaa_aaaa_dddd_dddd_UC_27: |
whismanoid | 30:980556537d9f | 1373 | case CMD_r101_0110_xaaa_aaaa_dddd_dddd_UC_28: |
whismanoid | 30:980556537d9f | 1374 | case CMD_r101_0111_xaaa_aaaa_dddd_dddd_UC_29: |
whismanoid | 30:980556537d9f | 1375 | case CMD_r101_1000_xaaa_aaaa_dddd_dddd_UC_30: |
whismanoid | 30:980556537d9f | 1376 | case CMD_r101_1001_xaaa_aaaa_dddd_dddd_UC_31: |
whismanoid | 30:980556537d9f | 1377 | case CMD_r101_1010_xaaa_aaaa_dddd_dddd_UC_32: |
whismanoid | 30:980556537d9f | 1378 | case CMD_r101_1011_xaaa_aaaa_dddd_dddd_UC_33: |
whismanoid | 30:980556537d9f | 1379 | case CMD_r101_1100_xaaa_aaaa_dddd_dddd_UC_34: |
whismanoid | 30:980556537d9f | 1380 | case CMD_r101_1101_xaaa_aaaa_dddd_dddd_UC_35: |
whismanoid | 30:980556537d9f | 1381 | case CMD_r101_1110_xaaa_aaaa_dddd_dddd_UC_36: |
whismanoid | 30:980556537d9f | 1382 | case CMD_r101_1111_xaaa_aaaa_dddd_dddd_UC_37: |
whismanoid | 30:980556537d9f | 1383 | case CMD_r110_0000_xaaa_aaaa_dddd_dddd_UC_38: |
whismanoid | 30:980556537d9f | 1384 | case CMD_r110_0001_xaaa_aaaa_dddd_dddd_UC_39: |
whismanoid | 30:980556537d9f | 1385 | case CMD_r110_0010_xaaa_aaaa_dddd_dddd_UC_40: |
whismanoid | 30:980556537d9f | 1386 | case CMD_r110_0011_xaaa_aaaa_dddd_dddd_UC_41: |
whismanoid | 30:980556537d9f | 1387 | case CMD_r110_0100_xaaa_aaaa_dddd_dddd_UC_42: |
whismanoid | 30:980556537d9f | 1388 | case CMD_r110_0101_xaaa_aaaa_dddd_dddd_UC_43: |
whismanoid | 30:980556537d9f | 1389 | case CMD_r110_0110_xaaa_aaaa_dddd_dddd_UC_44: |
whismanoid | 30:980556537d9f | 1390 | case CMD_r110_0111_xaaa_aaaa_dddd_dddd_UC_45: |
whismanoid | 30:980556537d9f | 1391 | case CMD_r110_1000_xaaa_aaaa_dddd_dddd_UC_46: |
whismanoid | 30:980556537d9f | 1392 | case CMD_r110_1001_xaaa_aaaa_dddd_dddd_UC_47: |
whismanoid | 30:980556537d9f | 1393 | case CMD_r110_1010_xaaa_aaaa_dddd_dddd_UC_48: |
whismanoid | 30:980556537d9f | 1394 | case CMD_r110_1011_xaaa_aaaa_dddd_dddd_UC_49: |
whismanoid | 30:980556537d9f | 1395 | case CMD_r110_1100_xaaa_aaaa_dddd_dddd_UC_50: |
whismanoid | 30:980556537d9f | 1396 | case CMD_r110_1101_xaaa_aaaa_dddd_dddd_UC_51: |
whismanoid | 30:980556537d9f | 1397 | case CMD_r110_1110_xaaa_aaaa_dddd_dddd_UC_52: |
whismanoid | 30:980556537d9f | 1398 | { |
whismanoid | 31:49a827a1fdc8 | 1399 | // Condense register names "UC_##" from CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0 |
whismanoid | 31:49a827a1fdc8 | 1400 | int index = commandByte - CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0; |
whismanoid | 30:980556537d9f | 1401 | static char retValueString[] = "UC_00"; |
whismanoid | 31:49a827a1fdc8 | 1402 | retValueString[3] = (index / 10) + '0'; |
whismanoid | 31:49a827a1fdc8 | 1403 | retValueString[4] = (index % 10) + '0'; |
whismanoid | 30:980556537d9f | 1404 | return retValueString; |
whismanoid | 30:980556537d9f | 1405 | }; |
whismanoid | 0:68e64068330f | 1406 | case CMD_r110_1111_xxxx_xxxx_xaaa_aaaa_UCADDR: return "UCADDR"; |
whismanoid | 0:68e64068330f | 1407 | } |
whismanoid | 0:68e64068330f | 1408 | } |
whismanoid | 0:68e64068330f | 1409 | |
whismanoid | 0:68e64068330f | 1410 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1411 | // Menu item 'XF' |
whismanoid | 1:d57c1a2cb83c | 1412 | // |
whismanoid | 1:d57c1a2cb83c | 1413 | // FILTER Select Filter and Rate. |
whismanoid | 1:d57c1a2cb83c | 1414 | // Sets conversion rate based on RATE, LINEF, and CONV_TYPE value. See Table 9a through Table 9d for details. |
whismanoid | 1:d57c1a2cb83c | 1415 | // For CONV_TYPE_01_Continuous, linef=LINEF_11_SINC4, rate=RATE_0100 selects output data rate 60SPS. |
whismanoid | 1:d57c1a2cb83c | 1416 | // |
whismanoid | 1:d57c1a2cb83c | 1417 | // @param[in] linef = filter type, default=MAX11410::LINEF_enum_t::LINEF_11_SINC4 |
whismanoid | 1:d57c1a2cb83c | 1418 | // @param[in] rate = output data rate selection, default=MAX11410::RATE_enum_t::RATE_0100 |
whismanoid | 1:d57c1a2cb83c | 1419 | // |
whismanoid | 1:d57c1a2cb83c | 1420 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1421 | uint8_t MAX11410::Configure_FILTER(uint8_t linef, uint8_t rate) |
whismanoid | 1:d57c1a2cb83c | 1422 | { |
whismanoid | 1:d57c1a2cb83c | 1423 | |
whismanoid | 1:d57c1a2cb83c | 1424 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1425 | // write8 0x08 FILTER |
whismanoid | 1:d57c1a2cb83c | 1426 | RegWrite(CMD_r000_1000_x0dd_dddd_FILTER, (uint8_t)(0 |
whismanoid | 1:d57c1a2cb83c | 1427 | | (((uint8_t)linef & 3) << 4) |
whismanoid | 1:d57c1a2cb83c | 1428 | | (((uint8_t)rate & 15) << 0) |
whismanoid | 1:d57c1a2cb83c | 1429 | )); |
whismanoid | 1:d57c1a2cb83c | 1430 | |
whismanoid | 1:d57c1a2cb83c | 1431 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1432 | // success |
whismanoid | 1:d57c1a2cb83c | 1433 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1434 | } |
whismanoid | 1:d57c1a2cb83c | 1435 | |
whismanoid | 1:d57c1a2cb83c | 1436 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1437 | // Menu item 'XP' |
whismanoid | 1:d57c1a2cb83c | 1438 | // |
whismanoid | 1:d57c1a2cb83c | 1439 | // PGA Select Gain and Signal Path. |
whismanoid | 1:d57c1a2cb83c | 1440 | // |
whismanoid | 1:d57c1a2cb83c | 1441 | // @param[in] sigpath = signal path, default=MAX11410::SIG_PATH_enum_t::SIG_PATH_00_BUFFERED |
whismanoid | 1:d57c1a2cb83c | 1442 | // @param[in] gain = gain selection, default=MAX11410::GAIN_enum_t::GAIN_000_1 |
whismanoid | 1:d57c1a2cb83c | 1443 | // |
whismanoid | 1:d57c1a2cb83c | 1444 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1445 | uint8_t MAX11410::Configure_PGA(uint8_t sigpath, uint8_t gain) |
whismanoid | 1:d57c1a2cb83c | 1446 | { |
whismanoid | 1:d57c1a2cb83c | 1447 | |
whismanoid | 1:d57c1a2cb83c | 1448 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1449 | // write8 0x0E PGA |
whismanoid | 23:22e7830bcccb | 1450 | RegWrite(CMD_r000_1110_00ss_0ggg_PGA, (uint8_t)(0 |
whismanoid | 1:d57c1a2cb83c | 1451 | | (((uint8_t)sigpath & 2) << 4) |
whismanoid | 1:d57c1a2cb83c | 1452 | | (((uint8_t)gain & 7) << 0) |
whismanoid | 1:d57c1a2cb83c | 1453 | )); |
whismanoid | 1:d57c1a2cb83c | 1454 | |
whismanoid | 1:d57c1a2cb83c | 1455 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1456 | // success |
whismanoid | 1:d57c1a2cb83c | 1457 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1458 | } |
whismanoid | 1:d57c1a2cb83c | 1459 | |
whismanoid | 1:d57c1a2cb83c | 1460 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1461 | // Menu item 'XC' |
whismanoid | 1:d57c1a2cb83c | 1462 | // |
whismanoid | 1:d57c1a2cb83c | 1463 | // CTRL Select clock, format, and reference. |
whismanoid | 1:d57c1a2cb83c | 1464 | // |
whismanoid | 1:d57c1a2cb83c | 1465 | // @param[in] extclk = external clock enable, default=0 |
whismanoid | 1:d57c1a2cb83c | 1466 | // @param[in] u_bn = unipolar input range enable, default=0 |
whismanoid | 1:d57c1a2cb83c | 1467 | // @param[in] format = offset binary format enable, default=0 |
whismanoid | 1:d57c1a2cb83c | 1468 | // @param[in] refbufp_en = REFP reference buffer enable, default=0 |
whismanoid | 1:d57c1a2cb83c | 1469 | // @param[in] refbufn_en = REFN reference buffer enable, default=0 |
whismanoid | 1:d57c1a2cb83c | 1470 | // @param[in] ref_sel = reference selection, default=MAX11410::REF_SEL_enum_t::REF_SEL_001_REF1P_REF1N |
whismanoid | 1:d57c1a2cb83c | 1471 | // |
whismanoid | 1:d57c1a2cb83c | 1472 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1473 | uint8_t MAX11410::Configure_CTRL(uint8_t extclk, uint8_t u_bn, uint8_t format, uint8_t refbufp_en, uint8_t refbufn_en, uint8_t ref_sel) |
whismanoid | 1:d57c1a2cb83c | 1474 | { |
whismanoid | 1:d57c1a2cb83c | 1475 | |
whismanoid | 1:d57c1a2cb83c | 1476 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1477 | // shadow of register CMD_r000_1001_dddd_dddd_CTRL |
whismanoid | 1:d57c1a2cb83c | 1478 | ctrl = (uint8_t)(0 |
whismanoid | 1:d57c1a2cb83c | 1479 | | (((uint8_t)extclk & 1) << 7) |
whismanoid | 1:d57c1a2cb83c | 1480 | | (((uint8_t)u_bn & 1) << 6) |
whismanoid | 1:d57c1a2cb83c | 1481 | | (((uint8_t)format & 1) << 5) |
whismanoid | 1:d57c1a2cb83c | 1482 | | (((uint8_t)refbufp_en & 1) << 4) |
whismanoid | 1:d57c1a2cb83c | 1483 | | (((uint8_t)refbufn_en & 1) << 3) |
whismanoid | 1:d57c1a2cb83c | 1484 | | (((uint8_t)ref_sel & 7) << 0) |
whismanoid | 1:d57c1a2cb83c | 1485 | ); |
whismanoid | 1:d57c1a2cb83c | 1486 | |
whismanoid | 1:d57c1a2cb83c | 1487 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1488 | // write8 0x09 CTRL |
whismanoid | 1:d57c1a2cb83c | 1489 | RegWrite(CMD_r000_1001_dddd_dddd_CTRL, ctrl); |
whismanoid | 1:d57c1a2cb83c | 1490 | |
whismanoid | 1:d57c1a2cb83c | 1491 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1492 | // success |
whismanoid | 1:d57c1a2cb83c | 1493 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1494 | } |
whismanoid | 1:d57c1a2cb83c | 1495 | |
whismanoid | 1:d57c1a2cb83c | 1496 | //---------------------------------------- |
whismanoid | 14:b49eecf7e4d8 | 1497 | // Menu item 'XR' |
whismanoid | 14:b49eecf7e4d8 | 1498 | // |
whismanoid | 14:b49eecf7e4d8 | 1499 | // CTRL select reference, without changing the other fields. |
whismanoid | 14:b49eecf7e4d8 | 1500 | // |
whismanoid | 14:b49eecf7e4d8 | 1501 | // @pre ctrl = shadow of CTRL register |
whismanoid | 14:b49eecf7e4d8 | 1502 | // @param[in] ref_sel = reference selection, default=MAX11410::REF_SEL_enum_t::REF_SEL_001_REF1P_REF1N |
whismanoid | 14:b49eecf7e4d8 | 1503 | // |
whismanoid | 14:b49eecf7e4d8 | 1504 | // @return 1 on success; 0 on failure |
whismanoid | 14:b49eecf7e4d8 | 1505 | uint8_t MAX11410::Configure_CTRL_REF(uint8_t ref_sel) |
whismanoid | 14:b49eecf7e4d8 | 1506 | { |
whismanoid | 14:b49eecf7e4d8 | 1507 | |
whismanoid | 14:b49eecf7e4d8 | 1508 | //---------------------------------------- |
whismanoid | 14:b49eecf7e4d8 | 1509 | // shadow of register CMD_r000_1001_dddd_dddd_CTRL |
whismanoid | 32:4c183afd82f6 | 1510 | ctrl = (ctrl & ((uint8_t)(~ 7) << 0)) |
whismanoid | 14:b49eecf7e4d8 | 1511 | | (((uint8_t)ref_sel & 7) << 0); |
whismanoid | 14:b49eecf7e4d8 | 1512 | |
whismanoid | 14:b49eecf7e4d8 | 1513 | //---------------------------------------- |
whismanoid | 14:b49eecf7e4d8 | 1514 | // write8 0x09 CTRL |
whismanoid | 14:b49eecf7e4d8 | 1515 | RegWrite(CMD_r000_1001_dddd_dddd_CTRL, ctrl); |
whismanoid | 14:b49eecf7e4d8 | 1516 | |
whismanoid | 14:b49eecf7e4d8 | 1517 | //---------------------------------------- |
whismanoid | 14:b49eecf7e4d8 | 1518 | // success |
whismanoid | 14:b49eecf7e4d8 | 1519 | return 1; |
whismanoid | 14:b49eecf7e4d8 | 1520 | } |
whismanoid | 14:b49eecf7e4d8 | 1521 | |
whismanoid | 14:b49eecf7e4d8 | 1522 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1523 | // Menu item 'XS' |
whismanoid | 1:d57c1a2cb83c | 1524 | // |
whismanoid | 1:d57c1a2cb83c | 1525 | // SOURCE Configure voltage bias source, current source, burnout mode |
whismanoid | 1:d57c1a2cb83c | 1526 | // |
whismanoid | 32:4c183afd82f6 | 1527 | // @param[in] vbias_mode = bias voltage mode, default=MAX11410::VBIAS_MODE_enum_t::VBIAS_MODE_00_Active |
whismanoid | 32:4c183afd82f6 | 1528 | // @param[in] brn_mode = burnout source mode, default=MAX11410::BRN_MODE_enum_t::BRN_MODE_00_disabled |
whismanoid | 32:4c183afd82f6 | 1529 | // @param[in] idac_mode = current source value, default=MAX11410::IDAC_MODE_enum_t::IDAC_MODE_0000_10uA |
whismanoid | 1:d57c1a2cb83c | 1530 | // |
whismanoid | 1:d57c1a2cb83c | 1531 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1532 | uint8_t MAX11410::Configure_SOURCE(uint8_t vbias_mode, uint8_t brn_mode, uint8_t idac_mode) |
whismanoid | 1:d57c1a2cb83c | 1533 | { |
whismanoid | 1:d57c1a2cb83c | 1534 | |
whismanoid | 1:d57c1a2cb83c | 1535 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1536 | // write8 0x0A SOURCE |
whismanoid | 1:d57c1a2cb83c | 1537 | RegWrite(CMD_r000_1010_dddd_dddd_SOURCE, (uint8_t)(0 |
whismanoid | 1:d57c1a2cb83c | 1538 | | (((uint8_t)vbias_mode & 3) << 6) |
whismanoid | 1:d57c1a2cb83c | 1539 | | (((uint8_t)brn_mode & 3) << 4) |
whismanoid | 1:d57c1a2cb83c | 1540 | | (((uint8_t)idac_mode & 15) << 0) |
whismanoid | 1:d57c1a2cb83c | 1541 | )); |
whismanoid | 1:d57c1a2cb83c | 1542 | |
whismanoid | 1:d57c1a2cb83c | 1543 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1544 | // success |
whismanoid | 1:d57c1a2cb83c | 1545 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1546 | } |
whismanoid | 1:d57c1a2cb83c | 1547 | |
whismanoid | 1:d57c1a2cb83c | 1548 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1549 | // Menu item 'XM' |
whismanoid | 1:d57c1a2cb83c | 1550 | // |
whismanoid | 1:d57c1a2cb83c | 1551 | // MUX_CTRL0 Select pins for analog input AINP and AINN |
whismanoid | 1:d57c1a2cb83c | 1552 | // |
whismanoid | 1:d57c1a2cb83c | 1553 | // @param[in] ainp = channel high side, default=MAX11410::AINP_SEL_enum_t::AINP_SEL_0000_AIN0 |
whismanoid | 1:d57c1a2cb83c | 1554 | // @param[in] ainn = channel low side, default=MAX11410::AINN_SEL_enum_t::AINN_SEL_1010_GND |
whismanoid | 1:d57c1a2cb83c | 1555 | // |
whismanoid | 1:d57c1a2cb83c | 1556 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1557 | uint8_t MAX11410::Configure_MUX_CTRL0(uint8_t ainp, uint8_t ainn) |
whismanoid | 1:d57c1a2cb83c | 1558 | { |
whismanoid | 1:d57c1a2cb83c | 1559 | |
whismanoid | 1:d57c1a2cb83c | 1560 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1561 | // write8 0x0B MUX_CTRL0 |
whismanoid | 1:d57c1a2cb83c | 1562 | RegWrite(CMD_r000_1011_dddd_dddd_MUX_CTRL0, (uint8_t)(0 |
whismanoid | 1:d57c1a2cb83c | 1563 | | (((uint8_t)ainp & 15) << 4) |
whismanoid | 1:d57c1a2cb83c | 1564 | | (((uint8_t)ainn & 15) << 0) |
whismanoid | 1:d57c1a2cb83c | 1565 | )); |
whismanoid | 1:d57c1a2cb83c | 1566 | |
whismanoid | 1:d57c1a2cb83c | 1567 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1568 | // success |
whismanoid | 1:d57c1a2cb83c | 1569 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1570 | } |
whismanoid | 1:d57c1a2cb83c | 1571 | |
whismanoid | 1:d57c1a2cb83c | 1572 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1573 | // Menu item 'XI' |
whismanoid | 1:d57c1a2cb83c | 1574 | // |
whismanoid | 1:d57c1a2cb83c | 1575 | // MUX_CTRL1 Select pins for current source |
whismanoid | 1:d57c1a2cb83c | 1576 | // |
whismanoid | 1:d57c1a2cb83c | 1577 | // @param[in] idac1_sel = channel high side, default=MAX11410::IDAC1_SEL_enum_t::IDAC1_SEL_1111_unconnected |
whismanoid | 1:d57c1a2cb83c | 1578 | // @param[in] idac0_sel = channel low side, default=MAX11410::IDAC0_SEL_enum_t::IDAC0_SEL_1111_unconnected |
whismanoid | 1:d57c1a2cb83c | 1579 | // |
whismanoid | 1:d57c1a2cb83c | 1580 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1581 | uint8_t MAX11410::Configure_MUX_CTRL1(uint8_t idac1_sel, uint8_t idac0_sel) |
whismanoid | 1:d57c1a2cb83c | 1582 | { |
whismanoid | 1:d57c1a2cb83c | 1583 | |
whismanoid | 1:d57c1a2cb83c | 1584 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1585 | // write8 0x0C MUX_CTRL1 |
whismanoid | 1:d57c1a2cb83c | 1586 | RegWrite(CMD_r000_1100_dddd_dddd_MUX_CTRL1, (uint8_t)(0 |
whismanoid | 1:d57c1a2cb83c | 1587 | | (((uint8_t)idac1_sel & 15) << 4) |
whismanoid | 1:d57c1a2cb83c | 1588 | | (((uint8_t)idac0_sel & 15) << 0) |
whismanoid | 1:d57c1a2cb83c | 1589 | )); |
whismanoid | 1:d57c1a2cb83c | 1590 | |
whismanoid | 1:d57c1a2cb83c | 1591 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1592 | // success |
whismanoid | 1:d57c1a2cb83c | 1593 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1594 | } |
whismanoid | 1:d57c1a2cb83c | 1595 | |
whismanoid | 1:d57c1a2cb83c | 1596 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1597 | // Menu item 'XV' |
whismanoid | 1:d57c1a2cb83c | 1598 | // |
whismanoid | 1:d57c1a2cb83c | 1599 | // MUX_CTRL2 Select pins for voltage bias source |
whismanoid | 1:d57c1a2cb83c | 1600 | // |
whismanoid | 1:d57c1a2cb83c | 1601 | // @param[in] vbias_ain7_ain0_bitmap = bit map of AIN7..AIN0 enables for voltage bias, default=0 |
whismanoid | 1:d57c1a2cb83c | 1602 | // |
whismanoid | 1:d57c1a2cb83c | 1603 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1604 | uint8_t MAX11410::Configure_MUX_CTRL2(uint8_t vbias_ain7_ain0_bitmap) |
whismanoid | 1:d57c1a2cb83c | 1605 | { |
whismanoid | 1:d57c1a2cb83c | 1606 | |
whismanoid | 1:d57c1a2cb83c | 1607 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1608 | // write8 0x0D MUX_CTRL2 |
whismanoid | 1:d57c1a2cb83c | 1609 | RegWrite(CMD_r000_1101_dddd_dddd_MUX_CTRL2, vbias_ain7_ain0_bitmap); |
whismanoid | 1:d57c1a2cb83c | 1610 | |
whismanoid | 1:d57c1a2cb83c | 1611 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1612 | // success |
whismanoid | 1:d57c1a2cb83c | 1613 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1614 | } |
whismanoid | 1:d57c1a2cb83c | 1615 | |
whismanoid | 1:d57c1a2cb83c | 1616 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1617 | // Menu item 'X0' |
whismanoid | 1:d57c1a2cb83c | 1618 | // |
whismanoid | 1:d57c1a2cb83c | 1619 | // CAL_START Calibrate Self Offset and Gain. |
whismanoid | 1:d57c1a2cb83c | 1620 | // |
whismanoid | 1:d57c1a2cb83c | 1621 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1622 | uint8_t MAX11410::Calibrate_Self_Offset_Gain(void) |
whismanoid | 1:d57c1a2cb83c | 1623 | { |
whismanoid | 1:d57c1a2cb83c | 1624 | |
whismanoid | 1:d57c1a2cb83c | 1625 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 1626 | // write8 0x03 CAL_START -- RegWrite will poll status until CAL_RDY |
whismanoid | 1:d57c1a2cb83c | 1627 | RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_000_SELF_CAL); |
whismanoid | 1:d57c1a2cb83c | 1628 | |
whismanoid | 1:d57c1a2cb83c | 1629 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1630 | // success |
whismanoid | 1:d57c1a2cb83c | 1631 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1632 | } |
whismanoid | 1:d57c1a2cb83c | 1633 | |
whismanoid | 1:d57c1a2cb83c | 1634 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1635 | // Menu item 'X1' |
whismanoid | 1:d57c1a2cb83c | 1636 | // |
whismanoid | 1:d57c1a2cb83c | 1637 | // CAL_START Calibrate Selected PGA. |
whismanoid | 1:d57c1a2cb83c | 1638 | // |
whismanoid | 1:d57c1a2cb83c | 1639 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1640 | uint8_t MAX11410::Calibrate_PGA_Gain(void) |
whismanoid | 1:d57c1a2cb83c | 1641 | { |
whismanoid | 1:d57c1a2cb83c | 1642 | |
whismanoid | 1:d57c1a2cb83c | 1643 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 1644 | // write8 0x03 CAL_START -- RegWrite will poll status until CAL_RDY |
whismanoid | 1:d57c1a2cb83c | 1645 | RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_001_PGA_GAIN); |
whismanoid | 1:d57c1a2cb83c | 1646 | |
whismanoid | 1:d57c1a2cb83c | 1647 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1648 | // success |
whismanoid | 1:d57c1a2cb83c | 1649 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1650 | } |
whismanoid | 1:d57c1a2cb83c | 1651 | |
whismanoid | 1:d57c1a2cb83c | 1652 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1653 | // CAL_START Calibrate System Offset A. |
whismanoid | 1:d57c1a2cb83c | 1654 | // |
whismanoid | 1:d57c1a2cb83c | 1655 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1656 | uint8_t MAX11410::Calibrate_System_Offset_A(void) |
whismanoid | 1:d57c1a2cb83c | 1657 | { |
whismanoid | 1:d57c1a2cb83c | 1658 | |
whismanoid | 1:d57c1a2cb83c | 1659 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 1660 | // write8 0x03 CAL_START -- RegWrite will poll status until CAL_RDY |
whismanoid | 1:d57c1a2cb83c | 1661 | RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_100_SYS_OFF_A); |
whismanoid | 1:d57c1a2cb83c | 1662 | |
whismanoid | 1:d57c1a2cb83c | 1663 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1664 | // success |
whismanoid | 1:d57c1a2cb83c | 1665 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1666 | } |
whismanoid | 1:d57c1a2cb83c | 1667 | |
whismanoid | 1:d57c1a2cb83c | 1668 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1669 | // CAL_START Calibrate System Gain A. |
whismanoid | 1:d57c1a2cb83c | 1670 | // |
whismanoid | 1:d57c1a2cb83c | 1671 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1672 | uint8_t MAX11410::Calibrate_System_Gain_A(void) |
whismanoid | 1:d57c1a2cb83c | 1673 | { |
whismanoid | 1:d57c1a2cb83c | 1674 | |
whismanoid | 1:d57c1a2cb83c | 1675 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 1676 | // write8 0x03 CAL_START -- RegWrite will poll status until CAL_RDY |
whismanoid | 1:d57c1a2cb83c | 1677 | RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_101_SYS_GAIN_A); |
whismanoid | 1:d57c1a2cb83c | 1678 | |
whismanoid | 1:d57c1a2cb83c | 1679 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1680 | // success |
whismanoid | 1:d57c1a2cb83c | 1681 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1682 | } |
whismanoid | 1:d57c1a2cb83c | 1683 | |
whismanoid | 1:d57c1a2cb83c | 1684 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1685 | // CAL_START Calibrate System Offset B. |
whismanoid | 1:d57c1a2cb83c | 1686 | // |
whismanoid | 1:d57c1a2cb83c | 1687 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1688 | uint8_t MAX11410::Calibrate_System_Offset_B(void) |
whismanoid | 1:d57c1a2cb83c | 1689 | { |
whismanoid | 1:d57c1a2cb83c | 1690 | |
whismanoid | 1:d57c1a2cb83c | 1691 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 1692 | // write8 0x03 CAL_START -- RegWrite will poll status until CAL_RDY |
whismanoid | 1:d57c1a2cb83c | 1693 | RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_110_SYS_OFF_B); |
whismanoid | 1:d57c1a2cb83c | 1694 | |
whismanoid | 1:d57c1a2cb83c | 1695 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1696 | // success |
whismanoid | 1:d57c1a2cb83c | 1697 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1698 | } |
whismanoid | 1:d57c1a2cb83c | 1699 | |
whismanoid | 1:d57c1a2cb83c | 1700 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1701 | // CAL_START Calibrate System Gain B. |
whismanoid | 1:d57c1a2cb83c | 1702 | // |
whismanoid | 1:d57c1a2cb83c | 1703 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1704 | uint8_t MAX11410::Calibrate_System_Gain_B(void) |
whismanoid | 1:d57c1a2cb83c | 1705 | { |
whismanoid | 1:d57c1a2cb83c | 1706 | |
whismanoid | 1:d57c1a2cb83c | 1707 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 1708 | // write8 0x03 CAL_START -- RegWrite will poll status until CAL_RDY |
whismanoid | 1:d57c1a2cb83c | 1709 | RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_111_SYS_GAIN_B); |
whismanoid | 1:d57c1a2cb83c | 1710 | |
whismanoid | 1:d57c1a2cb83c | 1711 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1712 | // success |
whismanoid | 1:d57c1a2cb83c | 1713 | return 1; |
whismanoid | 1:d57c1a2cb83c | 1714 | } |
whismanoid | 1:d57c1a2cb83c | 1715 | |
whismanoid | 1:d57c1a2cb83c | 1716 | //---------------------------------------- |
whismanoid | 13:df96a784cda6 | 1717 | // Menu item '$' -> AINcode[0], AINcode[1], AINcode[2], AINcode[3], AINcode[4], AINcode[5], AINcode[6], AINcode[7], AINcode[8], AINcode[9], AINcode[10] |
whismanoid | 17:0e9f2dfc2a30 | 1718 | // |
whismanoid | 1:d57c1a2cb83c | 1719 | // Measure all ADC channels in sequence. |
whismanoid | 17:0e9f2dfc2a30 | 1720 | // Diagnostic output pulse on GP0 for each channel's measurement. |
whismanoid | 17:0e9f2dfc2a30 | 1721 | // Diagnostic output pulse on GP1 for entire loop. |
whismanoid | 17:0e9f2dfc2a30 | 1722 | // |
whismanoid | 8:3a9dfa2e8234 | 1723 | // @post AINcode[0..10]: measurement result LSB code |
whismanoid | 0:68e64068330f | 1724 | // |
whismanoid | 0:68e64068330f | 1725 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 1726 | uint8_t MAX11410::Read_All_Voltages(void) |
whismanoid | 0:68e64068330f | 1727 | { |
whismanoid | 0:68e64068330f | 1728 | |
whismanoid | 0:68e64068330f | 1729 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1730 | // scan AIN0..AIN9 |
whismanoid | 17:0e9f2dfc2a30 | 1731 | // |
whismanoid | 17:0e9f2dfc2a30 | 1732 | // diagnostic GPIO pulse on MAX11410 GP1 pin (0xc3 = logic 0, 0xc4 = logic 1) |
whismanoid | 17:0e9f2dfc2a30 | 1733 | RegWrite(CMD_r000_0101_dddd_xddd_GP1_CTRL, 0xc3); // GP1 = 0 |
whismanoid | 17:0e9f2dfc2a30 | 1734 | // |
whismanoid | 1:d57c1a2cb83c | 1735 | const MAX11410_AINN_SEL_enum_t ainn = AINN_SEL_1010_GND; |
whismanoid | 2:eac67184cc0c | 1736 | for(uint8_t ainp = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_0000_AIN0; ainp <= /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD; ainp++) |
whismanoid | 1:d57c1a2cb83c | 1737 | { |
whismanoid | 17:0e9f2dfc2a30 | 1738 | // diagnostic GPIO pulse on MAX11410 GP0 pin (0xc3 = logic 0, 0xc4 = logic 1) |
whismanoid | 17:0e9f2dfc2a30 | 1739 | RegWrite(CMD_r000_0100_dddd_xddd_GP0_CTRL, 0xc3); // GP0 = 0 |
whismanoid | 17:0e9f2dfc2a30 | 1740 | // |
whismanoid | 1:d57c1a2cb83c | 1741 | Measure_Voltage((MAX11410_AINP_SEL_enum_t)ainp, ainn); |
whismanoid | 17:0e9f2dfc2a30 | 1742 | // @post AINcode[ainp]: measurement result LSB code |
whismanoid | 17:0e9f2dfc2a30 | 1743 | // |
whismanoid | 17:0e9f2dfc2a30 | 1744 | // diagnostic GPIO pulse on MAX11410 GP0 pin (0xc3 = logic 0, 0xc4 = logic 1) |
whismanoid | 17:0e9f2dfc2a30 | 1745 | RegWrite(CMD_r000_0100_dddd_xddd_GP0_CTRL, 0xc4); // GP0 = 1 |
whismanoid | 17:0e9f2dfc2a30 | 1746 | // |
whismanoid | 1:d57c1a2cb83c | 1747 | } |
whismanoid | 17:0e9f2dfc2a30 | 1748 | // diagnostic GPIO pulse on MAX11410 GP1 pin (0xc3 = logic 0, 0xc4 = logic 1) |
whismanoid | 17:0e9f2dfc2a30 | 1749 | RegWrite(CMD_r000_0101_dddd_xddd_GP1_CTRL, 0xc4); // GP1 = 1 |
whismanoid | 17:0e9f2dfc2a30 | 1750 | // |
whismanoid | 0:68e64068330f | 1751 | |
whismanoid | 0:68e64068330f | 1752 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 1753 | // success |
whismanoid | 0:68e64068330f | 1754 | return 1; |
whismanoid | 0:68e64068330f | 1755 | } |
whismanoid | 0:68e64068330f | 1756 | |
whismanoid | 0:68e64068330f | 1757 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1758 | // Menu item 'V' |
whismanoid | 0:68e64068330f | 1759 | // Trigger Measurement for voltage input. |
whismanoid | 0:68e64068330f | 1760 | // |
whismanoid | 0:68e64068330f | 1761 | // Example code for typical voltage measurement. |
whismanoid | 0:68e64068330f | 1762 | // |
whismanoid | 1:d57c1a2cb83c | 1763 | // @pre external connection REF2P-REF2N is a reference voltage |
whismanoid | 1:d57c1a2cb83c | 1764 | // @pre VRef = Voltage of REF input, in Volts |
whismanoid | 34:1b72865fa71f | 1765 | // @pre v_filter = filter register configuration, 0x34 for LINEF_11_SINC4 RATE_0100 output data rate 60SPS |
whismanoid | 34:1b72865fa71f | 1766 | // @pre v_ctrl = ctrl register configuration, 0x02 for bipolar REF_SEL_010_REF2P_REF2N |
whismanoid | 34:1b72865fa71f | 1767 | // @pre v_pga = pga register configuration, 0x00 for SIG_PATH_00_BUFFERED GAIN_000_1 |
whismanoid | 1:d57c1a2cb83c | 1768 | // @param[in] ainp = channel high side, default=AINP_SEL_0000_AIN0 |
whismanoid | 1:d57c1a2cb83c | 1769 | // @param[in] ainn = channel low side, default=AINN_SEL_1010_GND |
whismanoid | 1:d57c1a2cb83c | 1770 | // @post AINcode[ainp]: measurement result LSB code |
whismanoid | 0:68e64068330f | 1771 | // |
whismanoid | 34:1b72865fa71f | 1772 | // Output data rate (sample rate) is determined by filter register. |
whismanoid | 34:1b72865fa71f | 1773 | // filter register configuration in Measure_Voltage CONV_TYPE_01_Continuous |
whismanoid | 34:1b72865fa71f | 1774 | // v_filter=0x00 -- LINEF_00_50Hz_60Hz_FIR RATE_0000 | 1.1SPS |
whismanoid | 34:1b72865fa71f | 1775 | // v_filter=0x01 -- LINEF_00_50Hz_60Hz_FIR RATE_0001 | 2.1SPS |
whismanoid | 34:1b72865fa71f | 1776 | // v_filter=0x02 -- LINEF_00_50Hz_60Hz_FIR RATE_0010 | 4.2SPS |
whismanoid | 34:1b72865fa71f | 1777 | // v_filter=0x03 -- LINEF_00_50Hz_60Hz_FIR RATE_0011 | 8.4SPS |
whismanoid | 34:1b72865fa71f | 1778 | // v_filter=0x04 -- LINEF_00_50Hz_60Hz_FIR RATE_0100 | 16.8SPS |
whismanoid | 34:1b72865fa71f | 1779 | // v_filter=0x10 -- LINEF_01_50Hz_FIR RATE_0000 | 1.3SPS |
whismanoid | 34:1b72865fa71f | 1780 | // v_filter=0x11 -- LINEF_01_50Hz_FIR RATE_0001 | 2.7SPS |
whismanoid | 34:1b72865fa71f | 1781 | // v_filter=0x12 -- LINEF_01_50Hz_FIR RATE_0010 | 5.3SPS |
whismanoid | 34:1b72865fa71f | 1782 | // v_filter=0x13 -- LINEF_01_50Hz_FIR RATE_0011 | 10.7SPS |
whismanoid | 34:1b72865fa71f | 1783 | // v_filter=0x14 -- LINEF_01_50Hz_FIR RATE_0100 | 21.3SPS |
whismanoid | 34:1b72865fa71f | 1784 | // v_filter=0x15 -- LINEF_01_50Hz_FIR RATE_0101 | 40.0SPS |
whismanoid | 34:1b72865fa71f | 1785 | // v_filter=0x20 -- LINEF_10_60Hz_FIR RATE_0000 | 1.3SPS |
whismanoid | 34:1b72865fa71f | 1786 | // v_filter=0x21 -- LINEF_10_60Hz_FIR RATE_0001 | 2.7SPS |
whismanoid | 34:1b72865fa71f | 1787 | // v_filter=0x22 -- LINEF_10_60Hz_FIR RATE_0010 | 5.3SPS |
whismanoid | 34:1b72865fa71f | 1788 | // v_filter=0x23 -- LINEF_10_60Hz_FIR RATE_0011 | 10.7SPS |
whismanoid | 34:1b72865fa71f | 1789 | // v_filter=0x24 -- LINEF_10_60Hz_FIR RATE_0100 | 21.3SPS |
whismanoid | 34:1b72865fa71f | 1790 | // v_filter=0x25 -- LINEF_10_60Hz_FIR RATE_0101 | 40.0SPS |
whismanoid | 34:1b72865fa71f | 1791 | // v_filter=0x30 -- LINEF_11_SINC4 RATE_0000 | 4SPS |
whismanoid | 34:1b72865fa71f | 1792 | // v_filter=0x31 -- LINEF_11_SINC4 RATE_0001 | 10SPS |
whismanoid | 34:1b72865fa71f | 1793 | // v_filter=0x32 -- LINEF_11_SINC4 RATE_0010 | 20SPS |
whismanoid | 34:1b72865fa71f | 1794 | // v_filter=0x33 -- LINEF_11_SINC4 RATE_0011 | 40SPS |
whismanoid | 34:1b72865fa71f | 1795 | // v_filter=0x34 --*LINEF_11_SINC4 RATE_0100 | 60SPS |
whismanoid | 34:1b72865fa71f | 1796 | // v_filter=0x35 -- LINEF_11_SINC4 RATE_0101 | 120SPS |
whismanoid | 34:1b72865fa71f | 1797 | // v_filter=0x36 -- LINEF_11_SINC4 RATE_0110 | 240SPS |
whismanoid | 34:1b72865fa71f | 1798 | // v_filter=0x37 -- LINEF_11_SINC4 RATE_0111 | 480SPS |
whismanoid | 34:1b72865fa71f | 1799 | // v_filter=0x38 -- LINEF_11_SINC4 RATE_1000 | 960SPS |
whismanoid | 34:1b72865fa71f | 1800 | // v_filter=0x39 -- LINEF_11_SINC4 RATE_1001 | 1920SPS |
whismanoid | 34:1b72865fa71f | 1801 | // |
whismanoid | 1:d57c1a2cb83c | 1802 | // @return ideal voltage calculated from raw LSB code and reference voltage |
whismanoid | 1:d57c1a2cb83c | 1803 | double MAX11410::Measure_Voltage(MAX11410_AINP_SEL_enum_t ainp, MAX11410_AINN_SEL_enum_t ainn) |
whismanoid | 0:68e64068330f | 1804 | { |
whismanoid | 0:68e64068330f | 1805 | |
whismanoid | 0:68e64068330f | 1806 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 1807 | // restrict channel selection to valid index range |
whismanoid | 8:3a9dfa2e8234 | 1808 | if ((uint8_t)ainp > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD) |
whismanoid | 8:3a9dfa2e8234 | 1809 | { |
whismanoid | 8:3a9dfa2e8234 | 1810 | ainp = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD; |
whismanoid | 8:3a9dfa2e8234 | 1811 | } |
whismanoid | 8:3a9dfa2e8234 | 1812 | |
whismanoid | 8:3a9dfa2e8234 | 1813 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 1814 | // restrict channel selection to valid index range |
whismanoid | 8:3a9dfa2e8234 | 1815 | if ((uint8_t)ainn > /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND) |
whismanoid | 8:3a9dfa2e8234 | 1816 | { |
whismanoid | 8:3a9dfa2e8234 | 1817 | ainn = /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND; |
whismanoid | 8:3a9dfa2e8234 | 1818 | } |
whismanoid | 8:3a9dfa2e8234 | 1819 | |
whismanoid | 8:3a9dfa2e8234 | 1820 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1821 | // write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND |
whismanoid | 1:d57c1a2cb83c | 1822 | Configure_MUX_CTRL0((uint8_t)ainp, (uint8_t)ainn); |
whismanoid | 1:d57c1a2cb83c | 1823 | |
whismanoid | 1:d57c1a2cb83c | 1824 | //---------------------------------------- |
whismanoid | 34:1b72865fa71f | 1825 | // write8 0x09 CTRL to select reference and Data Format (Unipolar or Bipolar) |
whismanoid | 34:1b72865fa71f | 1826 | RegWrite(CMD_r000_1001_dddd_dddd_CTRL, v_ctrl); |
whismanoid | 34:1b72865fa71f | 1827 | ctrl = v_ctrl; |
whismanoid | 1:d57c1a2cb83c | 1828 | |
whismanoid | 1:d57c1a2cb83c | 1829 | //---------------------------------------- |
whismanoid | 34:1b72865fa71f | 1830 | // write8 0x0E PGA and update pgaGain |
whismanoid | 34:1b72865fa71f | 1831 | Configure_PGA( |
whismanoid | 34:1b72865fa71f | 1832 | ((v_pga >> 4) & 2), // sigpath |
whismanoid | 34:1b72865fa71f | 1833 | ( v_pga & 7)); // gain |
whismanoid | 1:d57c1a2cb83c | 1834 | |
whismanoid | 1:d57c1a2cb83c | 1835 | //---------------------------------------- |
whismanoid | 34:1b72865fa71f | 1836 | // write8 0x08 FILTER to select output data rate |
whismanoid | 34:1b72865fa71f | 1837 | RegWrite(CMD_r000_1000_x0dd_dddd_FILTER, v_filter); |
whismanoid | 1:d57c1a2cb83c | 1838 | |
whismanoid | 1:d57c1a2cb83c | 1839 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1840 | // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous |
whismanoid | 1:d57c1a2cb83c | 1841 | RegWrite(CMD_r000_0001_xddd_xxdd_CONV_START, 0x01); |
whismanoid | 0:68e64068330f | 1842 | |
whismanoid | 0:68e64068330f | 1843 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 1844 | // purge old data from data0 register |
whismanoid | 22:c6812214a933 | 1845 | RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &AINcode[((int)ainp & 0x0F)]); |
whismanoid | 22:c6812214a933 | 1846 | data0 = AINcode[((int)ainp & 0x0F)]; |
whismanoid | 22:c6812214a933 | 1847 | |
whismanoid | 22:c6812214a933 | 1848 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 1849 | // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0) |
whismanoid | 0:68e64068330f | 1850 | RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status); |
whismanoid | 0:68e64068330f | 1851 | |
whismanoid | 0:68e64068330f | 1852 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 1853 | // wait until STATUS_enum_t::STATUS_000010_DATA_RDY indicates data is available |
whismanoid | 13:df96a784cda6 | 1854 | // A bad SPI interface can cause bit slippage, which makes this loop get stuck. Expect *PART_ID? = 0x000F02 |
whismanoid | 13:df96a784cda6 | 1855 | // while ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0) { |
whismanoid | 13:df96a784cda6 | 1856 | // possible infinite loop; need a timeout or futility countdown to escape |
whismanoid | 22:c6812214a933 | 1857 | for (int futility_countdown = loop_limit; |
whismanoid | 13:df96a784cda6 | 1858 | ((futility_countdown > 0) && |
whismanoid | 13:df96a784cda6 | 1859 | ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0)); |
whismanoid | 13:df96a784cda6 | 1860 | futility_countdown--) |
whismanoid | 13:df96a784cda6 | 1861 | { |
whismanoid | 9:06ca88952f1c | 1862 | RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status); |
whismanoid | 35:f94470c95dde | 1863 | #if 1 |
whismanoid | 35:f94470c95dde | 1864 | // improve response time at the cost of more program size |
whismanoid | 35:f94470c95dde | 1865 | if (futility_countdown < (loop_limit - 5)) { |
whismanoid | 35:f94470c95dde | 1866 | wait_ms(1); // timing delay function, platform-specific |
whismanoid | 35:f94470c95dde | 1867 | } |
whismanoid | 35:f94470c95dde | 1868 | if (futility_countdown < (loop_limit - 10)) { |
whismanoid | 35:f94470c95dde | 1869 | wait_ms(2); // timing delay function, platform-specific |
whismanoid | 35:f94470c95dde | 1870 | } |
whismanoid | 35:f94470c95dde | 1871 | if (futility_countdown < (loop_limit - 15)) { |
whismanoid | 35:f94470c95dde | 1872 | wait_ms(5); // timing delay function, platform-specific |
whismanoid | 35:f94470c95dde | 1873 | } |
whismanoid | 35:f94470c95dde | 1874 | if (futility_countdown < (loop_limit - 20)) { |
whismanoid | 35:f94470c95dde | 1875 | wait_ms(10); // timing delay function, platform-specific |
whismanoid | 35:f94470c95dde | 1876 | } |
whismanoid | 35:f94470c95dde | 1877 | if (futility_countdown < (loop_limit - 25)) { |
whismanoid | 35:f94470c95dde | 1878 | wait_ms(20); // timing delay function, platform-specific |
whismanoid | 35:f94470c95dde | 1879 | } |
whismanoid | 35:f94470c95dde | 1880 | if (futility_countdown < (loop_limit - 30)) { |
whismanoid | 35:f94470c95dde | 1881 | wait_ms(50); // timing delay function, platform-specific |
whismanoid | 35:f94470c95dde | 1882 | } |
whismanoid | 35:f94470c95dde | 1883 | if (futility_countdown < (loop_limit - 35)) { |
whismanoid | 35:f94470c95dde | 1884 | wait_ms(100); // timing delay function, platform-specific |
whismanoid | 35:f94470c95dde | 1885 | } |
whismanoid | 35:f94470c95dde | 1886 | #else |
whismanoid | 28:441633d97018 | 1887 | if (loop_limit > 5) { |
whismanoid | 28:441633d97018 | 1888 | wait_ms(20); // timing delay function, platform-specific |
whismanoid | 28:441633d97018 | 1889 | } |
whismanoid | 28:441633d97018 | 1890 | if (loop_limit > 10) { |
whismanoid | 28:441633d97018 | 1891 | wait_ms(50); // timing delay function, platform-specific |
whismanoid | 28:441633d97018 | 1892 | } |
whismanoid | 28:441633d97018 | 1893 | if (loop_limit > 30) { |
whismanoid | 28:441633d97018 | 1894 | wait_ms(100); // timing delay function, platform-specific |
whismanoid | 28:441633d97018 | 1895 | } |
whismanoid | 35:f94470c95dde | 1896 | #endif |
whismanoid | 9:06ca88952f1c | 1897 | } |
whismanoid | 9:06ca88952f1c | 1898 | |
whismanoid | 9:06ca88952f1c | 1899 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1900 | // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0): AINcode[ainp] = measurement |
whismanoid | 1:d57c1a2cb83c | 1901 | RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &AINcode[((int)ainp & 0x0F)]); |
whismanoid | 1:d57c1a2cb83c | 1902 | data0 = AINcode[((int)ainp & 0x0F)]; |
whismanoid | 0:68e64068330f | 1903 | |
whismanoid | 0:68e64068330f | 1904 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1905 | // ideal voltage calculated from raw LSB code and reference voltage |
whismanoid | 1:d57c1a2cb83c | 1906 | return VoltageOfCode(AINcode[((int)ainp & 0x0F)]); |
whismanoid | 0:68e64068330f | 1907 | } |
whismanoid | 0:68e64068330f | 1908 | |
whismanoid | 0:68e64068330f | 1909 | //---------------------------------------- |
whismanoid | 22:c6812214a933 | 1910 | // Menu item 'R' -> rtd_ohm, rtd_degc |
whismanoid | 0:68e64068330f | 1911 | // Trigger Measurement for Resistive Temperature Device (RTD). |
whismanoid | 0:68e64068330f | 1912 | // |
whismanoid | 0:68e64068330f | 1913 | // Example code for typical RTD measurement. |
whismanoid | 0:68e64068330f | 1914 | // |
whismanoid | 1:d57c1a2cb83c | 1915 | // @pre external connection REF1P-REF1N is a reference resistor |
whismanoid | 22:c6812214a933 | 1916 | // @pre ref1_v = reference resistance in ohms, default=4999 |
whismanoid | 23:22e7830bcccb | 1917 | // @pre rtd_filter = filter register configuration, 0x34 for LINEF_11_SINC4 RATE_0100 output data rate 60SPS |
whismanoid | 23:22e7830bcccb | 1918 | // @pre rtd_ctrl = ctrl register configuration, 0x40 for ref0_v, 0x41 for ref1_v, 0x42 for ref2_v |
whismanoid | 34:1b72865fa71f | 1919 | // @pre rtd_souce = souce register configuration, 0x0B for IDAC_MODE_1011_400uA |
whismanoid | 34:1b72865fa71f | 1920 | // @pre rtd_pga = pga register configuration, 0x21 for SIG_PATH_10_PGA GAIN_001_2 |
whismanoid | 1:d57c1a2cb83c | 1921 | // @param[in] rtd_iout = channel RTD high side force, default=AINP_SEL_0111_AIN7 |
whismanoid | 1:d57c1a2cb83c | 1922 | // @param[in] rtd_ainp = channel RTD high side sense, default=AINP_SEL_1000_AIN8 |
whismanoid | 1:d57c1a2cb83c | 1923 | // @param[in] rtd_ainn = channel RTD low side, default=AINN_SEL_1001_AIN9 |
whismanoid | 1:d57c1a2cb83c | 1924 | // @post AINcode[rtd_ainp]: measurement result LSB code |
whismanoid | 22:c6812214a933 | 1925 | // @post rtd_ohm: measurement result resistance in Ohms |
whismanoid | 22:c6812214a933 | 1926 | // @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C |
whismanoid | 0:68e64068330f | 1927 | // |
whismanoid | 34:1b72865fa71f | 1928 | // Output data rate (sample rate) is determined by filter register. |
whismanoid | 34:1b72865fa71f | 1929 | // filter register configuration in Measure_RTD CONV_TYPE_01_Continuous |
whismanoid | 34:1b72865fa71f | 1930 | // rtd_filter=0x00 -- LINEF_00_50Hz_60Hz_FIR RATE_0000 | 1.1SPS |
whismanoid | 34:1b72865fa71f | 1931 | // rtd_filter=0x01 -- LINEF_00_50Hz_60Hz_FIR RATE_0001 | 2.1SPS |
whismanoid | 34:1b72865fa71f | 1932 | // rtd_filter=0x02 -- LINEF_00_50Hz_60Hz_FIR RATE_0010 | 4.2SPS |
whismanoid | 34:1b72865fa71f | 1933 | // rtd_filter=0x03 -- LINEF_00_50Hz_60Hz_FIR RATE_0011 | 8.4SPS |
whismanoid | 34:1b72865fa71f | 1934 | // rtd_filter=0x04 -- LINEF_00_50Hz_60Hz_FIR RATE_0100 | 16.8SPS |
whismanoid | 34:1b72865fa71f | 1935 | // rtd_filter=0x10 -- LINEF_01_50Hz_FIR RATE_0000 | 1.3SPS |
whismanoid | 34:1b72865fa71f | 1936 | // rtd_filter=0x11 -- LINEF_01_50Hz_FIR RATE_0001 | 2.7SPS |
whismanoid | 34:1b72865fa71f | 1937 | // rtd_filter=0x12 -- LINEF_01_50Hz_FIR RATE_0010 | 5.3SPS |
whismanoid | 34:1b72865fa71f | 1938 | // rtd_filter=0x13 -- LINEF_01_50Hz_FIR RATE_0011 | 10.7SPS |
whismanoid | 34:1b72865fa71f | 1939 | // rtd_filter=0x14 -- LINEF_01_50Hz_FIR RATE_0100 | 21.3SPS |
whismanoid | 34:1b72865fa71f | 1940 | // rtd_filter=0x15 -- LINEF_01_50Hz_FIR RATE_0101 | 40.0SPS |
whismanoid | 34:1b72865fa71f | 1941 | // rtd_filter=0x20 -- LINEF_10_60Hz_FIR RATE_0000 | 1.3SPS |
whismanoid | 34:1b72865fa71f | 1942 | // rtd_filter=0x21 -- LINEF_10_60Hz_FIR RATE_0001 | 2.7SPS |
whismanoid | 34:1b72865fa71f | 1943 | // rtd_filter=0x22 -- LINEF_10_60Hz_FIR RATE_0010 | 5.3SPS |
whismanoid | 34:1b72865fa71f | 1944 | // rtd_filter=0x23 -- LINEF_10_60Hz_FIR RATE_0011 | 10.7SPS |
whismanoid | 34:1b72865fa71f | 1945 | // rtd_filter=0x24 -- LINEF_10_60Hz_FIR RATE_0100 | 21.3SPS |
whismanoid | 34:1b72865fa71f | 1946 | // rtd_filter=0x25 -- LINEF_10_60Hz_FIR RATE_0101 | 40.0SPS |
whismanoid | 34:1b72865fa71f | 1947 | // rtd_filter=0x30 -- LINEF_11_SINC4 RATE_0000 | 4SPS |
whismanoid | 34:1b72865fa71f | 1948 | // rtd_filter=0x31 -- LINEF_11_SINC4 RATE_0001 | 10SPS |
whismanoid | 34:1b72865fa71f | 1949 | // rtd_filter=0x32 -- LINEF_11_SINC4 RATE_0010 | 20SPS |
whismanoid | 34:1b72865fa71f | 1950 | // rtd_filter=0x33 -- LINEF_11_SINC4 RATE_0011 | 40SPS |
whismanoid | 34:1b72865fa71f | 1951 | // rtd_filter=0x34 --*LINEF_11_SINC4 RATE_0100 | 60SPS |
whismanoid | 34:1b72865fa71f | 1952 | // rtd_filter=0x35 -- LINEF_11_SINC4 RATE_0101 | 120SPS |
whismanoid | 34:1b72865fa71f | 1953 | // rtd_filter=0x36 -- LINEF_11_SINC4 RATE_0110 | 240SPS |
whismanoid | 34:1b72865fa71f | 1954 | // rtd_filter=0x37 -- LINEF_11_SINC4 RATE_0111 | 480SPS |
whismanoid | 34:1b72865fa71f | 1955 | // rtd_filter=0x38 -- LINEF_11_SINC4 RATE_1000 | 960SPS |
whismanoid | 34:1b72865fa71f | 1956 | // rtd_filter=0x39 -- LINEF_11_SINC4 RATE_1001 | 1920SPS |
whismanoid | 34:1b72865fa71f | 1957 | // |
whismanoid | 3:658a93dfb2d8 | 1958 | // @return resistance calculated from raw LSB code and reference resistance |
whismanoid | 1:d57c1a2cb83c | 1959 | double MAX11410::Measure_RTD(MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn) |
whismanoid | 0:68e64068330f | 1960 | { |
whismanoid | 0:68e64068330f | 1961 | |
whismanoid | 0:68e64068330f | 1962 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 1963 | // restrict channel selection to valid index range |
whismanoid | 8:3a9dfa2e8234 | 1964 | if ((uint8_t)rtd_iout > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD) |
whismanoid | 8:3a9dfa2e8234 | 1965 | { |
whismanoid | 8:3a9dfa2e8234 | 1966 | rtd_iout = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD; |
whismanoid | 8:3a9dfa2e8234 | 1967 | } |
whismanoid | 8:3a9dfa2e8234 | 1968 | |
whismanoid | 8:3a9dfa2e8234 | 1969 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 1970 | // restrict channel selection to valid index range |
whismanoid | 8:3a9dfa2e8234 | 1971 | if ((uint8_t)rtd_ainp > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD) |
whismanoid | 8:3a9dfa2e8234 | 1972 | { |
whismanoid | 8:3a9dfa2e8234 | 1973 | rtd_ainp = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD; |
whismanoid | 8:3a9dfa2e8234 | 1974 | } |
whismanoid | 8:3a9dfa2e8234 | 1975 | |
whismanoid | 8:3a9dfa2e8234 | 1976 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 1977 | // restrict channel selection to valid index range |
whismanoid | 8:3a9dfa2e8234 | 1978 | if ((uint8_t)rtd_ainn > /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND) |
whismanoid | 8:3a9dfa2e8234 | 1979 | { |
whismanoid | 8:3a9dfa2e8234 | 1980 | rtd_ainn = /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND; |
whismanoid | 8:3a9dfa2e8234 | 1981 | } |
whismanoid | 8:3a9dfa2e8234 | 1982 | |
whismanoid | 8:3a9dfa2e8234 | 1983 | //---------------------------------------- |
whismanoid | 23:22e7830bcccb | 1984 | // write8 0x08 FILTER to select output data rate |
whismanoid | 23:22e7830bcccb | 1985 | RegWrite(CMD_r000_1000_x0dd_dddd_FILTER, rtd_filter); |
whismanoid | 1:d57c1a2cb83c | 1986 | |
whismanoid | 1:d57c1a2cb83c | 1987 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1988 | // write8 0x09 CTRL to select reference resistor REF1P/REF1N; Data Format = Unipolar |
whismanoid | 23:22e7830bcccb | 1989 | RegWrite(CMD_r000_1001_dddd_dddd_CTRL, rtd_ctrl); |
whismanoid | 23:22e7830bcccb | 1990 | ctrl = rtd_ctrl; |
whismanoid | 1:d57c1a2cb83c | 1991 | |
whismanoid | 1:d57c1a2cb83c | 1992 | //---------------------------------------- |
whismanoid | 23:22e7830bcccb | 1993 | // write8 0x0A SOURCE to select IDAC_MODE 400uA; AIN9=2.000V, AIN8(PT100)=2.040V, AIN8(PT1000)=2.400V |
whismanoid | 23:22e7830bcccb | 1994 | RegWrite(CMD_r000_1010_dddd_dddd_SOURCE, rtd_source); |
whismanoid | 1:d57c1a2cb83c | 1995 | |
whismanoid | 1:d57c1a2cb83c | 1996 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 1997 | // write8 0x0B MUX_CTRL0 = 0x89 to select AINP=AIN8 and AINN=AIN9 |
whismanoid | 1:d57c1a2cb83c | 1998 | Configure_MUX_CTRL0((uint8_t)rtd_ainp, (uint8_t)rtd_ainn); |
whismanoid | 1:d57c1a2cb83c | 1999 | |
whismanoid | 1:d57c1a2cb83c | 2000 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 2001 | // write8 0x0C MUX_CTRL1 = 0xF7 to select IDAC1_SEL=NC, IDAC0_SEL=AIN7 |
whismanoid | 1:d57c1a2cb83c | 2002 | Configure_MUX_CTRL1((uint8_t)IDAC1_SEL_1111_unconnected, (uint8_t)rtd_iout); |
whismanoid | 1:d57c1a2cb83c | 2003 | |
whismanoid | 1:d57c1a2cb83c | 2004 | //---------------------------------------- |
whismanoid | 23:22e7830bcccb | 2005 | // write8 0x0E PGA and update pgaGain |
whismanoid | 23:22e7830bcccb | 2006 | Configure_PGA( |
whismanoid | 34:1b72865fa71f | 2007 | ((rtd_pga >> 4) & 2), // sigpath |
whismanoid | 23:22e7830bcccb | 2008 | ( rtd_pga & 7)); // gain |
whismanoid | 1:d57c1a2cb83c | 2009 | |
whismanoid | 1:d57c1a2cb83c | 2010 | //---------------------------------------- |
whismanoid | 22:c6812214a933 | 2011 | // diagnostic GPIO pulse on GP1 during RTD power-up interval rtd_ms |
whismanoid | 16:00aa1e5a6843 | 2012 | RegWrite(CMD_r000_0101_dddd_xddd_GP1_CTRL, 0xc3); // diagnostic GPIO pulse GP1 |
whismanoid | 16:00aa1e5a6843 | 2013 | // write8 0x05 GP1_CTRL (%SW 0x05 0xc3) 11000 output 011 logic 0 |
whismanoid | 16:00aa1e5a6843 | 2014 | |
whismanoid | 16:00aa1e5a6843 | 2015 | //---------------------------------------- |
whismanoid | 21:847b2220e96e | 2016 | // timing delay after enable RTD bias current |
whismanoid | 22:c6812214a933 | 2017 | wait_ms(rtd_ms); // timing delay function, platform-specific |
whismanoid | 9:06ca88952f1c | 2018 | |
whismanoid | 9:06ca88952f1c | 2019 | //---------------------------------------- |
whismanoid | 22:c6812214a933 | 2020 | // diagnostic GPIO pulse on GP1 during RTD power-up interval rtd_ms |
whismanoid | 16:00aa1e5a6843 | 2021 | RegWrite(CMD_r000_0101_dddd_xddd_GP1_CTRL, 0xc4); // diagnostic GPIO pulse GP1 |
whismanoid | 16:00aa1e5a6843 | 2022 | // write8 0x05 GP1_CTRL (%SW 0x05 0xc4) 11000 output 100 logic 1 |
whismanoid | 16:00aa1e5a6843 | 2023 | |
whismanoid | 16:00aa1e5a6843 | 2024 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 2025 | // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous |
whismanoid | 1:d57c1a2cb83c | 2026 | RegWrite(CMD_r000_0001_xddd_xxdd_CONV_START, 0x01); |
whismanoid | 1:d57c1a2cb83c | 2027 | |
whismanoid | 1:d57c1a2cb83c | 2028 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 2029 | // purge old data from data0 register |
whismanoid | 25:c4be3afbfafd | 2030 | RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &AINcode[((int)rtd_ainp & 0x0F)]); |
whismanoid | 25:c4be3afbfafd | 2031 | data0 = AINcode[((int)rtd_ainp & 0x0F)]; |
whismanoid | 25:c4be3afbfafd | 2032 | |
whismanoid | 25:c4be3afbfafd | 2033 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 2034 | // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0) |
whismanoid | 0:68e64068330f | 2035 | RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status); |
whismanoid | 0:68e64068330f | 2036 | |
whismanoid | 0:68e64068330f | 2037 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 2038 | // wait until STATUS_enum_t::STATUS_000010_DATA_RDY indicates data is available |
whismanoid | 16:00aa1e5a6843 | 2039 | // A bad SPI interface can cause bit slippage, which makes this loop get stuck. Expect *PART_ID? = 0x000F02 |
whismanoid | 16:00aa1e5a6843 | 2040 | // while ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0) { |
whismanoid | 16:00aa1e5a6843 | 2041 | // possible infinite loop; need a timeout or futility countdown to escape |
whismanoid | 22:c6812214a933 | 2042 | for (int futility_countdown = loop_limit; |
whismanoid | 16:00aa1e5a6843 | 2043 | ((futility_countdown > 0) && |
whismanoid | 16:00aa1e5a6843 | 2044 | ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0)); |
whismanoid | 16:00aa1e5a6843 | 2045 | futility_countdown--) |
whismanoid | 16:00aa1e5a6843 | 2046 | { |
whismanoid | 16:00aa1e5a6843 | 2047 | RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status); |
whismanoid | 16:00aa1e5a6843 | 2048 | } |
whismanoid | 16:00aa1e5a6843 | 2049 | |
whismanoid | 16:00aa1e5a6843 | 2050 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 2051 | // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0): AINcode[ainp] = measurement |
whismanoid | 1:d57c1a2cb83c | 2052 | RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &AINcode[((int)rtd_ainp & 0x0F)]); |
whismanoid | 1:d57c1a2cb83c | 2053 | data0 = AINcode[((int)rtd_ainp & 0x0F)]; |
whismanoid | 0:68e64068330f | 2054 | |
whismanoid | 0:68e64068330f | 2055 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 2056 | // turn off RTD bias current to avoid self-heating (unless rtd_ms is 0) |
whismanoid | 25:c4be3afbfafd | 2057 | if (rtd_ms != 0) |
whismanoid | 25:c4be3afbfafd | 2058 | { |
whismanoid | 25:c4be3afbfafd | 2059 | // write8 0x0C MUX_CTRL1 = 0xFF to select IDAC1_SEL=NC, IDAC0_SEL=NC |
whismanoid | 25:c4be3afbfafd | 2060 | Configure_MUX_CTRL1((uint8_t)IDAC1_SEL_1111_unconnected, (uint8_t)IDAC0_SEL_1111_unconnected); |
whismanoid | 25:c4be3afbfafd | 2061 | } |
whismanoid | 9:06ca88952f1c | 2062 | |
whismanoid | 9:06ca88952f1c | 2063 | //---------------------------------------- |
whismanoid | 22:c6812214a933 | 2064 | // resistance calculated from raw LSB code and ref1_v reference resistance in ohms |
whismanoid | 22:c6812214a933 | 2065 | rtd_ohm = VoltageOfCode(AINcode[((int)rtd_ainp & 0x0F)]); |
whismanoid | 22:c6812214a933 | 2066 | TemperatureOfRTD(rtd_ohm); // calculate rtd_degc |
whismanoid | 22:c6812214a933 | 2067 | return rtd_ohm; |
whismanoid | 0:68e64068330f | 2068 | } |
whismanoid | 0:68e64068330f | 2069 | |
whismanoid | 0:68e64068330f | 2070 | //---------------------------------------- |
whismanoid | 3:658a93dfb2d8 | 2071 | // Return the physical temperature corresponding to measured resistance |
whismanoid | 3:658a93dfb2d8 | 2072 | // of a PT1000 type Resistive Temperature Device (RTD). |
whismanoid | 3:658a93dfb2d8 | 2073 | // |
whismanoid | 22:c6812214a933 | 2074 | // @param[in] rtd_ohm = RTD resistance in ohms, default=1000 |
whismanoid | 22:c6812214a933 | 2075 | // @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C |
whismanoid | 3:658a93dfb2d8 | 2076 | // |
whismanoid | 3:658a93dfb2d8 | 2077 | // @return ideal temperature in degrees C, calculated from RTD resistance in ohms |
whismanoid | 21:847b2220e96e | 2078 | // @test group RTD_PT1000 // PT1000 type Resistive Temperature Device (RTD) |
whismanoid | 21:847b2220e96e | 2079 | // @test group RTD_PT1000 tinyTester.blink_time_msec = 20 // quickly speed through the software verification |
whismanoid | 19:50cf5da53d36 | 2080 | // @test group RTD_PT1000 TemperatureOfRTD_PT1000(842.94) expect -40.0 within 0.1 // PT-1000 RTD at -40C |
whismanoid | 19:50cf5da53d36 | 2081 | // @test group RTD_PT1000 TemperatureOfRTD_PT1000(1000.0) expect 0.0 within 0.1 // PT-1000 RTD at 0C |
whismanoid | 19:50cf5da53d36 | 2082 | // @test group RTD_PT1000 TemperatureOfRTD_PT1000(1097.3) expect 25.0 within 0.1 // PT-1000 RTD at 25C |
whismanoid | 19:50cf5da53d36 | 2083 | // @test group RTD_PT1000 TemperatureOfRTD_PT1000(1328.1) expect 85.0 within 0.1 // PT-1000 RTD at 85C |
whismanoid | 19:50cf5da53d36 | 2084 | // @test group RTD_PT1000 TemperatureOfRTD_PT1000(1479.5) expect 125.0 within 0.1 // PT-1000 RTD at 125C |
whismanoid | 21:847b2220e96e | 2085 | // @test group RTD_PT1000 tinyTester.blink_time_msec = 75 // default 75 resume hardware self test |
whismanoid | 3:658a93dfb2d8 | 2086 | // |
whismanoid | 22:c6812214a933 | 2087 | double MAX11410::TemperatureOfRTD_PT1000(double rtd_ohm) |
whismanoid | 3:658a93dfb2d8 | 2088 | { |
whismanoid | 3:658a93dfb2d8 | 2089 | |
whismanoid | 3:658a93dfb2d8 | 2090 | //---------------------------------------- |
whismanoid | 3:658a93dfb2d8 | 2091 | // Temperature from RTD Resistance maths |
whismanoid | 4:c169ba85d673 | 2092 | // ITS-90 PT-1000 RTD |
whismanoid | 4:c169ba85d673 | 2093 | double R0 = 1000.0; |
whismanoid | 4:c169ba85d673 | 2094 | double a = 3.9083e-3; |
whismanoid | 4:c169ba85d673 | 2095 | double b = -5.7750e-7; |
whismanoid | 5:a2e74357cfc0 | 2096 | // calculate T from R and R0 |
whismanoid | 22:c6812214a933 | 2097 | double sqrtTerm = sqrt(R0*R0 * a*a - 4*R0*b*(R0 - rtd_ohm)); |
whismanoid | 4:c169ba85d673 | 2098 | double denominator = 2 * R0 * b; |
whismanoid | 22:c6812214a933 | 2099 | rtd_degc = ((-R0 * a) + (sqrtTerm)) / denominator; |
whismanoid | 22:c6812214a933 | 2100 | return rtd_degc; |
whismanoid | 3:658a93dfb2d8 | 2101 | } |
whismanoid | 3:658a93dfb2d8 | 2102 | |
whismanoid | 3:658a93dfb2d8 | 2103 | //---------------------------------------- |
whismanoid | 16:00aa1e5a6843 | 2104 | // Return the physical temperature corresponding to measured resistance |
whismanoid | 16:00aa1e5a6843 | 2105 | // of a PT100 type Resistive Temperature Device (RTD). |
whismanoid | 16:00aa1e5a6843 | 2106 | // |
whismanoid | 22:c6812214a933 | 2107 | // @param[in] rtd_ohm = RTD resistance in ohms, default=100 |
whismanoid | 22:c6812214a933 | 2108 | // @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C |
whismanoid | 16:00aa1e5a6843 | 2109 | // |
whismanoid | 16:00aa1e5a6843 | 2110 | // @return ideal temperature in degrees C, calculated from RTD resistance in ohms |
whismanoid | 21:847b2220e96e | 2111 | // @test group RTD_PT100 // PT100 type Resistive Temperature Device (RTD) |
whismanoid | 21:847b2220e96e | 2112 | // @test group RTD_PT100 tinyTester.blink_time_msec = 20 // quickly speed through the software verification |
whismanoid | 19:50cf5da53d36 | 2113 | // @test group RTD_PT100 TemperatureOfRTD_PT100(84.294) expect -40.0 within 0.1 // PT-100 RTD at -40C |
whismanoid | 19:50cf5da53d36 | 2114 | // @test group RTD_PT100 TemperatureOfRTD_PT100(100.00) expect 0.0 within 0.1 // PT-100 RTD at 0C |
whismanoid | 19:50cf5da53d36 | 2115 | // @test group RTD_PT100 TemperatureOfRTD_PT100(109.73) expect 25.0 within 0.1 // PT-100 RTD at 25C |
whismanoid | 19:50cf5da53d36 | 2116 | // @test group RTD_PT100 TemperatureOfRTD_PT100(132.81) expect 85.0 within 0.1 // PT-100 RTD at 85C |
whismanoid | 19:50cf5da53d36 | 2117 | // @test group RTD_PT100 TemperatureOfRTD_PT100(147.95) expect 125.0 within 0.1 // PT-100 RTD at 125C |
whismanoid | 21:847b2220e96e | 2118 | // @test group RTD_PT100 tinyTester.blink_time_msec = 75 // default 75 resume hardware self test |
whismanoid | 16:00aa1e5a6843 | 2119 | // |
whismanoid | 22:c6812214a933 | 2120 | double MAX11410::TemperatureOfRTD_PT100(double rtd_ohm) |
whismanoid | 16:00aa1e5a6843 | 2121 | { |
whismanoid | 16:00aa1e5a6843 | 2122 | |
whismanoid | 16:00aa1e5a6843 | 2123 | //---------------------------------------- |
whismanoid | 16:00aa1e5a6843 | 2124 | // Temperature from RTD Resistance maths |
whismanoid | 16:00aa1e5a6843 | 2125 | // ITS-90 PT-100 RTD |
whismanoid | 16:00aa1e5a6843 | 2126 | double R0 = 100.0; |
whismanoid | 16:00aa1e5a6843 | 2127 | double a = 3.9083e-3; |
whismanoid | 16:00aa1e5a6843 | 2128 | double b = -5.7750e-7; |
whismanoid | 16:00aa1e5a6843 | 2129 | // calculate T from R and R0 |
whismanoid | 22:c6812214a933 | 2130 | double sqrtTerm = sqrt(R0*R0 * a*a - 4*R0*b*(R0 - rtd_ohm)); |
whismanoid | 16:00aa1e5a6843 | 2131 | double denominator = 2 * R0 * b; |
whismanoid | 22:c6812214a933 | 2132 | rtd_degc = ((-R0 * a) + (sqrtTerm)) / denominator; |
whismanoid | 22:c6812214a933 | 2133 | return rtd_degc; |
whismanoid | 16:00aa1e5a6843 | 2134 | } |
whismanoid | 16:00aa1e5a6843 | 2135 | |
whismanoid | 16:00aa1e5a6843 | 2136 | //---------------------------------------- |
whismanoid | 16:00aa1e5a6843 | 2137 | // Return the physical temperature corresponding to measured resistance |
whismanoid | 16:00aa1e5a6843 | 2138 | // of a PT100 or PT1000 type Resistive Temperature Device (RTD). |
whismanoid | 16:00aa1e5a6843 | 2139 | // |
whismanoid | 22:c6812214a933 | 2140 | // @param[in] rtd_ohm = RTD resistance in ohms, default=100 |
whismanoid | 22:c6812214a933 | 2141 | // @post rtd_degc: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C |
whismanoid | 16:00aa1e5a6843 | 2142 | // |
whismanoid | 16:00aa1e5a6843 | 2143 | // @return ideal temperature in degrees C, calculated from RTD resistance in ohms |
whismanoid | 19:50cf5da53d36 | 2144 | // @test group RTD // Verify function TemperatureOfRTD |
whismanoid | 19:50cf5da53d36 | 2145 | // @test group RTD tinyTester.blink_time_msec = 20 // quickly speed through the software verification |
whismanoid | 19:50cf5da53d36 | 2146 | // @test group RTD TemperatureOfRTD(84.294) expect -40.0 within 0.1 // PT-100 RTD at -40C |
whismanoid | 19:50cf5da53d36 | 2147 | // @test group RTD TemperatureOfRTD(100.00) expect 0.0 within 0.1 // PT-100 RTD at 0C |
whismanoid | 19:50cf5da53d36 | 2148 | // @test group RTD TemperatureOfRTD(109.73) expect 25.0 within 0.1 // PT-100 RTD at 25C |
whismanoid | 19:50cf5da53d36 | 2149 | // @test group RTD TemperatureOfRTD(132.81) expect 85.0 within 0.1 // PT-100 RTD at 85C |
whismanoid | 19:50cf5da53d36 | 2150 | // @test group RTD TemperatureOfRTD(147.95) expect 125.0 within 0.1 // PT-100 RTD at 125C |
whismanoid | 19:50cf5da53d36 | 2151 | // @test group RTD TemperatureOfRTD(842.94) expect -40.0 within 0.1 // PT-1000 RTD at -40C |
whismanoid | 19:50cf5da53d36 | 2152 | // @test group RTD TemperatureOfRTD(1000.0) expect 0.0 within 0.1 // PT-1000 RTD at 0C |
whismanoid | 19:50cf5da53d36 | 2153 | // @test group RTD TemperatureOfRTD(1097.3) expect 25.0 within 0.1 // PT-1000 RTD at 25C |
whismanoid | 19:50cf5da53d36 | 2154 | // @test group RTD TemperatureOfRTD(1328.1) expect 85.0 within 0.1 // PT-1000 RTD at 85C |
whismanoid | 19:50cf5da53d36 | 2155 | // @test group RTD TemperatureOfRTD(1479.5) expect 125.0 within 0.1 // PT-1000 RTD at 125C |
whismanoid | 21:847b2220e96e | 2156 | // @test group RTD tinyTester.blink_time_msec = 75 // default 75 resume hardware self test |
whismanoid | 16:00aa1e5a6843 | 2157 | // |
whismanoid | 22:c6812214a933 | 2158 | double MAX11410::TemperatureOfRTD(double rtd_ohm) |
whismanoid | 16:00aa1e5a6843 | 2159 | { |
whismanoid | 16:00aa1e5a6843 | 2160 | |
whismanoid | 16:00aa1e5a6843 | 2161 | //---------------------------------------- |
whismanoid | 16:00aa1e5a6843 | 2162 | // return TemperatureOfRTD_PT100 or TemperatureOfRTD_PT1000 |
whismanoid | 22:c6812214a933 | 2163 | if (rtd_ohm > 500.0) |
whismanoid | 16:00aa1e5a6843 | 2164 | { |
whismanoid | 22:c6812214a933 | 2165 | return TemperatureOfRTD_PT1000(rtd_ohm); |
whismanoid | 16:00aa1e5a6843 | 2166 | } |
whismanoid | 16:00aa1e5a6843 | 2167 | else |
whismanoid | 16:00aa1e5a6843 | 2168 | { |
whismanoid | 22:c6812214a933 | 2169 | return TemperatureOfRTD_PT100(rtd_ohm); |
whismanoid | 16:00aa1e5a6843 | 2170 | } |
whismanoid | 16:00aa1e5a6843 | 2171 | } |
whismanoid | 16:00aa1e5a6843 | 2172 | |
whismanoid | 16:00aa1e5a6843 | 2173 | //---------------------------------------- |
whismanoid | 22:c6812214a933 | 2174 | // Menu item 'TM' -> tc_v, tc_delta_degc, tc_degc |
whismanoid | 0:68e64068330f | 2175 | // Trigger Measurement for Thermocouple |
whismanoid | 0:68e64068330f | 2176 | // |
whismanoid | 0:68e64068330f | 2177 | // Example code for typical Thermocouple measurement. |
whismanoid | 1:d57c1a2cb83c | 2178 | // An RTD measures the "cold junction" where TC connects to the board, |
whismanoid | 1:d57c1a2cb83c | 2179 | // and the TC measures the temperature difference above the cold junction. |
whismanoid | 0:68e64068330f | 2180 | // |
whismanoid | 1:d57c1a2cb83c | 2181 | // @param[in] tc_ainp = channel of Thermocouple high side, default=AINP_SEL_0101_AIN5 |
whismanoid | 1:d57c1a2cb83c | 2182 | // @param[in] tc_ainn = channel of Thermocouple low side, default=AINN_SEL_0110_AIN6 |
whismanoid | 1:d57c1a2cb83c | 2183 | // @param[in] rtd_iout = channel RTD high side force, default=AINP_SEL_0111_AIN7 |
whismanoid | 1:d57c1a2cb83c | 2184 | // @param[in] rtd_ainp = channel RTD high side sense, default=AINP_SEL_1000_AIN8 |
whismanoid | 1:d57c1a2cb83c | 2185 | // @param[in] rtd_ainn = channel RTD low side, default=AINN_SEL_1001_AIN9 |
whismanoid | 1:d57c1a2cb83c | 2186 | // @post AINcode[tc_ainp]: measurement result LSB code |
whismanoid | 22:c6812214a933 | 2187 | // @post tc_v: raw thermocouple voltage in Volts |
whismanoid | 22:c6812214a933 | 2188 | // @post tc_delta_degc: temperature in degC above cold junction |
whismanoid | 22:c6812214a933 | 2189 | // @post tc_degc: temperature in degC |
whismanoid | 0:68e64068330f | 2190 | // |
whismanoid | 0:68e64068330f | 2191 | // @return 1 on success; 0 on failure |
whismanoid | 1:d57c1a2cb83c | 2192 | double MAX11410::Measure_Thermocouple(MAX11410_AINP_SEL_enum_t tc_ainp, MAX11410_AINN_SEL_enum_t tc_ainn, MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn) |
whismanoid | 0:68e64068330f | 2193 | { |
whismanoid | 0:68e64068330f | 2194 | |
whismanoid | 0:68e64068330f | 2195 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 2196 | // restrict channel selection to valid index range |
whismanoid | 8:3a9dfa2e8234 | 2197 | if ((uint8_t)tc_ainp > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD) |
whismanoid | 8:3a9dfa2e8234 | 2198 | { |
whismanoid | 8:3a9dfa2e8234 | 2199 | tc_ainp = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD; |
whismanoid | 8:3a9dfa2e8234 | 2200 | } |
whismanoid | 8:3a9dfa2e8234 | 2201 | |
whismanoid | 8:3a9dfa2e8234 | 2202 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 2203 | // restrict channel selection to valid index range |
whismanoid | 8:3a9dfa2e8234 | 2204 | if ((uint8_t)tc_ainn > /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND) |
whismanoid | 8:3a9dfa2e8234 | 2205 | { |
whismanoid | 8:3a9dfa2e8234 | 2206 | tc_ainn = /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND; |
whismanoid | 8:3a9dfa2e8234 | 2207 | } |
whismanoid | 8:3a9dfa2e8234 | 2208 | |
whismanoid | 8:3a9dfa2e8234 | 2209 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 2210 | // restrict channel selection to valid index range |
whismanoid | 8:3a9dfa2e8234 | 2211 | if ((uint8_t)rtd_iout > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD) |
whismanoid | 8:3a9dfa2e8234 | 2212 | { |
whismanoid | 8:3a9dfa2e8234 | 2213 | rtd_iout = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD; |
whismanoid | 8:3a9dfa2e8234 | 2214 | } |
whismanoid | 8:3a9dfa2e8234 | 2215 | |
whismanoid | 8:3a9dfa2e8234 | 2216 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 2217 | // restrict channel selection to valid index range |
whismanoid | 8:3a9dfa2e8234 | 2218 | if ((uint8_t)rtd_ainp > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD) |
whismanoid | 8:3a9dfa2e8234 | 2219 | { |
whismanoid | 8:3a9dfa2e8234 | 2220 | rtd_ainp = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD; |
whismanoid | 8:3a9dfa2e8234 | 2221 | } |
whismanoid | 8:3a9dfa2e8234 | 2222 | |
whismanoid | 8:3a9dfa2e8234 | 2223 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 2224 | // restrict channel selection to valid index range |
whismanoid | 8:3a9dfa2e8234 | 2225 | if ((uint8_t)rtd_ainn > /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND) |
whismanoid | 8:3a9dfa2e8234 | 2226 | { |
whismanoid | 8:3a9dfa2e8234 | 2227 | rtd_ainn = /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND; |
whismanoid | 8:3a9dfa2e8234 | 2228 | } |
whismanoid | 8:3a9dfa2e8234 | 2229 | |
whismanoid | 8:3a9dfa2e8234 | 2230 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 2231 | // write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND |
whismanoid | 8:3a9dfa2e8234 | 2232 | Configure_MUX_CTRL0((uint8_t)tc_ainp, (uint8_t)tc_ainn); |
whismanoid | 8:3a9dfa2e8234 | 2233 | |
whismanoid | 8:3a9dfa2e8234 | 2234 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 2235 | // write8 0x09 CTRL to select reference REF2P/REF2N; Data Format = Bipolar 2's Complement |
whismanoid | 8:3a9dfa2e8234 | 2236 | Configure_CTRL(/*extclk*/ 0, /*u_bn*/ 0, /*format*/ 0, |
whismanoid | 8:3a9dfa2e8234 | 2237 | /*refbufp_en*/ 0, /*refbufn_en*/ 0, |
whismanoid | 8:3a9dfa2e8234 | 2238 | /*ref_sel*/ (uint8_t)REF_SEL_010_REF2P_REF2N); |
whismanoid | 8:3a9dfa2e8234 | 2239 | |
whismanoid | 8:3a9dfa2e8234 | 2240 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 2241 | // write8 0x0E PGA |
whismanoid | 8:3a9dfa2e8234 | 2242 | Configure_PGA((uint8_t) /* MAX11410_SIG_PATH_enum_t:: */ SIG_PATH_00_BUFFERED, |
whismanoid | 8:3a9dfa2e8234 | 2243 | (uint8_t) /* MAX11410_GAIN_enum_t:: */ GAIN_000_1); |
whismanoid | 8:3a9dfa2e8234 | 2244 | |
whismanoid | 8:3a9dfa2e8234 | 2245 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 2246 | // write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous) |
whismanoid | 8:3a9dfa2e8234 | 2247 | Configure_FILTER((uint8_t) /* MAX11410::MAX11410_LINEF_enum_t:: */ LINEF_11_SINC4, |
whismanoid | 8:3a9dfa2e8234 | 2248 | (uint8_t) /* MAX11410::MAX11410_RATE_enum_t:: */ RATE_0100); |
whismanoid | 8:3a9dfa2e8234 | 2249 | |
whismanoid | 8:3a9dfa2e8234 | 2250 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 2251 | // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous |
whismanoid | 8:3a9dfa2e8234 | 2252 | RegWrite(CMD_r000_0001_xddd_xxdd_CONV_START, 0x01); |
whismanoid | 8:3a9dfa2e8234 | 2253 | |
whismanoid | 8:3a9dfa2e8234 | 2254 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 2255 | // purge old data from data0 register |
whismanoid | 25:c4be3afbfafd | 2256 | RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &AINcode[((int)tc_ainp & 0x0F)]); |
whismanoid | 25:c4be3afbfafd | 2257 | data0 = AINcode[((int)tc_ainp & 0x0F)]; |
whismanoid | 25:c4be3afbfafd | 2258 | |
whismanoid | 25:c4be3afbfafd | 2259 | //---------------------------------------- |
whismanoid | 0:68e64068330f | 2260 | // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0) |
whismanoid | 0:68e64068330f | 2261 | RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status); |
whismanoid | 0:68e64068330f | 2262 | |
whismanoid | 0:68e64068330f | 2263 | //---------------------------------------- |
whismanoid | 25:c4be3afbfafd | 2264 | // wait until STATUS_enum_t::STATUS_000010_DATA_RDY indicates data is available |
whismanoid | 16:00aa1e5a6843 | 2265 | // A bad SPI interface can cause bit slippage, which makes this loop get stuck. Expect *PART_ID? = 0x000F02 |
whismanoid | 16:00aa1e5a6843 | 2266 | // while ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0) { |
whismanoid | 16:00aa1e5a6843 | 2267 | // possible infinite loop; need a timeout or futility countdown to escape |
whismanoid | 22:c6812214a933 | 2268 | for (int futility_countdown = loop_limit; |
whismanoid | 16:00aa1e5a6843 | 2269 | ((futility_countdown > 0) && |
whismanoid | 16:00aa1e5a6843 | 2270 | ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0)); |
whismanoid | 16:00aa1e5a6843 | 2271 | futility_countdown--) |
whismanoid | 16:00aa1e5a6843 | 2272 | { |
whismanoid | 16:00aa1e5a6843 | 2273 | RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status); |
whismanoid | 16:00aa1e5a6843 | 2274 | } |
whismanoid | 16:00aa1e5a6843 | 2275 | |
whismanoid | 16:00aa1e5a6843 | 2276 | //---------------------------------------- |
whismanoid | 8:3a9dfa2e8234 | 2277 | // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0): AINcode[tc_ainp] = measurement |
whismanoid | 8:3a9dfa2e8234 | 2278 | RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &AINcode[((int)tc_ainp & 0x0F)]); |
whismanoid | 8:3a9dfa2e8234 | 2279 | data0 = AINcode[((int)tc_ainp & 0x0F)]; |
whismanoid | 0:68e64068330f | 2280 | |
whismanoid | 0:68e64068330f | 2281 | //---------------------------------------- |
whismanoid | 1:d57c1a2cb83c | 2282 | // ideal voltage calculated from raw LSB code and reference voltage |
whismanoid | 22:c6812214a933 | 2283 | tc_v = VoltageOfCode(AINcode[((int)tc_ainp & 0x0F)]); |
whismanoid | 21:847b2220e96e | 2284 | |
whismanoid | 21:847b2220e96e | 2285 | //---------------------------------------- |
whismanoid | 21:847b2220e96e | 2286 | // ideal voltage calculated from raw LSB code and reference voltage |
whismanoid | 22:c6812214a933 | 2287 | tc_delta_degc = TemperatureOfTC_TypeK(tc_v); |
whismanoid | 21:847b2220e96e | 2288 | |
whismanoid | 21:847b2220e96e | 2289 | //---------------------------------------- |
whismanoid | 21:847b2220e96e | 2290 | // ideal voltage calculated from raw LSB code and reference voltage |
whismanoid | 22:c6812214a933 | 2291 | tc_degc = rtd_degc + tc_delta_degc; |
whismanoid | 21:847b2220e96e | 2292 | |
whismanoid | 21:847b2220e96e | 2293 | //---------------------------------------- |
whismanoid | 21:847b2220e96e | 2294 | // ideal voltage calculated from raw LSB code and reference voltage |
whismanoid | 22:c6812214a933 | 2295 | return tc_v; |
whismanoid | 0:68e64068330f | 2296 | } |
whismanoid | 0:68e64068330f | 2297 | |
whismanoid | 3:658a93dfb2d8 | 2298 | //---------------------------------------- |
whismanoid | 3:658a93dfb2d8 | 2299 | // Return the physical temperature corresponding to measured voltage |
whismanoid | 3:658a93dfb2d8 | 2300 | // of a type K Thermocouple (TC). |
whismanoid | 3:658a93dfb2d8 | 2301 | // |
whismanoid | 22:c6812214a933 | 2302 | // @pre {0}.rtd_degc = cold junction temperature, in degrees C |
whismanoid | 22:c6812214a933 | 2303 | // @param[in] tc_v = Thermocouple voltage in volts, default=0.0254 |
whismanoid | 3:658a93dfb2d8 | 2304 | // |
whismanoid | 3:658a93dfb2d8 | 2305 | // @return ideal temperature in degrees C, calculated from RTD resistance in ohms |
whismanoid | 21:847b2220e96e | 2306 | // @test group TC_1 // Verify Thermocouple function TemperatureOfTC_TypeK |
whismanoid | 21:847b2220e96e | 2307 | // @test group TC_2 // Verify Thermocouple function TemperatureOfTC_TypeK in more detail |
whismanoid | 21:847b2220e96e | 2308 | // @test group TC_1 tinyTester.blink_time_msec = 20 // quickly speed through the software verification |
whismanoid | 19:50cf5da53d36 | 2309 | // @test group TC_1 TemperatureOfTC_TypeK(0.000e-3) expect 0.0 within 0.1 // TC_TypeK at 0C = 0.000mV |
whismanoid | 19:50cf5da53d36 | 2310 | // @test group TC_1 TemperatureOfTC_TypeK(0.039e-3) expect 1.0 within 0.1 // TC_TypeK at 1C = 0.039mV |
whismanoid | 19:50cf5da53d36 | 2311 | // @test group TC_1 TemperatureOfTC_TypeK(0.079e-3) expect 2.0 within 0.1 // TC_TypeK at 2C = 0.079mV |
whismanoid | 19:50cf5da53d36 | 2312 | // @test group TC_1 TemperatureOfTC_TypeK(0.119e-3) expect 3.0 within 0.1 // TC_TypeK at 3C = 0.119mV |
whismanoid | 19:50cf5da53d36 | 2313 | // @test group TC_2 TemperatureOfTC_TypeK(0.158e-3) expect 4.0 within 0.1 // TC_TypeK at 4C = 0.158mV |
whismanoid | 19:50cf5da53d36 | 2314 | // @test group TC_2 TemperatureOfTC_TypeK(0.198e-3) expect 5.0 within 0.1 // TC_TypeK at 5C = 0.198mV |
whismanoid | 19:50cf5da53d36 | 2315 | // @test group TC_2 TemperatureOfTC_TypeK(0.238e-3) expect 6.0 within 0.1 // TC_TypeK at 6C = 0.238mV |
whismanoid | 19:50cf5da53d36 | 2316 | // @test group TC_2 TemperatureOfTC_TypeK(0.2775e-3) expect 7.0 within 0.1 // TC_TypeK at 7C = 0.2775mV |
whismanoid | 19:50cf5da53d36 | 2317 | // @test group TC_2 TemperatureOfTC_TypeK(0.317e-3) expect 8.0 within 0.1 // TC_TypeK at 8C = 0.317mV |
whismanoid | 19:50cf5da53d36 | 2318 | // @test group TC_2 TemperatureOfTC_TypeK(0.357e-3) expect 9.0 within 0.1 // TC_TypeK at 9C = 0.357mV |
whismanoid | 19:50cf5da53d36 | 2319 | // @test group TC_1 TemperatureOfTC_TypeK(0.397e-3) expect 10.0 within 0.1 // TC_TypeK at 10C = 0.397mV |
whismanoid | 19:50cf5da53d36 | 2320 | // @test group TC_1 TemperatureOfTC_TypeK(0.798e-3) expect 20.0 within 0.1 // TC_TypeK at 20C = 0.798mV |
whismanoid | 19:50cf5da53d36 | 2321 | // @test group TC_1 TemperatureOfTC_TypeK(1.081e-3) expect 27.0 within 0.1 // TC_TypeK at 27C = 1.081mV |
whismanoid | 19:50cf5da53d36 | 2322 | // @test group TC_1 TemperatureOfTC_TypeK(1.203e-3) expect 30.0 within 0.1 // TC_TypeK at 30C = 1.203mV |
whismanoid | 19:50cf5da53d36 | 2323 | // @test group TC_1 TemperatureOfTC_TypeK(1.612e-3) expect 40.0 within 0.1 // TC_TypeK at 40C = 1.612mV |
whismanoid | 19:50cf5da53d36 | 2324 | // @test group TC_1 TemperatureOfTC_TypeK(2.023e-3) expect 50.0 within 0.1 // TC_TypeK at 50C = 2.023mV |
whismanoid | 19:50cf5da53d36 | 2325 | // @test group TC_1 TemperatureOfTC_TypeK(2.436e-3) expect 60.0 within 0.1 // TC_TypeK at 60C = 2.436mV |
whismanoid | 19:50cf5da53d36 | 2326 | // @test group TC_1 TemperatureOfTC_TypeK(2.851e-3) expect 70.0 within 0.1 // TC_TypeK at 70C = 2.851mV |
whismanoid | 19:50cf5da53d36 | 2327 | // @test group TC_1 TemperatureOfTC_TypeK(3.267e-3) expect 80.0 within 0.1 // TC_TypeK at 80C = 3.267mV |
whismanoid | 19:50cf5da53d36 | 2328 | // @test group TC_1 TemperatureOfTC_TypeK(3.682e-3) expect 90.0 within 0.1 // TC_TypeK at 90C = 3.682mV |
whismanoid | 19:50cf5da53d36 | 2329 | // @test group TC_1 TemperatureOfTC_TypeK(4.096e-3) expect 100.0 within 0.1 // TC_TypeK at 100C = 4.096mV |
whismanoid | 19:50cf5da53d36 | 2330 | // @test group TC_2 TemperatureOfTC_TypeK(4.509e-3) expect 110.0 within 0.1 // TC_TypeK at 110C = 4.509mV |
whismanoid | 19:50cf5da53d36 | 2331 | // @test group TC_2 TemperatureOfTC_TypeK(4.920e-3) expect 120.0 within 0.1 // TC_TypeK at 120C = 4.920mV |
whismanoid | 19:50cf5da53d36 | 2332 | // @test group TC_2 TemperatureOfTC_TypeK(5.328e-3) expect 130.0 within 0.1 // TC_TypeK at 130C = 5.328mV |
whismanoid | 19:50cf5da53d36 | 2333 | // @test group TC_2 TemperatureOfTC_TypeK(5.735e-3) expect 140.0 within 0.1 // TC_TypeK at 140C = 5.735mV |
whismanoid | 19:50cf5da53d36 | 2334 | // @test group TC_2 TemperatureOfTC_TypeK(6.138e-3) expect 150.0 within 0.1 // TC_TypeK at 150C = 6.138mV |
whismanoid | 19:50cf5da53d36 | 2335 | // @test group TC_2 TemperatureOfTC_TypeK(6.540e-3) expect 160.0 within 0.1 // TC_TypeK at 160C = 6.540mV |
whismanoid | 19:50cf5da53d36 | 2336 | // @test group TC_2 TemperatureOfTC_TypeK(6.941e-3) expect 170.0 within 0.1 // TC_TypeK at 170C = 6.941mV |
whismanoid | 19:50cf5da53d36 | 2337 | // @test group TC_2 TemperatureOfTC_TypeK(7.340e-3) expect 180.0 within 0.1 // TC_TypeK at 180C = 7.340mV |
whismanoid | 19:50cf5da53d36 | 2338 | // @test group TC_1 TemperatureOfTC_TypeK(7.739e-3) expect 190.0 within 0.1 // TC_TypeK at 190C = 7.739mV |
whismanoid | 19:50cf5da53d36 | 2339 | // @test group TC_1 TemperatureOfTC_TypeK(8.138e-3) expect 200.0 within 0.1 // TC_TypeK at 200C = 8.138mV |
whismanoid | 19:50cf5da53d36 | 2340 | // @test group TC_1 TemperatureOfTC_TypeK(8.539e-3) expect 210.0 within 0.1 // TC_TypeK at 210C = 8.539mV |
whismanoid | 19:50cf5da53d36 | 2341 | // @test group TC_1 TemperatureOfTC_TypeK(8.940e-3) expect 220.0 within 0.1 // TC_TypeK at 220C = 8.940mV |
whismanoid | 19:50cf5da53d36 | 2342 | // @test group TC_2 TemperatureOfTC_TypeK(9.343e-3) expect 230.0 within 0.1 // TC_TypeK at 230C = 9.343mV |
whismanoid | 19:50cf5da53d36 | 2343 | // @test group TC_2 TemperatureOfTC_TypeK(9.747e-3) expect 240.0 within 0.1 // TC_TypeK at 240C = 9.747mV |
whismanoid | 19:50cf5da53d36 | 2344 | // @test group TC_2 TemperatureOfTC_TypeK(10.153e-3) expect 250.0 within 0.1 // TC_TypeK at 250C = 10.153mV |
whismanoid | 19:50cf5da53d36 | 2345 | // @test group TC_2 TemperatureOfTC_TypeK(10.561e-3) expect 260.0 within 0.1 // TC_TypeK at 260C = 10.561mV |
whismanoid | 19:50cf5da53d36 | 2346 | // @test group TC_2 TemperatureOfTC_TypeK(10.971e-3) expect 270.0 within 0.1 // TC_TypeK at 270C = 10.971mV |
whismanoid | 19:50cf5da53d36 | 2347 | // @test group TC_2 TemperatureOfTC_TypeK(11.382e-3) expect 280.0 within 0.1 // TC_TypeK at 280C = 11.382mV |
whismanoid | 19:50cf5da53d36 | 2348 | // @test group TC_2 TemperatureOfTC_TypeK(11.795e-3) expect 290.0 within 0.1 // TC_TypeK at 290C = 11.795mV |
whismanoid | 19:50cf5da53d36 | 2349 | // @test group TC_1 TemperatureOfTC_TypeK(12.209e-3) expect 300.0 within 0.1 // TC_TypeK at 300C = 12.209mV |
whismanoid | 19:50cf5da53d36 | 2350 | // @test group TC_2 TemperatureOfTC_TypeK(14.293e-3) expect 350.0 within 0.1 // TC_TypeK at 350C = 14.293mV |
whismanoid | 19:50cf5da53d36 | 2351 | // @test group TC_1 TemperatureOfTC_TypeK(16.397e-3) expect 400.0 within 0.1 // TC_TypeK at 400C = 16.397mV |
whismanoid | 19:50cf5da53d36 | 2352 | // @test group TC_1 TemperatureOfTC_TypeK(18.516e-3) expect 450.0 within 0.1 // TC_TypeK at 450C = 18.516mV |
whismanoid | 19:50cf5da53d36 | 2353 | // @test group TC_1 TemperatureOfTC_TypeK(20.218e-3) expect 490.0 // TC_TypeK at 490C = 20.218mV |
whismanoid | 21:847b2220e96e | 2354 | // @test group TC_1 tinyTester.blink_time_msec = 75 // default 75 resume hardware self test |
whismanoid | 3:658a93dfb2d8 | 2355 | // |
whismanoid | 22:c6812214a933 | 2356 | double MAX11410::TemperatureOfTC_TypeK(double tc_v) |
whismanoid | 3:658a93dfb2d8 | 2357 | { |
whismanoid | 3:658a93dfb2d8 | 2358 | |
whismanoid | 3:658a93dfb2d8 | 2359 | //---------------------------------------- |
whismanoid | 3:658a93dfb2d8 | 2360 | // Temperature from TC_TypeK voltage maths |
whismanoid | 5:a2e74357cfc0 | 2361 | // define standard TC_TypeK coefficients |
whismanoid | 4:c169ba85d673 | 2362 | // ITS-90 Thermocouple Inverse Polynomial for a Type K thermocouple |
whismanoid | 22:c6812214a933 | 2363 | // calculate deltaT from tc_v |
whismanoid | 4:c169ba85d673 | 2364 | // |
whismanoid | 22:c6812214a933 | 2365 | // Voltage range -5891uV < tc_v < 0uV, |
whismanoid | 4:c169ba85d673 | 2366 | // Temperature Range -200 deg C to 0 deg C |
whismanoid | 4:c169ba85d673 | 2367 | static double coefficients_TCtypeK_V_lt_0[] = { |
whismanoid | 4:c169ba85d673 | 2368 | 0.00000, |
whismanoid | 4:c169ba85d673 | 2369 | 2.5173462e-2, |
whismanoid | 4:c169ba85d673 | 2370 | -1.1662878e-6, |
whismanoid | 4:c169ba85d673 | 2371 | -1.0833638e-9, |
whismanoid | 4:c169ba85d673 | 2372 | -8.9773540e-13, |
whismanoid | 4:c169ba85d673 | 2373 | -3.7342377e-16, |
whismanoid | 4:c169ba85d673 | 2374 | -8.6632643e-20, |
whismanoid | 4:c169ba85d673 | 2375 | -1.0450598e-23, |
whismanoid | 4:c169ba85d673 | 2376 | -5.1920577e-28, |
whismanoid | 4:c169ba85d673 | 2377 | }; |
whismanoid | 4:c169ba85d673 | 2378 | // |
whismanoid | 22:c6812214a933 | 2379 | // Voltage range 0uV < tc_v < 20.644uV, |
whismanoid | 4:c169ba85d673 | 2380 | // Temperature Range 0 deg C to 500 deg C |
whismanoid | 4:c169ba85d673 | 2381 | static double coefficients_TCtypeK_0_lt_V_lt_20u644V[] = { |
whismanoid | 4:c169ba85d673 | 2382 | 0.00000, |
whismanoid | 4:c169ba85d673 | 2383 | 2.508355e-2, |
whismanoid | 4:c169ba85d673 | 2384 | 7.860106e-8, |
whismanoid | 4:c169ba85d673 | 2385 | -2.503131e-10, |
whismanoid | 4:c169ba85d673 | 2386 | 8.315270e-14, |
whismanoid | 4:c169ba85d673 | 2387 | -1.228034e-17, |
whismanoid | 4:c169ba85d673 | 2388 | 9.804036e-22, |
whismanoid | 4:c169ba85d673 | 2389 | -4.413030e-26, |
whismanoid | 4:c169ba85d673 | 2390 | 1.057734e-30, |
whismanoid | 4:c169ba85d673 | 2391 | -1.052755e-35, |
whismanoid | 4:c169ba85d673 | 2392 | }; |
whismanoid | 4:c169ba85d673 | 2393 | // |
whismanoid | 22:c6812214a933 | 2394 | // Voltage range 20.6440uV < tc_v < 54.886uV, |
whismanoid | 4:c169ba85d673 | 2395 | // Temperature Range 500 deg C to 1372 deg C |
whismanoid | 4:c169ba85d673 | 2396 | static double coefficients_TCtypeK_20u644V_lt_V_lt_54u886V[] = { |
whismanoid | 4:c169ba85d673 | 2397 | -1.318058e2, |
whismanoid | 4:c169ba85d673 | 2398 | 4.830222e-2, |
whismanoid | 4:c169ba85d673 | 2399 | -1.646031e-6, |
whismanoid | 4:c169ba85d673 | 2400 | 5.464731e-11, |
whismanoid | 4:c169ba85d673 | 2401 | -9.650715e-16, |
whismanoid | 4:c169ba85d673 | 2402 | 8.802193e-21, |
whismanoid | 4:c169ba85d673 | 2403 | -3.110810e-26, |
whismanoid | 4:c169ba85d673 | 2404 | }; |
whismanoid | 4:c169ba85d673 | 2405 | // |
whismanoid | 3:658a93dfb2d8 | 2406 | double deltaT = 0; |
whismanoid | 22:c6812214a933 | 2407 | double thermocouple_voltage_uV = tc_v * 1e6; |
whismanoid | 4:c169ba85d673 | 2408 | if (thermocouple_voltage_uV < 0) |
whismanoid | 4:c169ba85d673 | 2409 | { |
whismanoid | 4:c169ba85d673 | 2410 | // Voltage range -5891uV < DMMavg < 0uV, Temperature Range -200 deg C to 0 deg C |
whismanoid | 4:c169ba85d673 | 2411 | deltaT = temperatureDegC_polynomial(thermocouple_voltage_uV, 9, coefficients_TCtypeK_V_lt_0); |
whismanoid | 4:c169ba85d673 | 2412 | } |
whismanoid | 4:c169ba85d673 | 2413 | else if (thermocouple_voltage_uV > 20644) |
whismanoid | 4:c169ba85d673 | 2414 | { |
whismanoid | 4:c169ba85d673 | 2415 | // Voltage range 206440uV < DMMavg < 54886uV, Temperature Range 500 deg C to 1372 deg C |
whismanoid | 4:c169ba85d673 | 2416 | deltaT = temperatureDegC_polynomial(thermocouple_voltage_uV, 7, coefficients_TCtypeK_20u644V_lt_V_lt_54u886V); |
whismanoid | 4:c169ba85d673 | 2417 | } |
whismanoid | 4:c169ba85d673 | 2418 | else |
whismanoid | 4:c169ba85d673 | 2419 | { |
whismanoid | 4:c169ba85d673 | 2420 | // Voltage range 0uV < DMMavg < 20.644uV, Temperature Range 0 deg C to 500 deg C |
whismanoid | 4:c169ba85d673 | 2421 | deltaT = temperatureDegC_polynomial(thermocouple_voltage_uV, 10, coefficients_TCtypeK_0_lt_V_lt_20u644V); |
whismanoid | 4:c169ba85d673 | 2422 | } |
whismanoid | 22:c6812214a933 | 2423 | return deltaT; // + rtd_degc; // cold junction |
whismanoid | 4:c169ba85d673 | 2424 | } |
whismanoid | 4:c169ba85d673 | 2425 | |
whismanoid | 4:c169ba85d673 | 2426 | //---------------------------------------- |
whismanoid | 4:c169ba85d673 | 2427 | // Calculate temperature in degrees C from input voltage, |
whismanoid | 4:c169ba85d673 | 2428 | // using a given set of polynomial coefficients. |
whismanoid | 4:c169ba85d673 | 2429 | // For example: |
whismanoid | 4:c169ba85d673 | 2430 | // |
whismanoid | 4:c169ba85d673 | 2431 | // t = coefficients[0] + coefficients[1] * DMMavg + coefficients[2] * DmMMavg**2 |
whismanoid | 4:c169ba85d673 | 2432 | // |
whismanoid | 4:c169ba85d673 | 2433 | // @param[in] thermocouple_voltage_uV = Thermocouple voltage in microvolts |
whismanoid | 4:c169ba85d673 | 2434 | // |
whismanoid | 4:c169ba85d673 | 2435 | // @return ideal temperature in degrees C, calculated from polynomial coefficients |
whismanoid | 4:c169ba85d673 | 2436 | // |
whismanoid | 4:c169ba85d673 | 2437 | double MAX11410::temperatureDegC_polynomial(double thermocouple_voltage_uV, int num_coefficients, double coefficients[]) |
whismanoid | 4:c169ba85d673 | 2438 | { |
whismanoid | 4:c169ba85d673 | 2439 | |
whismanoid | 4:c169ba85d673 | 2440 | //---------------------------------------- |
whismanoid | 4:c169ba85d673 | 2441 | // Temperature from polynomial coefficients maths |
whismanoid | 4:c169ba85d673 | 2442 | double temperatureDegC = 0; |
whismanoid | 4:c169ba85d673 | 2443 | int index; |
whismanoid | 4:c169ba85d673 | 2444 | for (index = num_coefficients-1; index >= 0; index--) |
whismanoid | 4:c169ba85d673 | 2445 | { |
whismanoid | 4:c169ba85d673 | 2446 | temperatureDegC = (temperatureDegC * thermocouple_voltage_uV) + coefficients[index]; |
whismanoid | 4:c169ba85d673 | 2447 | } |
whismanoid | 4:c169ba85d673 | 2448 | return temperatureDegC; |
whismanoid | 3:658a93dfb2d8 | 2449 | } |
whismanoid | 3:658a93dfb2d8 | 2450 | |
whismanoid | 0:68e64068330f | 2451 | |
whismanoid | 0:68e64068330f | 2452 | // End of file |