MAX11410 high speed 24-bit Delta-Sigma ADC

Dependents:   MAX11410BOB_24bit_ADC MAX11410BOB_Serial_Tester

Committer:
whismanoid
Date:
Sun Mar 29 11:09:11 2020 +0000
Revision:
19:50cf5da53d36
Parent:
17:0e9f2dfc2a30
Child:
20:fb7527415308
Self Test work in progress

Who changed what in which revision?

UserRevisionLine numberNew contents of line
whismanoid 0:68e64068330f 1 // /*******************************************************************************
whismanoid 4:c169ba85d673 2 // * Copyright (C) 2020 Maxim Integrated Products, Inc., All Rights Reserved.
whismanoid 0:68e64068330f 3 // *
whismanoid 0:68e64068330f 4 // * Permission is hereby granted, free of charge, to any person obtaining a
whismanoid 0:68e64068330f 5 // * copy of this software and associated documentation files (the "Software"),
whismanoid 0:68e64068330f 6 // * to deal in the Software without restriction, including without limitation
whismanoid 0:68e64068330f 7 // * the rights to use, copy, modify, merge, publish, distribute, sublicense,
whismanoid 0:68e64068330f 8 // * and/or sell copies of the Software, and to permit persons to whom the
whismanoid 0:68e64068330f 9 // * Software is furnished to do so, subject to the following conditions:
whismanoid 0:68e64068330f 10 // *
whismanoid 0:68e64068330f 11 // * The above copyright notice and this permission notice shall be included
whismanoid 0:68e64068330f 12 // * in all copies or substantial portions of the Software.
whismanoid 0:68e64068330f 13 // *
whismanoid 0:68e64068330f 14 // * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
whismanoid 0:68e64068330f 15 // * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
whismanoid 0:68e64068330f 16 // * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
whismanoid 0:68e64068330f 17 // * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
whismanoid 0:68e64068330f 18 // * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
whismanoid 0:68e64068330f 19 // * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
whismanoid 0:68e64068330f 20 // * OTHER DEALINGS IN THE SOFTWARE.
whismanoid 0:68e64068330f 21 // *
whismanoid 0:68e64068330f 22 // * Except as contained in this notice, the name of Maxim Integrated
whismanoid 0:68e64068330f 23 // * Products, Inc. shall not be used except as stated in the Maxim Integrated
whismanoid 0:68e64068330f 24 // * Products, Inc. Branding Policy.
whismanoid 0:68e64068330f 25 // *
whismanoid 0:68e64068330f 26 // * The mere transfer of this software does not imply any licenses
whismanoid 0:68e64068330f 27 // * of trade secrets, proprietary technology, copyrights, patents,
whismanoid 0:68e64068330f 28 // * trademarks, maskwork rights, or any other form of intellectual
whismanoid 0:68e64068330f 29 // * property whatsoever. Maxim Integrated Products, Inc. retains all
whismanoid 0:68e64068330f 30 // * ownership rights.
whismanoid 0:68e64068330f 31 // *******************************************************************************
whismanoid 0:68e64068330f 32 // */
whismanoid 0:68e64068330f 33 // *********************************************************************
whismanoid 0:68e64068330f 34 // @file MAX11410.cpp
whismanoid 0:68e64068330f 35 // *********************************************************************
whismanoid 0:68e64068330f 36 // Device Driver file
whismanoid 0:68e64068330f 37 // DO NOT EDIT; except areas designated "CUSTOMIZE". Automatically generated file.
whismanoid 0:68e64068330f 38 // generated by XMLSystemOfDevicesToMBED.py
whismanoid 0:68e64068330f 39 // System Name = ExampleSystem
whismanoid 0:68e64068330f 40 // System Description = Device driver example
whismanoid 0:68e64068330f 41
whismanoid 0:68e64068330f 42 #include "MAX11410.h"
whismanoid 0:68e64068330f 43
whismanoid 0:68e64068330f 44 // Device Name = MAX11410
whismanoid 0:68e64068330f 45 // Device Description = 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC
whismanoid 0:68e64068330f 46 // Device DeviceBriefDescription = 24-bit 1.9ksps Delta-Sigma ADC
whismanoid 0:68e64068330f 47 // Device Manufacturer = Maxim Integrated
whismanoid 0:68e64068330f 48 // Device PartNumber = MAX11410ATI+
whismanoid 0:68e64068330f 49 // Device RegValue_Width = DataWidth16bit_HL
whismanoid 0:68e64068330f 50 //
whismanoid 0:68e64068330f 51 // ADC MaxOutputDataRate = 1.9ksps
whismanoid 0:68e64068330f 52 // ADC NumChannels = 10
whismanoid 0:68e64068330f 53 // ADC ResolutionBits = 24
whismanoid 0:68e64068330f 54 //
whismanoid 0:68e64068330f 55 // SPI CS = ActiveLow
whismanoid 0:68e64068330f 56 // SPI FrameStart = CS
whismanoid 0:68e64068330f 57 // SPI CPOL = 0
whismanoid 0:68e64068330f 58 // SPI CPHA = 0
whismanoid 0:68e64068330f 59 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid 0:68e64068330f 60 // SPI SCLK Idle Low
whismanoid 0:68e64068330f 61 // SPI SCLKMaxMHz = 8
whismanoid 0:68e64068330f 62 // SPI SCLKMinMHz = 0
whismanoid 0:68e64068330f 63 //
whismanoid 0:68e64068330f 64
whismanoid 0:68e64068330f 65 // CODE GENERATOR: class constructor definition
whismanoid 0:68e64068330f 66 MAX11410::MAX11410(SPI &spi, DigitalOut &cs_pin, // SPI interface
whismanoid 0:68e64068330f 67 // CODE GENERATOR: class constructor definition gpio InputPin pins
whismanoid 0:68e64068330f 68 // CODE GENERATOR: class constructor definition gpio OutputPin pins
whismanoid 0:68e64068330f 69 // CODE GENERATOR: class constructor definition ic_variant
whismanoid 0:68e64068330f 70 MAX11410_ic_t ic_variant)
whismanoid 0:68e64068330f 71 // CODE GENERATOR: class constructor initializer list
whismanoid 0:68e64068330f 72 : m_spi(spi), m_cs_pin(cs_pin), // SPI interface
whismanoid 0:68e64068330f 73 // CODE GENERATOR: class constructor initializer list gpio InputPin pins
whismanoid 0:68e64068330f 74 // CODE GENERATOR: class constructor initializer list gpio OutputPin pins
whismanoid 0:68e64068330f 75 // CODE GENERATOR: class constructor initializer list ic_variant
whismanoid 0:68e64068330f 76 m_ic_variant(ic_variant)
whismanoid 0:68e64068330f 77 {
whismanoid 0:68e64068330f 78 // CODE GENERATOR: class constructor definition SPI interface initialization
whismanoid 0:68e64068330f 79 //
whismanoid 0:68e64068330f 80 // SPI CS = ActiveLow
whismanoid 0:68e64068330f 81 // SPI FrameStart = CS
whismanoid 0:68e64068330f 82 m_SPI_cs_state = 1;
whismanoid 13:df96a784cda6 83 if (m_cs_pin.is_connected()) { // avoid mbed runtime error if pin is NC not connected
whismanoid 13:df96a784cda6 84 m_cs_pin = m_SPI_cs_state;
whismanoid 13:df96a784cda6 85 }
whismanoid 0:68e64068330f 86
whismanoid 0:68e64068330f 87 // SPI CPOL = 0
whismanoid 0:68e64068330f 88 // SPI CPHA = 0
whismanoid 0:68e64068330f 89 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid 0:68e64068330f 90 // SPI SCLK Idle Low
whismanoid 0:68e64068330f 91 m_SPI_dataMode = 0; //SPI_MODE0; // CPOL=0,CPHA=0: Rising Edge stable; SCLK idle Low
whismanoid 0:68e64068330f 92 m_spi.format(8,m_SPI_dataMode); // int bits_must_be_8, int mode=0_3 CPOL=0,CPHA=0
whismanoid 0:68e64068330f 93
whismanoid 0:68e64068330f 94 // SPI SCLKMaxMHz = 8
whismanoid 0:68e64068330f 95 // SPI SCLKMinMHz = 0
whismanoid 0:68e64068330f 96 //#define SPI_SCLK_Hz 48000000 // 48MHz
whismanoid 0:68e64068330f 97 //#define SPI_SCLK_Hz 24000000 // 24MHz
whismanoid 0:68e64068330f 98 //#define SPI_SCLK_Hz 12000000 // 12MHz
whismanoid 0:68e64068330f 99 //#define SPI_SCLK_Hz 6000000 // 6MHz
whismanoid 0:68e64068330f 100 //#define SPI_SCLK_Hz 4000000 // 4MHz
whismanoid 0:68e64068330f 101 //#define SPI_SCLK_Hz 2000000 // 2MHz
whismanoid 0:68e64068330f 102 //#define SPI_SCLK_Hz 1000000 // 1MHz
whismanoid 0:68e64068330f 103 m_SPI_SCLK_Hz = 8000000; // 8MHz; MAX11410 limit is 8MHz
whismanoid 0:68e64068330f 104 m_spi.frequency(m_SPI_SCLK_Hz);
whismanoid 0:68e64068330f 105
whismanoid 0:68e64068330f 106 }
whismanoid 0:68e64068330f 107
whismanoid 0:68e64068330f 108 // CODE GENERATOR: class destructor definition
whismanoid 0:68e64068330f 109 MAX11410::~MAX11410()
whismanoid 0:68e64068330f 110 {
whismanoid 0:68e64068330f 111 // do nothing
whismanoid 0:68e64068330f 112 }
whismanoid 0:68e64068330f 113
whismanoid 0:68e64068330f 114 // CODE GENERATOR: spi_frequency setter definition
whismanoid 0:68e64068330f 115 /// set SPI SCLK frequency
whismanoid 0:68e64068330f 116 void MAX11410::spi_frequency(int spi_sclk_Hz)
whismanoid 0:68e64068330f 117 {
whismanoid 0:68e64068330f 118 m_SPI_SCLK_Hz = spi_sclk_Hz;
whismanoid 0:68e64068330f 119 m_spi.frequency(m_SPI_SCLK_Hz);
whismanoid 0:68e64068330f 120 }
whismanoid 0:68e64068330f 121
whismanoid 0:68e64068330f 122 // CODE GENERATOR: omit global g_MAX11410_device
whismanoid 0:68e64068330f 123 // CODE GENERATOR: extern function declarations
whismanoid 0:68e64068330f 124 // CODE GENERATOR: extern function requirement MAX11410::SPIoutputCS
whismanoid 0:68e64068330f 125 // Assert SPI Chip Select
whismanoid 0:68e64068330f 126 // SPI chip-select for MAX11410
whismanoid 0:68e64068330f 127 //
whismanoid 12:daecd93dd33a 128 inline void MAX11410::SPIoutputCS(int isLogicHigh)
whismanoid 0:68e64068330f 129 {
whismanoid 0:68e64068330f 130 // CODE GENERATOR: extern function definition for function SPIoutputCS
whismanoid 0:68e64068330f 131 // CODE GENERATOR: extern function definition for standard SPI interface function SPIoutputCS(int isLogicHigh)
whismanoid 0:68e64068330f 132 m_SPI_cs_state = isLogicHigh;
whismanoid 13:df96a784cda6 133 if (m_cs_pin.is_connected()) { // avoid mbed runtime error if pin is NC not connected
whismanoid 13:df96a784cda6 134 m_cs_pin = m_SPI_cs_state;
whismanoid 13:df96a784cda6 135 }
whismanoid 0:68e64068330f 136 }
whismanoid 0:68e64068330f 137
whismanoid 0:68e64068330f 138 // CODE GENERATOR: extern function requirement MAX11410::SPIwrite16bits
whismanoid 0:68e64068330f 139 // SPI write 16 bits
whismanoid 0:68e64068330f 140 // SPI interface to MAX11410 shift 16 bits mosiData into MAX11410 DIN
whismanoid 0:68e64068330f 141 //
whismanoid 0:68e64068330f 142 void MAX11410::SPIwrite16bits(int16_t mosiData16)
whismanoid 0:68e64068330f 143 {
whismanoid 0:68e64068330f 144 // CODE GENERATOR: extern function definition for function SPIwrite16bits
whismanoid 0:68e64068330f 145 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIwrite16bits(int16_t mosiData16)
whismanoid 0:68e64068330f 146 size_t byteCount = 2;
whismanoid 0:68e64068330f 147 static char mosiData[2];
whismanoid 0:68e64068330f 148 static char misoData[2];
whismanoid 0:68e64068330f 149 mosiData[0] = (char)((mosiData16 >> 8) & 0xFF); // MSByte
whismanoid 0:68e64068330f 150 mosiData[1] = (char)((mosiData16 >> 0) & 0xFF); // LSByte
whismanoid 0:68e64068330f 151 //
whismanoid 0:68e64068330f 152 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 0:68e64068330f 153 //~ noInterrupts();
whismanoid 0:68e64068330f 154 //
whismanoid 0:68e64068330f 155 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 0:68e64068330f 156 //
whismanoid 0:68e64068330f 157 unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount);
whismanoid 0:68e64068330f 158 //~ m_spi.transfer(mosiData8_FF0000);
whismanoid 0:68e64068330f 159 //~ m_spi.transfer(mosiData16_00FF00);
whismanoid 0:68e64068330f 160 //~ m_spi.transfer(mosiData16_0000FF);
whismanoid 0:68e64068330f 161 //
whismanoid 0:68e64068330f 162 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 0:68e64068330f 163 //
whismanoid 0:68e64068330f 164 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 0:68e64068330f 165 //~ interrupts();
whismanoid 0:68e64068330f 166 // Optional Diagnostic function to print SPI transactions
whismanoid 0:68e64068330f 167 if (onSPIprint)
whismanoid 0:68e64068330f 168 {
whismanoid 0:68e64068330f 169 onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData);
whismanoid 0:68e64068330f 170 }
whismanoid 0:68e64068330f 171 //
whismanoid 0:68e64068330f 172 // VERIFY: SPIwrite24bits print diagnostic information
whismanoid 0:68e64068330f 173 //cmdLine.serial().printf(" MOSI->"));
whismanoid 0:68e64068330f 174 //cmdLine.serial().printf(" 0x"));
whismanoid 0:68e64068330f 175 //Serial.print( (mosiData8_FF0000 & 0xFF), HEX);
whismanoid 0:68e64068330f 176 //cmdLine.serial().printf(" 0x"));
whismanoid 0:68e64068330f 177 //Serial.print( (mosiData16_00FF00 & 0xFF), HEX);
whismanoid 0:68e64068330f 178 //cmdLine.serial().printf(" 0x"));
whismanoid 0:68e64068330f 179 //Serial.print( (mosiData16_0000FF & 0xFF), HEX);
whismanoid 0:68e64068330f 180 // hex dump mosiData[0..byteCount-1]
whismanoid 0:68e64068330f 181 #if 0 // HAS_MICROUSBSERIAL
whismanoid 0:68e64068330f 182 cmdLine_microUSBserial.serial().printf("\r\nSPI");
whismanoid 0:68e64068330f 183 if (byteCount > 7) {
whismanoid 0:68e64068330f 184 cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 0:68e64068330f 185 }
whismanoid 0:68e64068330f 186 cmdLine_microUSBserial.serial().printf(" MOSI->");
whismanoid 0:68e64068330f 187 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 0:68e64068330f 188 {
whismanoid 0:68e64068330f 189 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 0:68e64068330f 190 }
whismanoid 0:68e64068330f 191 // hex dump misoData[0..byteCount-1]
whismanoid 0:68e64068330f 192 cmdLine_microUSBserial.serial().printf(" MISO<-");
whismanoid 0:68e64068330f 193 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 0:68e64068330f 194 {
whismanoid 0:68e64068330f 195 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 0:68e64068330f 196 }
whismanoid 0:68e64068330f 197 cmdLine_microUSBserial.serial().printf(" ");
whismanoid 0:68e64068330f 198 #endif
whismanoid 0:68e64068330f 199 #if 0 // HAS_DAPLINK_SERIAL
whismanoid 0:68e64068330f 200 cmdLine_DAPLINKserial.serial().printf("\r\nSPI");
whismanoid 0:68e64068330f 201 if (byteCount > 7) {
whismanoid 0:68e64068330f 202 cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 0:68e64068330f 203 }
whismanoid 0:68e64068330f 204 cmdLine_DAPLINKserial.serial().printf(" MOSI->");
whismanoid 0:68e64068330f 205 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 0:68e64068330f 206 {
whismanoid 0:68e64068330f 207 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 0:68e64068330f 208 }
whismanoid 0:68e64068330f 209 // hex dump misoData[0..byteCount-1]
whismanoid 0:68e64068330f 210 cmdLine_DAPLINKserial.serial().printf(" MISO<-");
whismanoid 0:68e64068330f 211 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 0:68e64068330f 212 {
whismanoid 0:68e64068330f 213 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 0:68e64068330f 214 }
whismanoid 0:68e64068330f 215 cmdLine_DAPLINKserial.serial().printf(" ");
whismanoid 0:68e64068330f 216 #endif
whismanoid 0:68e64068330f 217 // VERIFY: DIAGNOSTIC: print MAX5715 device register write
whismanoid 0:68e64068330f 218 // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF);
whismanoid 0:68e64068330f 219 // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF);
whismanoid 0:68e64068330f 220 //
whismanoid 0:68e64068330f 221 // int misoData16 = (misoData16_FF00 << 8) | misoData16_00FF;
whismanoid 0:68e64068330f 222 // return misoData16;
whismanoid 0:68e64068330f 223 }
whismanoid 0:68e64068330f 224
whismanoid 0:68e64068330f 225 // CODE GENERATOR: extern function requirement MAX11410::SPIreadWrite16bits
whismanoid 0:68e64068330f 226 // SPI read and write 16 bits
whismanoid 0:68e64068330f 227 // SPI interface to MAX11410 shift 16 bits mosiData16 into MAX11410 DIN
whismanoid 0:68e64068330f 228 // while simultaneously capturing 16 bits miso data from MAX11410 DOUT
whismanoid 0:68e64068330f 229 //
whismanoid 0:68e64068330f 230 int16_t MAX11410::SPIreadWrite16bits(int16_t mosiData16)
whismanoid 0:68e64068330f 231 {
whismanoid 0:68e64068330f 232 // CODE GENERATOR: extern function definition for function SPIreadWrite16bits
whismanoid 0:68e64068330f 233 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIreadWrite16bits(int16_t mosiData16)
whismanoid 0:68e64068330f 234 size_t byteCount = 2;
whismanoid 0:68e64068330f 235 static char mosiData[2];
whismanoid 0:68e64068330f 236 static char misoData[2];
whismanoid 0:68e64068330f 237 mosiData[0] = (char)((mosiData16 >> 8) & 0xFF); // MSByte
whismanoid 0:68e64068330f 238 mosiData[1] = (char)((mosiData16 >> 0) & 0xFF); // LSByte
whismanoid 0:68e64068330f 239 //
whismanoid 0:68e64068330f 240 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 0:68e64068330f 241 //~ noInterrupts();
whismanoid 0:68e64068330f 242 //
whismanoid 0:68e64068330f 243 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 0:68e64068330f 244 //
whismanoid 0:68e64068330f 245 unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount);
whismanoid 0:68e64068330f 246 //~ m_spi.transfer(mosiData8_FF0000);
whismanoid 0:68e64068330f 247 //~ m_spi.transfer(mosiData16_00FF00);
whismanoid 0:68e64068330f 248 //~ m_spi.transfer(mosiData16_0000FF);
whismanoid 0:68e64068330f 249 //
whismanoid 0:68e64068330f 250 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 0:68e64068330f 251 //
whismanoid 0:68e64068330f 252 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 0:68e64068330f 253 //~ interrupts();
whismanoid 0:68e64068330f 254 // Optional Diagnostic function to print SPI transactions
whismanoid 0:68e64068330f 255 if (onSPIprint)
whismanoid 0:68e64068330f 256 {
whismanoid 0:68e64068330f 257 onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData);
whismanoid 0:68e64068330f 258 }
whismanoid 0:68e64068330f 259 //
whismanoid 0:68e64068330f 260 // VERIFY: SPIwrite24bits print diagnostic information
whismanoid 0:68e64068330f 261 //cmdLine.serial().printf(" MOSI->"));
whismanoid 0:68e64068330f 262 //cmdLine.serial().printf(" 0x"));
whismanoid 0:68e64068330f 263 //Serial.print( (mosiData8_FF0000 & 0xFF), HEX);
whismanoid 0:68e64068330f 264 //cmdLine.serial().printf(" 0x"));
whismanoid 0:68e64068330f 265 //Serial.print( (mosiData16_00FF00 & 0xFF), HEX);
whismanoid 0:68e64068330f 266 //cmdLine.serial().printf(" 0x"));
whismanoid 0:68e64068330f 267 //Serial.print( (mosiData16_0000FF & 0xFF), HEX);
whismanoid 0:68e64068330f 268 // hex dump mosiData[0..byteCount-1]
whismanoid 0:68e64068330f 269 #if 0 // HAS_MICROUSBSERIAL
whismanoid 0:68e64068330f 270 cmdLine_microUSBserial.serial().printf("\r\nSPI");
whismanoid 0:68e64068330f 271 if (byteCount > 7) {
whismanoid 0:68e64068330f 272 cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 0:68e64068330f 273 }
whismanoid 0:68e64068330f 274 cmdLine_microUSBserial.serial().printf(" MOSI->");
whismanoid 0:68e64068330f 275 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 0:68e64068330f 276 {
whismanoid 0:68e64068330f 277 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 0:68e64068330f 278 }
whismanoid 0:68e64068330f 279 // hex dump misoData[0..byteCount-1]
whismanoid 0:68e64068330f 280 cmdLine_microUSBserial.serial().printf(" MISO<-");
whismanoid 0:68e64068330f 281 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 0:68e64068330f 282 {
whismanoid 0:68e64068330f 283 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 0:68e64068330f 284 }
whismanoid 0:68e64068330f 285 cmdLine_microUSBserial.serial().printf(" ");
whismanoid 0:68e64068330f 286 #endif
whismanoid 0:68e64068330f 287 #if 0 // HAS_DAPLINK_SERIAL
whismanoid 0:68e64068330f 288 cmdLine_DAPLINKserial.serial().printf("\r\nSPI");
whismanoid 0:68e64068330f 289 if (byteCount > 7) {
whismanoid 0:68e64068330f 290 cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 0:68e64068330f 291 }
whismanoid 0:68e64068330f 292 cmdLine_DAPLINKserial.serial().printf(" MOSI->");
whismanoid 0:68e64068330f 293 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 0:68e64068330f 294 {
whismanoid 0:68e64068330f 295 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 0:68e64068330f 296 }
whismanoid 0:68e64068330f 297 // hex dump misoData[0..byteCount-1]
whismanoid 0:68e64068330f 298 cmdLine_DAPLINKserial.serial().printf(" MISO<-");
whismanoid 0:68e64068330f 299 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 0:68e64068330f 300 {
whismanoid 0:68e64068330f 301 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 0:68e64068330f 302 }
whismanoid 0:68e64068330f 303 cmdLine_DAPLINKserial.serial().printf(" ");
whismanoid 0:68e64068330f 304 #endif
whismanoid 0:68e64068330f 305 // VERIFY: DIAGNOSTIC: print MAX5715 device register write
whismanoid 0:68e64068330f 306 // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF);
whismanoid 0:68e64068330f 307 // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF);
whismanoid 0:68e64068330f 308 //
whismanoid 0:68e64068330f 309 //int misoData16 = (misoData16_FF00 << 8) | misoData16_00FF;
whismanoid 0:68e64068330f 310 int misoData16 = (misoData[0] << 8) | misoData[1];
whismanoid 0:68e64068330f 311 return misoData16;
whismanoid 0:68e64068330f 312 }
whismanoid 0:68e64068330f 313
whismanoid 0:68e64068330f 314 // CODE GENERATOR: extern function requirement MAX11410::SPIreadWrite32bits
whismanoid 0:68e64068330f 315 // SPI read and write 32 bits
whismanoid 0:68e64068330f 316 // SPI interface to MAX11410 shift 32 bits mosiData into MAX11410 DIN
whismanoid 0:68e64068330f 317 // while simultaneously capturing 32 bits miso data from MAX11410 DOUT
whismanoid 0:68e64068330f 318 //
whismanoid 0:68e64068330f 319 int32_t MAX11410::SPIreadWrite32bits(int32_t mosiData32)
whismanoid 0:68e64068330f 320 {
whismanoid 0:68e64068330f 321 // CODE GENERATOR: extern function definition for function SPIreadWrite32bits
whismanoid 0:68e64068330f 322 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIreadWrite32bits(int32_t mosiData32)
whismanoid 0:68e64068330f 323 size_t byteCount = 4;
whismanoid 0:68e64068330f 324 static char mosiData[4];
whismanoid 0:68e64068330f 325 static char misoData[4];
whismanoid 0:68e64068330f 326 mosiData[0] = (char)((mosiData32 >> 24) & 0xFF); // MSByte
whismanoid 0:68e64068330f 327 mosiData[1] = (char)((mosiData32 >> 16) & 0xFF);
whismanoid 0:68e64068330f 328 mosiData[2] = (char)((mosiData32 >> 8) & 0xFF);
whismanoid 0:68e64068330f 329 mosiData[3] = (char)((mosiData32 >> 0) & 0xFF); // LSByte
whismanoid 0:68e64068330f 330 //
whismanoid 0:68e64068330f 331 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 0:68e64068330f 332 //~ noInterrupts();
whismanoid 0:68e64068330f 333 //
whismanoid 0:68e64068330f 334 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 0:68e64068330f 335 //
whismanoid 0:68e64068330f 336 unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount);
whismanoid 0:68e64068330f 337 //~ m_spi.transfer(mosiData8_FF0000);
whismanoid 0:68e64068330f 338 //~ m_spi.transfer(mosiData16_00FF00);
whismanoid 0:68e64068330f 339 //~ m_spi.transfer(mosiData16_0000FF);
whismanoid 0:68e64068330f 340 //
whismanoid 0:68e64068330f 341 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 0:68e64068330f 342 //
whismanoid 0:68e64068330f 343 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 0:68e64068330f 344 //~ interrupts();
whismanoid 0:68e64068330f 345 // Optional Diagnostic function to print SPI transactions
whismanoid 0:68e64068330f 346 if (onSPIprint)
whismanoid 0:68e64068330f 347 {
whismanoid 0:68e64068330f 348 onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData);
whismanoid 0:68e64068330f 349 }
whismanoid 0:68e64068330f 350 //
whismanoid 0:68e64068330f 351 // VERIFY: SPIwrite24bits print diagnostic information
whismanoid 0:68e64068330f 352 //cmdLine.serial().printf(" MOSI->"));
whismanoid 0:68e64068330f 353 //cmdLine.serial().printf(" 0x"));
whismanoid 0:68e64068330f 354 //Serial.print( (mosiData8_FF0000 & 0xFF), HEX);
whismanoid 0:68e64068330f 355 //cmdLine.serial().printf(" 0x"));
whismanoid 0:68e64068330f 356 //Serial.print( (mosiData16_00FF00 & 0xFF), HEX);
whismanoid 0:68e64068330f 357 //cmdLine.serial().printf(" 0x"));
whismanoid 0:68e64068330f 358 //Serial.print( (mosiData16_0000FF & 0xFF), HEX);
whismanoid 0:68e64068330f 359 // hex dump mosiData[0..byteCount-1]
whismanoid 0:68e64068330f 360 #if 0 // HAS_MICROUSBSERIAL
whismanoid 0:68e64068330f 361 cmdLine_microUSBserial.serial().printf("\r\nSPI");
whismanoid 0:68e64068330f 362 if (byteCount > 7) {
whismanoid 0:68e64068330f 363 cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 0:68e64068330f 364 }
whismanoid 0:68e64068330f 365 cmdLine_microUSBserial.serial().printf(" MOSI->");
whismanoid 0:68e64068330f 366 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 0:68e64068330f 367 {
whismanoid 0:68e64068330f 368 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 0:68e64068330f 369 }
whismanoid 0:68e64068330f 370 // hex dump misoData[0..byteCount-1]
whismanoid 0:68e64068330f 371 cmdLine_microUSBserial.serial().printf(" MISO<-");
whismanoid 0:68e64068330f 372 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 0:68e64068330f 373 {
whismanoid 0:68e64068330f 374 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 0:68e64068330f 375 }
whismanoid 0:68e64068330f 376 cmdLine_microUSBserial.serial().printf(" ");
whismanoid 0:68e64068330f 377 #endif
whismanoid 0:68e64068330f 378 #if 0 // HAS_DAPLINK_SERIAL
whismanoid 0:68e64068330f 379 cmdLine_DAPLINKserial.serial().printf("\r\nSPI");
whismanoid 0:68e64068330f 380 if (byteCount > 7) {
whismanoid 0:68e64068330f 381 cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 0:68e64068330f 382 }
whismanoid 0:68e64068330f 383 cmdLine_DAPLINKserial.serial().printf(" MOSI->");
whismanoid 0:68e64068330f 384 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 0:68e64068330f 385 {
whismanoid 0:68e64068330f 386 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 0:68e64068330f 387 }
whismanoid 0:68e64068330f 388 // hex dump misoData[0..byteCount-1]
whismanoid 0:68e64068330f 389 cmdLine_DAPLINKserial.serial().printf(" MISO<-");
whismanoid 0:68e64068330f 390 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 0:68e64068330f 391 {
whismanoid 0:68e64068330f 392 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 0:68e64068330f 393 }
whismanoid 0:68e64068330f 394 cmdLine_DAPLINKserial.serial().printf(" ");
whismanoid 0:68e64068330f 395 #endif
whismanoid 0:68e64068330f 396 // VERIFY: DIAGNOSTIC: print MAX5715 device register write
whismanoid 0:68e64068330f 397 // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF);
whismanoid 0:68e64068330f 398 // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF);
whismanoid 0:68e64068330f 399 //
whismanoid 0:68e64068330f 400 //int misoData32 = (misoData32_FF000000 << 24) | (misoData32_FF0000 << 16) | (misoData32_0000FF00 << 8) | misoData32_000000FF;
whismanoid 0:68e64068330f 401 int misoData32 = (misoData[0] << 24) | (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 0:68e64068330f 402 return misoData32;
whismanoid 0:68e64068330f 403 }
whismanoid 0:68e64068330f 404
whismanoid 0:68e64068330f 405 // CODE GENERATOR: class member function definitions
whismanoid 0:68e64068330f 406 //----------------------------------------
whismanoid 0:68e64068330f 407 // Menu item '!'
whismanoid 0:68e64068330f 408 // Initialize device
whismanoid 19:50cf5da53d36 409 //
whismanoid 19:50cf5da53d36 410 // TODO1: #169 MAX11410 Self Test for Test Fixture Firmware
whismanoid 19:50cf5da53d36 411 // @test Init() expect 1
whismanoid 19:50cf5da53d36 412 //
whismanoid 19:50cf5da53d36 413 // @future test xxxxxx // comment
whismanoid 19:50cf5da53d36 414 //
whismanoid 19:50cf5da53d36 415 // TODO1: #169 SelfTest support @test tinyTester.print("message")
whismanoid 19:50cf5da53d36 416 // @test tinyTester.print("message print to console")
whismanoid 19:50cf5da53d36 417 //
whismanoid 19:50cf5da53d36 418 // TODO1: #169 SelfTest support RegRead
whismanoid 19:50cf5da53d36 419 // @test tinyTester.print("check part ID register")
whismanoid 19:50cf5da53d36 420 // @future test RegRead(MAX11410::CMD_enum_t::CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID, &buffer) expect 1 expect-buffer 0x000F02
whismanoid 19:50cf5da53d36 421 // @future test *CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID? expect 0x000F02
whismanoid 19:50cf5da53d36 422 //
whismanoid 19:50cf5da53d36 423 // TODO1: #169 SelfTest support RegWrite and custom enum types
whismanoid 19:50cf5da53d36 424 // @test tinyTester.print("check filter register POR value")
whismanoid 19:50cf5da53d36 425 // @future test RegRead(MAX11410::CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, &buffer) expect 1 expect-buffer 0x00
whismanoid 19:50cf5da53d36 426 // @test tinyTester.print("check filter register is writeable")
whismanoid 19:50cf5da53d36 427 // @future test tinyTester.print("this is a real mess dealing with the custom types")
whismanoid 19:50cf5da53d36 428 // @test RegWrite(0x08, 0x34) expect 1
whismanoid 19:50cf5da53d36 429 // @future test tinyTester.print("error: no matching function for call to 'MaximTinyTester::FunctionCall_Expect(const char [18], uint8_t (&)(MAX11410::CMD_enum_t, uint32_t), MAX11410::CMD_enum_t, uint32_t, int)'")
whismanoid 19:50cf5da53d36 430 // @future test RegWrite(CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1
whismanoid 19:50cf5da53d36 431 // @future test RegWrite(CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1
whismanoid 19:50cf5da53d36 432 // @future test RegWrite(MAX11410::CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, 0x34) expect 1
whismanoid 19:50cf5da53d36 433 //
whismanoid 19:50cf5da53d36 434 // TODO1: #169 SelfTest support RegRead
whismanoid 19:50cf5da53d36 435 // @test tinyTester.print("check filter register is readable")
whismanoid 19:50cf5da53d36 436 // @test RegRead(0x08, buffer) expect 1 expect-buffer 0x34
whismanoid 19:50cf5da53d36 437 // @future test RegRead(MAX11410::CMD_enum_t::CMD_r000_1000_x0dd_dddd_FILTER, &buffer) expect 1 expect-buffer 0x34
whismanoid 19:50cf5da53d36 438 //
whismanoid 19:50cf5da53d36 439 // TODO1: #169 SelfTest support @test tinyTester.settle_time_msec = 250
whismanoid 19:50cf5da53d36 440 // @test tinyTester.settle_time_msec = 250 // default 250
whismanoid 19:50cf5da53d36 441 // @test tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid 19:50cf5da53d36 442 // @test tinyTester.input_timeout_time_msec = 250 // default 250
whismanoid 19:50cf5da53d36 443 // @test tinyTester.settle_time_msec = 20 // default 250
whismanoid 19:50cf5da53d36 444 // @test tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid 19:50cf5da53d36 445 // @test tinyTester.input_timeout_time_msec = 100 // default 250
whismanoid 19:50cf5da53d36 446 //
whismanoid 19:50cf5da53d36 447 // TODO1: #169 SelfTest support @test tinyTester.Wait_Output_Settling()
whismanoid 19:50cf5da53d36 448 // @test tinyTester.Wait_Output_Settling()
whismanoid 19:50cf5da53d36 449 //
whismanoid 19:50cf5da53d36 450 // TODO1: #169 SelfTest support tinyTester.AnalogIn0_Read_Expect_voltageV(2.048)
whismanoid 19:50cf5da53d36 451 // @future test tinyTester.err_threshold = 0.030 // 30mV
whismanoid 19:50cf5da53d36 452 // @future test tinyTester.AnalogIn0_Read_Expect_voltageV(2.048)
whismanoid 19:50cf5da53d36 453 //
whismanoid 19:50cf5da53d36 454 // TODO1: #169 SelfTest support tinyTester.DigitalIn_Read_Expect_WarnOnly
whismanoid 19:50cf5da53d36 455 // @future test tinyTester.DigitalIn_Read_Expect_WarnOnly(DigitalIn& digitalInPin, const char* pinName, int expect_result, const char *expect_description)
whismanoid 19:50cf5da53d36 456 //
whismanoid 19:50cf5da53d36 457 // TODO1: #169 SelfTest support tinyTester.max541.Set_Code
whismanoid 19:50cf5da53d36 458 // @future test tinyTester.max541.Set_Code(0x8000)
whismanoid 19:50cf5da53d36 459 //
whismanoid 0:68e64068330f 460 // @return 1 on success; 0 on failure
whismanoid 0:68e64068330f 461 uint8_t MAX11410::Init(void)
whismanoid 0:68e64068330f 462 {
whismanoid 0:68e64068330f 463
whismanoid 0:68e64068330f 464 //----------------------------------------
whismanoid 1:d57c1a2cb83c 465 // AIN0-AIN1 reference voltage, in Volts
whismanoid 1:d57c1a2cb83c 466 VRef_REF0 = 2.500;
whismanoid 1:d57c1a2cb83c 467
whismanoid 1:d57c1a2cb83c 468 //----------------------------------------
whismanoid 1:d57c1a2cb83c 469 // REF1P-REF1N reference resistance, in Ohms
whismanoid 1:d57c1a2cb83c 470 VRef_REF1 = 4999;
whismanoid 1:d57c1a2cb83c 471
whismanoid 1:d57c1a2cb83c 472 //----------------------------------------
whismanoid 1:d57c1a2cb83c 473 // REF2P-REF2N reference voltage, in Volts
whismanoid 1:d57c1a2cb83c 474 VRef_REF2 = 2.500;
whismanoid 1:d57c1a2cb83c 475
whismanoid 1:d57c1a2cb83c 476 //----------------------------------------
whismanoid 1:d57c1a2cb83c 477 // AVDD-AGND supply voltage, in Volts
whismanoid 1:d57c1a2cb83c 478 VRef_AVDD = 3.300;
whismanoid 1:d57c1a2cb83c 479
whismanoid 1:d57c1a2cb83c 480 //----------------------------------------
whismanoid 5:a2e74357cfc0 481 // RTD Resistance measurement; Thermocouple Cold Junction, in Ohms
whismanoid 5:a2e74357cfc0 482 rtd_resistance = 1000.0;
whismanoid 5:a2e74357cfc0 483
whismanoid 5:a2e74357cfc0 484 //----------------------------------------
whismanoid 3:658a93dfb2d8 485 // Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
whismanoid 3:658a93dfb2d8 486 RTD_Temperature = 25.0;
whismanoid 3:658a93dfb2d8 487
whismanoid 3:658a93dfb2d8 488 //----------------------------------------
whismanoid 1:d57c1a2cb83c 489 // shadow of register ctrl CMD_r000_1001_dddd_dddd_CTRL
whismanoid 1:d57c1a2cb83c 490 ctrl = 0x01;
whismanoid 1:d57c1a2cb83c 491
whismanoid 1:d57c1a2cb83c 492 //----------------------------------------
whismanoid 9:06ca88952f1c 493 // set by Configure_PGA gain index register pga CMD_r000_1110_xxdd_xddd_PGA
whismanoid 9:06ca88952f1c 494 pgaGain = 1;
whismanoid 9:06ca88952f1c 495
whismanoid 9:06ca88952f1c 496 //----------------------------------------
whismanoid 9:06ca88952f1c 497 // Device ID Validation
whismanoid 9:06ca88952f1c 498 #warning "Not Implemented Yet: MAX11410::Init Device ID Validation..."
whismanoid 9:06ca88952f1c 499 const uint32_t part_id_expect = 0x000F02;
whismanoid 9:06ca88952f1c 500 uint32_t part_id_readback;
whismanoid 9:06ca88952f1c 501 RegRead(CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID, &part_id_readback);
whismanoid 9:06ca88952f1c 502 if (part_id_readback != part_id_expect) return 0;
whismanoid 9:06ca88952f1c 503
whismanoid 9:06ca88952f1c 504 //----------------------------------------
whismanoid 1:d57c1a2cb83c 505 // write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode)
whismanoid 1:d57c1a2cb83c 506 RegWrite(CMD_r000_0000_xxxx_xxdd_PD, PD_11_Reset);
whismanoid 1:d57c1a2cb83c 507
whismanoid 1:d57c1a2cb83c 508 //----------------------------------------
whismanoid 1:d57c1a2cb83c 509 // write8 0x00 PD = 0x00 (NOP)
whismanoid 1:d57c1a2cb83c 510 RegWrite(CMD_r000_0000_xxxx_xxdd_PD, PD_00_Normal);
whismanoid 0:68e64068330f 511
whismanoid 0:68e64068330f 512 //----------------------------------------
whismanoid 0:68e64068330f 513 // success
whismanoid 0:68e64068330f 514 return 1;
whismanoid 0:68e64068330f 515 }
whismanoid 0:68e64068330f 516
whismanoid 0:68e64068330f 517 //----------------------------------------
whismanoid 1:d57c1a2cb83c 518 // Return the physical voltage corresponding to conversion result,
whismanoid 1:d57c1a2cb83c 519 // for unipolar mode.
whismanoid 0:68e64068330f 520 // Does not perform any offset or gain correction.
whismanoid 0:68e64068330f 521 //
whismanoid 1:d57c1a2cb83c 522 // @pre CTRL::U_BN = 1 -- Unipolar mode
whismanoid 1:d57c1a2cb83c 523 // @pre CTRL::FORMAT = x
whismanoid 0:68e64068330f 524 // @pre VRef = Voltage of REF input, in Volts
whismanoid 0:68e64068330f 525 // @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid 0:68e64068330f 526 // @return physical voltage corresponding to MAX11410 code.
whismanoid 14:b49eecf7e4d8 527 //
whismanoid 19:50cf5da53d36 528 // @test tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid 19:50cf5da53d36 529 // @test Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V
whismanoid 19:50cf5da53d36 530 // @test Configure_PGA(0,0) expect 1 // These tests require PGA gain=1
whismanoid 19:50cf5da53d36 531 // @test group UNIPOLAR VoltageOfCode_Unipolar(0xFFFFFF) expect 2.500 within 0.030 // Full Scale
whismanoid 19:50cf5da53d36 532 // @test group UNIPOLAR VoltageOfCode_Unipolar(0xFFFFFE) expect 2.500 // Full Scale
whismanoid 19:50cf5da53d36 533 // @test group UNIPOLAR VoltageOfCode_Unipolar(0xCCCCCC) expect 2.000 // Two Volts
whismanoid 19:50cf5da53d36 534 // @test group UNIPOLAR VoltageOfCode_Unipolar(0xC00000) expect 1.875 // 75% Scale
whismanoid 19:50cf5da53d36 535 // @test group UNIPOLAR VoltageOfCode_Unipolar(0x800000) expect 1.250 // Mid Scale
whismanoid 19:50cf5da53d36 536 // @test group UNIPOLAR VoltageOfCode_Unipolar(0x666666) expect 1.000 // One Volt
whismanoid 19:50cf5da53d36 537 // @test group UNIPOLAR VoltageOfCode_Unipolar(0x400000) expect 0.625 // 25% Scale
whismanoid 19:50cf5da53d36 538 // @test group UNIPOLAR VoltageOfCode_Unipolar(0x0A3D70) expect 0.100 // 100mV
whismanoid 19:50cf5da53d36 539 // @test group UNIPOLAR VoltageOfCode_Unipolar(0x000064) expect 0.000014901162 // 100 LSB
whismanoid 19:50cf5da53d36 540 // @test group UNIPOLAR VoltageOfCode_Unipolar(0x00000A) expect 0.0000014901162 // Ten LSB
whismanoid 19:50cf5da53d36 541 // @test group UNIPOLAR VoltageOfCode_Unipolar(0x000003) expect 0.00000044703483 // Three LSB
whismanoid 19:50cf5da53d36 542 // @test group UNIPOLAR VoltageOfCode_Unipolar(0x000002) expect 0.00000029802326 // Two LSB
whismanoid 19:50cf5da53d36 543 // @test group UNIPOLAR VoltageOfCode_Unipolar(0x000001) expect 0.00000014901162 // One LSB
whismanoid 19:50cf5da53d36 544 // @test group UNIPOLAR VoltageOfCode_Unipolar(0x000000) expect 0.0 // Zero Scale
whismanoid 19:50cf5da53d36 545 // @test tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid 1:d57c1a2cb83c 546 //
whismanoid 1:d57c1a2cb83c 547 double MAX11410::VoltageOfCode_Unipolar(uint32_t value_u24)
whismanoid 0:68e64068330f 548 {
whismanoid 0:68e64068330f 549
whismanoid 0:68e64068330f 550 //----------------------------------------
whismanoid 0:68e64068330f 551 // Linear map min and max endpoints
whismanoid 1:d57c1a2cb83c 552 double VRef = VRef_REF2;
whismanoid 1:d57c1a2cb83c 553 uint8_t ref_sel = (ctrl & 0x03); // MAX11410_REF_SEL_enum_t
whismanoid 1:d57c1a2cb83c 554 switch(ref_sel)
whismanoid 1:d57c1a2cb83c 555 {
whismanoid 1:d57c1a2cb83c 556 case REF_SEL_000_AIN0_AIN1: VRef = VRef_REF0; break;
whismanoid 1:d57c1a2cb83c 557 case REF_SEL_001_REF1P_REF1N: VRef = VRef_REF1; break;
whismanoid 1:d57c1a2cb83c 558 case REF_SEL_010_REF2P_REF2N: VRef = VRef_REF2; break;
whismanoid 1:d57c1a2cb83c 559 case REF_SEL_011_AVDD_AGND: VRef = VRef_AVDD; break;
whismanoid 1:d57c1a2cb83c 560 case REF_SEL_100_AIN0_AGND: VRef = VRef_REF0; break;
whismanoid 1:d57c1a2cb83c 561 case REF_SEL_101_REF1P_AGND: VRef = VRef_REF1; break;
whismanoid 1:d57c1a2cb83c 562 case REF_SEL_110_REF2P_AGND: VRef = VRef_REF2; break;
whismanoid 1:d57c1a2cb83c 563 case REF_SEL_111_AVDD_AGND: VRef = VRef_AVDD; break;
whismanoid 1:d57c1a2cb83c 564 }
whismanoid 0:68e64068330f 565 double MaxScaleVoltage = VRef; // voltage of maximum code 0xffffff
whismanoid 0:68e64068330f 566 double MinScaleVoltage = 0.0; // voltage of minimum code 0x000
whismanoid 0:68e64068330f 567 const uint32_t FULL_SCALE_CODE_24BIT = 0xffffff;
whismanoid 0:68e64068330f 568 const uint32_t MaxCode = FULL_SCALE_CODE_24BIT;
whismanoid 0:68e64068330f 569 const uint32_t MinCode = 0x000;
whismanoid 0:68e64068330f 570 double codeFraction = ((double)value_u24 - MinCode) / (MaxCode - MinCode + 1);
whismanoid 1:d57c1a2cb83c 571 return (MinScaleVoltage + ((MaxScaleVoltage - MinScaleVoltage) * codeFraction)) / pgaGain;
whismanoid 1:d57c1a2cb83c 572 }
whismanoid 1:d57c1a2cb83c 573
whismanoid 1:d57c1a2cb83c 574 //----------------------------------------
whismanoid 1:d57c1a2cb83c 575 // Return the physical voltage corresponding to conversion result,
whismanoid 1:d57c1a2cb83c 576 // when conversion format is Bipolar mode, offset binary.
whismanoid 1:d57c1a2cb83c 577 // Does not perform any offset or gain correction.
whismanoid 1:d57c1a2cb83c 578 //
whismanoid 1:d57c1a2cb83c 579 // @pre CTRL::U_BN = 0 -- Bipolar mode
whismanoid 1:d57c1a2cb83c 580 // @pre CTRL::FORMAT = 1 -- offset binary
whismanoid 1:d57c1a2cb83c 581 // @pre VRef = Voltage of REF input, in Volts
whismanoid 1:d57c1a2cb83c 582 // @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid 1:d57c1a2cb83c 583 // @return physical voltage corresponding to MAX11410 code.
whismanoid 14:b49eecf7e4d8 584 //
whismanoid 19:50cf5da53d36 585 // @test tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid 19:50cf5da53d36 586 // @test Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V
whismanoid 19:50cf5da53d36 587 // @test Configure_PGA(0,0) expect 1 // These tests require PGA gain=1
whismanoid 19:50cf5da53d36 588 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xFFFFFF) expect 2.5 within 0.030 // Full Scale
whismanoid 19:50cf5da53d36 589 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xFFFFFE) expect 2.5 // Full Scale
whismanoid 19:50cf5da53d36 590 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0xC00000) expect 1.25 // Mid Scale
whismanoid 19:50cf5da53d36 591 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800003) expect 0.00000894069671 // Three LSB
whismanoid 19:50cf5da53d36 592 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800002) expect 0.00000596046447 // Two LSB
whismanoid 19:50cf5da53d36 593 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800001) expect 0.0000029802326 // One LSB
whismanoid 19:50cf5da53d36 594 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x800000) expect 0.0 // Zero Scale
whismanoid 19:50cf5da53d36 595 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFF) expect -0.0000029802326 // Negative One LSB
whismanoid 19:50cf5da53d36 596 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFE) expect -0.0000059604644 // Negative Two LSB
whismanoid 19:50cf5da53d36 597 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x7FFFFD) expect -0.0000089406967 // Negative Three LSB
whismanoid 19:50cf5da53d36 598 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x400000) expect -1.25 // Negative Mid Scale
whismanoid 19:50cf5da53d36 599 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x000001) expect -2.5 // Negative Full Scale
whismanoid 19:50cf5da53d36 600 // @test group BIPOB VoltageOfCode_Bipolar_OffsetBinary(0x000000) expect -2.5 // Negative Full Scale
whismanoid 19:50cf5da53d36 601 // @test tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid 1:d57c1a2cb83c 602 //
whismanoid 1:d57c1a2cb83c 603 double MAX11410::VoltageOfCode_Bipolar_OffsetBinary(uint32_t value_u24)
whismanoid 1:d57c1a2cb83c 604 {
whismanoid 1:d57c1a2cb83c 605
whismanoid 1:d57c1a2cb83c 606 //----------------------------------------
whismanoid 1:d57c1a2cb83c 607 // Linear map min and max endpoints
whismanoid 1:d57c1a2cb83c 608 double VRef = VRef_REF2;
whismanoid 1:d57c1a2cb83c 609 uint8_t ref_sel = (ctrl & 0x03); // MAX11410_REF_SEL_enum_t
whismanoid 1:d57c1a2cb83c 610 switch(ref_sel)
whismanoid 1:d57c1a2cb83c 611 {
whismanoid 1:d57c1a2cb83c 612 case REF_SEL_000_AIN0_AIN1: VRef = VRef_REF0; break;
whismanoid 1:d57c1a2cb83c 613 case REF_SEL_001_REF1P_REF1N: VRef = VRef_REF1; break;
whismanoid 1:d57c1a2cb83c 614 case REF_SEL_010_REF2P_REF2N: VRef = VRef_REF2; break;
whismanoid 1:d57c1a2cb83c 615 case REF_SEL_011_AVDD_AGND: VRef = VRef_AVDD; break;
whismanoid 1:d57c1a2cb83c 616 case REF_SEL_100_AIN0_AGND: VRef = VRef_REF0; break;
whismanoid 1:d57c1a2cb83c 617 case REF_SEL_101_REF1P_AGND: VRef = VRef_REF1; break;
whismanoid 1:d57c1a2cb83c 618 case REF_SEL_110_REF2P_AGND: VRef = VRef_REF2; break;
whismanoid 1:d57c1a2cb83c 619 case REF_SEL_111_AVDD_AGND: VRef = VRef_AVDD; break;
whismanoid 1:d57c1a2cb83c 620 }
whismanoid 1:d57c1a2cb83c 621 double MaxScaleVoltage = 2*VRef; // voltage of maximum code 0x7fffff
whismanoid 1:d57c1a2cb83c 622 double MinScaleVoltage = 0; // voltage of minimum code 0x800000;
whismanoid 1:d57c1a2cb83c 623 const uint32_t FULL_SCALE_CODE_24BIT = 0x7fffff;
whismanoid 1:d57c1a2cb83c 624 const uint32_t MaxCode = FULL_SCALE_CODE_24BIT;
whismanoid 1:d57c1a2cb83c 625 const int32_t CodeSpan = 0x1000000;
whismanoid 1:d57c1a2cb83c 626 const uint32_t MinCode = 0x800000;
whismanoid 1:d57c1a2cb83c 627 double codeFraction = ((double)value_u24 - MinCode) / CodeSpan;
whismanoid 1:d57c1a2cb83c 628 return (MinScaleVoltage + ((MaxScaleVoltage - MinScaleVoltage) * codeFraction)) / pgaGain;
whismanoid 1:d57c1a2cb83c 629 }
whismanoid 1:d57c1a2cb83c 630
whismanoid 1:d57c1a2cb83c 631 //----------------------------------------
whismanoid 1:d57c1a2cb83c 632 // Return the physical voltage corresponding to conversion result,
whismanoid 1:d57c1a2cb83c 633 // when conversion format is Bipolar mode, 2's complement.
whismanoid 1:d57c1a2cb83c 634 // Does not perform any offset or gain correction.
whismanoid 1:d57c1a2cb83c 635 //
whismanoid 1:d57c1a2cb83c 636 // @pre CTRL::U_BN = 0 -- Bipolar mode
whismanoid 1:d57c1a2cb83c 637 // @pre CTRL::FORMAT = 0 -- 2's complement
whismanoid 1:d57c1a2cb83c 638 // @pre VRef = Voltage of REF input, in Volts
whismanoid 1:d57c1a2cb83c 639 // @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid 1:d57c1a2cb83c 640 // @return physical voltage corresponding to MAX11410 code.
whismanoid 14:b49eecf7e4d8 641 //
whismanoid 19:50cf5da53d36 642 // @test tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid 19:50cf5da53d36 643 // @test Configure_CTRL_REF(2) expect 1 // These tests require REF2 = 2.500V
whismanoid 19:50cf5da53d36 644 // @test Configure_PGA(0,0) expect 1 // These tests require PGA gain=1
whismanoid 19:50cf5da53d36 645 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x7FFFFF) expect 2.500 within 0.030 // Full Scale
whismanoid 19:50cf5da53d36 646 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x7FFFFE) expect 2.500 // Full Scale
whismanoid 19:50cf5da53d36 647 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x666666) expect 2.000 // Two Volts
whismanoid 19:50cf5da53d36 648 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x600000) expect 1.875 // 75% Scale
whismanoid 19:50cf5da53d36 649 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x400000) expect 1.250 // Mid Scale
whismanoid 19:50cf5da53d36 650 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x333333) expect 1.000 // One Volt
whismanoid 19:50cf5da53d36 651 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x200000) expect 0.625 // 25% Scale
whismanoid 19:50cf5da53d36 652 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x051eb8) expect 0.100 // 100mV
whismanoid 19:50cf5da53d36 653 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000003) expect 0.00000894069671 // Three LSB
whismanoid 19:50cf5da53d36 654 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000002) expect 0.00000596046447 // Two LSB
whismanoid 19:50cf5da53d36 655 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000001) expect 0.0000029802326 // One LSB
whismanoid 19:50cf5da53d36 656 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x000000) expect 0.0 // Zero Scale
whismanoid 19:50cf5da53d36 657 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFF) expect -0.0000029802326 // Negative One LSB
whismanoid 19:50cf5da53d36 658 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFE) expect -0.0000059604644 // Negative Two LSB
whismanoid 19:50cf5da53d36 659 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFFFFFD) expect -0.0000089406967 // Negative Three LSB
whismanoid 19:50cf5da53d36 660 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xFAE148) expect -0.100 // Negative 100mV
whismanoid 19:50cf5da53d36 661 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xE00000) expect -0.625 // Negative 25% Scale
whismanoid 19:50cf5da53d36 662 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xCCCCCD) expect -1.000 // Negative One Volt
whismanoid 19:50cf5da53d36 663 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xC00000) expect -1.250 // Negative Mid Scale
whismanoid 19:50cf5da53d36 664 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0xA00000) expect -1.875 // Negative 75% Scale
whismanoid 19:50cf5da53d36 665 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x99999A) expect -2.000 // Negative Two Volts
whismanoid 19:50cf5da53d36 666 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x800001) expect -2.500 // Negative Full Scale
whismanoid 19:50cf5da53d36 667 // @test group BIP2C VoltageOfCode_Bipolar_2sComplement(0x800000) expect -2.500 // Negative Full Scale
whismanoid 19:50cf5da53d36 668 // @test tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid 1:d57c1a2cb83c 669 //
whismanoid 1:d57c1a2cb83c 670 double MAX11410::VoltageOfCode_Bipolar_2sComplement(uint32_t value_u24)
whismanoid 1:d57c1a2cb83c 671 {
whismanoid 1:d57c1a2cb83c 672
whismanoid 1:d57c1a2cb83c 673 //----------------------------------------
whismanoid 1:d57c1a2cb83c 674 // Linear map min and max endpoints
whismanoid 1:d57c1a2cb83c 675 double VRef = VRef_REF2;
whismanoid 1:d57c1a2cb83c 676 uint8_t ref_sel = (ctrl & 0x03); // MAX11410_REF_SEL_enum_t
whismanoid 1:d57c1a2cb83c 677 switch(ref_sel)
whismanoid 1:d57c1a2cb83c 678 {
whismanoid 1:d57c1a2cb83c 679 case REF_SEL_000_AIN0_AIN1: VRef = VRef_REF0; break;
whismanoid 1:d57c1a2cb83c 680 case REF_SEL_001_REF1P_REF1N: VRef = VRef_REF1; break;
whismanoid 1:d57c1a2cb83c 681 case REF_SEL_010_REF2P_REF2N: VRef = VRef_REF2; break;
whismanoid 1:d57c1a2cb83c 682 case REF_SEL_011_AVDD_AGND: VRef = VRef_AVDD; break;
whismanoid 1:d57c1a2cb83c 683 case REF_SEL_100_AIN0_AGND: VRef = VRef_REF0; break;
whismanoid 1:d57c1a2cb83c 684 case REF_SEL_101_REF1P_AGND: VRef = VRef_REF1; break;
whismanoid 1:d57c1a2cb83c 685 case REF_SEL_110_REF2P_AGND: VRef = VRef_REF2; break;
whismanoid 1:d57c1a2cb83c 686 case REF_SEL_111_AVDD_AGND: VRef = VRef_AVDD; break;
whismanoid 1:d57c1a2cb83c 687 }
whismanoid 1:d57c1a2cb83c 688 double MaxScaleVoltage = 2 * VRef; // voltage of maximum code 0x7fffff
whismanoid 1:d57c1a2cb83c 689 double MinScaleVoltage = 0; // voltage of minimum code 0x800000
whismanoid 1:d57c1a2cb83c 690 const int32_t FULL_SCALE_CODE_24BIT_2S_COMPLEMENT = 0x7fffff;
whismanoid 1:d57c1a2cb83c 691 const int32_t SIGN_BIT_24BIT_2S_COMPLEMENT = 0x800000;
whismanoid 1:d57c1a2cb83c 692 if (value_u24 >= SIGN_BIT_24BIT_2S_COMPLEMENT) { value_u24 = value_u24 - (2 * SIGN_BIT_24BIT_2S_COMPLEMENT); }
whismanoid 1:d57c1a2cb83c 693 const int32_t MaxCode = FULL_SCALE_CODE_24BIT_2S_COMPLEMENT;
whismanoid 1:d57c1a2cb83c 694 const int32_t CodeSpan = 0x1000000;
whismanoid 1:d57c1a2cb83c 695 const int32_t MinCode = 0;
whismanoid 1:d57c1a2cb83c 696 double codeFraction = ((double)((int32_t)value_u24) - MinCode) / CodeSpan;
whismanoid 1:d57c1a2cb83c 697 return (MinScaleVoltage + ((MaxScaleVoltage - MinScaleVoltage) * codeFraction)) / pgaGain;
whismanoid 1:d57c1a2cb83c 698 }
whismanoid 1:d57c1a2cb83c 699
whismanoid 1:d57c1a2cb83c 700 //----------------------------------------
whismanoid 1:d57c1a2cb83c 701 // Return the physical voltage corresponding to conversion result,
whismanoid 1:d57c1a2cb83c 702 // when conversion format is determined by the CTRL register.
whismanoid 1:d57c1a2cb83c 703 // Does not perform any offset or gain correction.
whismanoid 1:d57c1a2cb83c 704 //
whismanoid 1:d57c1a2cb83c 705 // @pre CTRL::U_BN and CTRL::FORMAT = 0 select offset binary, 2's complement, or straight binary
whismanoid 1:d57c1a2cb83c 706 // @pre VRef = Voltage of REF input, in Volts
whismanoid 1:d57c1a2cb83c 707 // @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid 1:d57c1a2cb83c 708 // @return physical voltage corresponding to MAX11410 code.
whismanoid 1:d57c1a2cb83c 709 double MAX11410::VoltageOfCode(uint32_t value_u24)
whismanoid 1:d57c1a2cb83c 710 {
whismanoid 1:d57c1a2cb83c 711
whismanoid 1:d57c1a2cb83c 712 //----------------------------------------
whismanoid 1:d57c1a2cb83c 713 // warning -- WIP work in progress
whismanoid 1:d57c1a2cb83c 714 #warning "Not Tested Yet: MAX11410::VoltageOfCode..."
whismanoid 1:d57c1a2cb83c 715
whismanoid 1:d57c1a2cb83c 716 //----------------------------------------
whismanoid 1:d57c1a2cb83c 717 // Determine format from CTRL register U_BN and FORMAT
whismanoid 1:d57c1a2cb83c 718 uint8_t u_bn_bitmask = (1 << 6);
whismanoid 1:d57c1a2cb83c 719 uint8_t format_bitmask = (1 << 5);
whismanoid 1:d57c1a2cb83c 720 if ((ctrl & u_bn_bitmask) != 0)
whismanoid 1:d57c1a2cb83c 721 {
whismanoid 1:d57c1a2cb83c 722 return VoltageOfCode_Unipolar(value_u24);
whismanoid 1:d57c1a2cb83c 723 }
whismanoid 1:d57c1a2cb83c 724 if ((ctrl & format_bitmask) != 0)
whismanoid 1:d57c1a2cb83c 725 {
whismanoid 1:d57c1a2cb83c 726 return VoltageOfCode_Bipolar_OffsetBinary(value_u24);
whismanoid 1:d57c1a2cb83c 727 }
whismanoid 1:d57c1a2cb83c 728 return VoltageOfCode_Bipolar_2sComplement(value_u24);
whismanoid 0:68e64068330f 729 }
whismanoid 0:68e64068330f 730
whismanoid 0:68e64068330f 731 //----------------------------------------
whismanoid 0:68e64068330f 732 // Write a MAX11410 register.
whismanoid 0:68e64068330f 733 //
whismanoid 11:abde565b8497 734 // CMDOP_1aaa_aaaa_ReadRegister bit is cleared 0 indicating a write operation.
whismanoid 0:68e64068330f 735 //
whismanoid 0:68e64068330f 736 // MAX11410 register length can be determined by function RegSize.
whismanoid 0:68e64068330f 737 //
whismanoid 0:68e64068330f 738 // For 8-bit register size:
whismanoid 0:68e64068330f 739 //
whismanoid 0:68e64068330f 740 // SPI 16-bit transfer
whismanoid 0:68e64068330f 741 //
whismanoid 0:68e64068330f 742 // SPI MOSI = 0aaa_aaaa_dddd_dddd
whismanoid 0:68e64068330f 743 //
whismanoid 0:68e64068330f 744 // SPI MISO = xxxx_xxxx_xxxx_xxxx
whismanoid 0:68e64068330f 745 //
whismanoid 0:68e64068330f 746 // For 16-bit register size:
whismanoid 0:68e64068330f 747 //
whismanoid 0:68e64068330f 748 // SPI 24-bit or 32-bit transfer
whismanoid 0:68e64068330f 749 //
whismanoid 0:68e64068330f 750 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
whismanoid 0:68e64068330f 751 //
whismanoid 0:68e64068330f 752 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 0:68e64068330f 753 //
whismanoid 0:68e64068330f 754 // For 24-bit register size:
whismanoid 0:68e64068330f 755 //
whismanoid 0:68e64068330f 756 // SPI 32-bit transfer
whismanoid 0:68e64068330f 757 //
whismanoid 0:68e64068330f 758 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 0:68e64068330f 759 //
whismanoid 0:68e64068330f 760 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 0:68e64068330f 761 //
whismanoid 0:68e64068330f 762 // @return 1 on success; 0 on failure
whismanoid 10:7adee48a7f82 763 uint8_t MAX11410::RegWrite(MAX11410_CMD_enum_t commandByte, uint32_t regData)
whismanoid 0:68e64068330f 764 {
whismanoid 0:68e64068330f 765
whismanoid 0:68e64068330f 766 //----------------------------------------
whismanoid 10:7adee48a7f82 767 // switch based on register address szie RegSize(commandByte)
whismanoid 11:abde565b8497 768 commandByte = (MAX11410_CMD_enum_t)((commandByte &~ CMDOP_1aaa_aaaa_ReadRegister) & 0xFF);
whismanoid 10:7adee48a7f82 769 switch(RegSize(commandByte))
whismanoid 0:68e64068330f 770 {
whismanoid 0:68e64068330f 771 case 8: // 8-bit register size
whismanoid 0:68e64068330f 772 {
whismanoid 0:68e64068330f 773 // SPI 16-bit transfer
whismanoid 0:68e64068330f 774 // SPI MOSI = 0aaa_aaaa_dddd_dddd
whismanoid 0:68e64068330f 775 // SPI MISO = xxxx_xxxx_xxxx_xxxx
whismanoid 10:7adee48a7f82 776 int16_t mosiData16 = ((int16_t)commandByte << 8) | ((int16_t)regData & 0xFF);
whismanoid 0:68e64068330f 777 SPIoutputCS(0);
whismanoid 0:68e64068330f 778 SPIwrite16bits(mosiData16);
whismanoid 0:68e64068330f 779 SPIoutputCS(1);
whismanoid 0:68e64068330f 780 }
whismanoid 0:68e64068330f 781 break;
whismanoid 0:68e64068330f 782 case 16: // 16-bit register size
whismanoid 0:68e64068330f 783 #warning "Not Verified Yet: MAX11410::RegWrite 16-bit SPIreadWrite32bits"
whismanoid 0:68e64068330f 784 {
whismanoid 0:68e64068330f 785 // SPI 24-bit or 32-bit transfer
whismanoid 0:68e64068330f 786 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
whismanoid 0:68e64068330f 787 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 0:68e64068330f 788 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_0000_0000
whismanoid 0:68e64068330f 789 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 10:7adee48a7f82 790 int32_t mosiData32 = ((int32_t)commandByte << 24) | (((int32_t)regData & 0xFFFF) << 8);
whismanoid 0:68e64068330f 791 SPIoutputCS(0);
whismanoid 0:68e64068330f 792 SPIreadWrite32bits(mosiData32);
whismanoid 0:68e64068330f 793 SPIoutputCS(1);
whismanoid 0:68e64068330f 794 }
whismanoid 0:68e64068330f 795 break;
whismanoid 0:68e64068330f 796 case 24: // 24-bit register size
whismanoid 0:68e64068330f 797 {
whismanoid 0:68e64068330f 798 // SPI 32-bit transfer
whismanoid 0:68e64068330f 799 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 0:68e64068330f 800 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 10:7adee48a7f82 801 int32_t mosiData32 = ((int32_t)commandByte << 24) | ((int32_t)regData & 0x00FFFFFF);
whismanoid 0:68e64068330f 802 SPIoutputCS(0);
whismanoid 0:68e64068330f 803 SPIreadWrite32bits(mosiData32);
whismanoid 0:68e64068330f 804 SPIoutputCS(1);
whismanoid 0:68e64068330f 805 }
whismanoid 0:68e64068330f 806 break;
whismanoid 0:68e64068330f 807 }
whismanoid 0:68e64068330f 808
whismanoid 0:68e64068330f 809 //----------------------------------------
whismanoid 0:68e64068330f 810 // success
whismanoid 0:68e64068330f 811 return 1;
whismanoid 0:68e64068330f 812 }
whismanoid 0:68e64068330f 813
whismanoid 0:68e64068330f 814 //----------------------------------------
whismanoid 0:68e64068330f 815 // Read an 8-bit MAX11410 register
whismanoid 0:68e64068330f 816 //
whismanoid 11:abde565b8497 817 // CMDOP_1aaa_aaaa_ReadRegister bit is set 1 indicating a read operation.
whismanoid 0:68e64068330f 818 //
whismanoid 0:68e64068330f 819 // MAX11410 register length can be determined by function RegSize.
whismanoid 0:68e64068330f 820 //
whismanoid 0:68e64068330f 821 // For 8-bit register size:
whismanoid 0:68e64068330f 822 //
whismanoid 0:68e64068330f 823 // SPI 16-bit transfer
whismanoid 0:68e64068330f 824 //
whismanoid 0:68e64068330f 825 // SPI MOSI = 1aaa_aaaa_0000_0000
whismanoid 0:68e64068330f 826 //
whismanoid 0:68e64068330f 827 // SPI MISO = xxxx_xxxx_dddd_dddd
whismanoid 0:68e64068330f 828 //
whismanoid 0:68e64068330f 829 // For 16-bit register size:
whismanoid 0:68e64068330f 830 //
whismanoid 0:68e64068330f 831 // SPI 24-bit or 32-bit transfer
whismanoid 0:68e64068330f 832 //
whismanoid 0:68e64068330f 833 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000
whismanoid 0:68e64068330f 834 //
whismanoid 0:68e64068330f 835 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
whismanoid 0:68e64068330f 836 //
whismanoid 0:68e64068330f 837 // For 24-bit register size:
whismanoid 0:68e64068330f 838 //
whismanoid 0:68e64068330f 839 // SPI 32-bit transfer
whismanoid 0:68e64068330f 840 //
whismanoid 0:68e64068330f 841 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid 0:68e64068330f 842 //
whismanoid 0:68e64068330f 843 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 0:68e64068330f 844 //
whismanoid 0:68e64068330f 845 //
whismanoid 0:68e64068330f 846 // @return 1 on success; 0 on failure
whismanoid 10:7adee48a7f82 847 uint8_t MAX11410::RegRead(MAX11410_CMD_enum_t commandByte, uint32_t* ptrRegData)
whismanoid 0:68e64068330f 848 {
whismanoid 0:68e64068330f 849
whismanoid 0:68e64068330f 850 //----------------------------------------
whismanoid 0:68e64068330f 851 // switch based on register address szie RegSize(regAddress)
whismanoid 11:abde565b8497 852 commandByte = (MAX11410_CMD_enum_t)((commandByte &~ CMDOP_1aaa_aaaa_ReadRegister) & 0xFF);
whismanoid 10:7adee48a7f82 853 switch(RegSize(commandByte))
whismanoid 0:68e64068330f 854 {
whismanoid 0:68e64068330f 855 case 8: // 8-bit register size
whismanoid 0:68e64068330f 856 {
whismanoid 0:68e64068330f 857 // SPI 16-bit transfer
whismanoid 0:68e64068330f 858 // SPI MOSI = 1aaa_aaaa_0000_0000
whismanoid 0:68e64068330f 859 // SPI MISO = xxxx_xxxx_dddd_dddd
whismanoid 11:abde565b8497 860 int16_t mosiData16 = ((CMDOP_1aaa_aaaa_ReadRegister | (int16_t)commandByte) << 8) | ((int16_t)0);
whismanoid 0:68e64068330f 861 SPIoutputCS(0);
whismanoid 0:68e64068330f 862 int16_t misoData16 = SPIreadWrite16bits(mosiData16);
whismanoid 0:68e64068330f 863 SPIoutputCS(1);
whismanoid 0:68e64068330f 864 (*ptrRegData) = (misoData16 & 0x00FF);
whismanoid 0:68e64068330f 865 }
whismanoid 0:68e64068330f 866 break;
whismanoid 0:68e64068330f 867 case 16: // 16-bit register size
whismanoid 0:68e64068330f 868 #warning "Not Verified Yet: MAX11410::RegRead 16-bit SPIreadWrite32bits"
whismanoid 0:68e64068330f 869 {
whismanoid 0:68e64068330f 870 // SPI 24-bit or 32-bit transfer
whismanoid 0:68e64068330f 871 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000
whismanoid 0:68e64068330f 872 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
whismanoid 0:68e64068330f 873 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid 0:68e64068330f 874 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_xxxx_xxxx
whismanoid 11:abde565b8497 875 int32_t mosiData32 = ((CMDOP_1aaa_aaaa_ReadRegister | (int32_t)commandByte) << 24);
whismanoid 0:68e64068330f 876 SPIoutputCS(0);
whismanoid 0:68e64068330f 877 int32_t misoData32 = SPIreadWrite32bits(mosiData32);
whismanoid 0:68e64068330f 878 SPIoutputCS(1);
whismanoid 0:68e64068330f 879 (*ptrRegData) = ((misoData32 >> 8) & 0x00FFFF);
whismanoid 0:68e64068330f 880 }
whismanoid 0:68e64068330f 881 break;
whismanoid 0:68e64068330f 882 case 24: // 24-bit register size
whismanoid 0:68e64068330f 883 {
whismanoid 0:68e64068330f 884 // SPI 32-bit transfer
whismanoid 0:68e64068330f 885 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid 0:68e64068330f 886 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 11:abde565b8497 887 int32_t mosiData32 = ((CMDOP_1aaa_aaaa_ReadRegister | (int32_t)commandByte) << 24);
whismanoid 0:68e64068330f 888 SPIoutputCS(0);
whismanoid 0:68e64068330f 889 int32_t misoData32 = SPIreadWrite32bits(mosiData32);
whismanoid 0:68e64068330f 890 SPIoutputCS(1);
whismanoid 0:68e64068330f 891 (*ptrRegData) = (misoData32 & 0x00FFFFFF);
whismanoid 0:68e64068330f 892 }
whismanoid 0:68e64068330f 893 break;
whismanoid 0:68e64068330f 894 }
whismanoid 0:68e64068330f 895
whismanoid 0:68e64068330f 896 //----------------------------------------
whismanoid 0:68e64068330f 897 // success
whismanoid 0:68e64068330f 898 return 1;
whismanoid 0:68e64068330f 899 }
whismanoid 0:68e64068330f 900
whismanoid 0:68e64068330f 901 //----------------------------------------
whismanoid 0:68e64068330f 902 // Return the size of a MAX11410 register
whismanoid 0:68e64068330f 903 //
whismanoid 0:68e64068330f 904 // @return 8 for 8-bit, 16 for 16-bit, 24 for 24-bit, else 0 for undefined register size
whismanoid 10:7adee48a7f82 905 uint8_t MAX11410::RegSize(MAX11410_CMD_enum_t commandByte)
whismanoid 0:68e64068330f 906 {
whismanoid 0:68e64068330f 907
whismanoid 0:68e64068330f 908 //----------------------------------------
whismanoid 0:68e64068330f 909 // switch based on register address value regAddress
whismanoid 11:abde565b8497 910 commandByte = (MAX11410_CMD_enum_t)((commandByte &~ CMDOP_1aaa_aaaa_ReadRegister) & 0xFF);
whismanoid 10:7adee48a7f82 911 switch(commandByte)
whismanoid 0:68e64068330f 912 {
whismanoid 0:68e64068330f 913 default:
whismanoid 0:68e64068330f 914 return 0; // undefined register size
whismanoid 0:68e64068330f 915 case CMD_r000_0000_xxxx_xxdd_PD:
whismanoid 0:68e64068330f 916 case CMD_r000_0001_xddd_xxdd_CONV_START:
whismanoid 0:68e64068330f 917 case CMD_r000_0010_xddd_dddd_SEQ_START:
whismanoid 0:68e64068330f 918 case CMD_r000_0011_xxxx_xddd_CAL_START:
whismanoid 0:68e64068330f 919 case CMD_r000_0100_dddd_xddd_GP0_CTRL:
whismanoid 0:68e64068330f 920 case CMD_r000_0101_dddd_xddd_GP1_CTRL:
whismanoid 0:68e64068330f 921 case CMD_r000_0110_xddd_xxdd_GP_CONV:
whismanoid 0:68e64068330f 922 case CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR:
whismanoid 0:68e64068330f 923 case CMD_r000_1000_x0dd_dddd_FILTER:
whismanoid 0:68e64068330f 924 case CMD_r000_1001_dddd_dddd_CTRL:
whismanoid 0:68e64068330f 925 case CMD_r000_1010_dddd_dddd_SOURCE:
whismanoid 0:68e64068330f 926 case CMD_r000_1011_dddd_dddd_MUX_CTRL0:
whismanoid 0:68e64068330f 927 case CMD_r000_1100_dddd_dddd_MUX_CTRL1:
whismanoid 0:68e64068330f 928 case CMD_r000_1101_dddd_dddd_MUX_CTRL2:
whismanoid 0:68e64068330f 929 case CMD_r000_1110_xxdd_xddd_PGA:
whismanoid 0:68e64068330f 930 case CMD_r000_1111_dddd_dddd_WAIT_EXT:
whismanoid 0:68e64068330f 931 case CMD_r001_0000_xxxx_xxxx_WAIT_START:
whismanoid 0:68e64068330f 932 return 8; // 8-bit register size
whismanoid 0:68e64068330f 933 case CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID:
whismanoid 0:68e64068330f 934 case CMD_r001_0010_xxxx_xxxx_dddd_xxdd_dddd_dddd_SYSC_SEL:
whismanoid 0:68e64068330f 935 case CMD_r001_0011_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_A:
whismanoid 0:68e64068330f 936 case CMD_r001_0100_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_B:
whismanoid 0:68e64068330f 937 case CMD_r001_0101_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_A:
whismanoid 0:68e64068330f 938 case CMD_r001_0110_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_B:
whismanoid 0:68e64068330f 939 case CMD_r001_0111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_OFF:
whismanoid 0:68e64068330f 940 case CMD_r001_1000_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_1:
whismanoid 0:68e64068330f 941 case CMD_r001_1001_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_2:
whismanoid 0:68e64068330f 942 case CMD_r001_1010_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_4:
whismanoid 0:68e64068330f 943 case CMD_r001_1011_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_8:
whismanoid 0:68e64068330f 944 case CMD_r001_1100_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_16:
whismanoid 0:68e64068330f 945 case CMD_r001_1101_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_32:
whismanoid 0:68e64068330f 946 case CMD_r001_1110_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_64:
whismanoid 0:68e64068330f 947 case CMD_r001_1111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_128:
whismanoid 0:68e64068330f 948 case CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0:
whismanoid 0:68e64068330f 949 case CMD_r010_0001_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH1:
whismanoid 0:68e64068330f 950 case CMD_r010_0010_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH2:
whismanoid 0:68e64068330f 951 case CMD_r010_0011_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH3:
whismanoid 0:68e64068330f 952 case CMD_r010_0100_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH4:
whismanoid 0:68e64068330f 953 case CMD_r010_0101_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH5:
whismanoid 0:68e64068330f 954 case CMD_r010_0110_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH6:
whismanoid 0:68e64068330f 955 case CMD_r010_0111_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH7:
whismanoid 0:68e64068330f 956 case CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0:
whismanoid 0:68e64068330f 957 case CMD_r010_1001_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH1:
whismanoid 0:68e64068330f 958 case CMD_r010_1010_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH2:
whismanoid 0:68e64068330f 959 case CMD_r010_1011_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH3:
whismanoid 0:68e64068330f 960 case CMD_r010_1100_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH4:
whismanoid 0:68e64068330f 961 case CMD_r010_1101_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH5:
whismanoid 0:68e64068330f 962 case CMD_r010_1110_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH6:
whismanoid 0:68e64068330f 963 case CMD_r010_1111_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH7:
whismanoid 0:68e64068330f 964 case CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0:
whismanoid 0:68e64068330f 965 case CMD_r011_0001_dddd_dddd_dddd_dddd_dddd_dddd_DATA1:
whismanoid 0:68e64068330f 966 case CMD_r011_0010_dddd_dddd_dddd_dddd_dddd_dddd_DATA2:
whismanoid 0:68e64068330f 967 case CMD_r011_0011_dddd_dddd_dddd_dddd_dddd_dddd_DATA3:
whismanoid 0:68e64068330f 968 case CMD_r011_0100_dddd_dddd_dddd_dddd_dddd_dddd_DATA4:
whismanoid 0:68e64068330f 969 case CMD_r011_0101_dddd_dddd_dddd_dddd_dddd_dddd_DATA5:
whismanoid 0:68e64068330f 970 case CMD_r011_0110_dddd_dddd_dddd_dddd_dddd_dddd_DATA6:
whismanoid 0:68e64068330f 971 case CMD_r011_0111_dddd_dddd_dddd_dddd_dddd_dddd_DATA7:
whismanoid 0:68e64068330f 972 case CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS:
whismanoid 0:68e64068330f 973 case CMD_r011_1001_dddd_dddd_dddd_dddd_dxxd_dddd_STATUS_IE:
whismanoid 0:68e64068330f 974 return 24; // 24-bit register size
whismanoid 0:68e64068330f 975 case CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0:
whismanoid 0:68e64068330f 976 case CMD_r011_1011_xaaa_aaaa_dddd_dddd_UC_1:
whismanoid 0:68e64068330f 977 case CMD_r011_1100_xaaa_aaaa_dddd_dddd_UC_2:
whismanoid 0:68e64068330f 978 case CMD_r011_1101_xaaa_aaaa_dddd_dddd_UC_3:
whismanoid 0:68e64068330f 979 case CMD_r011_1110_xaaa_aaaa_dddd_dddd_UC_4:
whismanoid 0:68e64068330f 980 case CMD_r011_1111_xaaa_aaaa_dddd_dddd_UC_5:
whismanoid 0:68e64068330f 981 case CMD_r100_0000_xaaa_aaaa_dddd_dddd_UC_6:
whismanoid 0:68e64068330f 982 case CMD_r100_0001_xaaa_aaaa_dddd_dddd_UC_7:
whismanoid 0:68e64068330f 983 case CMD_r100_0010_xaaa_aaaa_dddd_dddd_UC_8:
whismanoid 0:68e64068330f 984 case CMD_r100_0011_xaaa_aaaa_dddd_dddd_UC_9:
whismanoid 0:68e64068330f 985 case CMD_r100_0100_xaaa_aaaa_dddd_dddd_UC_10:
whismanoid 0:68e64068330f 986 case CMD_r100_0101_xaaa_aaaa_dddd_dddd_UC_11:
whismanoid 0:68e64068330f 987 case CMD_r100_0110_xaaa_aaaa_dddd_dddd_UC_12:
whismanoid 0:68e64068330f 988 case CMD_r100_0111_xaaa_aaaa_dddd_dddd_UC_13:
whismanoid 0:68e64068330f 989 case CMD_r100_1000_xaaa_aaaa_dddd_dddd_UC_14:
whismanoid 0:68e64068330f 990 case CMD_r100_1001_xaaa_aaaa_dddd_dddd_UC_15:
whismanoid 0:68e64068330f 991 case CMD_r100_1010_xaaa_aaaa_dddd_dddd_UC_16:
whismanoid 0:68e64068330f 992 case CMD_r100_1011_xaaa_aaaa_dddd_dddd_UC_17:
whismanoid 0:68e64068330f 993 case CMD_r100_1100_xaaa_aaaa_dddd_dddd_UC_18:
whismanoid 0:68e64068330f 994 case CMD_r100_1101_xaaa_aaaa_dddd_dddd_UC_19:
whismanoid 0:68e64068330f 995 case CMD_r100_1110_xaaa_aaaa_dddd_dddd_UC_20:
whismanoid 0:68e64068330f 996 case CMD_r100_1111_xaaa_aaaa_dddd_dddd_UC_21:
whismanoid 0:68e64068330f 997 case CMD_r101_0000_xaaa_aaaa_dddd_dddd_UC_22:
whismanoid 0:68e64068330f 998 case CMD_r101_0001_xaaa_aaaa_dddd_dddd_UC_23:
whismanoid 0:68e64068330f 999 case CMD_r101_0010_xaaa_aaaa_dddd_dddd_UC_24:
whismanoid 0:68e64068330f 1000 case CMD_r101_0011_xaaa_aaaa_dddd_dddd_UC_25:
whismanoid 0:68e64068330f 1001 case CMD_r101_0100_xaaa_aaaa_dddd_dddd_UC_26:
whismanoid 0:68e64068330f 1002 case CMD_r101_0101_xaaa_aaaa_dddd_dddd_UC_27:
whismanoid 0:68e64068330f 1003 case CMD_r101_0110_xaaa_aaaa_dddd_dddd_UC_28:
whismanoid 0:68e64068330f 1004 case CMD_r101_0111_xaaa_aaaa_dddd_dddd_UC_29:
whismanoid 0:68e64068330f 1005 case CMD_r101_1000_xaaa_aaaa_dddd_dddd_UC_30:
whismanoid 0:68e64068330f 1006 case CMD_r101_1001_xaaa_aaaa_dddd_dddd_UC_31:
whismanoid 0:68e64068330f 1007 case CMD_r101_1010_xaaa_aaaa_dddd_dddd_UC_32:
whismanoid 0:68e64068330f 1008 case CMD_r101_1011_xaaa_aaaa_dddd_dddd_UC_33:
whismanoid 0:68e64068330f 1009 case CMD_r101_1100_xaaa_aaaa_dddd_dddd_UC_34:
whismanoid 0:68e64068330f 1010 case CMD_r101_1101_xaaa_aaaa_dddd_dddd_UC_35:
whismanoid 0:68e64068330f 1011 case CMD_r101_1110_xaaa_aaaa_dddd_dddd_UC_36:
whismanoid 0:68e64068330f 1012 case CMD_r101_1111_xaaa_aaaa_dddd_dddd_UC_37:
whismanoid 0:68e64068330f 1013 case CMD_r110_0000_xaaa_aaaa_dddd_dddd_UC_38:
whismanoid 0:68e64068330f 1014 case CMD_r110_0001_xaaa_aaaa_dddd_dddd_UC_39:
whismanoid 0:68e64068330f 1015 case CMD_r110_0010_xaaa_aaaa_dddd_dddd_UC_40:
whismanoid 0:68e64068330f 1016 case CMD_r110_0011_xaaa_aaaa_dddd_dddd_UC_41:
whismanoid 0:68e64068330f 1017 case CMD_r110_0100_xaaa_aaaa_dddd_dddd_UC_42:
whismanoid 0:68e64068330f 1018 case CMD_r110_0101_xaaa_aaaa_dddd_dddd_UC_43:
whismanoid 0:68e64068330f 1019 case CMD_r110_0110_xaaa_aaaa_dddd_dddd_UC_44:
whismanoid 0:68e64068330f 1020 case CMD_r110_0111_xaaa_aaaa_dddd_dddd_UC_45:
whismanoid 0:68e64068330f 1021 case CMD_r110_1000_xaaa_aaaa_dddd_dddd_UC_46:
whismanoid 0:68e64068330f 1022 case CMD_r110_1001_xaaa_aaaa_dddd_dddd_UC_47:
whismanoid 0:68e64068330f 1023 case CMD_r110_1010_xaaa_aaaa_dddd_dddd_UC_48:
whismanoid 0:68e64068330f 1024 case CMD_r110_1011_xaaa_aaaa_dddd_dddd_UC_49:
whismanoid 0:68e64068330f 1025 case CMD_r110_1100_xaaa_aaaa_dddd_dddd_UC_50:
whismanoid 0:68e64068330f 1026 case CMD_r110_1101_xaaa_aaaa_dddd_dddd_UC_51:
whismanoid 0:68e64068330f 1027 case CMD_r110_1110_xaaa_aaaa_dddd_dddd_UC_52:
whismanoid 0:68e64068330f 1028 case CMD_r110_1111_xxxx_xxxx_xaaa_aaaa_UCADDR:
whismanoid 0:68e64068330f 1029 return 16; // 16-bit register size
whismanoid 0:68e64068330f 1030 }
whismanoid 0:68e64068330f 1031 }
whismanoid 0:68e64068330f 1032
whismanoid 0:68e64068330f 1033 //----------------------------------------
whismanoid 11:abde565b8497 1034 // Decode operation from commandByte
whismanoid 11:abde565b8497 1035 //
whismanoid 11:abde565b8497 1036 // @return operation such as idle, read register, write register, etc.
whismanoid 11:abde565b8497 1037 MAX11410::MAX11410_CMDOP_enum_t MAX11410::DecodeCommand(MAX11410_CMD_enum_t commandByte)
whismanoid 11:abde565b8497 1038 {
whismanoid 11:abde565b8497 1039
whismanoid 11:abde565b8497 1040 //----------------------------------------
whismanoid 11:abde565b8497 1041 // decode operation from command byte
whismanoid 11:abde565b8497 1042 switch (commandByte & 0x80)
whismanoid 11:abde565b8497 1043 {
whismanoid 11:abde565b8497 1044 default:
whismanoid 11:abde565b8497 1045 case CMDOP_0aaa_aaaa_WriteRegister:
whismanoid 11:abde565b8497 1046 return CMDOP_0aaa_aaaa_WriteRegister;
whismanoid 11:abde565b8497 1047 case CMDOP_1aaa_aaaa_ReadRegister:
whismanoid 11:abde565b8497 1048 return CMDOP_1aaa_aaaa_ReadRegister;
whismanoid 11:abde565b8497 1049 }
whismanoid 11:abde565b8497 1050 }
whismanoid 11:abde565b8497 1051
whismanoid 11:abde565b8497 1052 //----------------------------------------
whismanoid 10:7adee48a7f82 1053 // Return the address field of a MAX11410 register
whismanoid 10:7adee48a7f82 1054 //
whismanoid 10:7adee48a7f82 1055 // @return register address field as given in datasheet
whismanoid 10:7adee48a7f82 1056 uint8_t MAX11410::RegAddrOfCommand(MAX11410_CMD_enum_t commandByte)
whismanoid 10:7adee48a7f82 1057 {
whismanoid 10:7adee48a7f82 1058
whismanoid 10:7adee48a7f82 1059 //----------------------------------------
whismanoid 10:7adee48a7f82 1060 // extract register address value from command byte
whismanoid 11:abde565b8497 1061 return (uint8_t)((commandByte &~ CMDOP_1aaa_aaaa_ReadRegister) & 0xFF);
whismanoid 10:7adee48a7f82 1062 }
whismanoid 10:7adee48a7f82 1063
whismanoid 10:7adee48a7f82 1064 //----------------------------------------
whismanoid 10:7adee48a7f82 1065 // Test whether a command byte is a register read command
whismanoid 10:7adee48a7f82 1066 //
whismanoid 10:7adee48a7f82 1067 // @return true if command byte is a register read command
whismanoid 10:7adee48a7f82 1068 uint8_t MAX11410::IsRegReadCommand(MAX11410_CMD_enum_t commandByte)
whismanoid 10:7adee48a7f82 1069 {
whismanoid 10:7adee48a7f82 1070
whismanoid 10:7adee48a7f82 1071 //----------------------------------------
whismanoid 10:7adee48a7f82 1072 // Test whether a command byte is a register read command
whismanoid 11:abde565b8497 1073 return (commandByte & CMDOP_1aaa_aaaa_ReadRegister) ? 1 : 0;
whismanoid 10:7adee48a7f82 1074 }
whismanoid 10:7adee48a7f82 1075
whismanoid 10:7adee48a7f82 1076 //----------------------------------------
whismanoid 0:68e64068330f 1077 // Return the name of a MAX11410 register
whismanoid 0:68e64068330f 1078 //
whismanoid 0:68e64068330f 1079 // @return null-terminated constant C string containing register name or empty string
whismanoid 10:7adee48a7f82 1080 const char* MAX11410::RegName(MAX11410_CMD_enum_t commandByte)
whismanoid 0:68e64068330f 1081 {
whismanoid 0:68e64068330f 1082
whismanoid 0:68e64068330f 1083 //----------------------------------------
whismanoid 0:68e64068330f 1084 // switch based on register address value regAddress
whismanoid 11:abde565b8497 1085 commandByte = (MAX11410_CMD_enum_t)((commandByte &~ CMDOP_1aaa_aaaa_ReadRegister) & 0xFF);
whismanoid 10:7adee48a7f82 1086 switch(commandByte)
whismanoid 0:68e64068330f 1087 {
whismanoid 0:68e64068330f 1088 default:
whismanoid 0:68e64068330f 1089 return ""; // undefined register
whismanoid 0:68e64068330f 1090 case CMD_r000_0000_xxxx_xxdd_PD: return "PD";
whismanoid 0:68e64068330f 1091 case CMD_r000_0001_xddd_xxdd_CONV_START: return "CONV_START";
whismanoid 0:68e64068330f 1092 case CMD_r000_0010_xddd_dddd_SEQ_START: return "SEQ_START";
whismanoid 0:68e64068330f 1093 case CMD_r000_0011_xxxx_xddd_CAL_START: return "CAL_START";
whismanoid 0:68e64068330f 1094 case CMD_r000_0100_dddd_xddd_GP0_CTRL: return "GP0_CTRL";
whismanoid 0:68e64068330f 1095 case CMD_r000_0101_dddd_xddd_GP1_CTRL: return "GP1_CTRL";
whismanoid 0:68e64068330f 1096 case CMD_r000_0110_xddd_xxdd_GP_CONV: return "GP_CONV";
whismanoid 0:68e64068330f 1097 case CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR: return "GP_SEQ_ADDR";
whismanoid 0:68e64068330f 1098 case CMD_r000_1000_x0dd_dddd_FILTER: return "FILTER";
whismanoid 0:68e64068330f 1099 case CMD_r000_1001_dddd_dddd_CTRL: return "CTRL";
whismanoid 0:68e64068330f 1100 case CMD_r000_1010_dddd_dddd_SOURCE: return "SOURCE";
whismanoid 0:68e64068330f 1101 case CMD_r000_1011_dddd_dddd_MUX_CTRL0: return "MUX_CTRL0";
whismanoid 0:68e64068330f 1102 case CMD_r000_1100_dddd_dddd_MUX_CTRL1: return "MUX_CTRL1";
whismanoid 0:68e64068330f 1103 case CMD_r000_1101_dddd_dddd_MUX_CTRL2: return "MUX_CTRL2";
whismanoid 0:68e64068330f 1104 case CMD_r000_1110_xxdd_xddd_PGA: return "PGA";
whismanoid 0:68e64068330f 1105 case CMD_r000_1111_dddd_dddd_WAIT_EXT: return "WAIT_EXT";
whismanoid 0:68e64068330f 1106 case CMD_r001_0000_xxxx_xxxx_WAIT_START: return "WAIT_START";
whismanoid 0:68e64068330f 1107 case CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID: return "PART_ID";
whismanoid 0:68e64068330f 1108 case CMD_r001_0010_xxxx_xxxx_dddd_xxdd_dddd_dddd_SYSC_SEL: return "SYSC_SEL";
whismanoid 0:68e64068330f 1109 case CMD_r001_0011_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_A: return "SYS_OFF_A";
whismanoid 0:68e64068330f 1110 case CMD_r001_0100_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_B: return "SYS_OFF_B";
whismanoid 0:68e64068330f 1111 case CMD_r001_0101_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_A: return "SYS_GAIN_A";
whismanoid 0:68e64068330f 1112 case CMD_r001_0110_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_B: return "SYS_GAIN_B";
whismanoid 0:68e64068330f 1113 case CMD_r001_0111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_OFF: return "SELF_OFF";
whismanoid 0:68e64068330f 1114 case CMD_r001_1000_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_1: return "SELF_GAIN_1";
whismanoid 0:68e64068330f 1115 case CMD_r001_1001_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_2: return "SELF_GAIN_2";
whismanoid 0:68e64068330f 1116 case CMD_r001_1010_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_4: return "SELF_GAIN_4";
whismanoid 0:68e64068330f 1117 case CMD_r001_1011_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_8: return "SELF_GAIN_8";
whismanoid 0:68e64068330f 1118 case CMD_r001_1100_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_16: return "SELF_GAIN_16";
whismanoid 0:68e64068330f 1119 case CMD_r001_1101_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_32: return "SELF_GAIN_32";
whismanoid 0:68e64068330f 1120 case CMD_r001_1110_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_64: return "SELF_GAIN_64";
whismanoid 0:68e64068330f 1121 case CMD_r001_1111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_128: return "SELF_GAIN_128";
whismanoid 0:68e64068330f 1122 case CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0: return "LTHRESH0";
whismanoid 0:68e64068330f 1123 case CMD_r010_0001_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH1: return "LTHRESH1";
whismanoid 0:68e64068330f 1124 case CMD_r010_0010_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH2: return "LTHRESH2";
whismanoid 0:68e64068330f 1125 case CMD_r010_0011_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH3: return "LTHRESH3";
whismanoid 0:68e64068330f 1126 case CMD_r010_0100_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH4: return "LTHRESH4";
whismanoid 0:68e64068330f 1127 case CMD_r010_0101_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH5: return "LTHRESH5";
whismanoid 0:68e64068330f 1128 case CMD_r010_0110_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH6: return "LTHRESH6";
whismanoid 0:68e64068330f 1129 case CMD_r010_0111_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH7: return "LTHRESH7";
whismanoid 0:68e64068330f 1130 case CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0: return "UTHRESH0";
whismanoid 0:68e64068330f 1131 case CMD_r010_1001_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH1: return "UTHRESH1";
whismanoid 0:68e64068330f 1132 case CMD_r010_1010_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH2: return "UTHRESH2";
whismanoid 0:68e64068330f 1133 case CMD_r010_1011_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH3: return "UTHRESH3";
whismanoid 0:68e64068330f 1134 case CMD_r010_1100_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH4: return "UTHRESH4";
whismanoid 0:68e64068330f 1135 case CMD_r010_1101_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH5: return "UTHRESH5";
whismanoid 0:68e64068330f 1136 case CMD_r010_1110_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH6: return "UTHRESH6";
whismanoid 0:68e64068330f 1137 case CMD_r010_1111_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH7: return "UTHRESH7";
whismanoid 0:68e64068330f 1138 case CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0: return "DATA0";
whismanoid 0:68e64068330f 1139 case CMD_r011_0001_dddd_dddd_dddd_dddd_dddd_dddd_DATA1: return "DATA1";
whismanoid 0:68e64068330f 1140 case CMD_r011_0010_dddd_dddd_dddd_dddd_dddd_dddd_DATA2: return "DATA2";
whismanoid 0:68e64068330f 1141 case CMD_r011_0011_dddd_dddd_dddd_dddd_dddd_dddd_DATA3: return "DATA3";
whismanoid 0:68e64068330f 1142 case CMD_r011_0100_dddd_dddd_dddd_dddd_dddd_dddd_DATA4: return "DATA4";
whismanoid 0:68e64068330f 1143 case CMD_r011_0101_dddd_dddd_dddd_dddd_dddd_dddd_DATA5: return "DATA5";
whismanoid 0:68e64068330f 1144 case CMD_r011_0110_dddd_dddd_dddd_dddd_dddd_dddd_DATA6: return "DATA6";
whismanoid 0:68e64068330f 1145 case CMD_r011_0111_dddd_dddd_dddd_dddd_dddd_dddd_DATA7: return "DATA7";
whismanoid 0:68e64068330f 1146 case CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS: return "STATUS";
whismanoid 0:68e64068330f 1147 case CMD_r011_1001_dddd_dddd_dddd_dddd_dxxd_dddd_STATUS_IE: return "STATUS_IE";
whismanoid 0:68e64068330f 1148 case CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0: return "UC_0";
whismanoid 0:68e64068330f 1149 case CMD_r011_1011_xaaa_aaaa_dddd_dddd_UC_1: return "UC_1";
whismanoid 0:68e64068330f 1150 case CMD_r011_1100_xaaa_aaaa_dddd_dddd_UC_2: return "UC_2";
whismanoid 0:68e64068330f 1151 case CMD_r011_1101_xaaa_aaaa_dddd_dddd_UC_3: return "UC_3";
whismanoid 0:68e64068330f 1152 case CMD_r011_1110_xaaa_aaaa_dddd_dddd_UC_4: return "UC_4";
whismanoid 0:68e64068330f 1153 case CMD_r011_1111_xaaa_aaaa_dddd_dddd_UC_5: return "UC_5";
whismanoid 0:68e64068330f 1154 case CMD_r100_0000_xaaa_aaaa_dddd_dddd_UC_6: return "UC_6";
whismanoid 0:68e64068330f 1155 case CMD_r100_0001_xaaa_aaaa_dddd_dddd_UC_7: return "UC_7";
whismanoid 0:68e64068330f 1156 case CMD_r100_0010_xaaa_aaaa_dddd_dddd_UC_8: return "UC_8";
whismanoid 0:68e64068330f 1157 case CMD_r100_0011_xaaa_aaaa_dddd_dddd_UC_9: return "UC_9";
whismanoid 0:68e64068330f 1158 case CMD_r100_0100_xaaa_aaaa_dddd_dddd_UC_10: return "UC_10";
whismanoid 0:68e64068330f 1159 case CMD_r100_0101_xaaa_aaaa_dddd_dddd_UC_11: return "UC_11";
whismanoid 0:68e64068330f 1160 case CMD_r100_0110_xaaa_aaaa_dddd_dddd_UC_12: return "UC_12";
whismanoid 0:68e64068330f 1161 case CMD_r100_0111_xaaa_aaaa_dddd_dddd_UC_13: return "UC_13";
whismanoid 0:68e64068330f 1162 case CMD_r100_1000_xaaa_aaaa_dddd_dddd_UC_14: return "UC_14";
whismanoid 0:68e64068330f 1163 case CMD_r100_1001_xaaa_aaaa_dddd_dddd_UC_15: return "UC_15";
whismanoid 0:68e64068330f 1164 case CMD_r100_1010_xaaa_aaaa_dddd_dddd_UC_16: return "UC_16";
whismanoid 0:68e64068330f 1165 case CMD_r100_1011_xaaa_aaaa_dddd_dddd_UC_17: return "UC_17";
whismanoid 0:68e64068330f 1166 case CMD_r100_1100_xaaa_aaaa_dddd_dddd_UC_18: return "UC_18";
whismanoid 0:68e64068330f 1167 case CMD_r100_1101_xaaa_aaaa_dddd_dddd_UC_19: return "UC_19";
whismanoid 0:68e64068330f 1168 case CMD_r100_1110_xaaa_aaaa_dddd_dddd_UC_20: return "UC_20";
whismanoid 0:68e64068330f 1169 case CMD_r100_1111_xaaa_aaaa_dddd_dddd_UC_21: return "UC_21";
whismanoid 0:68e64068330f 1170 case CMD_r101_0000_xaaa_aaaa_dddd_dddd_UC_22: return "UC_22";
whismanoid 0:68e64068330f 1171 case CMD_r101_0001_xaaa_aaaa_dddd_dddd_UC_23: return "UC_23";
whismanoid 0:68e64068330f 1172 case CMD_r101_0010_xaaa_aaaa_dddd_dddd_UC_24: return "UC_24";
whismanoid 0:68e64068330f 1173 case CMD_r101_0011_xaaa_aaaa_dddd_dddd_UC_25: return "UC_25";
whismanoid 0:68e64068330f 1174 case CMD_r101_0100_xaaa_aaaa_dddd_dddd_UC_26: return "UC_26";
whismanoid 0:68e64068330f 1175 case CMD_r101_0101_xaaa_aaaa_dddd_dddd_UC_27: return "UC_27";
whismanoid 0:68e64068330f 1176 case CMD_r101_0110_xaaa_aaaa_dddd_dddd_UC_28: return "UC_28";
whismanoid 0:68e64068330f 1177 case CMD_r101_0111_xaaa_aaaa_dddd_dddd_UC_29: return "UC_29";
whismanoid 0:68e64068330f 1178 case CMD_r101_1000_xaaa_aaaa_dddd_dddd_UC_30: return "UC_30";
whismanoid 0:68e64068330f 1179 case CMD_r101_1001_xaaa_aaaa_dddd_dddd_UC_31: return "UC_31";
whismanoid 0:68e64068330f 1180 case CMD_r101_1010_xaaa_aaaa_dddd_dddd_UC_32: return "UC_32";
whismanoid 0:68e64068330f 1181 case CMD_r101_1011_xaaa_aaaa_dddd_dddd_UC_33: return "UC_33";
whismanoid 0:68e64068330f 1182 case CMD_r101_1100_xaaa_aaaa_dddd_dddd_UC_34: return "UC_34";
whismanoid 0:68e64068330f 1183 case CMD_r101_1101_xaaa_aaaa_dddd_dddd_UC_35: return "UC_35";
whismanoid 0:68e64068330f 1184 case CMD_r101_1110_xaaa_aaaa_dddd_dddd_UC_36: return "UC_36";
whismanoid 0:68e64068330f 1185 case CMD_r101_1111_xaaa_aaaa_dddd_dddd_UC_37: return "UC_37";
whismanoid 0:68e64068330f 1186 case CMD_r110_0000_xaaa_aaaa_dddd_dddd_UC_38: return "UC_38";
whismanoid 0:68e64068330f 1187 case CMD_r110_0001_xaaa_aaaa_dddd_dddd_UC_39: return "UC_39";
whismanoid 0:68e64068330f 1188 case CMD_r110_0010_xaaa_aaaa_dddd_dddd_UC_40: return "UC_40";
whismanoid 0:68e64068330f 1189 case CMD_r110_0011_xaaa_aaaa_dddd_dddd_UC_41: return "UC_41";
whismanoid 0:68e64068330f 1190 case CMD_r110_0100_xaaa_aaaa_dddd_dddd_UC_42: return "UC_42";
whismanoid 0:68e64068330f 1191 case CMD_r110_0101_xaaa_aaaa_dddd_dddd_UC_43: return "UC_43";
whismanoid 0:68e64068330f 1192 case CMD_r110_0110_xaaa_aaaa_dddd_dddd_UC_44: return "UC_44";
whismanoid 0:68e64068330f 1193 case CMD_r110_0111_xaaa_aaaa_dddd_dddd_UC_45: return "UC_45";
whismanoid 0:68e64068330f 1194 case CMD_r110_1000_xaaa_aaaa_dddd_dddd_UC_46: return "UC_46";
whismanoid 0:68e64068330f 1195 case CMD_r110_1001_xaaa_aaaa_dddd_dddd_UC_47: return "UC_47";
whismanoid 0:68e64068330f 1196 case CMD_r110_1010_xaaa_aaaa_dddd_dddd_UC_48: return "UC_48";
whismanoid 0:68e64068330f 1197 case CMD_r110_1011_xaaa_aaaa_dddd_dddd_UC_49: return "UC_49";
whismanoid 0:68e64068330f 1198 case CMD_r110_1100_xaaa_aaaa_dddd_dddd_UC_50: return "UC_50";
whismanoid 0:68e64068330f 1199 case CMD_r110_1101_xaaa_aaaa_dddd_dddd_UC_51: return "UC_51";
whismanoid 0:68e64068330f 1200 case CMD_r110_1110_xaaa_aaaa_dddd_dddd_UC_52: return "UC_52";
whismanoid 0:68e64068330f 1201 case CMD_r110_1111_xxxx_xxxx_xaaa_aaaa_UCADDR: return "UCADDR";
whismanoid 0:68e64068330f 1202 }
whismanoid 0:68e64068330f 1203 }
whismanoid 0:68e64068330f 1204
whismanoid 0:68e64068330f 1205 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1206 // Menu item 'XF'
whismanoid 1:d57c1a2cb83c 1207 //
whismanoid 1:d57c1a2cb83c 1208 // FILTER Select Filter and Rate.
whismanoid 1:d57c1a2cb83c 1209 // Sets conversion rate based on RATE, LINEF, and CONV_TYPE value. See Table 9a through Table 9d for details.
whismanoid 1:d57c1a2cb83c 1210 // For CONV_TYPE_01_Continuous, linef=LINEF_11_SINC4, rate=RATE_0100 selects output data rate 60SPS.
whismanoid 1:d57c1a2cb83c 1211 //
whismanoid 1:d57c1a2cb83c 1212 // @param[in] linef = filter type, default=MAX11410::LINEF_enum_t::LINEF_11_SINC4
whismanoid 1:d57c1a2cb83c 1213 // @param[in] rate = output data rate selection, default=MAX11410::RATE_enum_t::RATE_0100
whismanoid 1:d57c1a2cb83c 1214 //
whismanoid 1:d57c1a2cb83c 1215 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1216 uint8_t MAX11410::Configure_FILTER(uint8_t linef, uint8_t rate)
whismanoid 1:d57c1a2cb83c 1217 {
whismanoid 1:d57c1a2cb83c 1218
whismanoid 1:d57c1a2cb83c 1219 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1220 // write8 0x08 FILTER
whismanoid 1:d57c1a2cb83c 1221 RegWrite(CMD_r000_1000_x0dd_dddd_FILTER, (uint8_t)(0
whismanoid 1:d57c1a2cb83c 1222 | (((uint8_t)linef & 3) << 4)
whismanoid 1:d57c1a2cb83c 1223 | (((uint8_t)rate & 15) << 0)
whismanoid 1:d57c1a2cb83c 1224 ));
whismanoid 1:d57c1a2cb83c 1225
whismanoid 1:d57c1a2cb83c 1226 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1227 // success
whismanoid 1:d57c1a2cb83c 1228 return 1;
whismanoid 1:d57c1a2cb83c 1229 }
whismanoid 1:d57c1a2cb83c 1230
whismanoid 1:d57c1a2cb83c 1231 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1232 // Menu item 'XP'
whismanoid 1:d57c1a2cb83c 1233 //
whismanoid 1:d57c1a2cb83c 1234 // PGA Select Gain and Signal Path.
whismanoid 1:d57c1a2cb83c 1235 //
whismanoid 1:d57c1a2cb83c 1236 // @param[in] sigpath = signal path, default=MAX11410::SIG_PATH_enum_t::SIG_PATH_00_BUFFERED
whismanoid 1:d57c1a2cb83c 1237 // @param[in] gain = gain selection, default=MAX11410::GAIN_enum_t::GAIN_000_1
whismanoid 1:d57c1a2cb83c 1238 //
whismanoid 1:d57c1a2cb83c 1239 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1240 uint8_t MAX11410::Configure_PGA(uint8_t sigpath, uint8_t gain)
whismanoid 1:d57c1a2cb83c 1241 {
whismanoid 1:d57c1a2cb83c 1242
whismanoid 1:d57c1a2cb83c 1243 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1244 // pga gain 1, 2, 4, 8, 16, 32, 64, or 128 based on gain index in register pga CMD_r000_1110_xxdd_xddd_PGA
whismanoid 1:d57c1a2cb83c 1245 static uint8_t pgaGainTable[8] = {1, 2, 4, 8, 16, 32, 64, 128};
whismanoid 1:d57c1a2cb83c 1246 pgaGain = (sigpath == SIG_PATH_10_PGA) ? pgaGainTable[(uint8_t)gain] : 1;
whismanoid 1:d57c1a2cb83c 1247
whismanoid 1:d57c1a2cb83c 1248 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1249 // write8 0x0E PGA
whismanoid 1:d57c1a2cb83c 1250 RegWrite(CMD_r000_1110_xxdd_xddd_PGA, (uint8_t)(0
whismanoid 1:d57c1a2cb83c 1251 | (((uint8_t)sigpath & 2) << 4)
whismanoid 1:d57c1a2cb83c 1252 | (((uint8_t)gain & 7) << 0)
whismanoid 1:d57c1a2cb83c 1253 ));
whismanoid 1:d57c1a2cb83c 1254
whismanoid 1:d57c1a2cb83c 1255 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1256 // success
whismanoid 1:d57c1a2cb83c 1257 return 1;
whismanoid 1:d57c1a2cb83c 1258 }
whismanoid 1:d57c1a2cb83c 1259
whismanoid 1:d57c1a2cb83c 1260 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1261 // Menu item 'XC'
whismanoid 1:d57c1a2cb83c 1262 //
whismanoid 1:d57c1a2cb83c 1263 // CTRL Select clock, format, and reference.
whismanoid 1:d57c1a2cb83c 1264 //
whismanoid 1:d57c1a2cb83c 1265 // @param[in] extclk = external clock enable, default=0
whismanoid 1:d57c1a2cb83c 1266 // @param[in] u_bn = unipolar input range enable, default=0
whismanoid 1:d57c1a2cb83c 1267 // @param[in] format = offset binary format enable, default=0
whismanoid 1:d57c1a2cb83c 1268 // @param[in] refbufp_en = REFP reference buffer enable, default=0
whismanoid 1:d57c1a2cb83c 1269 // @param[in] refbufn_en = REFN reference buffer enable, default=0
whismanoid 1:d57c1a2cb83c 1270 // @param[in] ref_sel = reference selection, default=MAX11410::REF_SEL_enum_t::REF_SEL_001_REF1P_REF1N
whismanoid 1:d57c1a2cb83c 1271 //
whismanoid 1:d57c1a2cb83c 1272 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1273 uint8_t MAX11410::Configure_CTRL(uint8_t extclk, uint8_t u_bn, uint8_t format, uint8_t refbufp_en, uint8_t refbufn_en, uint8_t ref_sel)
whismanoid 1:d57c1a2cb83c 1274 {
whismanoid 1:d57c1a2cb83c 1275
whismanoid 1:d57c1a2cb83c 1276 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1277 // shadow of register CMD_r000_1001_dddd_dddd_CTRL
whismanoid 1:d57c1a2cb83c 1278 ctrl = (uint8_t)(0
whismanoid 1:d57c1a2cb83c 1279 | (((uint8_t)extclk & 1) << 7)
whismanoid 1:d57c1a2cb83c 1280 | (((uint8_t)u_bn & 1) << 6)
whismanoid 1:d57c1a2cb83c 1281 | (((uint8_t)format & 1) << 5)
whismanoid 1:d57c1a2cb83c 1282 | (((uint8_t)refbufp_en & 1) << 4)
whismanoid 1:d57c1a2cb83c 1283 | (((uint8_t)refbufn_en & 1) << 3)
whismanoid 1:d57c1a2cb83c 1284 | (((uint8_t)ref_sel & 7) << 0)
whismanoid 1:d57c1a2cb83c 1285 );
whismanoid 1:d57c1a2cb83c 1286
whismanoid 1:d57c1a2cb83c 1287 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1288 // write8 0x09 CTRL
whismanoid 1:d57c1a2cb83c 1289 RegWrite(CMD_r000_1001_dddd_dddd_CTRL, ctrl);
whismanoid 1:d57c1a2cb83c 1290
whismanoid 1:d57c1a2cb83c 1291 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1292 // success
whismanoid 1:d57c1a2cb83c 1293 return 1;
whismanoid 1:d57c1a2cb83c 1294 }
whismanoid 1:d57c1a2cb83c 1295
whismanoid 1:d57c1a2cb83c 1296 //----------------------------------------
whismanoid 14:b49eecf7e4d8 1297 // Menu item 'XR'
whismanoid 14:b49eecf7e4d8 1298 //
whismanoid 14:b49eecf7e4d8 1299 // CTRL select reference, without changing the other fields.
whismanoid 14:b49eecf7e4d8 1300 //
whismanoid 14:b49eecf7e4d8 1301 // @pre ctrl = shadow of CTRL register
whismanoid 14:b49eecf7e4d8 1302 // @param[in] ref_sel = reference selection, default=MAX11410::REF_SEL_enum_t::REF_SEL_001_REF1P_REF1N
whismanoid 14:b49eecf7e4d8 1303 //
whismanoid 14:b49eecf7e4d8 1304 // @return 1 on success; 0 on failure
whismanoid 14:b49eecf7e4d8 1305 uint8_t MAX11410::Configure_CTRL_REF(uint8_t ref_sel)
whismanoid 14:b49eecf7e4d8 1306 {
whismanoid 14:b49eecf7e4d8 1307
whismanoid 14:b49eecf7e4d8 1308 //----------------------------------------
whismanoid 14:b49eecf7e4d8 1309 // shadow of register CMD_r000_1001_dddd_dddd_CTRL
whismanoid 14:b49eecf7e4d8 1310 ctrl = (ctrl & ((~ 7) << 0))
whismanoid 14:b49eecf7e4d8 1311 | (((uint8_t)ref_sel & 7) << 0);
whismanoid 14:b49eecf7e4d8 1312
whismanoid 14:b49eecf7e4d8 1313 //----------------------------------------
whismanoid 14:b49eecf7e4d8 1314 // write8 0x09 CTRL
whismanoid 14:b49eecf7e4d8 1315 RegWrite(CMD_r000_1001_dddd_dddd_CTRL, ctrl);
whismanoid 14:b49eecf7e4d8 1316
whismanoid 14:b49eecf7e4d8 1317 //----------------------------------------
whismanoid 14:b49eecf7e4d8 1318 // success
whismanoid 14:b49eecf7e4d8 1319 return 1;
whismanoid 14:b49eecf7e4d8 1320 }
whismanoid 14:b49eecf7e4d8 1321
whismanoid 14:b49eecf7e4d8 1322 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1323 // Menu item 'XS'
whismanoid 1:d57c1a2cb83c 1324 //
whismanoid 1:d57c1a2cb83c 1325 // SOURCE Configure voltage bias source, current source, burnout mode
whismanoid 1:d57c1a2cb83c 1326 //
whismanoid 1:d57c1a2cb83c 1327 // @param[in] vbias_mode = _______, default=MAX11410::VBIAS_MODE_enum_t::VBIAS_MODE_00_Active
whismanoid 1:d57c1a2cb83c 1328 // @param[in] brn_mode = _______, default=MAX11410::BRN_MODE_enum_t::BRN_MODE_00_disabled
whismanoid 1:d57c1a2cb83c 1329 // @param[in] idac_mode = _______, default=MAX11410::IDAC_MODE_enum_t::IDAC_MODE_0000_10uA
whismanoid 1:d57c1a2cb83c 1330 //
whismanoid 1:d57c1a2cb83c 1331 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1332 uint8_t MAX11410::Configure_SOURCE(uint8_t vbias_mode, uint8_t brn_mode, uint8_t idac_mode)
whismanoid 1:d57c1a2cb83c 1333 {
whismanoid 1:d57c1a2cb83c 1334
whismanoid 1:d57c1a2cb83c 1335 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1336 // warning -- WIP work in progress
whismanoid 1:d57c1a2cb83c 1337 #warning "Not Tested Yet: MAX11410::Configure_SOURCE..."
whismanoid 1:d57c1a2cb83c 1338
whismanoid 1:d57c1a2cb83c 1339 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1340 // write8 0x0A SOURCE
whismanoid 1:d57c1a2cb83c 1341 RegWrite(CMD_r000_1010_dddd_dddd_SOURCE, (uint8_t)(0
whismanoid 1:d57c1a2cb83c 1342 | (((uint8_t)vbias_mode & 3) << 6)
whismanoid 1:d57c1a2cb83c 1343 | (((uint8_t)brn_mode & 3) << 4)
whismanoid 1:d57c1a2cb83c 1344 | (((uint8_t)idac_mode & 15) << 0)
whismanoid 1:d57c1a2cb83c 1345 ));
whismanoid 1:d57c1a2cb83c 1346
whismanoid 1:d57c1a2cb83c 1347 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1348 // success
whismanoid 1:d57c1a2cb83c 1349 return 1;
whismanoid 1:d57c1a2cb83c 1350 }
whismanoid 1:d57c1a2cb83c 1351
whismanoid 1:d57c1a2cb83c 1352 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1353 // Menu item 'XM'
whismanoid 1:d57c1a2cb83c 1354 //
whismanoid 1:d57c1a2cb83c 1355 // MUX_CTRL0 Select pins for analog input AINP and AINN
whismanoid 1:d57c1a2cb83c 1356 //
whismanoid 1:d57c1a2cb83c 1357 // @param[in] ainp = channel high side, default=MAX11410::AINP_SEL_enum_t::AINP_SEL_0000_AIN0
whismanoid 1:d57c1a2cb83c 1358 // @param[in] ainn = channel low side, default=MAX11410::AINN_SEL_enum_t::AINN_SEL_1010_GND
whismanoid 1:d57c1a2cb83c 1359 //
whismanoid 1:d57c1a2cb83c 1360 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1361 uint8_t MAX11410::Configure_MUX_CTRL0(uint8_t ainp, uint8_t ainn)
whismanoid 1:d57c1a2cb83c 1362 {
whismanoid 1:d57c1a2cb83c 1363
whismanoid 1:d57c1a2cb83c 1364 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1365 // warning -- WIP work in progress
whismanoid 1:d57c1a2cb83c 1366 #warning "Not Tested Yet: MAX11410::Configure_MUX_CTRL0..."
whismanoid 1:d57c1a2cb83c 1367
whismanoid 1:d57c1a2cb83c 1368 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1369 // write8 0x0B MUX_CTRL0
whismanoid 1:d57c1a2cb83c 1370 RegWrite(CMD_r000_1011_dddd_dddd_MUX_CTRL0, (uint8_t)(0
whismanoid 1:d57c1a2cb83c 1371 | (((uint8_t)ainp & 15) << 4)
whismanoid 1:d57c1a2cb83c 1372 | (((uint8_t)ainn & 15) << 0)
whismanoid 1:d57c1a2cb83c 1373 ));
whismanoid 1:d57c1a2cb83c 1374
whismanoid 1:d57c1a2cb83c 1375 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1376 // success
whismanoid 1:d57c1a2cb83c 1377 return 1;
whismanoid 1:d57c1a2cb83c 1378 }
whismanoid 1:d57c1a2cb83c 1379
whismanoid 1:d57c1a2cb83c 1380 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1381 // Menu item 'XI'
whismanoid 1:d57c1a2cb83c 1382 //
whismanoid 1:d57c1a2cb83c 1383 // MUX_CTRL1 Select pins for current source
whismanoid 1:d57c1a2cb83c 1384 //
whismanoid 1:d57c1a2cb83c 1385 // @param[in] idac1_sel = channel high side, default=MAX11410::IDAC1_SEL_enum_t::IDAC1_SEL_1111_unconnected
whismanoid 1:d57c1a2cb83c 1386 // @param[in] idac0_sel = channel low side, default=MAX11410::IDAC0_SEL_enum_t::IDAC0_SEL_1111_unconnected
whismanoid 1:d57c1a2cb83c 1387 //
whismanoid 1:d57c1a2cb83c 1388 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1389 uint8_t MAX11410::Configure_MUX_CTRL1(uint8_t idac1_sel, uint8_t idac0_sel)
whismanoid 1:d57c1a2cb83c 1390 {
whismanoid 1:d57c1a2cb83c 1391
whismanoid 1:d57c1a2cb83c 1392 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1393 // warning -- WIP work in progress
whismanoid 1:d57c1a2cb83c 1394 #warning "Not Tested Yet: MAX11410::Configure_MUX_CTRL1..."
whismanoid 1:d57c1a2cb83c 1395
whismanoid 1:d57c1a2cb83c 1396 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1397 // write8 0x0C MUX_CTRL1
whismanoid 1:d57c1a2cb83c 1398 RegWrite(CMD_r000_1100_dddd_dddd_MUX_CTRL1, (uint8_t)(0
whismanoid 1:d57c1a2cb83c 1399 | (((uint8_t)idac1_sel & 15) << 4)
whismanoid 1:d57c1a2cb83c 1400 | (((uint8_t)idac0_sel & 15) << 0)
whismanoid 1:d57c1a2cb83c 1401 ));
whismanoid 1:d57c1a2cb83c 1402
whismanoid 1:d57c1a2cb83c 1403 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1404 // success
whismanoid 1:d57c1a2cb83c 1405 return 1;
whismanoid 1:d57c1a2cb83c 1406 }
whismanoid 1:d57c1a2cb83c 1407
whismanoid 1:d57c1a2cb83c 1408 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1409 // Menu item 'XV'
whismanoid 1:d57c1a2cb83c 1410 //
whismanoid 1:d57c1a2cb83c 1411 // MUX_CTRL2 Select pins for voltage bias source
whismanoid 1:d57c1a2cb83c 1412 //
whismanoid 1:d57c1a2cb83c 1413 // @param[in] vbias_ain7_ain0_bitmap = bit map of AIN7..AIN0 enables for voltage bias, default=0
whismanoid 1:d57c1a2cb83c 1414 //
whismanoid 1:d57c1a2cb83c 1415 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1416 uint8_t MAX11410::Configure_MUX_CTRL2(uint8_t vbias_ain7_ain0_bitmap)
whismanoid 1:d57c1a2cb83c 1417 {
whismanoid 1:d57c1a2cb83c 1418
whismanoid 1:d57c1a2cb83c 1419 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1420 // warning -- WIP work in progress
whismanoid 1:d57c1a2cb83c 1421 #warning "Not Tested Yet: MAX11410::Configure_MUX_CTRL2..."
whismanoid 1:d57c1a2cb83c 1422
whismanoid 1:d57c1a2cb83c 1423 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1424 // write8 0x0D MUX_CTRL2
whismanoid 1:d57c1a2cb83c 1425 RegWrite(CMD_r000_1101_dddd_dddd_MUX_CTRL2, vbias_ain7_ain0_bitmap);
whismanoid 1:d57c1a2cb83c 1426
whismanoid 1:d57c1a2cb83c 1427 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1428 // success
whismanoid 1:d57c1a2cb83c 1429 return 1;
whismanoid 1:d57c1a2cb83c 1430 }
whismanoid 1:d57c1a2cb83c 1431
whismanoid 1:d57c1a2cb83c 1432 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1433 // Menu item 'X0'
whismanoid 1:d57c1a2cb83c 1434 //
whismanoid 1:d57c1a2cb83c 1435 // CAL_START Calibrate Self Offset and Gain.
whismanoid 1:d57c1a2cb83c 1436 //
whismanoid 1:d57c1a2cb83c 1437 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1438 uint8_t MAX11410::Calibrate_Self_Offset_Gain(void)
whismanoid 1:d57c1a2cb83c 1439 {
whismanoid 1:d57c1a2cb83c 1440
whismanoid 1:d57c1a2cb83c 1441 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1442 // warning -- WIP work in progress
whismanoid 1:d57c1a2cb83c 1443 #warning "Not Tested Yet: MAX11410::Calibrate_Self_Offset_Gain..."
whismanoid 1:d57c1a2cb83c 1444
whismanoid 1:d57c1a2cb83c 1445 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1446 // write8 0x03 CAL_START
whismanoid 1:d57c1a2cb83c 1447 RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_000_SELF_CAL);
whismanoid 1:d57c1a2cb83c 1448
whismanoid 1:d57c1a2cb83c 1449 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1450 // success
whismanoid 1:d57c1a2cb83c 1451 return 1;
whismanoid 1:d57c1a2cb83c 1452 }
whismanoid 1:d57c1a2cb83c 1453
whismanoid 1:d57c1a2cb83c 1454 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1455 // Menu item 'X1'
whismanoid 1:d57c1a2cb83c 1456 //
whismanoid 1:d57c1a2cb83c 1457 // CAL_START Calibrate Selected PGA.
whismanoid 1:d57c1a2cb83c 1458 //
whismanoid 1:d57c1a2cb83c 1459 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1460 uint8_t MAX11410::Calibrate_PGA_Gain(void)
whismanoid 1:d57c1a2cb83c 1461 {
whismanoid 1:d57c1a2cb83c 1462
whismanoid 1:d57c1a2cb83c 1463 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1464 // warning -- WIP work in progress
whismanoid 1:d57c1a2cb83c 1465 #warning "Not Tested Yet: MAX11410::Calibrate_PGA_Gain..."
whismanoid 1:d57c1a2cb83c 1466
whismanoid 1:d57c1a2cb83c 1467 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1468 // write8 0x03 CAL_START
whismanoid 1:d57c1a2cb83c 1469 RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_001_PGA_GAIN);
whismanoid 1:d57c1a2cb83c 1470
whismanoid 1:d57c1a2cb83c 1471 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1472 // success
whismanoid 1:d57c1a2cb83c 1473 return 1;
whismanoid 1:d57c1a2cb83c 1474 }
whismanoid 1:d57c1a2cb83c 1475
whismanoid 1:d57c1a2cb83c 1476 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1477 // Menu item 'X4'
whismanoid 1:d57c1a2cb83c 1478 //
whismanoid 1:d57c1a2cb83c 1479 // CAL_START Calibrate System Offset A.
whismanoid 1:d57c1a2cb83c 1480 //
whismanoid 1:d57c1a2cb83c 1481 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1482 uint8_t MAX11410::Calibrate_System_Offset_A(void)
whismanoid 1:d57c1a2cb83c 1483 {
whismanoid 1:d57c1a2cb83c 1484
whismanoid 1:d57c1a2cb83c 1485 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1486 // warning -- WIP work in progress
whismanoid 1:d57c1a2cb83c 1487 #warning "Not Tested Yet: MAX11410::Calibrate_System_Offset_A..."
whismanoid 1:d57c1a2cb83c 1488
whismanoid 1:d57c1a2cb83c 1489 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1490 // write8 0x03 CAL_START
whismanoid 1:d57c1a2cb83c 1491 RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_100_SYS_OFF_A);
whismanoid 1:d57c1a2cb83c 1492
whismanoid 1:d57c1a2cb83c 1493 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1494 // success
whismanoid 1:d57c1a2cb83c 1495 return 1;
whismanoid 1:d57c1a2cb83c 1496 }
whismanoid 1:d57c1a2cb83c 1497
whismanoid 1:d57c1a2cb83c 1498 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1499 // Menu item 'X5'
whismanoid 1:d57c1a2cb83c 1500 //
whismanoid 1:d57c1a2cb83c 1501 // X6 0x03 CAL_START 0x06 Calibrate System Offset B
whismanoid 1:d57c1a2cb83c 1502 // X7 0x03 CAL_START 0x07 Calibrate System Gain B
whismanoid 1:d57c1a2cb83c 1503 // CAL_START Calibrate System Gain A.
whismanoid 1:d57c1a2cb83c 1504 //
whismanoid 1:d57c1a2cb83c 1505 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1506 uint8_t MAX11410::Calibrate_System_Gain_A(void)
whismanoid 1:d57c1a2cb83c 1507 {
whismanoid 1:d57c1a2cb83c 1508
whismanoid 1:d57c1a2cb83c 1509 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1510 // warning -- WIP work in progress
whismanoid 1:d57c1a2cb83c 1511 #warning "Not Tested Yet: MAX11410::Calibrate_System_Gain_A..."
whismanoid 1:d57c1a2cb83c 1512
whismanoid 1:d57c1a2cb83c 1513 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1514 // write8 0x03 CAL_START
whismanoid 1:d57c1a2cb83c 1515 RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_101_SYS_GAIN_A);
whismanoid 1:d57c1a2cb83c 1516
whismanoid 1:d57c1a2cb83c 1517 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1518 // success
whismanoid 1:d57c1a2cb83c 1519 return 1;
whismanoid 1:d57c1a2cb83c 1520 }
whismanoid 1:d57c1a2cb83c 1521
whismanoid 1:d57c1a2cb83c 1522 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1523 // Menu item 'X6'
whismanoid 1:d57c1a2cb83c 1524 //
whismanoid 1:d57c1a2cb83c 1525 // CAL_START Calibrate System Offset B.
whismanoid 1:d57c1a2cb83c 1526 //
whismanoid 1:d57c1a2cb83c 1527 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1528 uint8_t MAX11410::Calibrate_System_Offset_B(void)
whismanoid 1:d57c1a2cb83c 1529 {
whismanoid 1:d57c1a2cb83c 1530
whismanoid 1:d57c1a2cb83c 1531 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1532 // warning -- WIP work in progress
whismanoid 1:d57c1a2cb83c 1533 #warning "Not Tested Yet: MAX11410::Calibrate_System_Offset_B..."
whismanoid 1:d57c1a2cb83c 1534
whismanoid 1:d57c1a2cb83c 1535 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1536 // write8 0x03 CAL_START
whismanoid 1:d57c1a2cb83c 1537 RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_110_SYS_OFF_B);
whismanoid 1:d57c1a2cb83c 1538
whismanoid 1:d57c1a2cb83c 1539 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1540 // success
whismanoid 1:d57c1a2cb83c 1541 return 1;
whismanoid 1:d57c1a2cb83c 1542 }
whismanoid 1:d57c1a2cb83c 1543
whismanoid 1:d57c1a2cb83c 1544 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1545 // Menu item 'X7'
whismanoid 1:d57c1a2cb83c 1546 //
whismanoid 1:d57c1a2cb83c 1547 // CAL_START Calibrate System Gain B.
whismanoid 1:d57c1a2cb83c 1548 //
whismanoid 1:d57c1a2cb83c 1549 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1550 uint8_t MAX11410::Calibrate_System_Gain_B(void)
whismanoid 1:d57c1a2cb83c 1551 {
whismanoid 1:d57c1a2cb83c 1552
whismanoid 1:d57c1a2cb83c 1553 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1554 // warning -- WIP work in progress
whismanoid 1:d57c1a2cb83c 1555 #warning "Not Tested Yet: MAX11410::Calibrate_System_Gain_B..."
whismanoid 1:d57c1a2cb83c 1556
whismanoid 1:d57c1a2cb83c 1557 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1558 // write8 0x03 CAL_START
whismanoid 1:d57c1a2cb83c 1559 RegWrite(CMD_r000_0011_xxxx_xddd_CAL_START, (uint8_t)CAL_TYPE_111_SYS_GAIN_B);
whismanoid 1:d57c1a2cb83c 1560
whismanoid 1:d57c1a2cb83c 1561 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1562 // success
whismanoid 1:d57c1a2cb83c 1563 return 1;
whismanoid 1:d57c1a2cb83c 1564 }
whismanoid 1:d57c1a2cb83c 1565
whismanoid 1:d57c1a2cb83c 1566 //----------------------------------------
whismanoid 0:68e64068330f 1567 // Configure Measurement for voltage input.
whismanoid 0:68e64068330f 1568 //
whismanoid 0:68e64068330f 1569 // Example code for typical voltage measurement.
whismanoid 0:68e64068330f 1570 //
whismanoid 0:68e64068330f 1571 // SPI register write sequence test AIN0-AGND voltage input using REF2=2.5V
whismanoid 0:68e64068330f 1572 // write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode)
whismanoid 0:68e64068330f 1573 // write8 0x00 PD = 0x00 (NOP)
whismanoid 0:68e64068330f 1574 // write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous )
whismanoid 0:68e64068330f 1575 // write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND
whismanoid 0:68e64068330f 1576 // write8 0x09 CTRL = 0x02 to select reference REF2P/REF2N; or CTRL = 0x1A to select reference REF2P/REF2N with reference input buffers enabled; Data Format = Bipolar 2's Complement
whismanoid 0:68e64068330f 1577 // write8 0x0E PGA = 0x00 to select input path = Buffers, digital gain = 1V/V
whismanoid 0:68e64068330f 1578 // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid 0:68e64068330f 1579 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 0:68e64068330f 1580 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 0:68e64068330f 1581 //
whismanoid 1:d57c1a2cb83c 1582 // @param[in] ainp = channel high side, default=AINP_SEL_enum_t::AINP_SEL_0000_AIN0
whismanoid 1:d57c1a2cb83c 1583 // @param[in] ainn = channel low side, default=AINN_SEL_enum_t::AINN_SEL_1010_GND
whismanoid 0:68e64068330f 1584 //
whismanoid 0:68e64068330f 1585 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1586 uint8_t MAX11410::Configure_Voltage(MAX11410_AINP_SEL_enum_t ainp, MAX11410_AINN_SEL_enum_t ainn)
whismanoid 0:68e64068330f 1587 {
whismanoid 0:68e64068330f 1588
whismanoid 0:68e64068330f 1589 //----------------------------------------
whismanoid 0:68e64068330f 1590 // warning -- WIP work in progress
whismanoid 0:68e64068330f 1591 #warning "Not Tested Yet: MAX11410::Configure_Voltage..."
whismanoid 0:68e64068330f 1592
whismanoid 0:68e64068330f 1593 //----------------------------------------
whismanoid 0:68e64068330f 1594 // write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode)
whismanoid 0:68e64068330f 1595 RegWrite(CMD_r000_0000_xxxx_xxdd_PD, PD_11_Reset);
whismanoid 0:68e64068330f 1596
whismanoid 0:68e64068330f 1597 //----------------------------------------
whismanoid 0:68e64068330f 1598 // write8 0x00 PD = 0x00 (NOP)
whismanoid 0:68e64068330f 1599 RegWrite(CMD_r000_0000_xxxx_xxdd_PD, PD_00_Normal);
whismanoid 0:68e64068330f 1600
whismanoid 0:68e64068330f 1601 //----------------------------------------
whismanoid 0:68e64068330f 1602 // write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous)
whismanoid 2:eac67184cc0c 1603 Configure_FILTER((uint8_t) /* MAX11410::MAX11410_LINEF_enum_t:: */ LINEF_11_SINC4,
whismanoid 2:eac67184cc0c 1604 (uint8_t) /* MAX11410::MAX11410_RATE_enum_t:: */ RATE_0100);
whismanoid 0:68e64068330f 1605
whismanoid 0:68e64068330f 1606 //----------------------------------------
whismanoid 0:68e64068330f 1607 // write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND
whismanoid 1:d57c1a2cb83c 1608 Configure_MUX_CTRL0((uint8_t)AINP_SEL_0000_AIN0, (uint8_t)AINN_SEL_1010_GND);
whismanoid 0:68e64068330f 1609
whismanoid 0:68e64068330f 1610 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1611 // write8 0x09 CTRL to select reference REF2P/REF2N; Data Format = Bipolar 2's Complement
whismanoid 1:d57c1a2cb83c 1612 Configure_CTRL(/*extclk*/ 0, /*u_bn*/ 0, /*format*/ 0,
whismanoid 1:d57c1a2cb83c 1613 /*refbufp_en*/ 0, /*refbufn_en*/ 0,
whismanoid 1:d57c1a2cb83c 1614 /*ref_sel*/ (uint8_t)REF_SEL_010_REF2P_REF2N);
whismanoid 0:68e64068330f 1615
whismanoid 0:68e64068330f 1616 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1617 // write8 0x0E PGA
whismanoid 2:eac67184cc0c 1618 Configure_PGA((uint8_t) /* MAX11410_SIG_PATH_enum_t:: */ SIG_PATH_00_BUFFERED,
whismanoid 2:eac67184cc0c 1619 (uint8_t) /* MAX11410_GAIN_enum_t:: */ GAIN_000_1);
whismanoid 0:68e64068330f 1620
whismanoid 0:68e64068330f 1621 //----------------------------------------
whismanoid 0:68e64068330f 1622 // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid 0:68e64068330f 1623 RegWrite(CMD_r000_0001_xddd_xxdd_CONV_START, 0x01);
whismanoid 0:68e64068330f 1624
whismanoid 0:68e64068330f 1625 //----------------------------------------
whismanoid 0:68e64068330f 1626 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 0:68e64068330f 1627 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 0:68e64068330f 1628
whismanoid 0:68e64068330f 1629 //----------------------------------------
whismanoid 0:68e64068330f 1630 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 0:68e64068330f 1631 RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 0:68e64068330f 1632
whismanoid 0:68e64068330f 1633 //----------------------------------------
whismanoid 0:68e64068330f 1634 // success
whismanoid 0:68e64068330f 1635 return 1;
whismanoid 0:68e64068330f 1636 }
whismanoid 0:68e64068330f 1637
whismanoid 0:68e64068330f 1638 //----------------------------------------
whismanoid 13:df96a784cda6 1639 // Menu item '$' -> AINcode[0], AINcode[1], AINcode[2], AINcode[3], AINcode[4], AINcode[5], AINcode[6], AINcode[7], AINcode[8], AINcode[9], AINcode[10]
whismanoid 17:0e9f2dfc2a30 1640 //
whismanoid 1:d57c1a2cb83c 1641 // Measure all ADC channels in sequence.
whismanoid 17:0e9f2dfc2a30 1642 // Diagnostic output pulse on GP0 for each channel's measurement.
whismanoid 17:0e9f2dfc2a30 1643 // Diagnostic output pulse on GP1 for entire loop.
whismanoid 17:0e9f2dfc2a30 1644 //
whismanoid 8:3a9dfa2e8234 1645 // @post AINcode[0..10]: measurement result LSB code
whismanoid 0:68e64068330f 1646 //
whismanoid 0:68e64068330f 1647 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 1648 uint8_t MAX11410::Read_All_Voltages(void)
whismanoid 0:68e64068330f 1649 {
whismanoid 0:68e64068330f 1650
whismanoid 0:68e64068330f 1651 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1652 // scan AIN0..AIN9
whismanoid 17:0e9f2dfc2a30 1653 //
whismanoid 17:0e9f2dfc2a30 1654 // diagnostic GPIO pulse on MAX11410 GP1 pin (0xc3 = logic 0, 0xc4 = logic 1)
whismanoid 17:0e9f2dfc2a30 1655 RegWrite(CMD_r000_0101_dddd_xddd_GP1_CTRL, 0xc3); // GP1 = 0
whismanoid 17:0e9f2dfc2a30 1656 //
whismanoid 1:d57c1a2cb83c 1657 const MAX11410_AINN_SEL_enum_t ainn = AINN_SEL_1010_GND;
whismanoid 2:eac67184cc0c 1658 for(uint8_t ainp = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_0000_AIN0; ainp <= /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD; ainp++)
whismanoid 1:d57c1a2cb83c 1659 {
whismanoid 17:0e9f2dfc2a30 1660 // diagnostic GPIO pulse on MAX11410 GP0 pin (0xc3 = logic 0, 0xc4 = logic 1)
whismanoid 17:0e9f2dfc2a30 1661 RegWrite(CMD_r000_0100_dddd_xddd_GP0_CTRL, 0xc3); // GP0 = 0
whismanoid 17:0e9f2dfc2a30 1662 //
whismanoid 1:d57c1a2cb83c 1663 Measure_Voltage((MAX11410_AINP_SEL_enum_t)ainp, ainn);
whismanoid 17:0e9f2dfc2a30 1664 // @post AINcode[ainp]: measurement result LSB code
whismanoid 17:0e9f2dfc2a30 1665 //
whismanoid 17:0e9f2dfc2a30 1666 // diagnostic GPIO pulse on MAX11410 GP0 pin (0xc3 = logic 0, 0xc4 = logic 1)
whismanoid 17:0e9f2dfc2a30 1667 RegWrite(CMD_r000_0100_dddd_xddd_GP0_CTRL, 0xc4); // GP0 = 1
whismanoid 17:0e9f2dfc2a30 1668 //
whismanoid 1:d57c1a2cb83c 1669 }
whismanoid 17:0e9f2dfc2a30 1670 // diagnostic GPIO pulse on MAX11410 GP1 pin (0xc3 = logic 0, 0xc4 = logic 1)
whismanoid 17:0e9f2dfc2a30 1671 RegWrite(CMD_r000_0101_dddd_xddd_GP1_CTRL, 0xc4); // GP1 = 1
whismanoid 17:0e9f2dfc2a30 1672 //
whismanoid 0:68e64068330f 1673
whismanoid 0:68e64068330f 1674 //----------------------------------------
whismanoid 0:68e64068330f 1675 // success
whismanoid 0:68e64068330f 1676 return 1;
whismanoid 0:68e64068330f 1677 }
whismanoid 0:68e64068330f 1678
whismanoid 0:68e64068330f 1679 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1680 // Menu item 'V'
whismanoid 0:68e64068330f 1681 // Trigger Measurement for voltage input.
whismanoid 0:68e64068330f 1682 //
whismanoid 0:68e64068330f 1683 // Example code for typical voltage measurement.
whismanoid 0:68e64068330f 1684 //
whismanoid 1:d57c1a2cb83c 1685 // @pre external connection REF2P-REF2N is a reference voltage
whismanoid 1:d57c1a2cb83c 1686 // @pre VRef = Voltage of REF input, in Volts
whismanoid 1:d57c1a2cb83c 1687 // @param[in] ainp = channel high side, default=AINP_SEL_0000_AIN0
whismanoid 1:d57c1a2cb83c 1688 // @param[in] ainn = channel low side, default=AINN_SEL_1010_GND
whismanoid 1:d57c1a2cb83c 1689 // @post AINcode[ainp]: measurement result LSB code
whismanoid 0:68e64068330f 1690 //
whismanoid 1:d57c1a2cb83c 1691 // @return ideal voltage calculated from raw LSB code and reference voltage
whismanoid 1:d57c1a2cb83c 1692 double MAX11410::Measure_Voltage(MAX11410_AINP_SEL_enum_t ainp, MAX11410_AINN_SEL_enum_t ainn)
whismanoid 0:68e64068330f 1693 {
whismanoid 0:68e64068330f 1694
whismanoid 0:68e64068330f 1695 //----------------------------------------
whismanoid 8:3a9dfa2e8234 1696 // restrict channel selection to valid index range
whismanoid 8:3a9dfa2e8234 1697 if ((uint8_t)ainp > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD)
whismanoid 8:3a9dfa2e8234 1698 {
whismanoid 8:3a9dfa2e8234 1699 ainp = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD;
whismanoid 8:3a9dfa2e8234 1700 }
whismanoid 8:3a9dfa2e8234 1701
whismanoid 8:3a9dfa2e8234 1702 //----------------------------------------
whismanoid 8:3a9dfa2e8234 1703 // restrict channel selection to valid index range
whismanoid 8:3a9dfa2e8234 1704 if ((uint8_t)ainn > /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND)
whismanoid 8:3a9dfa2e8234 1705 {
whismanoid 8:3a9dfa2e8234 1706 ainn = /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND;
whismanoid 8:3a9dfa2e8234 1707 }
whismanoid 8:3a9dfa2e8234 1708
whismanoid 8:3a9dfa2e8234 1709 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1710 // write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND
whismanoid 1:d57c1a2cb83c 1711 Configure_MUX_CTRL0((uint8_t)ainp, (uint8_t)ainn);
whismanoid 1:d57c1a2cb83c 1712
whismanoid 1:d57c1a2cb83c 1713 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1714 // write8 0x09 CTRL to select reference REF2P/REF2N; Data Format = Bipolar 2's Complement
whismanoid 1:d57c1a2cb83c 1715 Configure_CTRL(/*extclk*/ 0, /*u_bn*/ 0, /*format*/ 0,
whismanoid 1:d57c1a2cb83c 1716 /*refbufp_en*/ 0, /*refbufn_en*/ 0,
whismanoid 1:d57c1a2cb83c 1717 /*ref_sel*/ (uint8_t)REF_SEL_010_REF2P_REF2N);
whismanoid 1:d57c1a2cb83c 1718
whismanoid 1:d57c1a2cb83c 1719 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1720 // write8 0x0E PGA
whismanoid 2:eac67184cc0c 1721 Configure_PGA((uint8_t) /* MAX11410_SIG_PATH_enum_t:: */ SIG_PATH_00_BUFFERED,
whismanoid 2:eac67184cc0c 1722 (uint8_t) /* MAX11410_GAIN_enum_t:: */ GAIN_000_1);
whismanoid 1:d57c1a2cb83c 1723
whismanoid 1:d57c1a2cb83c 1724 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1725 // write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous)
whismanoid 2:eac67184cc0c 1726 Configure_FILTER((uint8_t) /* MAX11410::MAX11410_LINEF_enum_t:: */ LINEF_11_SINC4,
whismanoid 2:eac67184cc0c 1727 (uint8_t) /* MAX11410::MAX11410_RATE_enum_t:: */ RATE_0100);
whismanoid 1:d57c1a2cb83c 1728
whismanoid 1:d57c1a2cb83c 1729 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1730 // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid 1:d57c1a2cb83c 1731 RegWrite(CMD_r000_0001_xddd_xxdd_CONV_START, 0x01);
whismanoid 0:68e64068330f 1732
whismanoid 0:68e64068330f 1733 //----------------------------------------
whismanoid 0:68e64068330f 1734 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 0:68e64068330f 1735 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 0:68e64068330f 1736
whismanoid 0:68e64068330f 1737 //----------------------------------------
whismanoid 9:06ca88952f1c 1738 // TODO1: wait until STATUS_enum_t::STATUS_000010_DATA_RDY indicates data is available
whismanoid 9:06ca88952f1c 1739 #warning "Not Verified Yet: wait until STATUS indicates data is available"
whismanoid 13:df96a784cda6 1740 // A bad SPI interface can cause bit slippage, which makes this loop get stuck. Expect *PART_ID? = 0x000F02
whismanoid 13:df96a784cda6 1741 // while ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0) {
whismanoid 13:df96a784cda6 1742 // possible infinite loop; need a timeout or futility countdown to escape
whismanoid 16:00aa1e5a6843 1743 for (int futility_countdown = 3000;
whismanoid 13:df96a784cda6 1744 ((futility_countdown > 0) &&
whismanoid 13:df96a784cda6 1745 ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0));
whismanoid 13:df96a784cda6 1746 futility_countdown--)
whismanoid 13:df96a784cda6 1747 {
whismanoid 9:06ca88952f1c 1748 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 9:06ca88952f1c 1749 }
whismanoid 9:06ca88952f1c 1750
whismanoid 9:06ca88952f1c 1751 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1752 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0): AINcode[ainp] = measurement
whismanoid 1:d57c1a2cb83c 1753 RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &AINcode[((int)ainp & 0x0F)]);
whismanoid 1:d57c1a2cb83c 1754 data0 = AINcode[((int)ainp & 0x0F)];
whismanoid 0:68e64068330f 1755
whismanoid 0:68e64068330f 1756 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1757 // ideal voltage calculated from raw LSB code and reference voltage
whismanoid 1:d57c1a2cb83c 1758 return VoltageOfCode(AINcode[((int)ainp & 0x0F)]);
whismanoid 0:68e64068330f 1759 }
whismanoid 0:68e64068330f 1760
whismanoid 0:68e64068330f 1761 //----------------------------------------
whismanoid 5:a2e74357cfc0 1762 // Menu item 'R' -> rtd_resistance, RTD_Temperature
whismanoid 0:68e64068330f 1763 // Trigger Measurement for Resistive Temperature Device (RTD).
whismanoid 0:68e64068330f 1764 //
whismanoid 0:68e64068330f 1765 // Example code for typical RTD measurement.
whismanoid 0:68e64068330f 1766 //
whismanoid 1:d57c1a2cb83c 1767 // @pre external connection REF1P-REF1N is a reference resistor
whismanoid 1:d57c1a2cb83c 1768 // @pre VRef_REF1 = reference resistance in ohms, default=4999
whismanoid 1:d57c1a2cb83c 1769 // @param[in] rtd_iout = channel RTD high side force, default=AINP_SEL_0111_AIN7
whismanoid 1:d57c1a2cb83c 1770 // @param[in] rtd_ainp = channel RTD high side sense, default=AINP_SEL_1000_AIN8
whismanoid 1:d57c1a2cb83c 1771 // @param[in] rtd_ainn = channel RTD low side, default=AINN_SEL_1001_AIN9
whismanoid 1:d57c1a2cb83c 1772 // @post AINcode[rtd_ainp]: measurement result LSB code
whismanoid 5:a2e74357cfc0 1773 // @post rtd_resistance: measurement result resistance in Ohms
whismanoid 5:a2e74357cfc0 1774 // @post RTD_Temperature: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
whismanoid 0:68e64068330f 1775 //
whismanoid 3:658a93dfb2d8 1776 // @return resistance calculated from raw LSB code and reference resistance
whismanoid 1:d57c1a2cb83c 1777 double MAX11410::Measure_RTD(MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn)
whismanoid 0:68e64068330f 1778 {
whismanoid 0:68e64068330f 1779
whismanoid 0:68e64068330f 1780 //----------------------------------------
whismanoid 8:3a9dfa2e8234 1781 // restrict channel selection to valid index range
whismanoid 8:3a9dfa2e8234 1782 if ((uint8_t)rtd_iout > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD)
whismanoid 8:3a9dfa2e8234 1783 {
whismanoid 8:3a9dfa2e8234 1784 rtd_iout = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD;
whismanoid 8:3a9dfa2e8234 1785 }
whismanoid 8:3a9dfa2e8234 1786
whismanoid 8:3a9dfa2e8234 1787 //----------------------------------------
whismanoid 8:3a9dfa2e8234 1788 // restrict channel selection to valid index range
whismanoid 8:3a9dfa2e8234 1789 if ((uint8_t)rtd_ainp > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD)
whismanoid 8:3a9dfa2e8234 1790 {
whismanoid 8:3a9dfa2e8234 1791 rtd_ainp = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD;
whismanoid 8:3a9dfa2e8234 1792 }
whismanoid 8:3a9dfa2e8234 1793
whismanoid 8:3a9dfa2e8234 1794 //----------------------------------------
whismanoid 8:3a9dfa2e8234 1795 // restrict channel selection to valid index range
whismanoid 8:3a9dfa2e8234 1796 if ((uint8_t)rtd_ainn > /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND)
whismanoid 8:3a9dfa2e8234 1797 {
whismanoid 8:3a9dfa2e8234 1798 rtd_ainn = /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND;
whismanoid 8:3a9dfa2e8234 1799 }
whismanoid 8:3a9dfa2e8234 1800
whismanoid 8:3a9dfa2e8234 1801 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1802 // write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous)
whismanoid 2:eac67184cc0c 1803 Configure_FILTER((uint8_t) /* MAX11410::MAX11410_LINEF_enum_t:: */ LINEF_11_SINC4,
whismanoid 2:eac67184cc0c 1804 (uint8_t) /* MAX11410::MAX11410_RATE_enum_t:: */ RATE_0100);
whismanoid 1:d57c1a2cb83c 1805
whismanoid 1:d57c1a2cb83c 1806 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1807 // write8 0x09 CTRL to select reference resistor REF1P/REF1N; Data Format = Unipolar
whismanoid 1:d57c1a2cb83c 1808 Configure_CTRL(/*extclk*/ 0, /*u_bn*/ 1, /*format*/ 0,
whismanoid 1:d57c1a2cb83c 1809 /*refbufp_en*/ 0, /*refbufn_en*/ 0,
whismanoid 1:d57c1a2cb83c 1810 /*ref_sel*/ (uint8_t)REF_SEL_001_REF1P_REF1N);
whismanoid 1:d57c1a2cb83c 1811
whismanoid 1:d57c1a2cb83c 1812 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1813 // write8 0x0A SOURCE = 0x0B to select IDAC_MODE 400uA; AIN9=2.000V, AIN8(PT100)=2.040V, AIN8(PT1000)=2.400V
whismanoid 1:d57c1a2cb83c 1814 Configure_SOURCE(VBIAS_MODE_00_Active, BRN_MODE_00_disabled, IDAC_MODE_1011_400uA);
whismanoid 1:d57c1a2cb83c 1815
whismanoid 1:d57c1a2cb83c 1816 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1817 // write8 0x0B MUX_CTRL0 = 0x89 to select AINP=AIN8 and AINN=AIN9
whismanoid 1:d57c1a2cb83c 1818 Configure_MUX_CTRL0((uint8_t)rtd_ainp, (uint8_t)rtd_ainn);
whismanoid 1:d57c1a2cb83c 1819
whismanoid 1:d57c1a2cb83c 1820 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1821 // write8 0x0C MUX_CTRL1 = 0xF7 to select IDAC1_SEL=NC, IDAC0_SEL=AIN7
whismanoid 1:d57c1a2cb83c 1822 Configure_MUX_CTRL1((uint8_t)IDAC1_SEL_1111_unconnected, (uint8_t)rtd_iout);
whismanoid 1:d57c1a2cb83c 1823
whismanoid 1:d57c1a2cb83c 1824 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1825 // write8 0x0E PGA
whismanoid 2:eac67184cc0c 1826 Configure_PGA((uint8_t) /* MAX11410_SIG_PATH_enum_t:: */ SIG_PATH_10_PGA,
whismanoid 2:eac67184cc0c 1827 (uint8_t) /* MAX11410_GAIN_enum_t:: */ GAIN_001_2);
whismanoid 1:d57c1a2cb83c 1828
whismanoid 1:d57c1a2cb83c 1829 //----------------------------------------
whismanoid 16:00aa1e5a6843 1830 // diagnostic GPIO pulse on GP1 during RTD_power_up_interval_msec
whismanoid 16:00aa1e5a6843 1831 RegWrite(CMD_r000_0101_dddd_xddd_GP1_CTRL, 0xc3); // diagnostic GPIO pulse GP1
whismanoid 16:00aa1e5a6843 1832 // write8 0x05 GP1_CTRL (%SW 0x05 0xc3) 11000 output 011 logic 0
whismanoid 16:00aa1e5a6843 1833
whismanoid 16:00aa1e5a6843 1834 //----------------------------------------
whismanoid 9:06ca88952f1c 1835 // TODO1: timing delay after enable RTD bias current
whismanoid 9:06ca88952f1c 1836 #warning "Not Implemented Yet: timing delay after enable RTD bias current"
whismanoid 15:d5781c8fc002 1837 const int RTD_power_up_interval_msec = 100; // timing delay after enable RTD bias current
whismanoid 15:d5781c8fc002 1838 wait_ms(RTD_power_up_interval_msec); // timing delay function, platform-specific
whismanoid 9:06ca88952f1c 1839
whismanoid 9:06ca88952f1c 1840 //----------------------------------------
whismanoid 16:00aa1e5a6843 1841 // diagnostic GPIO pulse on GP1 during RTD_power_up_interval_msec
whismanoid 16:00aa1e5a6843 1842 RegWrite(CMD_r000_0101_dddd_xddd_GP1_CTRL, 0xc4); // diagnostic GPIO pulse GP1
whismanoid 16:00aa1e5a6843 1843 // write8 0x05 GP1_CTRL (%SW 0x05 0xc4) 11000 output 100 logic 1
whismanoid 16:00aa1e5a6843 1844
whismanoid 16:00aa1e5a6843 1845 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1846 // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid 1:d57c1a2cb83c 1847 RegWrite(CMD_r000_0001_xddd_xxdd_CONV_START, 0x01);
whismanoid 1:d57c1a2cb83c 1848
whismanoid 1:d57c1a2cb83c 1849 //----------------------------------------
whismanoid 0:68e64068330f 1850 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 0:68e64068330f 1851 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 0:68e64068330f 1852
whismanoid 0:68e64068330f 1853 //----------------------------------------
whismanoid 16:00aa1e5a6843 1854 // TODO1: wait until STATUS_enum_t::STATUS_000010_DATA_RDY indicates data is available
whismanoid 16:00aa1e5a6843 1855 #warning "Not Verified Yet: wait until STATUS indicates data is available"
whismanoid 16:00aa1e5a6843 1856 // A bad SPI interface can cause bit slippage, which makes this loop get stuck. Expect *PART_ID? = 0x000F02
whismanoid 16:00aa1e5a6843 1857 // while ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0) {
whismanoid 16:00aa1e5a6843 1858 // possible infinite loop; need a timeout or futility countdown to escape
whismanoid 16:00aa1e5a6843 1859 for (int futility_countdown = 3000;
whismanoid 16:00aa1e5a6843 1860 ((futility_countdown > 0) &&
whismanoid 16:00aa1e5a6843 1861 ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0));
whismanoid 16:00aa1e5a6843 1862 futility_countdown--)
whismanoid 16:00aa1e5a6843 1863 {
whismanoid 16:00aa1e5a6843 1864 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 16:00aa1e5a6843 1865 }
whismanoid 16:00aa1e5a6843 1866
whismanoid 16:00aa1e5a6843 1867 //----------------------------------------
whismanoid 1:d57c1a2cb83c 1868 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0): AINcode[ainp] = measurement
whismanoid 1:d57c1a2cb83c 1869 RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &AINcode[((int)rtd_ainp & 0x0F)]);
whismanoid 1:d57c1a2cb83c 1870 data0 = AINcode[((int)rtd_ainp & 0x0F)];
whismanoid 0:68e64068330f 1871
whismanoid 0:68e64068330f 1872 //----------------------------------------
whismanoid 15:d5781c8fc002 1873 // TODO1: turn off RTD bias current to avoid self-heating: write8 0x0C MUX_CTRL1 = 0xFF to select IDAC1_SEL=NC, IDAC0_SEL=NC
whismanoid 15:d5781c8fc002 1874 Configure_MUX_CTRL1((uint8_t)IDAC1_SEL_1111_unconnected, (uint8_t)IDAC0_SEL_1111_unconnected);
whismanoid 9:06ca88952f1c 1875
whismanoid 9:06ca88952f1c 1876 //----------------------------------------
whismanoid 5:a2e74357cfc0 1877 // resistance calculated from raw LSB code and VRef_REF1 reference resistance in ohms
whismanoid 5:a2e74357cfc0 1878 rtd_resistance = VoltageOfCode(AINcode[((int)rtd_ainp & 0x0F)]);
whismanoid 16:00aa1e5a6843 1879 TemperatureOfRTD(rtd_resistance); // calculate RTD_Temperature
whismanoid 5:a2e74357cfc0 1880 return rtd_resistance;
whismanoid 0:68e64068330f 1881 }
whismanoid 0:68e64068330f 1882
whismanoid 0:68e64068330f 1883 //----------------------------------------
whismanoid 3:658a93dfb2d8 1884 // Return the physical temperature corresponding to measured resistance
whismanoid 3:658a93dfb2d8 1885 // of a PT1000 type Resistive Temperature Device (RTD).
whismanoid 3:658a93dfb2d8 1886 //
whismanoid 3:658a93dfb2d8 1887 // @param[in] rtd_resistance = RTD resistance in ohms, default=1000
whismanoid 5:a2e74357cfc0 1888 // @post RTD_Temperature: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
whismanoid 3:658a93dfb2d8 1889 //
whismanoid 3:658a93dfb2d8 1890 // @return ideal temperature in degrees C, calculated from RTD resistance in ohms
whismanoid 19:50cf5da53d36 1891 // @test tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid 19:50cf5da53d36 1892 // @test group RTD_PT1000 TemperatureOfRTD_PT1000(842.94) expect -40.0 within 0.1 // PT-1000 RTD at -40C
whismanoid 19:50cf5da53d36 1893 // @test group RTD_PT1000 TemperatureOfRTD_PT1000(1000.0) expect 0.0 within 0.1 // PT-1000 RTD at 0C
whismanoid 19:50cf5da53d36 1894 // @test group RTD_PT1000 TemperatureOfRTD_PT1000(1097.3) expect 25.0 within 0.1 // PT-1000 RTD at 25C
whismanoid 19:50cf5da53d36 1895 // @test group RTD_PT1000 TemperatureOfRTD_PT1000(1328.1) expect 85.0 within 0.1 // PT-1000 RTD at 85C
whismanoid 19:50cf5da53d36 1896 // @test group RTD_PT1000 TemperatureOfRTD_PT1000(1479.5) expect 125.0 within 0.1 // PT-1000 RTD at 125C
whismanoid 19:50cf5da53d36 1897 // @test tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid 3:658a93dfb2d8 1898 //
whismanoid 3:658a93dfb2d8 1899 double MAX11410::TemperatureOfRTD_PT1000(double rtd_resistance)
whismanoid 3:658a93dfb2d8 1900 {
whismanoid 3:658a93dfb2d8 1901
whismanoid 3:658a93dfb2d8 1902 //----------------------------------------
whismanoid 3:658a93dfb2d8 1903 // Temperature from RTD Resistance maths
whismanoid 4:c169ba85d673 1904 // ITS-90 PT-1000 RTD
whismanoid 4:c169ba85d673 1905 double R0 = 1000.0;
whismanoid 4:c169ba85d673 1906 double a = 3.9083e-3;
whismanoid 4:c169ba85d673 1907 double b = -5.7750e-7;
whismanoid 5:a2e74357cfc0 1908 // calculate T from R and R0
whismanoid 4:c169ba85d673 1909 double sqrtTerm = sqrt(R0*R0 * a*a - 4*R0*b*(R0 - rtd_resistance));
whismanoid 4:c169ba85d673 1910 double denominator = 2 * R0 * b;
whismanoid 4:c169ba85d673 1911 RTD_Temperature = ((-R0 * a) + (sqrtTerm)) / denominator;
whismanoid 3:658a93dfb2d8 1912 return RTD_Temperature;
whismanoid 3:658a93dfb2d8 1913 }
whismanoid 3:658a93dfb2d8 1914
whismanoid 3:658a93dfb2d8 1915 //----------------------------------------
whismanoid 16:00aa1e5a6843 1916 // Return the physical temperature corresponding to measured resistance
whismanoid 16:00aa1e5a6843 1917 // of a PT100 type Resistive Temperature Device (RTD).
whismanoid 16:00aa1e5a6843 1918 //
whismanoid 16:00aa1e5a6843 1919 // @param[in] rtd_resistance = RTD resistance in ohms, default=100
whismanoid 16:00aa1e5a6843 1920 // @post RTD_Temperature: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
whismanoid 16:00aa1e5a6843 1921 //
whismanoid 16:00aa1e5a6843 1922 // @return ideal temperature in degrees C, calculated from RTD resistance in ohms
whismanoid 19:50cf5da53d36 1923 // @test tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid 19:50cf5da53d36 1924 // @test group RTD_PT100 TemperatureOfRTD_PT100(84.294) expect -40.0 within 0.1 // PT-100 RTD at -40C
whismanoid 19:50cf5da53d36 1925 // @test group RTD_PT100 TemperatureOfRTD_PT100(100.00) expect 0.0 within 0.1 // PT-100 RTD at 0C
whismanoid 19:50cf5da53d36 1926 // @test group RTD_PT100 TemperatureOfRTD_PT100(109.73) expect 25.0 within 0.1 // PT-100 RTD at 25C
whismanoid 19:50cf5da53d36 1927 // @test group RTD_PT100 TemperatureOfRTD_PT100(132.81) expect 85.0 within 0.1 // PT-100 RTD at 85C
whismanoid 19:50cf5da53d36 1928 // @test group RTD_PT100 TemperatureOfRTD_PT100(147.95) expect 125.0 within 0.1 // PT-100 RTD at 125C
whismanoid 19:50cf5da53d36 1929 // @test tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid 16:00aa1e5a6843 1930 //
whismanoid 16:00aa1e5a6843 1931 double MAX11410::TemperatureOfRTD_PT100(double rtd_resistance)
whismanoid 16:00aa1e5a6843 1932 {
whismanoid 16:00aa1e5a6843 1933
whismanoid 16:00aa1e5a6843 1934 //----------------------------------------
whismanoid 16:00aa1e5a6843 1935 // Temperature from RTD Resistance maths
whismanoid 16:00aa1e5a6843 1936 // ITS-90 PT-100 RTD
whismanoid 16:00aa1e5a6843 1937 double R0 = 100.0;
whismanoid 16:00aa1e5a6843 1938 double a = 3.9083e-3;
whismanoid 16:00aa1e5a6843 1939 double b = -5.7750e-7;
whismanoid 16:00aa1e5a6843 1940 // calculate T from R and R0
whismanoid 16:00aa1e5a6843 1941 double sqrtTerm = sqrt(R0*R0 * a*a - 4*R0*b*(R0 - rtd_resistance));
whismanoid 16:00aa1e5a6843 1942 double denominator = 2 * R0 * b;
whismanoid 16:00aa1e5a6843 1943 RTD_Temperature = ((-R0 * a) + (sqrtTerm)) / denominator;
whismanoid 16:00aa1e5a6843 1944 return RTD_Temperature;
whismanoid 16:00aa1e5a6843 1945 }
whismanoid 16:00aa1e5a6843 1946
whismanoid 16:00aa1e5a6843 1947 //----------------------------------------
whismanoid 16:00aa1e5a6843 1948 // Return the physical temperature corresponding to measured resistance
whismanoid 16:00aa1e5a6843 1949 // of a PT100 or PT1000 type Resistive Temperature Device (RTD).
whismanoid 16:00aa1e5a6843 1950 //
whismanoid 16:00aa1e5a6843 1951 // @param[in] rtd_resistance = RTD resistance in ohms, default=100
whismanoid 16:00aa1e5a6843 1952 // @post RTD_Temperature: Temperature calculated from RTD Resistance; Thermocouple Cold Junction, in degrees C
whismanoid 16:00aa1e5a6843 1953 //
whismanoid 16:00aa1e5a6843 1954 // @return ideal temperature in degrees C, calculated from RTD resistance in ohms
whismanoid 19:50cf5da53d36 1955 // @test group RTD // Verify function TemperatureOfRTD
whismanoid 19:50cf5da53d36 1956 // @test group RTD tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid 19:50cf5da53d36 1957 // @test group RTD TemperatureOfRTD(84.294) expect -40.0 within 0.1 // PT-100 RTD at -40C
whismanoid 19:50cf5da53d36 1958 // @test group RTD TemperatureOfRTD(100.00) expect 0.0 within 0.1 // PT-100 RTD at 0C
whismanoid 19:50cf5da53d36 1959 // @test group RTD TemperatureOfRTD(109.73) expect 25.0 within 0.1 // PT-100 RTD at 25C
whismanoid 19:50cf5da53d36 1960 // @test group RTD TemperatureOfRTD(132.81) expect 85.0 within 0.1 // PT-100 RTD at 85C
whismanoid 19:50cf5da53d36 1961 // @test group RTD TemperatureOfRTD(147.95) expect 125.0 within 0.1 // PT-100 RTD at 125C
whismanoid 19:50cf5da53d36 1962 // @test group RTD TemperatureOfRTD(842.94) expect -40.0 within 0.1 // PT-1000 RTD at -40C
whismanoid 19:50cf5da53d36 1963 // @test group RTD TemperatureOfRTD(1000.0) expect 0.0 within 0.1 // PT-1000 RTD at 0C
whismanoid 19:50cf5da53d36 1964 // @test group RTD TemperatureOfRTD(1097.3) expect 25.0 within 0.1 // PT-1000 RTD at 25C
whismanoid 19:50cf5da53d36 1965 // @test group RTD TemperatureOfRTD(1328.1) expect 85.0 within 0.1 // PT-1000 RTD at 85C
whismanoid 19:50cf5da53d36 1966 // @test group RTD TemperatureOfRTD(1479.5) expect 125.0 within 0.1 // PT-1000 RTD at 125C
whismanoid 19:50cf5da53d36 1967 // @test tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid 16:00aa1e5a6843 1968 //
whismanoid 16:00aa1e5a6843 1969 double MAX11410::TemperatureOfRTD(double rtd_resistance)
whismanoid 16:00aa1e5a6843 1970 {
whismanoid 16:00aa1e5a6843 1971
whismanoid 16:00aa1e5a6843 1972 //----------------------------------------
whismanoid 16:00aa1e5a6843 1973 // return TemperatureOfRTD_PT100 or TemperatureOfRTD_PT1000
whismanoid 16:00aa1e5a6843 1974 if (rtd_resistance > 500.0)
whismanoid 16:00aa1e5a6843 1975 {
whismanoid 16:00aa1e5a6843 1976 return TemperatureOfRTD_PT1000(rtd_resistance);
whismanoid 16:00aa1e5a6843 1977 }
whismanoid 16:00aa1e5a6843 1978 else
whismanoid 16:00aa1e5a6843 1979 {
whismanoid 16:00aa1e5a6843 1980 return TemperatureOfRTD_PT100(rtd_resistance);
whismanoid 16:00aa1e5a6843 1981 }
whismanoid 16:00aa1e5a6843 1982 }
whismanoid 16:00aa1e5a6843 1983
whismanoid 16:00aa1e5a6843 1984 //----------------------------------------
whismanoid 3:658a93dfb2d8 1985 // Menu item 'TM'
whismanoid 0:68e64068330f 1986 // Trigger Measurement for Thermocouple
whismanoid 0:68e64068330f 1987 //
whismanoid 0:68e64068330f 1988 // Example code for typical Thermocouple measurement.
whismanoid 1:d57c1a2cb83c 1989 // An RTD measures the "cold junction" where TC connects to the board,
whismanoid 1:d57c1a2cb83c 1990 // and the TC measures the temperature difference above the cold junction.
whismanoid 0:68e64068330f 1991 //
whismanoid 1:d57c1a2cb83c 1992 // @param[in] tc_ainp = channel of Thermocouple high side, default=AINP_SEL_0101_AIN5
whismanoid 1:d57c1a2cb83c 1993 // @param[in] tc_ainn = channel of Thermocouple low side, default=AINN_SEL_0110_AIN6
whismanoid 1:d57c1a2cb83c 1994 // @param[in] rtd_iout = channel RTD high side force, default=AINP_SEL_0111_AIN7
whismanoid 1:d57c1a2cb83c 1995 // @param[in] rtd_ainp = channel RTD high side sense, default=AINP_SEL_1000_AIN8
whismanoid 1:d57c1a2cb83c 1996 // @param[in] rtd_ainn = channel RTD low side, default=AINN_SEL_1001_AIN9
whismanoid 1:d57c1a2cb83c 1997 // @post AINcode[tc_ainp]: measurement result LSB code
whismanoid 0:68e64068330f 1998 //
whismanoid 0:68e64068330f 1999 // @return 1 on success; 0 on failure
whismanoid 1:d57c1a2cb83c 2000 double MAX11410::Measure_Thermocouple(MAX11410_AINP_SEL_enum_t tc_ainp, MAX11410_AINN_SEL_enum_t tc_ainn, MAX11410_AINP_SEL_enum_t rtd_iout, MAX11410_AINP_SEL_enum_t rtd_ainp, MAX11410_AINN_SEL_enum_t rtd_ainn)
whismanoid 0:68e64068330f 2001 {
whismanoid 0:68e64068330f 2002
whismanoid 0:68e64068330f 2003 //----------------------------------------
whismanoid 0:68e64068330f 2004 // warning -- WIP work in progress
whismanoid 0:68e64068330f 2005 #warning "Not Implemented Yet: MAX11410::Measure_Thermocouple..."
whismanoid 0:68e64068330f 2006
whismanoid 0:68e64068330f 2007 //----------------------------------------
whismanoid 8:3a9dfa2e8234 2008 // restrict channel selection to valid index range
whismanoid 8:3a9dfa2e8234 2009 if ((uint8_t)tc_ainp > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD)
whismanoid 8:3a9dfa2e8234 2010 {
whismanoid 8:3a9dfa2e8234 2011 tc_ainp = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD;
whismanoid 8:3a9dfa2e8234 2012 }
whismanoid 8:3a9dfa2e8234 2013
whismanoid 8:3a9dfa2e8234 2014 //----------------------------------------
whismanoid 8:3a9dfa2e8234 2015 // restrict channel selection to valid index range
whismanoid 8:3a9dfa2e8234 2016 if ((uint8_t)tc_ainn > /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND)
whismanoid 8:3a9dfa2e8234 2017 {
whismanoid 8:3a9dfa2e8234 2018 tc_ainn = /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND;
whismanoid 8:3a9dfa2e8234 2019 }
whismanoid 8:3a9dfa2e8234 2020
whismanoid 8:3a9dfa2e8234 2021 //----------------------------------------
whismanoid 8:3a9dfa2e8234 2022 // restrict channel selection to valid index range
whismanoid 8:3a9dfa2e8234 2023 if ((uint8_t)rtd_iout > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD)
whismanoid 8:3a9dfa2e8234 2024 {
whismanoid 8:3a9dfa2e8234 2025 rtd_iout = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD;
whismanoid 8:3a9dfa2e8234 2026 }
whismanoid 8:3a9dfa2e8234 2027
whismanoid 8:3a9dfa2e8234 2028 //----------------------------------------
whismanoid 8:3a9dfa2e8234 2029 // restrict channel selection to valid index range
whismanoid 8:3a9dfa2e8234 2030 if ((uint8_t)rtd_ainp > /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD)
whismanoid 8:3a9dfa2e8234 2031 {
whismanoid 8:3a9dfa2e8234 2032 rtd_ainp = /* MAX11410_AINP_SEL_enum_t:: */ AINP_SEL_1010_AVDD;
whismanoid 8:3a9dfa2e8234 2033 }
whismanoid 8:3a9dfa2e8234 2034
whismanoid 8:3a9dfa2e8234 2035 //----------------------------------------
whismanoid 8:3a9dfa2e8234 2036 // restrict channel selection to valid index range
whismanoid 8:3a9dfa2e8234 2037 if ((uint8_t)rtd_ainn > /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND)
whismanoid 8:3a9dfa2e8234 2038 {
whismanoid 8:3a9dfa2e8234 2039 rtd_ainn = /* MAX11410_AINN_SEL_enum_t:: */ AINN_SEL_1010_GND;
whismanoid 8:3a9dfa2e8234 2040 }
whismanoid 8:3a9dfa2e8234 2041
whismanoid 8:3a9dfa2e8234 2042 //----------------------------------------
whismanoid 8:3a9dfa2e8234 2043 // write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND
whismanoid 8:3a9dfa2e8234 2044 Configure_MUX_CTRL0((uint8_t)tc_ainp, (uint8_t)tc_ainn);
whismanoid 8:3a9dfa2e8234 2045
whismanoid 8:3a9dfa2e8234 2046 //----------------------------------------
whismanoid 8:3a9dfa2e8234 2047 // write8 0x09 CTRL to select reference REF2P/REF2N; Data Format = Bipolar 2's Complement
whismanoid 8:3a9dfa2e8234 2048 Configure_CTRL(/*extclk*/ 0, /*u_bn*/ 0, /*format*/ 0,
whismanoid 8:3a9dfa2e8234 2049 /*refbufp_en*/ 0, /*refbufn_en*/ 0,
whismanoid 8:3a9dfa2e8234 2050 /*ref_sel*/ (uint8_t)REF_SEL_010_REF2P_REF2N);
whismanoid 8:3a9dfa2e8234 2051
whismanoid 8:3a9dfa2e8234 2052 //----------------------------------------
whismanoid 8:3a9dfa2e8234 2053 // write8 0x0E PGA
whismanoid 8:3a9dfa2e8234 2054 Configure_PGA((uint8_t) /* MAX11410_SIG_PATH_enum_t:: */ SIG_PATH_00_BUFFERED,
whismanoid 8:3a9dfa2e8234 2055 (uint8_t) /* MAX11410_GAIN_enum_t:: */ GAIN_000_1);
whismanoid 8:3a9dfa2e8234 2056
whismanoid 8:3a9dfa2e8234 2057 //----------------------------------------
whismanoid 8:3a9dfa2e8234 2058 // write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous)
whismanoid 8:3a9dfa2e8234 2059 Configure_FILTER((uint8_t) /* MAX11410::MAX11410_LINEF_enum_t:: */ LINEF_11_SINC4,
whismanoid 8:3a9dfa2e8234 2060 (uint8_t) /* MAX11410::MAX11410_RATE_enum_t:: */ RATE_0100);
whismanoid 8:3a9dfa2e8234 2061
whismanoid 8:3a9dfa2e8234 2062 //----------------------------------------
whismanoid 8:3a9dfa2e8234 2063 // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid 8:3a9dfa2e8234 2064 RegWrite(CMD_r000_0001_xddd_xxdd_CONV_START, 0x01);
whismanoid 8:3a9dfa2e8234 2065
whismanoid 8:3a9dfa2e8234 2066 //----------------------------------------
whismanoid 0:68e64068330f 2067 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 0:68e64068330f 2068 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 0:68e64068330f 2069
whismanoid 0:68e64068330f 2070 //----------------------------------------
whismanoid 16:00aa1e5a6843 2071 // TODO1: wait until STATUS_enum_t::STATUS_000010_DATA_RDY indicates data is available
whismanoid 16:00aa1e5a6843 2072 #warning "Not Verified Yet: wait until STATUS indicates data is available"
whismanoid 16:00aa1e5a6843 2073 // A bad SPI interface can cause bit slippage, which makes this loop get stuck. Expect *PART_ID? = 0x000F02
whismanoid 16:00aa1e5a6843 2074 // while ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0) {
whismanoid 16:00aa1e5a6843 2075 // possible infinite loop; need a timeout or futility countdown to escape
whismanoid 16:00aa1e5a6843 2076 for (int futility_countdown = 3000;
whismanoid 16:00aa1e5a6843 2077 ((futility_countdown > 0) &&
whismanoid 16:00aa1e5a6843 2078 ((status & /* MAX11410_STATUS_enum_t:: */ STATUS_000010_DATA_RDY) == 0));
whismanoid 16:00aa1e5a6843 2079 futility_countdown--)
whismanoid 16:00aa1e5a6843 2080 {
whismanoid 16:00aa1e5a6843 2081 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 16:00aa1e5a6843 2082 }
whismanoid 16:00aa1e5a6843 2083
whismanoid 16:00aa1e5a6843 2084 //----------------------------------------
whismanoid 8:3a9dfa2e8234 2085 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0): AINcode[tc_ainp] = measurement
whismanoid 8:3a9dfa2e8234 2086 RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &AINcode[((int)tc_ainp & 0x0F)]);
whismanoid 8:3a9dfa2e8234 2087 data0 = AINcode[((int)tc_ainp & 0x0F)];
whismanoid 0:68e64068330f 2088
whismanoid 0:68e64068330f 2089 //----------------------------------------
whismanoid 1:d57c1a2cb83c 2090 // ideal voltage calculated from raw LSB code and reference voltage
whismanoid 8:3a9dfa2e8234 2091 return VoltageOfCode(AINcode[((int)tc_ainp & 0x0F)]);
whismanoid 0:68e64068330f 2092 }
whismanoid 0:68e64068330f 2093
whismanoid 3:658a93dfb2d8 2094 //----------------------------------------
whismanoid 3:658a93dfb2d8 2095 // Menu item 'TK'
whismanoid 3:658a93dfb2d8 2096 // Return the physical temperature corresponding to measured voltage
whismanoid 3:658a93dfb2d8 2097 // of a type K Thermocouple (TC).
whismanoid 3:658a93dfb2d8 2098 //
whismanoid 3:658a93dfb2d8 2099 // @pre {0}.RTD_Temperature = cold junction temperature, in degrees C
whismanoid 3:658a93dfb2d8 2100 // @param[in] tc_voltage = Thermocouple voltage in volts, default=0.0254
whismanoid 3:658a93dfb2d8 2101 //
whismanoid 3:658a93dfb2d8 2102 // @return ideal temperature in degrees C, calculated from RTD resistance in ohms
whismanoid 19:50cf5da53d36 2103 // @test tinyTester.blink_time_msec = 20 // quickly speed through the software verification
whismanoid 19:50cf5da53d36 2104 // @test group TC_1 TemperatureOfTC_TypeK(0.000e-3) expect 0.0 within 0.1 // TC_TypeK at 0C = 0.000mV
whismanoid 19:50cf5da53d36 2105 // @test group TC_1 TemperatureOfTC_TypeK(0.039e-3) expect 1.0 within 0.1 // TC_TypeK at 1C = 0.039mV
whismanoid 19:50cf5da53d36 2106 // @test group TC_1 TemperatureOfTC_TypeK(0.079e-3) expect 2.0 within 0.1 // TC_TypeK at 2C = 0.079mV
whismanoid 19:50cf5da53d36 2107 // @test group TC_1 TemperatureOfTC_TypeK(0.119e-3) expect 3.0 within 0.1 // TC_TypeK at 3C = 0.119mV
whismanoid 19:50cf5da53d36 2108 // @test group TC_2 TemperatureOfTC_TypeK(0.158e-3) expect 4.0 within 0.1 // TC_TypeK at 4C = 0.158mV
whismanoid 19:50cf5da53d36 2109 // @test group TC_2 TemperatureOfTC_TypeK(0.198e-3) expect 5.0 within 0.1 // TC_TypeK at 5C = 0.198mV
whismanoid 19:50cf5da53d36 2110 // @test group TC_2 TemperatureOfTC_TypeK(0.238e-3) expect 6.0 within 0.1 // TC_TypeK at 6C = 0.238mV
whismanoid 19:50cf5da53d36 2111 // @test group TC_2 TemperatureOfTC_TypeK(0.2775e-3) expect 7.0 within 0.1 // TC_TypeK at 7C = 0.2775mV
whismanoid 19:50cf5da53d36 2112 // @test group TC_2 TemperatureOfTC_TypeK(0.317e-3) expect 8.0 within 0.1 // TC_TypeK at 8C = 0.317mV
whismanoid 19:50cf5da53d36 2113 // @test group TC_2 TemperatureOfTC_TypeK(0.357e-3) expect 9.0 within 0.1 // TC_TypeK at 9C = 0.357mV
whismanoid 19:50cf5da53d36 2114 // @test group TC_1 TemperatureOfTC_TypeK(0.397e-3) expect 10.0 within 0.1 // TC_TypeK at 10C = 0.397mV
whismanoid 19:50cf5da53d36 2115 // @test group TC_1 TemperatureOfTC_TypeK(0.798e-3) expect 20.0 within 0.1 // TC_TypeK at 20C = 0.798mV
whismanoid 19:50cf5da53d36 2116 // @test group TC_1 TemperatureOfTC_TypeK(1.081e-3) expect 27.0 within 0.1 // TC_TypeK at 27C = 1.081mV
whismanoid 19:50cf5da53d36 2117 // @test group TC_1 TemperatureOfTC_TypeK(1.203e-3) expect 30.0 within 0.1 // TC_TypeK at 30C = 1.203mV
whismanoid 19:50cf5da53d36 2118 // @test group TC_1 TemperatureOfTC_TypeK(1.612e-3) expect 40.0 within 0.1 // TC_TypeK at 40C = 1.612mV
whismanoid 19:50cf5da53d36 2119 // @test group TC_1 TemperatureOfTC_TypeK(2.023e-3) expect 50.0 within 0.1 // TC_TypeK at 50C = 2.023mV
whismanoid 19:50cf5da53d36 2120 // @test group TC_1 TemperatureOfTC_TypeK(2.436e-3) expect 60.0 within 0.1 // TC_TypeK at 60C = 2.436mV
whismanoid 19:50cf5da53d36 2121 // @test group TC_1 TemperatureOfTC_TypeK(2.851e-3) expect 70.0 within 0.1 // TC_TypeK at 70C = 2.851mV
whismanoid 19:50cf5da53d36 2122 // @test group TC_1 TemperatureOfTC_TypeK(3.267e-3) expect 80.0 within 0.1 // TC_TypeK at 80C = 3.267mV
whismanoid 19:50cf5da53d36 2123 // @test group TC_1 TemperatureOfTC_TypeK(3.682e-3) expect 90.0 within 0.1 // TC_TypeK at 90C = 3.682mV
whismanoid 19:50cf5da53d36 2124 // @test group TC_1 TemperatureOfTC_TypeK(4.096e-3) expect 100.0 within 0.1 // TC_TypeK at 100C = 4.096mV
whismanoid 19:50cf5da53d36 2125 // @test group TC_2 TemperatureOfTC_TypeK(4.509e-3) expect 110.0 within 0.1 // TC_TypeK at 110C = 4.509mV
whismanoid 19:50cf5da53d36 2126 // @test group TC_2 TemperatureOfTC_TypeK(4.920e-3) expect 120.0 within 0.1 // TC_TypeK at 120C = 4.920mV
whismanoid 19:50cf5da53d36 2127 // @test group TC_2 TemperatureOfTC_TypeK(5.328e-3) expect 130.0 within 0.1 // TC_TypeK at 130C = 5.328mV
whismanoid 19:50cf5da53d36 2128 // @test group TC_2 TemperatureOfTC_TypeK(5.735e-3) expect 140.0 within 0.1 // TC_TypeK at 140C = 5.735mV
whismanoid 19:50cf5da53d36 2129 // @test group TC_2 TemperatureOfTC_TypeK(6.138e-3) expect 150.0 within 0.1 // TC_TypeK at 150C = 6.138mV
whismanoid 19:50cf5da53d36 2130 // @test group TC_2 TemperatureOfTC_TypeK(6.540e-3) expect 160.0 within 0.1 // TC_TypeK at 160C = 6.540mV
whismanoid 19:50cf5da53d36 2131 // @test group TC_2 TemperatureOfTC_TypeK(6.941e-3) expect 170.0 within 0.1 // TC_TypeK at 170C = 6.941mV
whismanoid 19:50cf5da53d36 2132 // @test group TC_2 TemperatureOfTC_TypeK(7.340e-3) expect 180.0 within 0.1 // TC_TypeK at 180C = 7.340mV
whismanoid 19:50cf5da53d36 2133 // @test group TC_1 TemperatureOfTC_TypeK(7.739e-3) expect 190.0 within 0.1 // TC_TypeK at 190C = 7.739mV
whismanoid 19:50cf5da53d36 2134 // @test group TC_1 TemperatureOfTC_TypeK(8.138e-3) expect 200.0 within 0.1 // TC_TypeK at 200C = 8.138mV
whismanoid 19:50cf5da53d36 2135 // @test group TC_1 TemperatureOfTC_TypeK(8.539e-3) expect 210.0 within 0.1 // TC_TypeK at 210C = 8.539mV
whismanoid 19:50cf5da53d36 2136 // @test group TC_1 TemperatureOfTC_TypeK(8.940e-3) expect 220.0 within 0.1 // TC_TypeK at 220C = 8.940mV
whismanoid 19:50cf5da53d36 2137 // @test group TC_2 TemperatureOfTC_TypeK(9.343e-3) expect 230.0 within 0.1 // TC_TypeK at 230C = 9.343mV
whismanoid 19:50cf5da53d36 2138 // @test group TC_2 TemperatureOfTC_TypeK(9.747e-3) expect 240.0 within 0.1 // TC_TypeK at 240C = 9.747mV
whismanoid 19:50cf5da53d36 2139 // @test group TC_2 TemperatureOfTC_TypeK(10.153e-3) expect 250.0 within 0.1 // TC_TypeK at 250C = 10.153mV
whismanoid 19:50cf5da53d36 2140 // @test group TC_2 TemperatureOfTC_TypeK(10.561e-3) expect 260.0 within 0.1 // TC_TypeK at 260C = 10.561mV
whismanoid 19:50cf5da53d36 2141 // @test group TC_2 TemperatureOfTC_TypeK(10.971e-3) expect 270.0 within 0.1 // TC_TypeK at 270C = 10.971mV
whismanoid 19:50cf5da53d36 2142 // @test group TC_2 TemperatureOfTC_TypeK(11.382e-3) expect 280.0 within 0.1 // TC_TypeK at 280C = 11.382mV
whismanoid 19:50cf5da53d36 2143 // @test group TC_2 TemperatureOfTC_TypeK(11.795e-3) expect 290.0 within 0.1 // TC_TypeK at 290C = 11.795mV
whismanoid 19:50cf5da53d36 2144 // @test group TC_1 TemperatureOfTC_TypeK(12.209e-3) expect 300.0 within 0.1 // TC_TypeK at 300C = 12.209mV
whismanoid 19:50cf5da53d36 2145 // @test group TC_2 TemperatureOfTC_TypeK(14.293e-3) expect 350.0 within 0.1 // TC_TypeK at 350C = 14.293mV
whismanoid 19:50cf5da53d36 2146 // @test group TC_1 TemperatureOfTC_TypeK(16.397e-3) expect 400.0 within 0.1 // TC_TypeK at 400C = 16.397mV
whismanoid 19:50cf5da53d36 2147 // @test group TC_1 TemperatureOfTC_TypeK(18.516e-3) expect 450.0 within 0.1 // TC_TypeK at 450C = 18.516mV
whismanoid 19:50cf5da53d36 2148 // @test group TC_1 TemperatureOfTC_TypeK(20.218e-3) expect 490.0 // TC_TypeK at 490C = 20.218mV
whismanoid 19:50cf5da53d36 2149 // @test tinyTester.blink_time_msec = 75 // default 75 resume hardware self test
whismanoid 3:658a93dfb2d8 2150 //
whismanoid 3:658a93dfb2d8 2151 double MAX11410::TemperatureOfTC_TypeK(double tc_voltage)
whismanoid 3:658a93dfb2d8 2152 {
whismanoid 3:658a93dfb2d8 2153
whismanoid 3:658a93dfb2d8 2154 //----------------------------------------
whismanoid 3:658a93dfb2d8 2155 // Temperature from TC_TypeK voltage maths
whismanoid 5:a2e74357cfc0 2156 // define standard TC_TypeK coefficients
whismanoid 4:c169ba85d673 2157 // ITS-90 Thermocouple Inverse Polynomial for a Type K thermocouple
whismanoid 5:a2e74357cfc0 2158 // calculate deltaT from tc_voltage
whismanoid 4:c169ba85d673 2159 //
whismanoid 4:c169ba85d673 2160 // Voltage range -5891uV < tc_voltage < 0uV,
whismanoid 4:c169ba85d673 2161 // Temperature Range -200 deg C to 0 deg C
whismanoid 4:c169ba85d673 2162 static double coefficients_TCtypeK_V_lt_0[] = {
whismanoid 4:c169ba85d673 2163 0.00000,
whismanoid 4:c169ba85d673 2164 2.5173462e-2,
whismanoid 4:c169ba85d673 2165 -1.1662878e-6,
whismanoid 4:c169ba85d673 2166 -1.0833638e-9,
whismanoid 4:c169ba85d673 2167 -8.9773540e-13,
whismanoid 4:c169ba85d673 2168 -3.7342377e-16,
whismanoid 4:c169ba85d673 2169 -8.6632643e-20,
whismanoid 4:c169ba85d673 2170 -1.0450598e-23,
whismanoid 4:c169ba85d673 2171 -5.1920577e-28,
whismanoid 4:c169ba85d673 2172 };
whismanoid 4:c169ba85d673 2173 //
whismanoid 4:c169ba85d673 2174 // Voltage range 0uV < tc_voltage < 20.644uV,
whismanoid 4:c169ba85d673 2175 // Temperature Range 0 deg C to 500 deg C
whismanoid 4:c169ba85d673 2176 static double coefficients_TCtypeK_0_lt_V_lt_20u644V[] = {
whismanoid 4:c169ba85d673 2177 0.00000,
whismanoid 4:c169ba85d673 2178 2.508355e-2,
whismanoid 4:c169ba85d673 2179 7.860106e-8,
whismanoid 4:c169ba85d673 2180 -2.503131e-10,
whismanoid 4:c169ba85d673 2181 8.315270e-14,
whismanoid 4:c169ba85d673 2182 -1.228034e-17,
whismanoid 4:c169ba85d673 2183 9.804036e-22,
whismanoid 4:c169ba85d673 2184 -4.413030e-26,
whismanoid 4:c169ba85d673 2185 1.057734e-30,
whismanoid 4:c169ba85d673 2186 -1.052755e-35,
whismanoid 4:c169ba85d673 2187 };
whismanoid 4:c169ba85d673 2188 //
whismanoid 4:c169ba85d673 2189 // Voltage range 20.6440uV < tc_voltage < 54.886uV,
whismanoid 4:c169ba85d673 2190 // Temperature Range 500 deg C to 1372 deg C
whismanoid 4:c169ba85d673 2191 static double coefficients_TCtypeK_20u644V_lt_V_lt_54u886V[] = {
whismanoid 4:c169ba85d673 2192 -1.318058e2,
whismanoid 4:c169ba85d673 2193 4.830222e-2,
whismanoid 4:c169ba85d673 2194 -1.646031e-6,
whismanoid 4:c169ba85d673 2195 5.464731e-11,
whismanoid 4:c169ba85d673 2196 -9.650715e-16,
whismanoid 4:c169ba85d673 2197 8.802193e-21,
whismanoid 4:c169ba85d673 2198 -3.110810e-26,
whismanoid 4:c169ba85d673 2199 };
whismanoid 4:c169ba85d673 2200 //
whismanoid 3:658a93dfb2d8 2201 double deltaT = 0;
whismanoid 4:c169ba85d673 2202 double thermocouple_voltage_uV = tc_voltage * 1e6;
whismanoid 4:c169ba85d673 2203 if (thermocouple_voltage_uV < 0)
whismanoid 4:c169ba85d673 2204 {
whismanoid 4:c169ba85d673 2205 // Voltage range -5891uV < DMMavg < 0uV, Temperature Range -200 deg C to 0 deg C
whismanoid 4:c169ba85d673 2206 deltaT = temperatureDegC_polynomial(thermocouple_voltage_uV, 9, coefficients_TCtypeK_V_lt_0);
whismanoid 4:c169ba85d673 2207 }
whismanoid 4:c169ba85d673 2208 else if (thermocouple_voltage_uV > 20644)
whismanoid 4:c169ba85d673 2209 {
whismanoid 4:c169ba85d673 2210 // Voltage range 206440uV < DMMavg < 54886uV, Temperature Range 500 deg C to 1372 deg C
whismanoid 4:c169ba85d673 2211 deltaT = temperatureDegC_polynomial(thermocouple_voltage_uV, 7, coefficients_TCtypeK_20u644V_lt_V_lt_54u886V);
whismanoid 4:c169ba85d673 2212 }
whismanoid 4:c169ba85d673 2213 else
whismanoid 4:c169ba85d673 2214 {
whismanoid 4:c169ba85d673 2215 // Voltage range 0uV < DMMavg < 20.644uV, Temperature Range 0 deg C to 500 deg C
whismanoid 4:c169ba85d673 2216 deltaT = temperatureDegC_polynomial(thermocouple_voltage_uV, 10, coefficients_TCtypeK_0_lt_V_lt_20u644V);
whismanoid 4:c169ba85d673 2217 }
whismanoid 4:c169ba85d673 2218 return deltaT; // + RTD_Temperature; // cold junction
whismanoid 4:c169ba85d673 2219 }
whismanoid 4:c169ba85d673 2220
whismanoid 4:c169ba85d673 2221 //----------------------------------------
whismanoid 4:c169ba85d673 2222 // Calculate temperature in degrees C from input voltage,
whismanoid 4:c169ba85d673 2223 // using a given set of polynomial coefficients.
whismanoid 4:c169ba85d673 2224 // For example:
whismanoid 4:c169ba85d673 2225 //
whismanoid 4:c169ba85d673 2226 // t = coefficients[0] + coefficients[1] * DMMavg + coefficients[2] * DmMMavg**2
whismanoid 4:c169ba85d673 2227 //
whismanoid 4:c169ba85d673 2228 // @param[in] thermocouple_voltage_uV = Thermocouple voltage in microvolts
whismanoid 4:c169ba85d673 2229 //
whismanoid 4:c169ba85d673 2230 // @return ideal temperature in degrees C, calculated from polynomial coefficients
whismanoid 4:c169ba85d673 2231 //
whismanoid 4:c169ba85d673 2232 double MAX11410::temperatureDegC_polynomial(double thermocouple_voltage_uV, int num_coefficients, double coefficients[])
whismanoid 4:c169ba85d673 2233 {
whismanoid 4:c169ba85d673 2234
whismanoid 4:c169ba85d673 2235 //----------------------------------------
whismanoid 4:c169ba85d673 2236 // warning -- WIP work in progress
whismanoid 4:c169ba85d673 2237 #warning "Not Tested Yet: MAX11410::temperatureDegC_polynomial..."
whismanoid 4:c169ba85d673 2238
whismanoid 4:c169ba85d673 2239 //----------------------------------------
whismanoid 4:c169ba85d673 2240 // Temperature from polynomial coefficients maths
whismanoid 4:c169ba85d673 2241 double temperatureDegC = 0;
whismanoid 4:c169ba85d673 2242 int index;
whismanoid 4:c169ba85d673 2243 for (index = num_coefficients-1; index >= 0; index--)
whismanoid 4:c169ba85d673 2244 {
whismanoid 4:c169ba85d673 2245 temperatureDegC = (temperatureDegC * thermocouple_voltage_uV) + coefficients[index];
whismanoid 4:c169ba85d673 2246 }
whismanoid 4:c169ba85d673 2247 return temperatureDegC;
whismanoid 3:658a93dfb2d8 2248 }
whismanoid 3:658a93dfb2d8 2249
whismanoid 0:68e64068330f 2250
whismanoid 0:68e64068330f 2251 // End of file